/* Generated automatically by the program `genemit'
from the machine description file `md'.  */

#define IN_TARGET_CODE 1
#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "backend.h"
#include "predict.h"
#include "tree.h"
#include "rtl.h"
#include "alias.h"
#include "varasm.h"
#include "stor-layout.h"
#include "calls.h"
#include "memmodel.h"
#include "tm_p.h"
#include "flags.h"
#include "insn-config.h"
#include "expmed.h"
#include "dojump.h"
#include "explow.h"
#include "emit-rtl.h"
#include "stmt.h"
#include "expr.h"
#include "insn-codes.h"
#include "optabs.h"
#include "dfp.h"
#include "output.h"
#include "recog.h"
#include "df.h"
#include "resource.h"
#include "reload.h"
#include "diagnostic-core.h"
#include "regs.h"
#include "tm-constrs.h"
#include "ggc.h"
#include "target.h"

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:484 */
rtx
gen_indirect_jump (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (pc_rtx,
	operand0);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:495 */
rtx
gen_jump (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (pc_rtx,
	gen_rtx_LABEL_REF (VOIDmode,
	operand0));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:540 */
rtx
gen_ccmpccsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_COMPARE (CCmode,
	operand2,
	operand3),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		operand5),
	106)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:540 */
rtx
gen_ccmpccdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_COMPARE (CCmode,
	operand2,
	operand3),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		operand5),
	106)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:560 */
rtx
gen_ccmpccfpsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_COMPARE (CCFPmode,
	operand2,
	operand3),
	gen_rtx_UNSPEC (CCFPmode,
	gen_rtvec (1,
		operand5),
	106)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:560 */
rtx
gen_ccmpccfpdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_COMPARE (CCFPmode,
	operand2,
	operand3),
	gen_rtx_UNSPEC (CCFPmode,
	gen_rtvec (1,
		operand5),
	106)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:560 */
rtx
gen_ccmpccfpesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPEmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_COMPARE (CCFPEmode,
	operand2,
	operand3),
	gen_rtx_UNSPEC (CCFPEmode,
	gen_rtvec (1,
		operand5),
	106)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:560 */
rtx
gen_ccmpccfpedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPEmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_COMPARE (CCFPEmode,
	operand2,
	operand3),
	gen_rtx_UNSPEC (CCFPEmode,
	gen_rtvec (1,
		operand5),
	106)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:577 */
rtx
gen_ccmpccsi_rev (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		operand5),
	106),
	gen_rtx_COMPARE (CCmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:577 */
rtx
gen_ccmpccdi_rev (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (1,
		operand5),
	106),
	gen_rtx_COMPARE (CCmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:597 */
rtx
gen_ccmpccfpsf_rev (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_UNSPEC (CCFPmode,
	gen_rtvec (1,
		operand5),
	106),
	gen_rtx_COMPARE (CCFPmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:597 */
rtx
gen_ccmpccfpdf_rev (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_UNSPEC (CCFPmode,
	gen_rtvec (1,
		operand5),
	106),
	gen_rtx_COMPARE (CCFPmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:597 */
rtx
gen_ccmpccfpesf_rev (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPEmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_UNSPEC (CCFPEmode,
	gen_rtvec (1,
		operand5),
	106),
	gen_rtx_COMPARE (CCFPEmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:597 */
rtx
gen_ccmpccfpedf_rev (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand1,
	gen_rtx_IF_THEN_ELSE (CCFPEmode,
	gen_rtx_fmt_ee (GET_CODE (operand4), VOIDmode,
		operand0,
		const0_rtx),
	gen_rtx_UNSPEC (CCFPEmode,
	gen_rtvec (1,
		operand5),
	106),
	gen_rtx_COMPARE (CCFPEmode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:670 */
rtx
gen_condjump (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		const0_rtx),
	gen_rtx_LABEL_REF (VOIDmode,
	operand2),
	pc_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:814 */
rtx
gen_nop (void)
{
  return gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	59);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:821 */
rtx
gen_prefetch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	operand0,
	operand1,
	operand2);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:852 */
rtx
gen_trap (void)
{
  return gen_rtx_TRAP_IF (VOIDmode,
	const1_rtx,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:913 */
rtx
gen_simple_return (void)
{
  return simple_return_rtx;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1350 */
rtx
gen_insv_immsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_ZERO_EXTRACT (SImode,
	operand0,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	operand1),
	operand2);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1350 */
rtx
gen_insv_immdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_ZERO_EXTRACT (DImode,
	operand0,
	const_int_rtx[MAX_SAVED_CONST_INT + (16)],
	operand1),
	operand2);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1362 */
rtx
gen_aarch64_movksi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_AND (SImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1362 */
rtx
gen_aarch64_movkdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_AND (DImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1627 */
rtx
gen_aarch64_movmemdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand2,
	const0_rtx),
		gen_rtx_CLOBBER (VOIDmode,
	operand0),
		gen_rtx_CLOBBER (VOIDmode,
	operand1),
		gen_rtx_SET (gen_rtx_MEM (BLKmode,
	operand0),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		gen_rtx_MEM (BLKmode,
	operand1),
		operand2),
	58))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1716 */
rtx
gen_load_pair_sw_sisi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1716 */
rtx
gen_load_pair_sw_sfsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1716 */
rtx
gen_load_pair_sw_sisf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1716 */
rtx
gen_load_pair_sw_sfsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1733 */
rtx
gen_load_pair_dw_didi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1733 */
rtx
gen_load_pair_dw_didf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1733 */
rtx
gen_load_pair_dw_dfdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1733 */
rtx
gen_load_pair_dw_dfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1749 */
rtx
gen_load_pair_dw_tftf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1766 */
rtx
gen_store_pair_sw_sisi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1766 */
rtx
gen_store_pair_sw_sfsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1766 */
rtx
gen_store_pair_sw_sisf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1766 */
rtx
gen_store_pair_sw_sfsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1783 */
rtx
gen_store_pair_dw_didi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1783 */
rtx
gen_store_pair_dw_didf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1783 */
rtx
gen_store_pair_dw_dfdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1783 */
rtx
gen_store_pair_dw_dfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1799 */
rtx
gen_store_pair_dw_tftf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1816 */
rtx
gen_loadwb_pairsi_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (SImode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1816 */
rtx
gen_loadwb_pairsi_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (SImode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (SImode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1816 */
rtx
gen_loadwb_pairdi_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (DImode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (DImode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1816 */
rtx
gen_loadwb_pairdi_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (DImode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (DImode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1831 */
rtx
gen_loadwb_pairsf_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (SFmode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (SFmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1831 */
rtx
gen_loadwb_pairdf_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (DFmode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (DFmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1831 */
rtx
gen_loadwb_pairsf_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (SFmode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (SFmode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1831 */
rtx
gen_loadwb_pairdf_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (DFmode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (DFmode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1846 */
rtx
gen_loadwb_pairti_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (TImode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (TImode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1846 */
rtx
gen_loadwb_pairtf_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (TFmode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (TFmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1846 */
rtx
gen_loadwb_pairti_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (TImode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (TImode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1846 */
rtx
gen_loadwb_pairtf_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (operand2,
	gen_rtx_MEM (TFmode,
	operand1)),
		gen_rtx_SET (operand3,
	gen_rtx_MEM (TFmode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand5)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1863 */
rtx
gen_storewb_pairsi_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1863 */
rtx
gen_storewb_pairsi_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (SImode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1863 */
rtx
gen_storewb_pairdi_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (DImode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (DImode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1863 */
rtx
gen_storewb_pairdi_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (DImode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (DImode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1879 */
rtx
gen_storewb_pairsf_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (SFmode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (SFmode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1879 */
rtx
gen_storewb_pairdf_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (DFmode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (DFmode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1879 */
rtx
gen_storewb_pairsf_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (SFmode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (SFmode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1879 */
rtx
gen_storewb_pairdf_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (DFmode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (DFmode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1895 */
rtx
gen_storewb_pairti_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (TImode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (TImode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1895 */
rtx
gen_storewb_pairtf_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (TFmode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (TFmode,
	gen_rtx_PLUS (SImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1895 */
rtx
gen_storewb_pairti_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (TImode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (TImode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1895 */
rtx
gen_storewb_pairtf_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand4)),
		gen_rtx_SET (gen_rtx_MEM (TFmode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand4)),
	operand2),
		gen_rtx_SET (gen_rtx_MEM (TFmode,
	gen_rtx_PLUS (DImode,
	operand0,
	operand5)),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2346 */
rtx
gen_addsi3_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2346 */
rtx
gen_adddi3_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2394 */
rtx
gen_addsi3_compareC (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Cmode,
	66),
	gen_rtx_COMPARE (CC_Cmode,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2),
	copy_rtx (operand1))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2394 */
rtx
gen_adddi3_compareC (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Cmode,
	66),
	gen_rtx_COMPARE (CC_Cmode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2),
	copy_rtx (operand1))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2440 */
rtx
gen_addsi3_compareV_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2440 */
rtx
gen_adddi3_compareV_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	operand1),
	operand2),
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2458 */
rtx
gen_addsi3_compareV (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2458 */
rtx
gen_adddi3_compareV (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	operand1),
	gen_rtx_SIGN_EXTEND (TImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2582 */
rtx
gen_aarch64_subsi_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_MINUS (SImode,
	operand0,
	operand1),
	const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2582 */
rtx
gen_aarch64_subdi_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_MINUS (DImode,
	operand0,
	operand1),
	const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2870 */
rtx
gen_subsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2890 */
rtx
gen_subdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2918 */
rtx
gen_subvsi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2)),
	gen_rtx_MINUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand1)),
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2918 */
rtx
gen_subvdi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2)),
	gen_rtx_MINUS (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	copy_rtx (operand1)),
	gen_rtx_SIGN_EXTEND (TImode,
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2934 */
rtx
gen_subvsi_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2)),
	gen_rtx_MINUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand1)),
	copy_rtx (operand2)))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2934 */
rtx
gen_subvdi_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2)),
	gen_rtx_MINUS (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	copy_rtx (operand1)),
	copy_rtx (operand2)))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2965 */
rtx
gen_negvsi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_NEG (SImode,
	operand1)),
	gen_rtx_NEG (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	copy_rtx (operand1))))),
		gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	copy_rtx (operand1)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2965 */
rtx
gen_negvdi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_NEG (DImode,
	operand1)),
	gen_rtx_NEG (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	copy_rtx (operand1))))),
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	copy_rtx (operand1)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2978 */
rtx
gen_negvsi_cmp_only (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_NEG (SImode,
	operand0)),
	gen_rtx_NEG (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand0))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2978 */
rtx
gen_negvdi_cmp_only (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_NEG (DImode,
	operand0)),
	gen_rtx_NEG (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	operand0))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3092 */
rtx
gen_negdi_carryout (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	const0_rtx,
	operand1)),
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	copy_rtx (operand1)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3103 */
rtx
gen_negvdi_carryinV (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_NEG (TImode,
	gen_rtx_PLUS (TImode,
	gen_rtx_LTU (TImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx),
	gen_rtx_SIGN_EXTEND (TImode,
	operand1))),
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_NEG (DImode,
	gen_rtx_PLUS (DImode,
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx),
	copy_rtx (operand1)))))),
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_PLUS (DImode,
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx),
	copy_rtx (operand1))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3145 */
rtx
gen_subsi3_compare1_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3145 */
rtx
gen_subdi3_compare1_imm (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3161 */
rtx
gen_subsi3_compare1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3161 */
rtx
gen_subdi3_compare1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand2)),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	copy_rtx (operand1),
	copy_rtx (operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3586 */
rtx
gen_negsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3586 */
rtx
gen_negdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3627 */
rtx
gen_negsi2_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_NEG (SImode,
	operand1),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	copy_rtx (operand1)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3627 */
rtx
gen_negdi2_compare0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_NEG (DImode,
	operand1),
	const0_rtx)),
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	copy_rtx (operand1)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3698 */
rtx
gen_mulsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3698 */
rtx
gen_muldi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3718 */
rtx
gen_maddsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_MULT (SImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3718 */
rtx
gen_madddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3786 */
rtx
gen_mulsidi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3786 */
rtx
gen_umulsidi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3795 */
rtx
gen_maddsidi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3795 */
rtx
gen_umaddsidi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3806 */
rtx
gen_msubsidi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand3,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3806 */
rtx
gen_umsubsidi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand3,
	gen_rtx_MULT (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3870 */
rtx
gen_smuldi3_highpart (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (DImode,
	gen_rtx_LSHIFTRT (TImode,
	gen_rtx_MULT (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	operand1),
	gen_rtx_SIGN_EXTEND (TImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (64)])));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3870 */
rtx
gen_umuldi3_highpart (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (DImode,
	gen_rtx_LSHIFTRT (TImode,
	gen_rtx_MULT (TImode,
	gen_rtx_ZERO_EXTEND (TImode,
	operand1),
	gen_rtx_ZERO_EXTEND (TImode,
	operand2)),
	const_int_rtx[MAX_SAVED_CONST_INT + (64)])));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3883 */
rtx
gen_divsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_DIV (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3883 */
rtx
gen_udivsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UDIV (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3883 */
rtx
gen_divdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_DIV (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3883 */
rtx
gen_udivdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UDIV (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3907 */
rtx
gen_cmpsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3907 */
rtx
gen_cmpdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3919 */
rtx
gen_fcmpsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CCFPmode,
	66),
	gen_rtx_COMPARE (CCFPmode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3919 */
rtx
gen_fcmpdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CCFPmode,
	66),
	gen_rtx_COMPARE (CCFPmode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3930 */
rtx
gen_fcmpesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CCFPEmode,
	66),
	gen_rtx_COMPARE (CCFPEmode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3930 */
rtx
gen_fcmpedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CCFPEmode,
	66),
	gen_rtx_COMPARE (CCFPEmode,
	operand0,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4016 */
rtx
gen_aarch64_cstoreqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), QImode,
		operand2,
		const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4016 */
rtx
gen_aarch64_cstorehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), HImode,
		operand2,
		const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4016 */
rtx
gen_aarch64_cstoresi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4016 */
rtx
gen_aarch64_cstoredi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), DImode,
		operand2,
		const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4071 */
rtx
gen_cstoreqi_neg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (QImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), QImode,
		operand2,
		const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4071 */
rtx
gen_cstorehi_neg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), HImode,
		operand2,
		const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4071 */
rtx
gen_cstoresi_neg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4071 */
rtx
gen_cstoredi_neg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), DImode,
		operand2,
		const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32b (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	7));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32h (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	12));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32w (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	13));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32x (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	14));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32cb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	8));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32ch (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	9));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32cw (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	10));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4268 */
rtx
gen_aarch64_crc32cx (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	11));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4292 */
rtx
gen_csinc3si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	gen_rtx_PLUS (SImode,
	operand2,
	const1_rtx),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4292 */
rtx
gen_csinc3di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	operand2,
	const1_rtx),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4327 */
rtx
gen_csneg3si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	gen_rtx_NEG (SImode,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4327 */
rtx
gen_csneg3di_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand1,
	gen_rtx_NEG (DImode,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4421 */
rtx
gen_aarch64_uqdecsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_UMAX (SImode,
	operand1,
	operand2),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4421 */
rtx
gen_aarch64_uqdecdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	gen_rtx_UMAX (DImode,
	operand1,
	operand2),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4484 */
rtx
gen_andsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4484 */
rtx
gen_iorsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4484 */
rtx
gen_xorsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4484 */
rtx
gen_anddi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4484 */
rtx
gen_iordi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4484 */
rtx
gen_xordi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4686 */
rtx
gen_one_cmplsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4686 */
rtx
gen_one_cmpldi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_ashlsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_ashlsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_ashlsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_ashrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_ashrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_ashrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_lshrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_lshrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_lshrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_rotrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ROTATERT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_rotrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ROTATERT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_rotrsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	gen_rtx_NOT (SImode,
	gen_rtx_ROTATERT (SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_ashldi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ASHIFT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_ashldi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ASHIFT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_ashldi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ASHIFT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_ashrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ASHIFTRT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_ashrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ASHIFTRT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_ashrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ASHIFTRT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_lshrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_lshrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_lshrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_and_one_cmpl_rotrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ROTATERT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_ior_one_cmpl_rotrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ROTATERT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4810 */
rtx
gen_xor_one_cmpl_rotrdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	gen_rtx_NOT (DImode,
	gen_rtx_ROTATERT (DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4899 */
rtx
gen_clzsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4899 */
rtx
gen_clzdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4953 */
rtx
gen_clrsbsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4953 */
rtx
gen_clrsbdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4961 */
rtx
gen_aarch64_rbitsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	66));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4961 */
rtx
gen_aarch64_rbitdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	66));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4974 */
rtx
gen_ctzsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CTZ (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4974 */
rtx
gen_ctzdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CTZ (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5956 */
rtx
gen_bswapsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5956 */
rtx
gen_bswapdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5964 */
rtx
gen_bswaphi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5972 */
rtx
gen_aarch64_rev16si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5972 */
rtx
gen_aarch64_rev16di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6035 */
rtx
gen_rev16si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_AND (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand3),
	gen_rtx_AND (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6035 */
rtx
gen_rev16di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_AND (DImode,
	gen_rtx_ASHIFT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand3),
	gen_rtx_AND (DImode,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6049 */
rtx
gen_rev16si2_alt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_AND (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand2),
	gen_rtx_AND (SImode,
	gen_rtx_ASHIFT (SImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6049 */
rtx
gen_rev16di2_alt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_AND (DImode,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand2),
	gen_rtx_AND (DImode,
	gen_rtx_ASHIFT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (8)]),
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_btrunchf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_ceilhf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_floorhf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_roundevenhf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_nearbyinthf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_rinthf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_roundhf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_btruncsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_ceilsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_floorsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_roundevensf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_nearbyintsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_rintsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_roundsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_btruncdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_ceildf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_floordf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_roundevendf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_nearbyintdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_rintdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6079 */
rtx
gen_rounddf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtrunchfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceilhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncuhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceiluhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lflooruhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lrounduhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnuhfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceilsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceilusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnusfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncdfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceildfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloordfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lrounddfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintndfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncudfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceiludfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorudfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundudfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnudfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtrunchfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceilhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncuhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceiluhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lflooruhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lrounduhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnuhfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncsfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceilsfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorsfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundsfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnsfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncusfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceilusfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorusfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundusfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnusfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncdfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceildfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloordfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lrounddfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintndfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lbtruncudfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lceiludfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfloorudfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lroundudfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6090 */
rtx
gen_lfrintnudfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6214 */
rtx
gen_extendsfdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6222 */
rtx
gen_extendhfsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6230 */
rtx
gen_extendhfdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6238 */
rtx
gen_truncdfsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6246 */
rtx
gen_truncsfhf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6254 */
rtx
gen_truncdfhf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6265 */
rtx
gen_fix_truncsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6265 */
rtx
gen_fixuns_truncsfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6265 */
rtx
gen_fix_truncdfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6265 */
rtx
gen_fixuns_truncdfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6278 */
rtx
gen_fix_trunchfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6278 */
rtx
gen_fixuns_trunchfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6278 */
rtx
gen_fix_trunchfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6278 */
rtx
gen_fixuns_trunchfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6289 */
rtx
gen_fix_truncdfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6289 */
rtx
gen_fixuns_truncdfsi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6289 */
rtx
gen_fix_truncsfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6289 */
rtx
gen_fixuns_truncsfdi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6345 */
rtx
gen_floatsisf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6345 */
rtx
gen_floatunssisf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6345 */
rtx
gen_floatdidf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6345 */
rtx
gen_floatunsdidf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6357 */
rtx
gen_floatdisf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6357 */
rtx
gen_floatunsdisf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6357 */
rtx
gen_floatsidf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6357 */
rtx
gen_floatunssidf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6372 */
rtx
gen_aarch64_fp16_floatsihf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6372 */
rtx
gen_aarch64_fp16_floatunssihf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6372 */
rtx
gen_aarch64_fp16_floatdihf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6372 */
rtx
gen_aarch64_fp16_floatunsdihf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6429 */
rtx
gen_fcvtzssf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6429 */
rtx
gen_fcvtzusf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6429 */
rtx
gen_fcvtzsdf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6429 */
rtx
gen_fcvtzudf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6442 */
rtx
gen_scvtfsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6442 */
rtx
gen_ucvtfsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6442 */
rtx
gen_scvtfdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6442 */
rtx
gen_ucvtfdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6455 */
rtx
gen_fcvtzshfsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6455 */
rtx
gen_fcvtzuhfsi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6455 */
rtx
gen_fcvtzshfdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6455 */
rtx
gen_fcvtzuhfdi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6465 */
rtx
gen_scvtfsihf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6465 */
rtx
gen_ucvtfsihf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6465 */
rtx
gen_scvtfdihf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6465 */
rtx
gen_ucvtfdihf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6475 */
rtx
gen_fcvtzshf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6475 */
rtx
gen_fcvtzuhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6485 */
rtx
gen_scvtfhi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6485 */
rtx
gen_ucvtfhi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6499 */
rtx
gen_addhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6499 */
rtx
gen_addsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6499 */
rtx
gen_adddf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6509 */
rtx
gen_subhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6509 */
rtx
gen_subsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6509 */
rtx
gen_subdf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6519 */
rtx
gen_mulhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6519 */
rtx
gen_mulsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6519 */
rtx
gen_muldf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6570 */
rtx
gen_neghf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6570 */
rtx
gen_negsf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6570 */
rtx
gen_negdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6595 */
rtx
gen_abshf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6595 */
rtx
gen_abssf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6595 */
rtx
gen_absdf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6607 */
rtx
gen_smaxsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6607 */
rtx
gen_smaxdf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6616 */
rtx
gen_sminsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6616 */
rtx
gen_smindf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmax_nanhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmin_nanhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmaxhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fminhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmax_nansf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmin_nansf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmaxsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fminsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmax_nandf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmin_nandf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmaxdf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6628 */
rtx
gen_fmindf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6682 */
rtx
gen_copysignsf3_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	147));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6682 */
rtx
gen_copysigndf3_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	147));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6785 */
rtx
gen_aarch64_movdi_tilow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTRACT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (64)],
	const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6785 */
rtx
gen_aarch64_movdi_tflow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTRACT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (64)],
	const0_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6795 */
rtx
gen_aarch64_movdi_tihigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTRACT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (64)],
	const_int_rtx[MAX_SAVED_CONST_INT + (64)]));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6795 */
rtx
gen_aarch64_movdi_tfhigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTRACT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (64)],
	const_int_rtx[MAX_SAVED_CONST_INT + (64)]));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6805 */
rtx
gen_aarch64_movtihigh_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_ZERO_EXTRACT (TImode,
	operand0,
	const_int_rtx[MAX_SAVED_CONST_INT + (64)],
	const_int_rtx[MAX_SAVED_CONST_INT + (64)]),
	gen_rtx_ZERO_EXTEND (TImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6805 */
rtx
gen_aarch64_movtfhigh_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_ZERO_EXTRACT (TFmode,
	operand0,
	const_int_rtx[MAX_SAVED_CONST_INT + (64)],
	const_int_rtx[MAX_SAVED_CONST_INT + (64)]),
	gen_rtx_ZERO_EXTEND (TFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6815 */
rtx
gen_aarch64_movtilow_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (TImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6815 */
rtx
gen_aarch64_movtflow_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (TFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6824 */
rtx
gen_aarch64_movtilow_tilow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (TImode,
	gen_rtx_TRUNCATE (DImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6855 */
rtx
gen_add_losym_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LO_SUM (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6855 */
rtx
gen_add_losym_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LO_SUM (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6864 */
rtx
gen_ldr_got_small_28k_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_MEM (SImode,
	gen_rtx_LO_SUM (SImode,
	operand1,
	operand2))),
	34));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6864 */
rtx
gen_ldr_got_small_28k_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		gen_rtx_MEM (DImode,
	gen_rtx_LO_SUM (DImode,
	operand1,
	operand2))),
	34));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6875 */
rtx
gen_ldr_got_small_28k_sidi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_MEM (SImode,
	gen_rtx_LO_SUM (DImode,
	operand1,
	operand2))),
	34)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6887 */
rtx
gen_ldr_got_tiny_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	36));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6887 */
rtx
gen_ldr_got_tiny_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	36));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6896 */
rtx
gen_ldr_got_tiny_sidi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	36)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6906 */
rtx
gen_aarch64_load_tp_hard (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	85));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6940 */
rtx
gen_tlsie_small_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	35));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6940 */
rtx
gen_tlsie_small_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	35));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6950 */
rtx
gen_tlsie_small_sidi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	35)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6961 */
rtx
gen_tlsie_tiny_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	37));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6961 */
rtx
gen_tlsie_tiny_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	37));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6972 */
rtx
gen_tlsie_tiny_sidi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	37)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6985 */
rtx
gen_tlsle12_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	87));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6985 */
rtx
gen_tlsle12_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	87));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6996 */
rtx
gen_tlsle24_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	88));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6996 */
rtx
gen_tlsle24_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	88));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7007 */
rtx
gen_tlsle32_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	89));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7007 */
rtx
gen_tlsle32_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	89));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7017 */
rtx
gen_tlsle48_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	90));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7017 */
rtx
gen_tlsle48_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	90));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7046 */
rtx
gen_tlsdesc_small_advsimd_si (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (gen_rtx_REG (SImode,
	0),
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand0),
	86)),
		gen_hard_reg_clobber (DImode, 30),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_USE (VOIDmode,
	gen_rtx_REG (DImode,
	29))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7046 */
rtx
gen_tlsdesc_small_advsimd_di (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (gen_rtx_REG (DImode,
	0),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand0),
	86)),
		gen_hard_reg_clobber (DImode, 30),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_USE (VOIDmode,
	gen_rtx_REG (DImode,
	29))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7062 */
rtx
gen_tlsdesc_small_sve_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (gen_rtx_REG (SImode,
	0),
	gen_rtx_CALL (VOIDmode,
	gen_rtx_MEM (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand0),
	86)),
	const0_rtx)),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	4),
		gen_hard_reg_clobber (DImode, 30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7062 */
rtx
gen_tlsdesc_small_sve_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (gen_rtx_REG (DImode,
	0),
	gen_rtx_CALL (VOIDmode,
	gen_rtx_MEM (DImode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand0),
	86)),
	const0_rtx)),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	4),
		gen_hard_reg_clobber (DImode, 30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7075 */
rtx
gen_stack_tie (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand0,
		operand1),
	64));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7085 */
rtx
gen_aarch64_fjcvtzs (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	17)),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7104 */
rtx
gen_paciasp (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	30),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	30),
		gen_rtx_REG (DImode,
	31)),
	62));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7104 */
rtx
gen_autiasp (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	30),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	30),
		gen_rtx_REG (DImode,
	31)),
	2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7104 */
rtx
gen_pacibsp (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	30),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	30),
		gen_rtx_REG (DImode,
	31)),
	63));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7104 */
rtx
gen_autibsp (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	30),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	30),
		gen_rtx_REG (DImode,
	31)),
	3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7113 */
rtx
gen_pacia1716 (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	17),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	17),
		gen_rtx_REG (DImode,
	16)),
	60));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7113 */
rtx
gen_autia1716 (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	17),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	17),
		gen_rtx_REG (DImode,
	16)),
	0));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7113 */
rtx
gen_pacib1716 (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	17),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	17),
		gen_rtx_REG (DImode,
	16)),
	61));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7113 */
rtx
gen_autib1716 (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	17),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	17),
		gen_rtx_REG (DImode,
	16)),
	1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7122 */
rtx
gen_xpaclri (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	30),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		gen_rtx_REG (DImode,
	30)),
	107));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7141 */
rtx
gen_blockage (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	5);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7149 */
rtx
gen_probe_stack_range (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	6));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7165 */
rtx
gen_probe_sve_stack_clash_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	6));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7165 */
rtx
gen_probe_sve_stack_clash_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	6));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7218 */
rtx
gen_reg_stack_protect_address_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	99));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7218 */
rtx
gen_reg_stack_protect_address_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	99));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7234 */
rtx
gen_stack_protect_set_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	100)),
		gen_rtx_SET (gen_rtx_SCRATCH (SImode),
	const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7234 */
rtx
gen_stack_protect_set_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	100)),
		gen_rtx_SET (gen_rtx_SCRATCH (DImode),
	const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7279 */
rtx
gen_stack_protect_test_si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (2,
		operand0,
		operand1),
	101)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7279 */
rtx
gen_stack_protect_test_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_UNSPEC (CCmode,
	gen_rtvec (2,
		operand0,
		operand1),
	101)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7292 */
rtx
gen_aarch64_set_fpsrsi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	4);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7292 */
rtx
gen_aarch64_set_fpcrsi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	2);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7292 */
rtx
gen_aarch64_set_fpsrdi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	4);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7292 */
rtx
gen_aarch64_set_fpcrdi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		operand0),
	2);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7299 */
rtx
gen_aarch64_get_fpsrsi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7299 */
rtx
gen_aarch64_get_fpcrsi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7299 */
rtx
gen_aarch64_get_fpsrdi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7299 */
rtx
gen_aarch64_get_fpcrdi (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7345 */
rtx
gen_speculation_tracker (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	15),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	15),
		operand0),
	145));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7359 */
rtx
gen_speculation_tracker_rev (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	15),
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		gen_rtx_REG (DImode,
	15),
		operand0),
	146));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7373 */
rtx
gen_bti_noarg (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7380 */
rtx
gen_bti_c (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	9);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7387 */
rtx
gen_bti_j (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	10);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7394 */
rtx
gen_bti_jc (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	11);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7402 */
rtx
gen_speculation_barrier (void)
{
  return gen_rtx_UNSPEC_VOLATILE (VOIDmode,
	gen_rtvec (1,
		const0_rtx),
	7);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7482 */
rtx
gen_despeculate_simpleqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_USE (VOIDmode,
	operand2)),
	7));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7482 */
rtx
gen_despeculate_simplehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_USE (VOIDmode,
	operand2)),
	7));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7482 */
rtx
gen_despeculate_simplesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_USE (VOIDmode,
	operand2)),
	7));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7482 */
rtx
gen_despeculate_simpledi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_USE (VOIDmode,
	operand2)),
	7));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7495 */
rtx
gen_despeculate_simpleti (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (TImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_USE (VOIDmode,
	operand2)),
	7));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32zv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	18));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32xv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64zv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64xv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	21));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32zv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	18));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32xv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64zv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64xv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	21));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32zv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	18));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32xv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64zv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64xv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	21));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32zdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	18));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32xdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64zdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64xdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	21));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32zsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	18));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint32xsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64zsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7508 */
rtx
gen_aarch64_frint64xsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	21));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7520 */
rtx
gen_tstart (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	12)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7529 */
rtx
gen_ttest (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	148)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7538 */
rtx
gen_tcommit (void)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (BLKmode,
	gen_rtvec (1,
		const0_rtx),
	13),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7546 */
rtx
gen_tcancel (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_UNSPEC_VOLATILE (BLKmode,
	gen_rtvec (1,
		operand0),
	14),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7555 */
rtx
gen_aarch64_rndr (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	15)),
		gen_rtx_SET (gen_rtx_REG (CC_Zmode,
	66),
	gen_rtx_UNSPEC_VOLATILE (CC_Zmode,
	gen_rtvec (1,
		const0_rtx),
	15))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7565 */
rtx
gen_aarch64_rndrrs (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	16)),
		gen_rtx_SET (gen_rtx_REG (CC_Zmode,
	66),
	gen_rtx_UNSPEC_VOLATILE (CC_Zmode,
	gen_rtvec (1,
		const0_rtx),
	16))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7577 */
rtx
gen_irg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_AND (DImode,
	operand1,
	GEN_INT (-1080863910568919041L)),
	gen_rtx_ASHIFT (DImode,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand2),
	160),
	const_int_rtx[MAX_SAVED_CONST_INT + (56)])));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7590 */
rtx
gen_gmi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_ASHIFT (DImode,
	const1_rtx,
	gen_rtx_AND (QImode,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (56)]),
	const_int_rtx[MAX_SAVED_CONST_INT + (15)])),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7603 */
rtx
gen_addg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_AND (DImode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2),
	GEN_INT (-1080863910568919041L)),
	gen_rtx_ASHIFT (DImode,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		gen_rtx_AND (QImode,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	const_int_rtx[MAX_SAVED_CONST_INT + (56)]),
	const_int_rtx[MAX_SAVED_CONST_INT + (15)]),
		operand3),
	159),
	const_int_rtx[MAX_SAVED_CONST_INT + (56)])));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7620 */
rtx
gen_subp (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	gen_rtx_AND (DImode,
	operand1,
	GEN_INT (72057594037927935L)),
	gen_rtx_AND (DImode,
	operand2,
	GEN_INT (72057594037927935L))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7633 */
rtx
gen_ldg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_AND (DImode,
	operand0,
	GEN_INT (-1080863910568919041L)),
	gen_rtx_ASHIFT (DImode,
	gen_rtx_MEM (QImode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		gen_rtx_AND (DImode,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2),
	const_int_rtx[MAX_SAVED_CONST_INT + (-16)])),
	161)),
	const_int_rtx[MAX_SAVED_CONST_INT + (56)])));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7650 */
rtx
gen_stg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (QImode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		gen_rtx_PLUS (DImode,
	operand1,
	operand2)),
	161)),
	gen_rtx_AND (QImode,
	gen_rtx_LSHIFTRT (DImode,
	operand0,
	const_int_rtx[MAX_SAVED_CONST_INT + (56)]),
	const_int_rtx[MAX_SAVED_CONST_INT + (15)]));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7663 */
rtx
gen_ld64b (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (V8DImode,
	gen_rtvec (1,
		gen_rtx_MEM (V8DImode,
	operand1)),
	51));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7674 */
rtx
gen_st64b (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (V8DImode,
	operand0),
	gen_rtx_UNSPEC_VOLATILE (V8DImode,
	gen_rtvec (1,
		operand1),
	52));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7684 */
rtx
gen_st64bv (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	54)),
		gen_rtx_SET (gen_rtx_MEM (V8DImode,
	operand1),
	gen_rtx_UNSPEC_VOLATILE (V8DImode,
	gen_rtvec (1,
		operand2),
	53))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7696 */
rtx
gen_st64bv0 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (1,
		const0_rtx),
	56)),
		gen_rtx_SET (gen_rtx_MEM (V8DImode,
	operand1),
	gen_rtx_UNSPEC_VOLATILE (V8DImode,
	gen_rtvec (1,
		operand2),
	55))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:65 */
rtx
gen_aarch64_simd_dupv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:65 */
rtx
gen_aarch64_simd_dupv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:65 */
rtx
gen_aarch64_simd_dupv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:65 */
rtx
gen_aarch64_simd_dupv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:65 */
rtx
gen_aarch64_simd_dupv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:65 */
rtx
gen_aarch64_simd_dupv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:65 */
rtx
gen_aarch64_simd_dupv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:76 */
rtx
gen_aarch64_simd_dupv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:76 */
rtx
gen_aarch64_simd_dupv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:76 */
rtx
gen_aarch64_simd_dupv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:76 */
rtx
gen_aarch64_simd_dupv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:76 */
rtx
gen_aarch64_simd_dupv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:76 */
rtx
gen_aarch64_simd_dupv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:76 */
rtx
gen_aarch64_simd_dupv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8BFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:87 */
rtx
gen_aarch64_dup_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2DFmode,
	gen_rtx_VEC_SELECT (DFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_128v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_64v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_128v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_64v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_128v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_64v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_128v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_64v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_128v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:102 */
rtx
gen_aarch64_dup_lane_to_64v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:183 */
rtx
gen_aarch64_store_lane0v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv8qiv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hiv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hfv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2siv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2sfv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairdfv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv8qiv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hiv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hfv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2siv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2sfv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairdfv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv8qiv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hiv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2siv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2sfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairdfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv8qiv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hiv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2siv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairdfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv8qiv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hiv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2siv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2sfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairdfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv8qidf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hidf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv4hfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2sidf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairv2sfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:193 */
rtx
gen_load_pairdfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv8qiv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hiv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hfv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2siv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2sfv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairdfv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv8qiv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hiv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hfv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2siv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2sfv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairdfv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv8qiv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hiv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2siv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2sfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairdfv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv8qiv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hiv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2siv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2sfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairdfv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv8qiv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hiv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2siv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2sfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairdfv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv8qidf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hidf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv4hfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2sidf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairv2sfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:207 */
rtx
gen_vec_store_pairdfdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv16qiv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hiv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4siv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2div2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8hfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv4sfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv2dfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:221 */
rtx
gen_load_pairv8bfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv16qiv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hiv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4siv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2div2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8hfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv4sfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv2dfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:235 */
rtx
gen_vec_store_pairv8bfv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
rtx
gen_aarch64_simd_mov_from_v16qilow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
rtx
gen_aarch64_simd_mov_from_v8hilow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
rtx
gen_aarch64_simd_mov_from_v4silow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
rtx
gen_aarch64_simd_mov_from_v8hflow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
rtx
gen_aarch64_simd_mov_from_v8bflow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4BFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
rtx
gen_aarch64_simd_mov_from_v4sflow (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:352 */
rtx
gen_aarch64_simd_mov_from_v16qihigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:352 */
rtx
gen_aarch64_simd_mov_from_v8hihigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:352 */
rtx
gen_aarch64_simd_mov_from_v4sihigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:352 */
rtx
gen_aarch64_simd_mov_from_v8hfhigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:352 */
rtx
gen_aarch64_simd_mov_from_v8bfhigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4BFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:352 */
rtx
gen_aarch64_simd_mov_from_v4sfhigh (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:365 */
rtx
gen_ornv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8QImode,
	gen_rtx_NOT (V8QImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:365 */
rtx
gen_ornv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:365 */
rtx
gen_ornv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HImode,
	gen_rtx_NOT (V4HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:365 */
rtx
gen_ornv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:365 */
rtx
gen_ornv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SImode,
	gen_rtx_NOT (V2SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:365 */
rtx
gen_ornv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:365 */
rtx
gen_ornv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2DImode,
	gen_rtx_NOT (V2DImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:374 */
rtx
gen_bicv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8QImode,
	gen_rtx_NOT (V8QImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:374 */
rtx
gen_bicv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:374 */
rtx
gen_bicv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HImode,
	gen_rtx_NOT (V4HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:374 */
rtx
gen_bicv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:374 */
rtx
gen_bicv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SImode,
	gen_rtx_NOT (V2SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:374 */
rtx
gen_bicv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:374 */
rtx
gen_bicv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2DImode,
	gen_rtx_NOT (V2DImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:383 */
rtx
gen_addv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:383 */
rtx
gen_addv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:383 */
rtx
gen_addv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:383 */
rtx
gen_addv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:383 */
rtx
gen_addv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:383 */
rtx
gen_addv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:383 */
rtx
gen_addv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:392 */
rtx
gen_subv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:392 */
rtx
gen_subv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:392 */
rtx
gen_subv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:392 */
rtx
gen_subv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:392 */
rtx
gen_subv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:392 */
rtx
gen_subv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:392 */
rtx
gen_subv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:401 */
rtx
gen_mulv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:401 */
rtx
gen_mulv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:401 */
rtx
gen_mulv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:401 */
rtx
gen_mulv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:401 */
rtx
gen_mulv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:401 */
rtx
gen_mulv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:410 */
rtx
gen_bswapv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:410 */
rtx
gen_bswapv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:410 */
rtx
gen_bswapv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:410 */
rtx
gen_bswapv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:410 */
rtx
gen_bswapv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_BSWAP (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:418 */
rtx
gen_aarch64_rbitv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	66));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:418 */
rtx
gen_aarch64_rbitv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	66));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd90v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd270v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd90v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:476 */
rtx
gen_aarch64_fcadd270v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla0v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla180v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla0v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla0v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla90v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla180v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla270v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla0v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla0v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla90v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla180v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:494 */
rtx
gen_aarch64_fcmla270v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane0v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane180v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane0v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane0v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane90v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane180v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane270v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane0v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane0v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane90v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane180v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:506 */
rtx
gen_aarch64_fcmla_lane270v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:521 */
rtx
gen_aarch64_fcmla_laneq0v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:521 */
rtx
gen_aarch64_fcmla_laneq90v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:521 */
rtx
gen_aarch64_fcmla_laneq180v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:521 */
rtx
gen_aarch64_fcmla_laneq270v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane0v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane90v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane180v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane270v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane0v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	385)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane90v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	386)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane180v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	387)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:536 */
rtx
gen_aarch64_fcmlaq_lane270v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	388)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:612 */
rtx
gen_sdot_prodv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	263),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:612 */
rtx
gen_udot_prodv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:612 */
rtx
gen_sdot_prodv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	263),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:612 */
rtx
gen_udot_prodv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:626 */
rtx
gen_usdot_prodv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	520),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:626 */
rtx
gen_usdot_prodv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	520),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:640 */
rtx
gen_aarch64_sdot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	263),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:640 */
rtx
gen_aarch64_udot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	264),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:640 */
rtx
gen_aarch64_sdot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	263),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:640 */
rtx
gen_aarch64_udot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	264),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:656 */
rtx
gen_aarch64_sdot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	263),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:656 */
rtx
gen_aarch64_udot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	264),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:656 */
rtx
gen_aarch64_sdot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	263),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:656 */
rtx
gen_aarch64_udot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	264),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_usdot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	520),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_sudot_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	521),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_usdot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	520),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_sudot_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	521),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_usdot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	520),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_sudot_laneqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	521),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_usdot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	520),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:674 */
rtx
gen_aarch64_sudot_laneqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	521),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HFmode,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:710 */
rtx
gen_mul_lanev4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HFmode,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:726 */
rtx
gen_mul_laneqv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DFmode,
	gen_rtx_VEC_DUPLICATE (V2DFmode,
	gen_rtx_VEC_SELECT (DFmode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HFmode,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:742 */
rtx
gen_mul_nv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DFmode,
	gen_rtx_VEC_DUPLICATE (V2DFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtehf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:753 */
rtx
gen_aarch64_rsqrtedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtsv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtsv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtsv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtshf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtssf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:761 */
rtx
gen_aarch64_rsqrtsdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:780 */
rtx
gen_aarch64_ursqrtev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:780 */
rtx
gen_aarch64_ursqrtev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:803 */
rtx
gen_negv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:803 */
rtx
gen_negv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:803 */
rtx
gen_negv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:803 */
rtx
gen_negv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:803 */
rtx
gen_negv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:803 */
rtx
gen_negv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:803 */
rtx
gen_negv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:811 */
rtx
gen_absv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:811 */
rtx
gen_absv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:811 */
rtx
gen_absv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:811 */
rtx
gen_absv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:811 */
rtx
gen_absv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:811 */
rtx
gen_absv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:811 */
rtx
gen_absv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:822 */
rtx
gen_aarch64_absdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	166));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_sabdv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8QImode,
	gen_rtx_SMAX (V8QImode,
	operand1,
	operand2),
	gen_rtx_SMIN (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_uabdv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8QImode,
	gen_rtx_UMAX (V8QImode,
	operand1,
	operand2),
	gen_rtx_UMIN (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_sabdv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V16QImode,
	gen_rtx_SMAX (V16QImode,
	operand1,
	operand2),
	gen_rtx_SMIN (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_uabdv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V16QImode,
	gen_rtx_UMAX (V16QImode,
	operand1,
	operand2),
	gen_rtx_UMIN (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_sabdv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HImode,
	gen_rtx_SMAX (V4HImode,
	operand1,
	operand2),
	gen_rtx_SMIN (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_uabdv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HImode,
	gen_rtx_UMAX (V4HImode,
	operand1,
	operand2),
	gen_rtx_UMIN (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_sabdv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_SMAX (V8HImode,
	operand1,
	operand2),
	gen_rtx_SMIN (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_uabdv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_UMAX (V8HImode,
	operand1,
	operand2),
	gen_rtx_UMIN (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_sabdv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	gen_rtx_SMAX (V2SImode,
	operand1,
	operand2),
	gen_rtx_SMIN (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_uabdv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	gen_rtx_UMAX (V2SImode,
	operand1,
	operand2),
	gen_rtx_UMIN (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_sabdv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_SMAX (V4SImode,
	operand1,
	operand2),
	gen_rtx_SMIN (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:837 */
rtx
gen_aarch64_uabdv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_UMAX (V4SImode,
	operand1,
	operand2),
	gen_rtx_UMIN (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:852 */
rtx
gen_aarch64_sabdlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	69));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:852 */
rtx
gen_aarch64_uabdlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	93));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:852 */
rtx
gen_aarch64_sabdlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	69));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:852 */
rtx
gen_aarch64_uabdlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	93));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:852 */
rtx
gen_aarch64_sabdlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	69));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:852 */
rtx
gen_aarch64_uabdlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	93));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:862 */
rtx
gen_aarch64_sabdl2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	70));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:862 */
rtx
gen_aarch64_uabdl2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	94));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:862 */
rtx
gen_aarch64_sabdl2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	70));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:862 */
rtx
gen_aarch64_uabdl2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	94));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:862 */
rtx
gen_aarch64_sabdl2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	70));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:862 */
rtx
gen_aarch64_uabdl2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	94));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:872 */
rtx
gen_aarch64_sabalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	67));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:872 */
rtx
gen_aarch64_uabalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	91));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:872 */
rtx
gen_aarch64_sabalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	67));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:872 */
rtx
gen_aarch64_uabalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	91));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:872 */
rtx
gen_aarch64_sabalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	67));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:872 */
rtx
gen_aarch64_uabalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	91));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:883 */
rtx
gen_aarch64_sabal2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	68));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:883 */
rtx
gen_aarch64_uabal2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	92));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:883 */
rtx
gen_aarch64_sabal2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	68));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:883 */
rtx
gen_aarch64_uabal2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	92));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:883 */
rtx
gen_aarch64_sabal2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	68));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:883 */
rtx
gen_aarch64_uabal2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	92));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_sadalpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	71));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_uadalpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	95));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_sadalpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	71));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_uadalpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	95));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_sadalpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	71));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_uadalpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	95));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_sadalpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	71));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_uadalpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	95));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_sadalpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	71));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_uadalpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	95));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_sadalpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	71));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:894 */
rtx
gen_aarch64_uadalpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	95));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_sabav8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_MINUS (V8QImode,
	gen_rtx_SMAX (V8QImode,
	operand2,
	operand3),
	gen_rtx_SMIN (V8QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_uabav8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_MINUS (V8QImode,
	gen_rtx_UMAX (V8QImode,
	operand2,
	operand3),
	gen_rtx_UMIN (V8QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_sabav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_MINUS (V16QImode,
	gen_rtx_SMAX (V16QImode,
	operand2,
	operand3),
	gen_rtx_SMIN (V16QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_uabav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_MINUS (V16QImode,
	gen_rtx_UMAX (V16QImode,
	operand2,
	operand3),
	gen_rtx_UMIN (V16QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_sabav4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_MINUS (V4HImode,
	gen_rtx_SMAX (V4HImode,
	operand2,
	operand3),
	gen_rtx_SMIN (V4HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_uabav4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_MINUS (V4HImode,
	gen_rtx_UMAX (V4HImode,
	operand2,
	operand3),
	gen_rtx_UMIN (V4HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_sabav8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_SMAX (V8HImode,
	operand2,
	operand3),
	gen_rtx_SMIN (V8HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_uabav8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_UMAX (V8HImode,
	operand2,
	operand3),
	gen_rtx_UMIN (V8HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_sabav2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MINUS (V2SImode,
	gen_rtx_SMAX (V2SImode,
	operand2,
	operand3),
	gen_rtx_SMIN (V2SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_uabav2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MINUS (V2SImode,
	gen_rtx_UMAX (V2SImode,
	operand2,
	operand3),
	gen_rtx_UMIN (V2SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_sabav4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_SMAX (V4SImode,
	operand2,
	operand3),
	gen_rtx_SMIN (V4SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:952 */
rtx
gen_aarch64_uabav4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_UMAX (V4SImode,
	operand2,
	operand3),
	gen_rtx_UMIN (V4SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabdv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HFmode,
	gen_rtx_MINUS (V4HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabdv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	gen_rtx_MINUS (V8HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabdv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SFmode,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabdv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SFmode,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabdv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2DFmode,
	gen_rtx_MINUS (V2DFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabdhf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (HFmode,
	gen_rtx_MINUS (HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabdsf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (SFmode,
	gen_rtx_MINUS (SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:967 */
rtx
gen_fabddf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (DFmode,
	gen_rtx_MINUS (DFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:979 */
rtx
gen_andv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:979 */
rtx
gen_andv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:979 */
rtx
gen_andv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:979 */
rtx
gen_andv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:979 */
rtx
gen_andv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:979 */
rtx
gen_andv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:979 */
rtx
gen_andv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1000 */
rtx
gen_iorv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1000 */
rtx
gen_iorv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1000 */
rtx
gen_iorv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1000 */
rtx
gen_iorv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1000 */
rtx
gen_iorv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1000 */
rtx
gen_iorv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1000 */
rtx
gen_iorv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1020 */
rtx
gen_xorv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1020 */
rtx
gen_xorv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1020 */
rtx
gen_xorv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1020 */
rtx
gen_xorv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1020 */
rtx
gen_xorv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1020 */
rtx
gen_xorv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1020 */
rtx
gen_xorv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1029 */
rtx
gen_one_cmplv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1029 */
rtx
gen_one_cmplv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1029 */
rtx
gen_one_cmplv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1029 */
rtx
gen_one_cmplv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1029 */
rtx
gen_one_cmplv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1029 */
rtx
gen_one_cmplv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1029 */
rtx
gen_one_cmplv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NOT (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8QImode,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V16QImode,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2DImode,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HFmode,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4BFmode,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8BFmode,
	gen_rtx_VEC_DUPLICATE (V8BFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1037 */
rtx
gen_aarch64_simd_vec_setv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2DFmode,
	gen_rtx_VEC_DUPLICATE (V2DFmode,
	operand1),
	operand3,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8QImode,
	gen_rtx_VEC_DUPLICATE (V8QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V16QImode,
	gen_rtx_VEC_DUPLICATE (V16QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2DImode,
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_VEC_SELECT (DImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4HFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8HFmode,
	gen_rtx_VEC_DUPLICATE (V8HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4BFmode,
	gen_rtx_VEC_DUPLICATE (V4BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V8BFmode,
	gen_rtx_VEC_DUPLICATE (V8BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1063 */
rtx
gen_aarch64_simd_vec_copy_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_MERGE (V2DFmode,
	gen_rtx_VEC_DUPLICATE (V2DFmode,
	gen_rtx_VEC_SELECT (DFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1121 */
rtx
gen_aarch64_simd_lshrv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1121 */
rtx
gen_aarch64_simd_lshrv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1121 */
rtx
gen_aarch64_simd_lshrv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1121 */
rtx
gen_aarch64_simd_lshrv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1121 */
rtx
gen_aarch64_simd_lshrv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1121 */
rtx
gen_aarch64_simd_lshrv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1121 */
rtx
gen_aarch64_simd_lshrv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1130 */
rtx
gen_aarch64_simd_ashrv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1130 */
rtx
gen_aarch64_simd_ashrv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1130 */
rtx
gen_aarch64_simd_ashrv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1130 */
rtx
gen_aarch64_simd_ashrv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1130 */
rtx
gen_aarch64_simd_ashrv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1130 */
rtx
gen_aarch64_simd_ashrv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1130 */
rtx
gen_aarch64_simd_ashrv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1153 */
rtx
gen_aarch64_simd_imm_shlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1153 */
rtx
gen_aarch64_simd_imm_shlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1153 */
rtx
gen_aarch64_simd_imm_shlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1153 */
rtx
gen_aarch64_simd_imm_shlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1153 */
rtx
gen_aarch64_simd_imm_shlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1153 */
rtx
gen_aarch64_simd_imm_shlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1153 */
rtx
gen_aarch64_simd_imm_shlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1162 */
rtx
gen_aarch64_simd_reg_sshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1162 */
rtx
gen_aarch64_simd_reg_sshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1162 */
rtx
gen_aarch64_simd_reg_sshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1162 */
rtx
gen_aarch64_simd_reg_sshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1162 */
rtx
gen_aarch64_simd_reg_sshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1162 */
rtx
gen_aarch64_simd_reg_sshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1162 */
rtx
gen_aarch64_simd_reg_sshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1171 */
rtx
gen_aarch64_simd_reg_shlv8qi_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1171 */
rtx
gen_aarch64_simd_reg_shlv16qi_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1171 */
rtx
gen_aarch64_simd_reg_shlv4hi_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1171 */
rtx
gen_aarch64_simd_reg_shlv8hi_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1171 */
rtx
gen_aarch64_simd_reg_shlv2si_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1171 */
rtx
gen_aarch64_simd_reg_shlv4si_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1171 */
rtx
gen_aarch64_simd_reg_shlv2di_unsigned (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	165));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1181 */
rtx
gen_aarch64_simd_reg_shlv8qi_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1181 */
rtx
gen_aarch64_simd_reg_shlv16qi_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1181 */
rtx
gen_aarch64_simd_reg_shlv4hi_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1181 */
rtx
gen_aarch64_simd_reg_shlv8hi_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1181 */
rtx
gen_aarch64_simd_reg_shlv2si_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1181 */
rtx
gen_aarch64_simd_reg_shlv4si_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1181 */
rtx
gen_aarch64_simd_reg_shlv2di_signed (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	164));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1363 */
rtx
gen_vec_shr_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1363 */
rtx
gen_vec_shr_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1363 */
rtx
gen_vec_shr_v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1363 */
rtx
gen_vec_shr_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1363 */
rtx
gen_vec_shr_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1363 */
rtx
gen_vec_shr_v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	258));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1392 */
rtx
gen_aarch64_mlav8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_MULT (V8QImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1392 */
rtx
gen_aarch64_mlav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_MULT (V16QImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1392 */
rtx
gen_aarch64_mlav4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_MULT (V4HImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1392 */
rtx
gen_aarch64_mlav8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MULT (V8HImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1392 */
rtx
gen_aarch64_mlav2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1392 */
rtx
gen_aarch64_mlav4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1439 */
rtx
gen_aarch64_mla_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_MULT (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1439 */
rtx
gen_aarch64_mla_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MULT (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1439 */
rtx
gen_aarch64_mla_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1439 */
rtx
gen_aarch64_mla_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1452 */
rtx
gen_aarch64_mlsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8QImode,
	operand1,
	gen_rtx_MULT (V8QImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1452 */
rtx
gen_aarch64_mlsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V16QImode,
	operand1,
	gen_rtx_MULT (V16QImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1452 */
rtx
gen_aarch64_mlsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HImode,
	operand1,
	gen_rtx_MULT (V4HImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1452 */
rtx
gen_aarch64_mlsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_MULT (V8HImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1452 */
rtx
gen_aarch64_mlsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	operand1,
	gen_rtx_MULT (V2SImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1452 */
rtx
gen_aarch64_mlsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	operand2,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1498 */
rtx
gen_aarch64_mls_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HImode,
	operand1,
	gen_rtx_MULT (V4HImode,
	gen_rtx_VEC_DUPLICATE (V4HImode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1498 */
rtx
gen_aarch64_mls_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_MULT (V8HImode,
	gen_rtx_VEC_DUPLICATE (V8HImode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1498 */
rtx
gen_aarch64_mls_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SImode,
	operand1,
	gen_rtx_MULT (V2SImode,
	gen_rtx_VEC_DUPLICATE (V2SImode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1498 */
rtx
gen_aarch64_mls_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_VEC_DUPLICATE (V4SImode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_smaxv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_sminv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_umaxv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_uminv8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_smaxv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_sminv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_umaxv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_uminv16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_smaxv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_sminv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_umaxv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_uminv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_smaxv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_sminv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_umaxv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_uminv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_smaxv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_sminv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_umaxv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_uminv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_smaxv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_sminv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_umaxv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMAX (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1512 */
rtx
gen_uminv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UMIN (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_umaxpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_uminpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_smaxpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_sminpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_umaxpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_uminpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_smaxpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_sminpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_umaxpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_uminpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_smaxpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_sminpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_umaxpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_uminpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_smaxpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_sminpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_umaxpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_uminpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_smaxpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_sminpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_umaxpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_uminpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_smaxpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1555 */
rtx
gen_aarch64_sminpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smax_nanpv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smin_nanpv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smaxpv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_sminpv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smax_nanpv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smin_nanpv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smaxpv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_sminpv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smax_nanpv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smin_nanpv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smaxpv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_sminpv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smax_nanpv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smin_nanpv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smaxpv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_sminpv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smax_nanpv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smin_nanpv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_smaxpv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1566 */
rtx
gen_aarch64_sminpv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1584 */
rtx
gen_aarch64_xtnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_TRUNCATE (V8QImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1584 */
rtx
gen_aarch64_xtnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_TRUNCATE (V4HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1584 */
rtx
gen_aarch64_xtnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_TRUNCATE (V2SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1594 */
rtx
gen_aarch64_xtnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand2,
	gen_rtx_TRUNCATE (V8QImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1594 */
rtx
gen_aarch64_xtnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand2,
	gen_rtx_TRUNCATE (V4HImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1594 */
rtx
gen_aarch64_xtnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand2,
	gen_rtx_TRUNCATE (V2SImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1625 */
rtx
gen_aarch64_xtn2v8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_TRUNCATE (V8QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1625 */
rtx
gen_aarch64_xtn2v4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_TRUNCATE (V4HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1625 */
rtx
gen_aarch64_xtn2v2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_TRUNCATE (V2SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1635 */
rtx
gen_aarch64_xtn2v8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_TRUNCATE (V8QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1635 */
rtx
gen_aarch64_xtn2v4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_TRUNCATE (V4HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1635 */
rtx
gen_aarch64_xtn2v2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_TRUNCATE (V2SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1717 */
rtx
gen_aarch64_shrnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_LSHIFTRT (V8HImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1717 */
rtx
gen_aarch64_shrnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1717 */
rtx
gen_aarch64_shrnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_LSHIFTRT (V2DImode,
	operand1,
	operand2)),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1729 */
rtx
gen_aarch64_shrnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_LSHIFTRT (V8HImode,
	operand1,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1729 */
rtx
gen_aarch64_shrnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	operand1,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1729 */
rtx
gen_aarch64_shrnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_LSHIFTRT (V2DImode,
	operand1,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1828 */
rtx
gen_aarch64_rshrnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1828 */
rtx
gen_aarch64_rshrnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1828 */
rtx
gen_aarch64_rshrnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1840 */
rtx
gen_aarch64_rshrnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1840 */
rtx
gen_aarch64_rshrnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1840 */
rtx
gen_aarch64_rshrnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	102)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1888 */
rtx
gen_aarch64_shrn2v8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_LSHIFTRT (V8HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1888 */
rtx
gen_aarch64_shrn2v4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1888 */
rtx
gen_aarch64_shrn2v2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_LSHIFTRT (V2DImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1900 */
rtx
gen_aarch64_shrn2v8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_LSHIFTRT (V8HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1900 */
rtx
gen_aarch64_shrn2v4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1900 */
rtx
gen_aarch64_shrn2v2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_LSHIFTRT (V2DImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1932 */
rtx
gen_aarch64_rshrn2v8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	102)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1932 */
rtx
gen_aarch64_rshrn2v4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	102)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1932 */
rtx
gen_aarch64_rshrn2v2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	102)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1944 */
rtx
gen_aarch64_rshrn2v8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	102),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1944 */
rtx
gen_aarch64_rshrn2v4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	102),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1944 */
rtx
gen_aarch64_rshrn2v2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	102),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1990 */
rtx
gen_aarch64_simd_vec_unpacks_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1990 */
rtx
gen_aarch64_simd_vec_unpacku_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1990 */
rtx
gen_aarch64_simd_vec_unpacks_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1990 */
rtx
gen_aarch64_simd_vec_unpacku_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1990 */
rtx
gen_aarch64_simd_vec_unpacks_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1990 */
rtx
gen_aarch64_simd_vec_unpacku_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2001 */
rtx
gen_aarch64_simd_vec_unpacks_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2001 */
rtx
gen_aarch64_simd_vec_unpacku_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2001 */
rtx
gen_aarch64_simd_vec_unpacks_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2001 */
rtx
gen_aarch64_simd_vec_unpacku_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2001 */
rtx
gen_aarch64_simd_vec_unpacks_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2001 */
rtx
gen_aarch64_simd_vec_unpacku_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2054 */
rtx
gen_aarch64_smlal_hiv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand4,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2054 */
rtx
gen_aarch64_umlal_hiv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand4,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2054 */
rtx
gen_aarch64_smlal_hiv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand4,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2054 */
rtx
gen_aarch64_umlal_hiv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand4,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2054 */
rtx
gen_aarch64_smlal_hiv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand4,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2054 */
rtx
gen_aarch64_umlal_hiv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand4,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2084 */
rtx
gen_aarch64_smlal_hi_nv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand4))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2084 */
rtx
gen_aarch64_umlal_hi_nv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	operand4))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2084 */
rtx
gen_aarch64_smlal_hi_nv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand4))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2084 */
rtx
gen_aarch64_umlal_hi_nv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand4))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2131 */
rtx
gen_aarch64_smlsl_hiv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand4,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2131 */
rtx
gen_aarch64_umlsl_hiv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand4,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2131 */
rtx
gen_aarch64_smlsl_hiv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand4,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2131 */
rtx
gen_aarch64_umlsl_hiv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand4,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2131 */
rtx
gen_aarch64_smlsl_hiv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand4,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2131 */
rtx
gen_aarch64_umlsl_hiv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand4,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2161 */
rtx
gen_aarch64_smlsl_hi_nv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand4)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2161 */
rtx
gen_aarch64_umlsl_hi_nv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	operand4)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2161 */
rtx
gen_aarch64_smlsl_hi_nv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand4)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2161 */
rtx
gen_aarch64_umlsl_hi_nv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand4)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2192 */
rtx
gen_aarch64_smlalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2192 */
rtx
gen_aarch64_umlalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2192 */
rtx
gen_aarch64_smlalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2192 */
rtx
gen_aarch64_umlalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2192 */
rtx
gen_aarch64_smlalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2192 */
rtx
gen_aarch64_umlalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2206 */
rtx
gen_aarch64_smlal_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2206 */
rtx
gen_aarch64_umlal_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2206 */
rtx
gen_aarch64_smlal_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2206 */
rtx
gen_aarch64_umlal_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand3))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2221 */
rtx
gen_aarch64_smlslv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2221 */
rtx
gen_aarch64_umlslv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2221 */
rtx
gen_aarch64_smlslv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2221 */
rtx
gen_aarch64_umlslv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2221 */
rtx
gen_aarch64_smlslv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2221 */
rtx
gen_aarch64_umlslv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2235 */
rtx
gen_aarch64_smlsl_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2235 */
rtx
gen_aarch64_umlsl_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2235 */
rtx
gen_aarch64_smlsl_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2235 */
rtx
gen_aarch64_umlsl_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand3)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2250 */
rtx
gen_aarch64_simd_vec_smult_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2250 */
rtx
gen_aarch64_simd_vec_umult_lo_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2250 */
rtx
gen_aarch64_simd_vec_smult_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2250 */
rtx
gen_aarch64_simd_vec_umult_lo_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2250 */
rtx
gen_aarch64_simd_vec_smult_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2250 */
rtx
gen_aarch64_simd_vec_umult_lo_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2263 */
rtx
gen_aarch64_intrinsic_vec_smult_lo_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2263 */
rtx
gen_aarch64_intrinsic_vec_umult_lo_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2263 */
rtx
gen_aarch64_intrinsic_vec_smult_lo_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2263 */
rtx
gen_aarch64_intrinsic_vec_umult_lo_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2263 */
rtx
gen_aarch64_intrinsic_vec_smult_lo_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2263 */
rtx
gen_aarch64_intrinsic_vec_umult_lo_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2288 */
rtx
gen_aarch64_simd_vec_smult_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2288 */
rtx
gen_aarch64_simd_vec_umult_hi_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2288 */
rtx
gen_aarch64_simd_vec_smult_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2288 */
rtx
gen_aarch64_simd_vec_umult_hi_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2288 */
rtx
gen_aarch64_simd_vec_smult_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2288 */
rtx
gen_aarch64_simd_vec_umult_hi_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_smult_lane_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_umult_lane_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_smult_laneq_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_umult_laneq_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_smult_lane_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_umult_lane_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_smult_laneq_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2317 */
rtx
gen_aarch64_vec_umult_laneq_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2335 */
rtx
gen_aarch64_smull_hi_lanev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2335 */
rtx
gen_aarch64_umull_hi_lanev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2335 */
rtx
gen_aarch64_smull_hi_lanev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2335 */
rtx
gen_aarch64_umull_hi_lanev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2369 */
rtx
gen_aarch64_smull_hi_laneqv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2369 */
rtx
gen_aarch64_umull_hi_laneqv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2369 */
rtx
gen_aarch64_smull_hi_laneqv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2369 */
rtx
gen_aarch64_umull_hi_laneqv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2403 */
rtx
gen_aarch64_smull_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2403 */
rtx
gen_aarch64_umull_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2403 */
rtx
gen_aarch64_smull_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2403 */
rtx
gen_aarch64_umull_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2416 */
rtx
gen_aarch64_smull_hi_nv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2416 */
rtx
gen_aarch64_umull_hi_nv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2416 */
rtx
gen_aarch64_smull_hi_nv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2416 */
rtx
gen_aarch64_umull_hi_nv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_smlal_lane_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_umlal_lane_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_smlal_laneq_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_umlal_laneq_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_smlal_lane_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_umlal_lane_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_smlal_laneq_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2445 */
rtx
gen_aarch64_vec_umlal_laneq_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2465 */
rtx
gen_aarch64_smlal_hi_lanev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2465 */
rtx
gen_aarch64_umlal_hi_lanev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2465 */
rtx
gen_aarch64_smlal_hi_lanev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2465 */
rtx
gen_aarch64_umlal_hi_lanev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2502 */
rtx
gen_aarch64_smlal_hi_laneqv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2502 */
rtx
gen_aarch64_umlal_hi_laneqv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2502 */
rtx
gen_aarch64_smlal_hi_laneqv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2502 */
rtx
gen_aarch64_umlal_hi_laneqv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5)))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_smlsl_lane_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_umlsl_lane_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_smlsl_laneq_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_umlsl_laneq_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_smlsl_lane_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_umlsl_lane_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_smlsl_laneq_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2539 */
rtx
gen_aarch64_vec_umlsl_laneq_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2559 */
rtx
gen_aarch64_smlsl_hi_lanev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2559 */
rtx
gen_aarch64_umlsl_hi_lanev8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2559 */
rtx
gen_aarch64_smlsl_hi_lanev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2559 */
rtx
gen_aarch64_umlsl_hi_lanev4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2597 */
rtx
gen_aarch64_smlsl_hi_laneqv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2597 */
rtx
gen_aarch64_umlsl_hi_laneqv8hi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_MULT (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2597 */
rtx
gen_aarch64_smlsl_hi_laneqv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2597 */
rtx
gen_aarch64_umlsl_hi_laneqv4si_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_MULT (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand4,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2660 */
rtx
gen_addv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2660 */
rtx
gen_addv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2660 */
rtx
gen_addv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2660 */
rtx
gen_addv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2660 */
rtx
gen_addv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2669 */
rtx
gen_subv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2669 */
rtx
gen_subv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2669 */
rtx
gen_subv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2669 */
rtx
gen_subv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2669 */
rtx
gen_subv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2678 */
rtx
gen_mulv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2678 */
rtx
gen_mulv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2678 */
rtx
gen_mulv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2678 */
rtx
gen_mulv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2678 */
rtx
gen_mulv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (V2DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2708 */
rtx
gen_negv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2708 */
rtx
gen_negv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2708 */
rtx
gen_negv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2708 */
rtx
gen_negv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2708 */
rtx
gen_negv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2716 */
rtx
gen_absv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2716 */
rtx
gen_absv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2716 */
rtx
gen_absv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2716 */
rtx
gen_absv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2716 */
rtx
gen_absv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ABS (V2DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2870 */
rtx
gen_fmav4hf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4HFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2870 */
rtx
gen_fmav8hf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V8HFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2870 */
rtx
gen_fmav2sf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2870 */
rtx
gen_fmav4sf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2870 */
rtx
gen_fmav2df4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2DFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2942 */
rtx
gen_fnmav4hf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4HFmode,
	gen_rtx_NEG (V4HFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2942 */
rtx
gen_fnmav8hf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V8HFmode,
	gen_rtx_NEG (V8HFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2942 */
rtx
gen_fnmav2sf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_NEG (V2SFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2942 */
rtx
gen_fnmav4sf4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_NEG (V4SFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2942 */
rtx
gen_fnmav2df4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2DFmode,
	gen_rtx_NEG (V2DFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_btruncv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_ceilv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_floorv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundevenv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_nearbyintv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_rintv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_btruncv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_ceilv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_floorv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundevenv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_nearbyintv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_rintv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_btruncv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_ceilv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_floorv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundevenv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_nearbyintv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_rintv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_btruncv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_ceilv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_floorv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundevenv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_nearbyintv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_rintv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_btruncv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	32));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_ceilv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_floorv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	28));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundevenv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	29));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_nearbyintv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	27));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_rintv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	31));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3021 */
rtx
gen_roundv2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	26));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceilv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfloorv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lroundv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncuv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceiluv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lflooruv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lrounduv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnuv4hfv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceilv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfloorv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lroundv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncuv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceiluv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lflooruv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lrounduv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnuv8hfv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceilv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfloorv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lroundv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncuv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceiluv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lflooruv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lrounduv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnuv2sfv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceilv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfloorv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lroundv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncuv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceiluv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lflooruv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lrounduv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnuv4sfv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceilv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfloorv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lroundv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lbtruncuv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lceiluv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lflooruv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lrounduv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3032 */
rtx
gen_lfrintnuv2dfv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lbtrunchfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lceilhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lfloorhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lroundhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lfrintnhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lbtruncuhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	32)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lceiluhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	30)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lflooruhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	28)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lrounduhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	26)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3043 */
rtx
gen_lfrintnuhfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (HImode,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	29)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3052 */
rtx
gen_fix_trunchfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FIX (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3052 */
rtx
gen_fixuns_trunchfhi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3060 */
rtx
gen_floathihf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3060 */
rtx
gen_floatunshihf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatv4hiv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatunsv4hiv4hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatv8hiv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatunsv8hiv8hf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (V8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatv2siv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatunsv2siv2sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatv4siv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatunsv4siv4sf2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatv2div2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT (V2DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3111 */
rtx
gen_floatunsv2div2df2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (V2DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3126 */
rtx
gen_aarch64_simd_vec_unpacks_lo_v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3126 */
rtx
gen_aarch64_simd_vec_unpacks_lo_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (V2DFmode,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzsv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzuv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzsv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzuv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzsv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzuv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzsv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzuv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzsv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	15));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3139 */
rtx
gen_fcvtzuv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	16));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_scvtfv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_ucvtfv4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_scvtfv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_ucvtfv8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_scvtfv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_ucvtfv2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_scvtfv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_ucvtfv4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_scvtfv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	72));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3150 */
rtx
gen_ucvtfv2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	96));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3182 */
rtx
gen_aarch64_simd_vec_unpacks_hi_v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3182 */
rtx
gen_aarch64_simd_vec_unpacks_hi_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (V2DFmode,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3204 */
rtx
gen_aarch64_float_extend_lo_v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (V2DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3204 */
rtx
gen_aarch64_float_extend_lo_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3215 */
rtx
gen_aarch64_float_trunc_rodd_df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	529));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3224 */
rtx
gen_aarch64_float_trunc_rodd_lo_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	529));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3233 */
rtx
gen_aarch64_float_trunc_rodd_hi_v4sf_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand2),
	529)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3244 */
rtx
gen_aarch64_float_trunc_rodd_hi_v4sf_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand2),
	529),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3269 */
rtx
gen_aarch64_float_truncate_lo_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (V2SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3269 */
rtx
gen_aarch64_float_truncate_lo_v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FLOAT_TRUNCATE (V4HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3278 */
rtx
gen_aarch64_float_truncate_hi_v4sf_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	operand1,
	gen_rtx_FLOAT_TRUNCATE (V2SFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3278 */
rtx
gen_aarch64_float_truncate_hi_v8hf_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HFmode,
	operand1,
	gen_rtx_FLOAT_TRUNCATE (V4HFmode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3289 */
rtx
gen_aarch64_float_truncate_hi_v4sf_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	gen_rtx_FLOAT_TRUNCATE (V2SFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3289 */
rtx
gen_aarch64_float_truncate_hi_v8hf_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HFmode,
	gen_rtx_FLOAT_TRUNCATE (V4HFmode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_smaxv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_sminv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_smaxv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_sminv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_smaxv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_sminv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_smaxv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_sminv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_smaxv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3364 */
rtx
gen_sminv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmax_nanv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmin_nanv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmaxv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fminv4hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmax_nanv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmin_nanv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmaxv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fminv8hf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmax_nanv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmin_nanv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmaxv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fminv2sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmax_nanv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmin_nanv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmaxv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fminv4sf3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmax_nanv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	167));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmin_nanv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	170));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fmaxv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	261));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3376 */
rtx
gen_fminv2df3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	262));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3388 */
rtx
gen_aarch64_faddpv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3388 */
rtx
gen_aarch64_faddpv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3388 */
rtx
gen_aarch64_faddpv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3388 */
rtx
gen_aarch64_faddpv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3388 */
rtx
gen_aarch64_faddpv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3398 */
rtx
gen_reduc_plus_scal_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3398 */
rtx
gen_reduc_plus_scal_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3398 */
rtx
gen_reduc_plus_scal_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3398 */
rtx
gen_reduc_plus_scal_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3398 */
rtx
gen_reduc_plus_scal_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3398 */
rtx
gen_reduc_plus_scal_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3407 */
rtx
gen_reduc_plus_scal_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	174));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extendsi_reduc_plus_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extenddi_reduc_plus_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extendsi_reduc_plus_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extenddi_reduc_plus_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extendsi_reduc_plus_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extenddi_reduc_plus_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extendsi_reduc_plus_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3417 */
rtx
gen_aarch64_zero_extenddi_reduc_plus_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	174)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3427 */
rtx
gen_reduc_plus_scal_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3427 */
rtx
gen_reduc_plus_scal_v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_saddlvv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	175));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_uaddlvv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	176));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_saddlvv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	175));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_uaddlvv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	176));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_saddlvv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	175));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_uaddlvv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	176));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_saddlvv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	175));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_uaddlvv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	176));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_saddlvv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	175));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_uaddlvv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	176));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_saddlvv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	175));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3450 */
rtx
gen_aarch64_uaddlvv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	176));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_saddlpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	226));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_uaddlpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	227));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_saddlpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	226));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_uaddlpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	227));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_saddlpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	226));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_uaddlpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	227));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_saddlpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	226));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_uaddlpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	227));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_saddlpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	226));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_uaddlpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	227));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_saddlpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	226));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3459 */
rtx
gen_aarch64_uaddlpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	227));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3468 */
rtx
gen_clrsbv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3468 */
rtx
gen_clrsbv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3468 */
rtx
gen_clrsbv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3468 */
rtx
gen_clrsbv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3468 */
rtx
gen_clrsbv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3468 */
rtx
gen_clrsbv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLRSB (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3476 */
rtx
gen_clzv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3476 */
rtx
gen_clzv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3476 */
rtx
gen_clzv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3476 */
rtx
gen_clzv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3476 */
rtx
gen_clzv2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3476 */
rtx
gen_clzv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_CLZ (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3484 */
rtx
gen_popcountv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_POPCOUNT (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3484 */
rtx
gen_popcountv16qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_POPCOUNT (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umax_internalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umin_internalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smax_internalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smin_internalv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umax_internalv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umin_internalv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smax_internalv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smin_internalv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umax_internalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umin_internalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smax_internalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smin_internalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umax_internalv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umin_internalv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smax_internalv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smin_internalv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umax_internalv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_umin_internalv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smax_internalv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3538 */
rtx
gen_aarch64_reduc_smin_internalv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3547 */
rtx
gen_aarch64_reduc_umax_internalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3547 */
rtx
gen_aarch64_reduc_umin_internalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3547 */
rtx
gen_aarch64_reduc_smax_internalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3547 */
rtx
gen_aarch64_reduc_smin_internalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_nan_internalv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_nan_internalv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_internalv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_internalv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_nan_internalv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_nan_internalv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_internalv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_internalv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_nan_internalv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_nan_internalv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_internalv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_internalv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_nan_internalv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_nan_internalv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_internalv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_internalv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_nan_internalv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_nan_internalv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smax_internalv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3556 */
rtx
gen_aarch64_reduc_smin_internalv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3585 */
rtx
gen_aarch64_simd_bslv8qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8QImode,
	gen_rtx_AND (V8QImode,
	gen_rtx_XOR (V8QImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3585 */
rtx
gen_aarch64_simd_bslv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	gen_rtx_AND (V16QImode,
	gen_rtx_XOR (V16QImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3585 */
rtx
gen_aarch64_simd_bslv4hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4HImode,
	gen_rtx_AND (V4HImode,
	gen_rtx_XOR (V4HImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3585 */
rtx
gen_aarch64_simd_bslv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	gen_rtx_AND (V8HImode,
	gen_rtx_XOR (V8HImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3585 */
rtx
gen_aarch64_simd_bslv2si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2SImode,
	gen_rtx_AND (V2SImode,
	gen_rtx_XOR (V2SImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3585 */
rtx
gen_aarch64_simd_bslv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	gen_rtx_AND (V4SImode,
	gen_rtx_XOR (V4SImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3585 */
rtx
gen_aarch64_simd_bslv2di_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2DImode,
	gen_rtx_AND (V2DImode,
	gen_rtx_XOR (V2DImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3636 */
rtx
gen_aarch64_simd_bsldi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	gen_rtx_AND (DImode,
	gen_rtx_XOR (DImode,
	operand3,
	operand2),
	operand1),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3678 */
rtx
gen_aarch64_simd_bsldi_alt (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	gen_rtx_AND (DImode,
	gen_rtx_XOR (DImode,
	operand3,
	operand2),
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
rtx
gen_aarch64_get_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8BFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanessi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanessf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4229 */
rtx
gen_load_pair_lanesdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8BFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanessi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanessf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4259 */
rtx
gen_store_pair_lanesdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_saddlv16qi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_ssublv16qi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_uaddlv16qi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_usublv16qi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_saddlv8hi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_ssublv8hi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_uaddlv8hi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_usublv8hi_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_saddlv4si_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_ssublv4si_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_uaddlv4si_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4405 */
rtx
gen_aarch64_usublv4si_hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_saddlv16qi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_ssublv16qi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_uaddlv16qi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_usublv16qi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_saddlv8hi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_ssublv8hi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_uaddlv8hi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_usublv8hi_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_saddlv4si_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_ssublv4si_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_uaddlv4si_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4418 */
rtx
gen_aarch64_usublv4si_lo_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_saddlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_ssublv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_uaddlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_usublv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_saddlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_ssublv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_uaddlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_usublv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_saddlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_ssublv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_uaddlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4527 */
rtx
gen_aarch64_usublv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4596 */
rtx
gen_aarch64_ssubwv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4596 */
rtx
gen_aarch64_usubwv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4596 */
rtx
gen_aarch64_ssubwv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4596 */
rtx
gen_aarch64_usubwv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4596 */
rtx
gen_aarch64_ssubwv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4596 */
rtx
gen_aarch64_usubwv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4606 */
rtx
gen_aarch64_ssubwv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4606 */
rtx
gen_aarch64_usubwv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4606 */
rtx
gen_aarch64_ssubwv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4606 */
rtx
gen_aarch64_usubwv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4606 */
rtx
gen_aarch64_ssubwv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4606 */
rtx
gen_aarch64_usubwv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4618 */
rtx
gen_aarch64_ssubw2v16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4618 */
rtx
gen_aarch64_usubw2v16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V8HImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4618 */
rtx
gen_aarch64_ssubw2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4618 */
rtx
gen_aarch64_usubw2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4618 */
rtx
gen_aarch64_ssubw2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4618 */
rtx
gen_aarch64_usubw2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4630 */
rtx
gen_aarch64_saddwv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4630 */
rtx
gen_aarch64_uaddwv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4630 */
rtx
gen_aarch64_saddwv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4630 */
rtx
gen_aarch64_uaddwv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4630 */
rtx
gen_aarch64_saddwv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4630 */
rtx
gen_aarch64_uaddwv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4640 */
rtx
gen_aarch64_saddwv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4640 */
rtx
gen_aarch64_uaddwv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4640 */
rtx
gen_aarch64_saddwv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4640 */
rtx
gen_aarch64_uaddwv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4640 */
rtx
gen_aarch64_saddwv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4640 */
rtx
gen_aarch64_uaddwv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4653 */
rtx
gen_aarch64_saddw2v16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4653 */
rtx
gen_aarch64_uaddw2v16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4653 */
rtx
gen_aarch64_saddw2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4653 */
rtx
gen_aarch64_uaddw2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4653 */
rtx
gen_aarch64_saddw2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4653 */
rtx
gen_aarch64_uaddw2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_srhaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_urhaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shsubv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	185));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhsubv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	186));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_srhaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_urhaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shsubv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	185));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhsubv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	186));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_srhaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_urhaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shsubv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	185));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhsubv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	186));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_srhaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_urhaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shsubv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	185));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhsubv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	186));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_srhaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_urhaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shsubv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	185));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhsubv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	186));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_srhaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_urhaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_shsubv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	185));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4733 */
rtx
gen_aarch64_uhsubv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	186));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_addhnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_raddhnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_subhnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_rsubhnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_addhnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_raddhnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_subhnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_rsubhnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_addhnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_raddhnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_subhnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4745 */
rtx
gen_aarch64_rsubhnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_addhnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_raddhnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_subhnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_rsubhnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_addhnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_raddhnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_subhnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_rsubhnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_addhnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_raddhnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_subhnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4757 */
rtx
gen_aarch64_rsubhnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_addhn2v8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	187)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_raddhn2v8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	188)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_subhn2v8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	189)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_rsubhn2v8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	190)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_addhn2v4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	187)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_raddhn2v4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	188)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_subhn2v4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	189)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_rsubhn2v4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	190)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_addhn2v2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	187)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_raddhn2v2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	188)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_subhn2v2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	189)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4792 */
rtx
gen_aarch64_rsubhn2v2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	190)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_addhn2v8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	187),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_raddhn2v8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	188),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_subhn2v8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	189),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_rsubhn2v8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	190),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_addhn2v4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	187),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_raddhn2v4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	188),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_subhn2v4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	189),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_rsubhn2v4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	190),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_addhn2v2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	187),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_raddhn2v2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	188),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_subhn2v2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	189),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4804 */
rtx
gen_aarch64_rsubhn2v2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	190),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4836 */
rtx
gen_aarch64_pmulv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4836 */
rtx
gen_aarch64_pmulv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4846 */
rtx
gen_aarch64_pmullv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	255));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4856 */
rtx
gen_aarch64_pmull_hiv16qi_insn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand3),
		gen_rtx_VEC_SELECT (V8QImode,
	operand2,
	operand3)),
	255));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4886 */
rtx
gen_aarch64_fmulxdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	194));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (V2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqaddsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqaddsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqadddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqadddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_sqsubdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4970 */
rtx
gen_aarch64_uqsubdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqaddsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqaddsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_suqadddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4981 */
rtx
gen_aarch64_usqadddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	195));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4993 */
rtx
gen_aarch64_sqmovnhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_TRUNCATE (QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4993 */
rtx
gen_aarch64_uqmovnhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_TRUNCATE (QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4993 */
rtx
gen_aarch64_sqmovnsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_TRUNCATE (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4993 */
rtx
gen_aarch64_uqmovnsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_TRUNCATE (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4993 */
rtx
gen_aarch64_sqmovndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_TRUNCATE (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4993 */
rtx
gen_aarch64_uqmovndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_TRUNCATE (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5002 */
rtx
gen_aarch64_sqmovnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_SS_TRUNCATE (V8QImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5002 */
rtx
gen_aarch64_uqmovnv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_US_TRUNCATE (V8QImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5002 */
rtx
gen_aarch64_sqmovnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_SS_TRUNCATE (V4HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5002 */
rtx
gen_aarch64_uqmovnv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_US_TRUNCATE (V4HImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5002 */
rtx
gen_aarch64_sqmovnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_SS_TRUNCATE (V2SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5002 */
rtx
gen_aarch64_uqmovnv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_US_TRUNCATE (V2SImode,
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5013 */
rtx
gen_aarch64_sqmovnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand2,
	gen_rtx_SS_TRUNCATE (V8QImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5013 */
rtx
gen_aarch64_uqmovnv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand2,
	gen_rtx_US_TRUNCATE (V8QImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5013 */
rtx
gen_aarch64_sqmovnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand2,
	gen_rtx_SS_TRUNCATE (V4HImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5013 */
rtx
gen_aarch64_uqmovnv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand2,
	gen_rtx_US_TRUNCATE (V4HImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5013 */
rtx
gen_aarch64_sqmovnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand2,
	gen_rtx_SS_TRUNCATE (V2SImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5013 */
rtx
gen_aarch64_uqmovnv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand2,
	gen_rtx_US_TRUNCATE (V2SImode,
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5046 */
rtx
gen_aarch64_sqxtn2v8hi_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_SS_TRUNCATE (V8QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5046 */
rtx
gen_aarch64_uqxtn2v8hi_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_US_TRUNCATE (V8QImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5046 */
rtx
gen_aarch64_sqxtn2v4si_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_SS_TRUNCATE (V4HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5046 */
rtx
gen_aarch64_uqxtn2v4si_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_US_TRUNCATE (V4HImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5046 */
rtx
gen_aarch64_sqxtn2v2di_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_SS_TRUNCATE (V2SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5046 */
rtx
gen_aarch64_uqxtn2v2di_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_US_TRUNCATE (V2SImode,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5057 */
rtx
gen_aarch64_sqxtn2v8hi_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_SS_TRUNCATE (V8QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5057 */
rtx
gen_aarch64_uqxtn2v8hi_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_US_TRUNCATE (V8QImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5057 */
rtx
gen_aarch64_sqxtn2v4si_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_SS_TRUNCATE (V4HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5057 */
rtx
gen_aarch64_uqxtn2v4si_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_US_TRUNCATE (V4HImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5057 */
rtx
gen_aarch64_sqxtn2v2di_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_SS_TRUNCATE (V2SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5057 */
rtx
gen_aarch64_uqxtn2v2di_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_US_TRUNCATE (V2SImode,
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5087 */
rtx
gen_aarch64_sqmovunhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand1),
	197));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5087 */
rtx
gen_aarch64_sqmovunsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (1,
		operand1),
	197));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5087 */
rtx
gen_aarch64_sqmovundi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	197));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5096 */
rtx
gen_aarch64_sqmovunv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	197),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5096 */
rtx
gen_aarch64_sqmovunv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	197),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5096 */
rtx
gen_aarch64_sqmovunv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	197),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5107 */
rtx
gen_aarch64_sqmovunv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand2,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	197)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5107 */
rtx
gen_aarch64_sqmovunv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand2,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	197)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5107 */
rtx
gen_aarch64_sqmovunv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand2,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	197)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5140 */
rtx
gen_aarch64_sqxtun2v8hi_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand2),
	197)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5140 */
rtx
gen_aarch64_sqxtun2v4si_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand2),
	197)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5140 */
rtx
gen_aarch64_sqxtun2v2di_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand2),
	197)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5151 */
rtx
gen_aarch64_sqxtun2v8hi_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand2),
	197),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5151 */
rtx
gen_aarch64_sqxtun2v4si_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand2),
	197),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5151 */
rtx
gen_aarch64_sqxtun2v2di_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand2),
	197),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (V16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqneghi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabshi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabssi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqnegdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_NEG (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5181 */
rtx
gen_aarch64_sqabsdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ABS (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqdmulhv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqrdmulhv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqdmulhv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqrdmulhv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqdmulhv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqrdmulhv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqdmulhv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqrdmulhv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqdmulhhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqrdmulhhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqdmulhsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5192 */
rtx
gen_aarch64_sqrdmulhsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqdmulh_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V4HImode,
	operand2)),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqrdmulh_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V4HImode,
	operand2)),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqdmulh_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqrdmulh_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V8HImode,
	operand2)),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqdmulh_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V2SImode,
	operand2)),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqrdmulh_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V2SImode,
	operand2)),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqdmulh_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5203 */
rtx
gen_aarch64_sqrdmulh_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_DUPLICATE (V4SImode,
	operand2)),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqdmulh_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqrdmulh_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqdmulh_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqrdmulh_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqdmulh_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqrdmulh_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqdmulh_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5217 */
rtx
gen_aarch64_sqrdmulh_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqdmulh_laneqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqrdmulh_laneqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqdmulh_laneqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqrdmulh_laneqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqdmulh_laneqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqrdmulh_laneqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqdmulh_laneqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5232 */
rtx
gen_aarch64_sqrdmulh_laneqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5247 */
rtx
gen_aarch64_sqdmulh_lanehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5247 */
rtx
gen_aarch64_sqrdmulh_lanehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5247 */
rtx
gen_aarch64_sqdmulh_lanesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5247 */
rtx
gen_aarch64_sqrdmulh_lanesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5262 */
rtx
gen_aarch64_sqdmulh_laneqhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5262 */
rtx
gen_aarch64_sqrdmulh_laneqhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5262 */
rtx
gen_aarch64_sqdmulh_laneqsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5262 */
rtx
gen_aarch64_sqrdmulh_laneqsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlahv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlshv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlahv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlshv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlahv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlshv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlahv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlshv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlahhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlshhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlahsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5279 */
rtx
gen_aarch64_sqrdmlshsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlah_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlsh_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlah_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlsh_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlah_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlsh_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlah_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5293 */
rtx
gen_aarch64_sqrdmlsh_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5311 */
rtx
gen_aarch64_sqrdmlah_lanehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5311 */
rtx
gen_aarch64_sqrdmlsh_lanehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5311 */
rtx
gen_aarch64_sqrdmlah_lanesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5311 */
rtx
gen_aarch64_sqrdmlsh_lanesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlah_laneqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlsh_laneqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlah_laneqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlsh_laneqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlah_laneqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlsh_laneqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlah_laneqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5331 */
rtx
gen_aarch64_sqrdmlsh_laneqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5349 */
rtx
gen_aarch64_sqrdmlah_laneqhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5349 */
rtx
gen_aarch64_sqrdmlsh_laneqhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5349 */
rtx
gen_aarch64_sqrdmlah_laneqsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5349 */
rtx
gen_aarch64_sqrdmlsh_laneqsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5369 */
rtx
gen_aarch64_sqdmlalv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand3)),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5369 */
rtx
gen_aarch64_sqdmlalv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand3)),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5369 */
rtx
gen_aarch64_sqdmlalhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (SImode,
	operand3)),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5369 */
rtx
gen_aarch64_sqdmlalsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	operand3)),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5385 */
rtx
gen_aarch64_sqdmlslv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand3)),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5385 */
rtx
gen_aarch64_sqdmlslv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand3)),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5385 */
rtx
gen_aarch64_sqdmlslhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (SImode,
	operand3)),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5385 */
rtx
gen_aarch64_sqdmlslsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	operand3)),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5403 */
rtx
gen_aarch64_sqdmlal_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5403 */
rtx
gen_aarch64_sqdmlal_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5427 */
rtx
gen_aarch64_sqdmlsl_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5427 */
rtx
gen_aarch64_sqdmlsl_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5452 */
rtx
gen_aarch64_sqdmlsl_laneqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5452 */
rtx
gen_aarch64_sqdmlsl_laneqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5476 */
rtx
gen_aarch64_sqdmlal_laneqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5476 */
rtx
gen_aarch64_sqdmlal_laneqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5501 */
rtx
gen_aarch64_sqdmlal_lanehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5501 */
rtx
gen_aarch64_sqdmlal_lanesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5524 */
rtx
gen_aarch64_sqdmlsl_lanehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5524 */
rtx
gen_aarch64_sqdmlsl_lanesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5548 */
rtx
gen_aarch64_sqdmlal_laneqhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5548 */
rtx
gen_aarch64_sqdmlal_laneqsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5571 */
rtx
gen_aarch64_sqdmlsl_laneqhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2),
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5571 */
rtx
gen_aarch64_sqdmlsl_laneqsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5596 */
rtx
gen_aarch64_sqdmlsl_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand3))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5596 */
rtx
gen_aarch64_sqdmlsl_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand3))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5613 */
rtx
gen_aarch64_sqdmlal_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand3))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5613 */
rtx
gen_aarch64_sqdmlal_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand3))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5633 */
rtx
gen_aarch64_sqdmlal2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand4)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand3,
	operand4))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5633 */
rtx
gen_aarch64_sqdmlal2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand4)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand3,
	operand4))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5653 */
rtx
gen_aarch64_sqdmlsl2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand4)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand3,
	operand4))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5653 */
rtx
gen_aarch64_sqdmlsl2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand4)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand3,
	operand4))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5691 */
rtx
gen_aarch64_sqdmlsl2_lanev8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5691 */
rtx
gen_aarch64_sqdmlsl2_lanev4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5717 */
rtx
gen_aarch64_sqdmlal2_lanev8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5717 */
rtx
gen_aarch64_sqdmlal2_lanev4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5743 */
rtx
gen_aarch64_sqdmlsl2_laneqv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5743 */
rtx
gen_aarch64_sqdmlsl2_laneqv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5769 */
rtx
gen_aarch64_sqdmlal2_laneqv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5769 */
rtx
gen_aarch64_sqdmlal2_laneqv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand5)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5829 */
rtx
gen_aarch64_sqdmlsl2_nv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V4SImode,
	operand1,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand3))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5829 */
rtx
gen_aarch64_sqdmlsl2_nv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (V2DImode,
	operand1,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand3))),
	const1_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5848 */
rtx
gen_aarch64_sqdmlal2_nv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V4SImode,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand3))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5848 */
rtx
gen_aarch64_sqdmlal2_nv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (V2DImode,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand3))),
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5885 */
rtx
gen_aarch64_sqdmullv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand2)),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5885 */
rtx
gen_aarch64_sqdmullv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand2)),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5885 */
rtx
gen_aarch64_sqdmullhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (SImode,
	operand2)),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5885 */
rtx
gen_aarch64_sqdmullsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5901 */
rtx
gen_aarch64_sqdmull_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5901 */
rtx
gen_aarch64_sqdmull_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5922 */
rtx
gen_aarch64_sqdmull_laneqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5922 */
rtx
gen_aarch64_sqdmull_laneqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5943 */
rtx
gen_aarch64_sqdmull_lanehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5943 */
rtx
gen_aarch64_sqdmull_lanesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5963 */
rtx
gen_aarch64_sqdmull_laneqhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (SImode,
	gen_rtx_MULT (SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1),
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5963 */
rtx
gen_aarch64_sqdmull_laneqsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (DImode,
	gen_rtx_MULT (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5985 */
rtx
gen_aarch64_sqdmull_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5985 */
rtx
gen_aarch64_sqdmull_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6003 */
rtx
gen_aarch64_sqdmull2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand2,
	operand3))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6003 */
rtx
gen_aarch64_sqdmull2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand2,
	operand3))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6036 */
rtx
gen_aarch64_sqdmull2_lanev8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6036 */
rtx
gen_aarch64_sqdmull2_lanev4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6059 */
rtx
gen_aarch64_sqdmull2_laneqv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	gen_rtx_VEC_SELECT (HImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6059 */
rtx
gen_aarch64_sqdmull2_laneqv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand4)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_VEC_SELECT (SImode,
	operand2,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand3)))))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6112 */
rtx
gen_aarch64_sqdmull2_nv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V4SImode,
	gen_rtx_MULT (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V4SImode,
	gen_rtx_SIGN_EXTEND (SImode,
	operand2))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6112 */
rtx
gen_aarch64_sqdmull2_nv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_ASHIFT (V2DImode,
	gen_rtx_MULT (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand3)),
	gen_rtx_VEC_DUPLICATE (V2DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2))),
	const1_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_sshldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	213));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_ushldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	214));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_srshldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	215));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6144 */
rtx
gen_aarch64_urshldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	216));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshlsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshlsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshlsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshlsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqshldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqshldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_sqrshldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	217));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6158 */
rtx
gen_aarch64_uqrshldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	218));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6201 */
rtx
gen_aarch64_sshllv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2),
		operand3),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6201 */
rtx
gen_aarch64_ushllv16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2),
		operand3),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6201 */
rtx
gen_aarch64_sshllv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2),
		operand3),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6201 */
rtx
gen_aarch64_ushllv8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2),
		operand3),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6201 */
rtx
gen_aarch64_sshllv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2),
		operand3),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6201 */
rtx
gen_aarch64_ushllv4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2),
		operand3),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6219 */
rtx
gen_aarch64_sshll2v16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2),
		operand3),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6219 */
rtx
gen_aarch64_ushll2v16qi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2),
		operand3),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6219 */
rtx
gen_aarch64_sshll2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2),
		operand3),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6219 */
rtx
gen_aarch64_ushll2v8hi_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2),
		operand3),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6219 */
rtx
gen_aarch64_sshll2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2),
		operand3),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6219 */
rtx
gen_aarch64_ushll2v4si_internal (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2),
		operand3),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6237 */
rtx
gen_aarch64_sshll_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6237 */
rtx
gen_aarch64_ushll_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6237 */
rtx
gen_aarch64_sshll_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6237 */
rtx
gen_aarch64_ushll_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6237 */
rtx
gen_aarch64_sshll_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6237 */
rtx
gen_aarch64_ushll_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6255 */
rtx
gen_aarch64_sshll2_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6255 */
rtx
gen_aarch64_ushll2_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6255 */
rtx
gen_aarch64_sshll2_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6255 */
rtx
gen_aarch64_ushll2_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6255 */
rtx
gen_aarch64_sshll2_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6255 */
rtx
gen_aarch64_ushll2_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_srshr_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	202));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6272 */
rtx
gen_aarch64_urshr_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	203));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ssra_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	198));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_usra_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	199));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_srsra_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	200));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6285 */
rtx
gen_aarch64_ursra_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	201));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssli_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	219));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usli_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	220));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_ssri_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	221));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6299 */
rtx
gen_aarch64_usri_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	222));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshlu_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	204));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_sqshl_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	205));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6313 */
rtx
gen_aarch64_uqshl_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	206));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqshrun_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqrshrun_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqshrn_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_uqshrn_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqrshrn_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_uqrshrn_nhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqshrun_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqrshrun_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqshrn_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_uqshrn_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqrshrn_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_uqrshrn_nsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqshrun_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqrshrun_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqshrn_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_uqshrn_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_sqrshrn_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6327 */
rtx
gen_aarch64_uqrshrn_ndi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqshrun_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqrshrun_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqshrn_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_uqshrn_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqrshrn_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_uqrshrn_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqshrun_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqrshrun_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqshrn_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_uqshrn_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqrshrn_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_uqrshrn_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqshrun_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqrshrun_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqshrn_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_uqshrn_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_sqrshrn_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6338 */
rtx
gen_aarch64_uqrshrn_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqshrun_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqrshrun_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqshrn_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_uqshrn_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqrshrn_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_uqrshrn_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand3,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqshrun_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqrshrun_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqshrn_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_uqshrn_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqrshrn_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_uqrshrn_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand3,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqshrun_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqrshrun_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqshrn_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_uqshrn_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_sqrshrn_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6351 */
rtx
gen_aarch64_uqrshrn_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand3,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqshrun2_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqrshrun2_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqshrn2_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_uqshrn2_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqrshrn2_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_uqrshrn2_nv8hi_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqshrun2_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqrshrun2_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqshrn2_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_uqshrn2_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqrshrn2_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_uqrshrn2_nv4si_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqshrun2_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqrshrun2_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqshrn2_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_uqshrn2_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_sqrshrn2_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6390 */
rtx
gen_aarch64_uqrshrn2_nv2di_insn_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqshrun2_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqrshrun2_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqshrn2_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_uqshrn2_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqrshrn2_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_uqrshrn2_nv8hi_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqshrun2_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqrshrun2_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqshrn2_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_uqshrn2_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqrshrn2_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_uqrshrn2_nv4si_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqshrun2_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqrshrun2_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqshrn2_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_uqshrn2_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_sqrshrn2_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6403 */
rtx
gen_aarch64_uqrshrn2_nv2di_insn_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmltv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_LT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmlev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_LE (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmeqv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_EQ (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GE (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgtv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GT (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmltv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_LT (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmlev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_LE (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmeqv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_EQ (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GE (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgtv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GT (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmltv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmlev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmeqv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_EQ (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgtv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmltv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmlev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmeqv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_EQ (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgtv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmltv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmlev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmeqv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_EQ (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgtv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmltv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmlev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmeqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_EQ (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgtv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmltv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LT (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmlev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LE (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmeqv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_EQ (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GE (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6443 */
rtx
gen_aarch64_cmgtv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GT (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
rtx
gen_aarch64_cmltdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LT (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
rtx
gen_aarch64_cmledi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LE (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
rtx
gen_aarch64_cmeqdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_EQ (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
rtx
gen_aarch64_cmgedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GE (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
rtx
gen_aarch64_cmgtdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GT (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmltuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_LTU (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmleuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_LEU (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgeuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GEU (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgtuv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8QImode,
	gen_rtx_GTU (V8QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmltuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_LTU (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmleuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_LEU (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgeuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GEU (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgtuv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V16QImode,
	gen_rtx_GTU (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmltuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LTU (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmleuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LEU (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgeuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GEU (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgtuv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GTU (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmltuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LTU (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmleuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LEU (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgeuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GEU (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgtuv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GTU (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmltuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LTU (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmleuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LEU (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgeuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GEU (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgtuv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GTU (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmltuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LTU (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmleuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LEU (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgeuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GEU (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgtuv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GTU (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmltuv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LTU (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmleuv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LEU (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgeuv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GEU (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6508 */
rtx
gen_aarch64_cmgtuv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GTU (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
rtx
gen_aarch64_cmltudi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LTU (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
rtx
gen_aarch64_cmleudi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LEU (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
rtx
gen_aarch64_cmgeudi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GEU (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
rtx
gen_aarch64_cmgtudi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GTU (DImode,
	operand1,
	operand2))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6575 */
rtx
gen_aarch64_cmtstv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8QImode,
	gen_rtx_EQ (V8QImode,
	gen_rtx_AND (V8QImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6575 */
rtx
gen_aarch64_cmtstv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V16QImode,
	gen_rtx_EQ (V16QImode,
	gen_rtx_AND (V16QImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6575 */
rtx
gen_aarch64_cmtstv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HImode,
	gen_rtx_EQ (V4HImode,
	gen_rtx_AND (V4HImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6575 */
rtx
gen_aarch64_cmtstv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_EQ (V8HImode,
	gen_rtx_AND (V8HImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6575 */
rtx
gen_aarch64_cmtstv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SImode,
	gen_rtx_EQ (V2SImode,
	gen_rtx_AND (V2SImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6575 */
rtx
gen_aarch64_cmtstv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_EQ (V4SImode,
	gen_rtx_AND (V4SImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6575 */
rtx
gen_aarch64_cmtstv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_EQ (V2DImode,
	gen_rtx_AND (V2DImode,
	operand1,
	operand2),
	operand3),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6607 */
rtx
gen_aarch64_cmtstdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_NE (DImode,
	gen_rtx_AND (DImode,
	operand1,
	operand2),
	const0_rtx))),
		gen_hard_reg_clobber (CCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmltv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_EQ (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgtv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmltv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_EQ (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgtv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmltv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_EQ (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgtv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmltv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_EQ (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgtv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmltv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LT (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LE (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_EQ (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GE (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgtv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GT (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlthf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_LT (HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlehf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_LE (HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_EQ (HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgehf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_GE (HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgthf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_GT (HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmltsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_LT (SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmlesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_LE (SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_EQ (SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_GE (SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgtsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_GT (SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmltdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LT (DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmledf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LE (DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmeqdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_EQ (DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GE (DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6660 */
rtx
gen_aarch64_cmgtdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GT (DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facltv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LT (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_LE (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GE (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgtv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4HImode,
	gen_rtx_GT (V4HImode,
	gen_rtx_ABS (V4HFmode,
	operand1),
	gen_rtx_ABS (V4HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facltv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LT (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_LE (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GE (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgtv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V8HImode,
	gen_rtx_GT (V8HImode,
	gen_rtx_ABS (V8HFmode,
	operand1),
	gen_rtx_ABS (V8HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facltv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LT (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_LE (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GE (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgtv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2SImode,
	gen_rtx_GT (V2SImode,
	gen_rtx_ABS (V2SFmode,
	operand1),
	gen_rtx_ABS (V2SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facltv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LT (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_LE (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GE (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgtv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V4SImode,
	gen_rtx_GT (V4SImode,
	gen_rtx_ABS (V4SFmode,
	operand1),
	gen_rtx_ABS (V4SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facltv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LT (V2DImode,
	gen_rtx_ABS (V2DFmode,
	operand1),
	gen_rtx_ABS (V2DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_LE (V2DImode,
	gen_rtx_ABS (V2DFmode,
	operand1),
	gen_rtx_ABS (V2DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GE (V2DImode,
	gen_rtx_ABS (V2DFmode,
	operand1),
	gen_rtx_ABS (V2DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgtv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (V2DImode,
	gen_rtx_GT (V2DImode,
	gen_rtx_ABS (V2DFmode,
	operand1),
	gen_rtx_ABS (V2DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclthf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_LT (HImode,
	gen_rtx_ABS (HFmode,
	operand1),
	gen_rtx_ABS (HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclehf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_LE (HImode,
	gen_rtx_ABS (HFmode,
	operand1),
	gen_rtx_ABS (HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgehf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_GE (HImode,
	gen_rtx_ABS (HFmode,
	operand1),
	gen_rtx_ABS (HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgthf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (HImode,
	gen_rtx_GT (HImode,
	gen_rtx_ABS (HFmode,
	operand1),
	gen_rtx_ABS (HFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facltsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_LT (SImode,
	gen_rtx_ABS (SFmode,
	operand1),
	gen_rtx_ABS (SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_faclesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_LE (SImode,
	gen_rtx_ABS (SFmode,
	operand1),
	gen_rtx_ABS (SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_GE (SImode,
	gen_rtx_ABS (SFmode,
	operand1),
	gen_rtx_ABS (SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgtsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (SImode,
	gen_rtx_GT (SImode,
	gen_rtx_ABS (SFmode,
	operand1),
	gen_rtx_ABS (SFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facltdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LT (DImode,
	gen_rtx_ABS (DFmode,
	operand1),
	gen_rtx_ABS (DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facledf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LE (DImode,
	gen_rtx_ABS (DFmode,
	operand1),
	gen_rtx_ABS (DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GE (DImode,
	gen_rtx_ABS (DFmode,
	operand1),
	gen_rtx_ABS (DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6678 */
rtx
gen_aarch64_facgtdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GT (DImode,
	gen_rtx_ABS (DFmode,
	operand1),
	gen_rtx_ABS (DFmode,
	operand2))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6694 */
rtx
gen_aarch64_addpv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6694 */
rtx
gen_aarch64_addpv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6694 */
rtx
gen_aarch64_addpv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6694 */
rtx
gen_aarch64_addpv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6694 */
rtx
gen_aarch64_addpv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6694 */
rtx
gen_aarch64_addpv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6694 */
rtx
gen_aarch64_addpv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6705 */
rtx
gen_aarch64_addpdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6736 */
rtx
gen_aarch64_simd_ld2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (1,
		operand1),
	39));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8QImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4BFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6746 */
rtx
gen_aarch64_simd_ld2rv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (1,
		operand1),
	41));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x8qi_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x4hi_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x2si_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x1di_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x4hf_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x2sf_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x1df_lanedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x4bf_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x16qi_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x8hi_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x4si_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x2di_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x8hf_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x4sf_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x2df_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6756 */
rtx
gen_aarch64_vec_load_lanesv2x8bf_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	48));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6792 */
rtx
gen_aarch64_simd_st2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x8qi_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x4hi_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x2si_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x1di_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x4hf_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x2sf_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x1df_lanedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x4bf_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x16qi_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x8hi_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x4si_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x2di_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x8hf_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x4sf_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x2df_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6803 */
rtx
gen_aarch64_vec_store_lanesv2x8bf_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	82));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6836 */
rtx
gen_aarch64_simd_ld3v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (1,
		operand1),
	42));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8QImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4BFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6846 */
rtx
gen_aarch64_simd_ld3rv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (1,
		operand1),
	44));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x8qi_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x4hi_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x2si_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x1di_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x4hf_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x2sf_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x1df_lanedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x4bf_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x16qi_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x8hi_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x4si_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x2di_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x8hf_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x4sf_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x2df_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6856 */
rtx
gen_aarch64_vec_load_lanesv3x8bf_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	49));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6892 */
rtx
gen_aarch64_simd_st3v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x8qi_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x4hi_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x2si_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x1di_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x4hf_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x2sf_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x1df_lanedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x4bf_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x16qi_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x8hi_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x4si_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x2di_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x8hf_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x4sf_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x2df_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6902 */
rtx
gen_aarch64_vec_store_lanesv3x8bf_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	83));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6936 */
rtx
gen_aarch64_simd_ld4v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (1,
		operand1),
	45));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8QImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4BFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6946 */
rtx
gen_aarch64_simd_ld4rv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (1,
		operand1),
	47));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x8qi_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x4hi_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x2si_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x1di_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x4hf_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x2sf_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x1df_lanedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x4bf_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x16qi_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x8hi_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x4si_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x2di_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x8hf_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x4sf_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x2df_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6956 */
rtx
gen_aarch64_vec_load_lanesv4x8bf_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	50));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6992 */
rtx
gen_aarch64_simd_st4v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x8qi_lanev8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x4hi_lanev4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x2si_lanev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x1di_lanedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x4hf_lanev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x2sf_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x1df_lanedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x4bf_lanev4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x16qi_lanev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x8hi_lanev8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x4si_lanev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x2di_lanev2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x8hf_lanev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x4sf_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x2df_lanev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7003 */
rtx
gen_aarch64_vec_store_lanesv4x8bf_lanev8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		operand2),
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x1df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x1df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x1df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv2x8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv3x8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
rtx
gen_aarch64_rev_reglistv4x8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	257));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7106 */
rtx
gen_aarch64_ld1_x3_v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7126 */
rtx
gen_aarch64_ld1_x4_v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7146 */
rtx
gen_aarch64_st1_x2_v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7166 */
rtx
gen_aarch64_st1_x3_v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7186 */
rtx
gen_aarch64_st1_x4_v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7236 */
rtx
gen_aarch64_be_ld1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7246 */
rtx
gen_aarch64_be_st1di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	78));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7519 */
rtx
gen_aarch64_ld2v8qi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8QImode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7519 */
rtx
gen_aarch64_ld2v4hi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HImode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7519 */
rtx
gen_aarch64_ld2v2si_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SImode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7519 */
rtx
gen_aarch64_ld2v4hf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HFmode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7519 */
rtx
gen_aarch64_ld2v2sf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SFmode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7519 */
rtx
gen_aarch64_ld2v4bf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4BFmode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7529 */
rtx
gen_aarch64_ld2di_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DImode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7529 */
rtx
gen_aarch64_ld2df_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DFmode,
	gen_rtvec (1,
		operand1),
	40));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7539 */
rtx
gen_aarch64_ld3v8qi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8QImode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7539 */
rtx
gen_aarch64_ld3v4hi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HImode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7539 */
rtx
gen_aarch64_ld3v2si_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SImode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7539 */
rtx
gen_aarch64_ld3v4hf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HFmode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7539 */
rtx
gen_aarch64_ld3v2sf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SFmode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7539 */
rtx
gen_aarch64_ld3v4bf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4BFmode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7549 */
rtx
gen_aarch64_ld3di_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DImode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7549 */
rtx
gen_aarch64_ld3df_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DFmode,
	gen_rtvec (1,
		operand1),
	43));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7559 */
rtx
gen_aarch64_ld4v8qi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8QImode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7559 */
rtx
gen_aarch64_ld4v4hi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HImode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7559 */
rtx
gen_aarch64_ld4v2si_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SImode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7559 */
rtx
gen_aarch64_ld4v4hf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HFmode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7559 */
rtx
gen_aarch64_ld4v2sf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SFmode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7559 */
rtx
gen_aarch64_ld4v4bf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4BFmode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7569 */
rtx
gen_aarch64_ld4di_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DImode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7569 */
rtx
gen_aarch64_ld4df_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DFmode,
	gen_rtvec (1,
		operand1),
	46));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7661 */
rtx
gen_aarch64_qtbl1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7661 */
rtx
gen_aarch64_qtbl1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7671 */
rtx
gen_aarch64_qtbx1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7671 */
rtx
gen_aarch64_qtbx1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7684 */
rtx
gen_aarch64_qtbl2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7684 */
rtx
gen_aarch64_qtbl2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7694 */
rtx
gen_aarch64_qtbx2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7694 */
rtx
gen_aarch64_qtbx2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7707 */
rtx
gen_aarch64_qtbl3v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7707 */
rtx
gen_aarch64_qtbl3v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7717 */
rtx
gen_aarch64_qtbx3v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7717 */
rtx
gen_aarch64_qtbx3v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7730 */
rtx
gen_aarch64_qtbl4v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7730 */
rtx
gen_aarch64_qtbl4v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7740 */
rtx
gen_aarch64_qtbx4v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7740 */
rtx
gen_aarch64_qtbx4v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7751 */
rtx
gen_aarch64_combinev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	230));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip1v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_zip2v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn1v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_trn2v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp1v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7770 */
rtx
gen_aarch64_uzp2v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7784 */
rtx
gen_aarch64_extv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev64v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	238));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev32v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	239));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7802 */
rtx
gen_aarch64_rev16v2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	240));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7811 */
rtx
gen_aarch64_st2v8qi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8QImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7811 */
rtx
gen_aarch64_st2v4hi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7811 */
rtx
gen_aarch64_st2v2si_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7811 */
rtx
gen_aarch64_st2v4hf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7811 */
rtx
gen_aarch64_st2v2sf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7811 */
rtx
gen_aarch64_st2v4bf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4BFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7821 */
rtx
gen_aarch64_st2di_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DImode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7821 */
rtx
gen_aarch64_st2df_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DFmode,
	gen_rtvec (1,
		operand1),
	79));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7831 */
rtx
gen_aarch64_st3v8qi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8QImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7831 */
rtx
gen_aarch64_st3v4hi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7831 */
rtx
gen_aarch64_st3v2si_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7831 */
rtx
gen_aarch64_st3v4hf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4HFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7831 */
rtx
gen_aarch64_st3v2sf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2SFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7831 */
rtx
gen_aarch64_st3v4bf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4BFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7841 */
rtx
gen_aarch64_st3di_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DImode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7841 */
rtx
gen_aarch64_st3df_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x1DFmode,
	gen_rtvec (1,
		operand1),
	80));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7851 */
rtx
gen_aarch64_st4v8qi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8QImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7851 */
rtx
gen_aarch64_st4v4hi_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7851 */
rtx
gen_aarch64_st4v2si_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7851 */
rtx
gen_aarch64_st4v4hf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4HFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7851 */
rtx
gen_aarch64_st4v2sf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2SFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7851 */
rtx
gen_aarch64_st4v4bf_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4BFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7861 */
rtx
gen_aarch64_st4di_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DImode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7861 */
rtx
gen_aarch64_st4df_dreg (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x1DFmode,
	gen_rtvec (1,
		operand1),
	81));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v8qi_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v4hi_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v2si_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1di_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v4hf_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v2sf_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1df_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x1DFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v4bf_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v16qi_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v8hi_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v4si_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v2di_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v8hf_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v4sf_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v2df_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7951 */
rtx
gen_aarch64_simd_ld1v8bf_x2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (1,
		operand1),
	38));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpev4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpev8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpev2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpehf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpesf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7962 */
rtx
gen_aarch64_frecpedf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7972 */
rtx
gen_aarch64_frecpxhf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	25));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7972 */
rtx
gen_aarch64_frecpxsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	25));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7972 */
rtx
gen_aarch64_frecpxdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	25));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpsv4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpsv8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpsv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpsv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpsv2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpshf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpssf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7981 */
rtx
gen_aarch64_frecpsdf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7992 */
rtx
gen_aarch64_urecpev2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	22));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7992 */
rtx
gen_aarch64_urecpev4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	22));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8044 */
rtx
gen_aarch64_crypto_aesev16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		gen_rtx_XOR (V16QImode,
	operand1,
	operand2)),
	241));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8044 */
rtx
gen_aarch64_crypto_aesdv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		gen_rtx_XOR (V16QImode,
	operand1,
	operand2)),
	242));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8056 */
rtx
gen_aarch64_crypto_aesmcv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	243));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8056 */
rtx
gen_aarch64_crypto_aesimcv16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	244));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8109 */
rtx
gen_aarch64_crypto_sha1hsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand1),
	248));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8119 */
rtx
gen_aarch64_crypto_sha1hv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const0_rtx)))),
	248));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8129 */
rtx
gen_aarch64_be_crypto_sha1hv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		const_int_rtx[MAX_SAVED_CONST_INT + (3)])))),
	248));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8139 */
rtx
gen_aarch64_crypto_sha1su1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	250));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8149 */
rtx
gen_aarch64_crypto_sha1cv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	245));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8149 */
rtx
gen_aarch64_crypto_sha1mv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	246));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8149 */
rtx
gen_aarch64_crypto_sha1pv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	247));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8160 */
rtx
gen_aarch64_crypto_sha1su0v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	249));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8173 */
rtx
gen_aarch64_crypto_sha256hv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	251));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8173 */
rtx
gen_aarch64_crypto_sha256h2v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	252));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8184 */
rtx
gen_aarch64_crypto_sha256su0v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	253));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8194 */
rtx
gen_aarch64_crypto_sha256su1v4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	254));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8207 */
rtx
gen_aarch64_crypto_sha512hqv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	274));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8207 */
rtx
gen_aarch64_crypto_sha512h2qv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	275));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8218 */
rtx
gen_aarch64_crypto_sha512su0qv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	276));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8228 */
rtx
gen_aarch64_crypto_sha512su1qv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	277));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8241 */
rtx
gen_eor3qv16qi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	gen_rtx_XOR (V16QImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8241 */
rtx
gen_eor3qv8hi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	gen_rtx_XOR (V8HImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8241 */
rtx
gen_eor3qv4si4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	gen_rtx_XOR (V4SImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8241 */
rtx
gen_eor3qv2di4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2DImode,
	gen_rtx_XOR (V2DImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8253 */
rtx
gen_aarch64_rax1qv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2DImode,
	gen_rtx_ROTATE (V2DImode,
	operand2,
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8265 */
rtx
gen_aarch64_xarqv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (V2DImode,
	gen_rtx_XOR (V2DImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8277 */
rtx
gen_bcaxqv16qi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V16QImode,
	gen_rtx_AND (V16QImode,
	gen_rtx_NOT (V16QImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8277 */
rtx
gen_bcaxqv8hi4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V8HImode,
	gen_rtx_AND (V8HImode,
	gen_rtx_NOT (V8HImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8277 */
rtx
gen_bcaxqv4si4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V4SImode,
	gen_rtx_AND (V4SImode,
	gen_rtx_NOT (V4SImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8277 */
rtx
gen_bcaxqv2di4 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (V2DImode,
	gen_rtx_AND (V2DImode,
	gen_rtx_NOT (V2DImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8291 */
rtx
gen_aarch64_sm3ss1qv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	265));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8303 */
rtx
gen_aarch64_sm3tt1aqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	266));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8303 */
rtx
gen_aarch64_sm3tt1bqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	267));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8303 */
rtx
gen_aarch64_sm3tt2aqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	268));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8303 */
rtx
gen_aarch64_sm3tt2bqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	269));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8315 */
rtx
gen_aarch64_sm3partw1qv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	270));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8315 */
rtx
gen_aarch64_sm3partw2qv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	271));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8328 */
rtx
gen_aarch64_sm4eqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	272));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8338 */
rtx
gen_aarch64_sm4ekeyqv4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	273));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8393 */
rtx
gen_aarch64_simd_fmlal_lowv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8393 */
rtx
gen_aarch64_simd_fmlalq_lowv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8410 */
rtx
gen_aarch64_simd_fmlsl_lowv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8410 */
rtx
gen_aarch64_simd_fmlslq_lowv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8428 */
rtx
gen_aarch64_simd_fmlal_highv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8428 */
rtx
gen_aarch64_simd_fmlalq_highv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8445 */
rtx
gen_aarch64_simd_fmlsl_highv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8445 */
rtx
gen_aarch64_simd_fmlslq_highv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand3,
	operand5)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8504 */
rtx
gen_aarch64_simd_fmlal_lane_lowv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8522 */
rtx
gen_aarch64_simd_fmlsl_lane_lowv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8541 */
rtx
gen_aarch64_simd_fmlal_lane_highv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8559 */
rtx
gen_aarch64_simd_fmlsl_lane_highv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8618 */
rtx
gen_aarch64_simd_fmlalq_laneq_lowv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8636 */
rtx
gen_aarch64_simd_fmlslq_laneq_lowv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8655 */
rtx
gen_aarch64_simd_fmlalq_laneq_highv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8673 */
rtx
gen_aarch64_simd_fmlslq_laneq_highv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8734 */
rtx
gen_aarch64_simd_fmlal_laneq_lowv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8752 */
rtx
gen_aarch64_simd_fmlsl_laneq_lowv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8771 */
rtx
gen_aarch64_simd_fmlal_laneq_highv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8789 */
rtx
gen_aarch64_simd_fmlsl_laneq_highv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V2SFmode,
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_NEG (V2HFmode,
	gen_rtx_VEC_SELECT (V2HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8848 */
rtx
gen_aarch64_simd_fmlalq_lane_lowv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8866 */
rtx
gen_aarch64_simd_fmlslq_lane_lowv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8885 */
rtx
gen_aarch64_simd_fmlalq_lane_highv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4)),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8903 */
rtx
gen_aarch64_simd_fmlslq_lane_highv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (V4SFmode,
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_NEG (V4HFmode,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand2,
	operand4))),
	gen_rtx_FLOAT_EXTEND (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand5))))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8924 */
rtx
gen_aarch64_crypto_pmulldi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		operand2),
	255));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8934 */
rtx
gen_aarch64_crypto_pmullv2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (TImode,
	gen_rtvec (2,
		operand1,
		operand2),
	256));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8945 */
rtx
gen_extendv8qiv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8945 */
rtx
gen_zero_extendv8qiv8hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8945 */
rtx
gen_extendv4hiv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8945 */
rtx
gen_zero_extendv4hiv4si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8945 */
rtx
gen_extendv2siv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8945 */
rtx
gen_zero_extendv2siv2di2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8961 */
rtx
gen_truncv8hiv8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8961 */
rtx
gen_truncv4siv4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8961 */
rtx
gen_truncv2div2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8969 */
rtx
gen_aarch64_bfdotv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	522),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8969 */
rtx
gen_aarch64_bfdotv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	522),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8982 */
rtx
gen_aarch64_bfdot_lanev2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	522),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8982 */
rtx
gen_aarch64_bfdot_laneqv2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	522),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8982 */
rtx
gen_aarch64_bfdot_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	522),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8982 */
rtx
gen_aarch64_bfdot_laneqv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	522),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9023 */
rtx
gen_aarch64_bfmmlaqv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	525)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9035 */
rtx
gen_aarch64_bfmlalbv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	523)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9035 */
rtx
gen_aarch64_bfmlaltv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	524)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9046 */
rtx
gen_aarch64_bfmlalb_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	523)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9046 */
rtx
gen_aarch64_bfmlalt_lanev4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	524)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9046 */
rtx
gen_aarch64_bfmlalb_lane_qv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	523)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9046 */
rtx
gen_aarch64_bfmlalt_lane_qv4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	operand1,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	524)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9062 */
rtx
gen_aarch64_simd_smmlav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	313),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9062 */
rtx
gen_aarch64_simd_ummlav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	314),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9062 */
rtx
gen_aarch64_simd_usmmlav16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	315),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9074 */
rtx
gen_aarch64_bfcvtnv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4BFmode,
	gen_rtvec (1,
		operand1),
	526));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9074 */
rtx
gen_aarch64_bfcvtn_qv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (1,
		operand1),
	526));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9083 */
rtx
gen_aarch64_bfcvtn2v8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	527));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9093 */
rtx
gen_aarch64_bfcvtbf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (1,
		operand1),
	528));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9103 */
rtx
gen_aarch64_vbfcvtv4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	526));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9103 */
rtx
gen_aarch64_vbfcvtv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	526));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9112 */
rtx
gen_aarch64_vbfcvt_highv8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	527));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9121 */
rtx
gen_aarch64_bfcvtsf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	528));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:44 */
rtx
gen_aarch64_compare_and_swapqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_UNSPEC_VOLATILE (CCmode,
	gen_rtvec (1,
		const0_rtx),
	21)),
		gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (5,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	21)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:44 */
rtx
gen_aarch64_compare_and_swaphi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_UNSPEC_VOLATILE (CCmode,
	gen_rtvec (1,
		const0_rtx),
	21)),
		gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (5,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	21)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:70 */
rtx
gen_aarch64_compare_and_swapsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_UNSPEC_VOLATILE (CCmode,
	gen_rtvec (1,
		const0_rtx),
	21)),
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (5,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	21)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:70 */
rtx
gen_aarch64_compare_and_swapdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_UNSPEC_VOLATILE (CCmode,
	gen_rtvec (1,
		const0_rtx),
	21)),
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (5,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	21)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:94 */
rtx
gen_aarch64_compare_and_swapti (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_UNSPEC_VOLATILE (CCmode,
	gen_rtvec (1,
		const0_rtx),
	21)),
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (TImode,
	gen_rtvec (5,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	21)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:118 */
rtx
gen_aarch64_compare_and_swapqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand2,
		operand3),
	21))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:118 */
rtx
gen_aarch64_compare_and_swaphi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand2,
		operand3),
	21))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:141 */
rtx
gen_aarch64_compare_and_swapsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand2,
		operand3),
	21))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:141 */
rtx
gen_aarch64_compare_and_swapdi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand2,
		operand3),
	21))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:163 */
rtx
gen_aarch64_compare_and_swapti_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (TImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand2,
		operand3),
	21))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
rtx
gen_aarch64_atomic_exchangeqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
rtx
gen_aarch64_atomic_exchangehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
rtx
gen_aarch64_atomic_exchangesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
rtx
gen_aarch64_atomic_exchangedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:238 */
rtx
gen_aarch64_atomic_exchangeqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:238 */
rtx
gen_aarch64_atomic_exchangehi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:238 */
rtx
gen_aarch64_atomic_exchangesi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:238 */
rtx
gen_aarch64_atomic_exchangedi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	22))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_addqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_PLUS (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_subqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_MINUS (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_orqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_IOR (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_xorqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_XOR (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_andqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_AND (QImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_addhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_PLUS (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_subhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_MINUS (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_orhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_IOR (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_xorhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_XOR (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_andhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_AND (HImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_addsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_subsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_MINUS (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_orsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_IOR (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_xorsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_XOR (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_andsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_AND (SImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_adddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_PLUS (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_subdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_MINUS (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_ordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_IOR (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_xordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_XOR (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
rtx
gen_aarch64_atomic_anddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_AND (DImode,
	copy_rtx (operand0),
	operand1),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_iorqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	26)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_bicqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	27)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_xorqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	28)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_addqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	29)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_iorhi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	26)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_bichi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	27)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_xorhi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	28)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_addhi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	29)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_iorsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	26)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_bicsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	27)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_xorsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	28)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_addsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	29)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_iordi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	26)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_bicdi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	27)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_xordi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	28)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:371 */
rtx
gen_aarch64_atomic_adddi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand0),
		operand1,
		operand2),
	29)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
rtx
gen_atomic_nandqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_NOT (QImode,
	gen_rtx_AND (QImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
rtx
gen_atomic_nandhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_NOT (HImode,
	gen_rtx_AND (HImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
rtx
gen_atomic_nandsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_NOT (SImode,
	gen_rtx_AND (SImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
rtx
gen_atomic_nanddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_NOT (DImode,
	gen_rtx_AND (DImode,
	copy_rtx (operand0),
	operand1)),
		operand2),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_addqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_PLUS (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_subqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_MINUS (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_orqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_IOR (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_xorqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_XOR (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_andqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_AND (QImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_addhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_PLUS (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_subhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_MINUS (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_orhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_IOR (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_xorhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_XOR (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_andhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_AND (HImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_addsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_subsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_MINUS (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_orsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_IOR (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_xorsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_XOR (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_andsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_AND (SImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_adddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_subdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_MINUS (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_ordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_IOR (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_xordi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_XOR (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
rtx
gen_aarch64_atomic_fetch_anddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_AND (DImode,
	copy_rtx (operand1),
	operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_iorqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	26))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_bicqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	27))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_xorqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	28))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_addqi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	29))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_iorhi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	26))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_bichi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	27))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_xorhi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	28))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_addhi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	29))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_iorsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	26))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_bicsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	27))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_xorsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	28))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_addsi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	29))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_iordi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	26))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_bicdi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	27))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_xordi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	28))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:519 */
rtx
gen_aarch64_atomic_fetch_adddi_lse (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	29))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
rtx
gen_atomic_fetch_nandqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		gen_rtx_NOT (QImode,
	gen_rtx_AND (QImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
rtx
gen_atomic_fetch_nandhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		gen_rtx_NOT (HImode,
	gen_rtx_AND (HImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
rtx
gen_atomic_fetch_nandsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		gen_rtx_NOT (SImode,
	gen_rtx_AND (SImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
rtx
gen_atomic_fetch_nanddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		gen_rtx_NOT (DImode,
	gen_rtx_AND (DImode,
	copy_rtx (operand1),
	operand2)),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_add_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_sub_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_or_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_xor_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_and_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (QImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_add_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_sub_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_or_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_xor_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_and_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (HImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_add_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_sub_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_or_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_xor_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_and_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_add_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_sub_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_or_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_xor_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
rtx
gen_aarch64_atomic_and_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	operand1,
	operand2)),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
rtx
gen_atomic_nand_fetchqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (QImode,
	gen_rtx_AND (QImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
rtx
gen_atomic_nand_fetchhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (HImode,
	gen_rtx_AND (HImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
rtx
gen_atomic_nand_fetchsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (SImode,
	gen_rtx_AND (SImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
rtx
gen_atomic_nand_fetchdi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_NOT (DImode,
	gen_rtx_AND (DImode,
	operand1,
	operand2))),
		gen_rtx_SET (copy_rtx (operand1),
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		copy_rtx (operand2),
		operand3),
	25)),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:643 */
rtx
gen_atomic_loadqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:643 */
rtx
gen_atomic_loadhi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:643 */
rtx
gen_atomic_loadsi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:643 */
rtx
gen_atomic_loaddi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	19));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:659 */
rtx
gen_atomic_storeqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:659 */
rtx
gen_atomic_storehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:659 */
rtx
gen_atomic_storesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:659 */
rtx
gen_atomic_storedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	20));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:678 */
rtx
gen_aarch64_load_exclusiveqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	17)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:678 */
rtx
gen_aarch64_load_exclusivehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	17)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:695 */
rtx
gen_aarch64_load_exclusivesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	17));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:695 */
rtx
gen_aarch64_load_exclusivedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	17));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:711 */
rtx
gen_aarch64_load_exclusive_pair (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	17)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	17))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:729 */
rtx
gen_aarch64_store_exclusiveqi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	18)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:729 */
rtx
gen_aarch64_store_exclusivehi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	18)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:729 */
rtx
gen_aarch64_store_exclusivesi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	18)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:729 */
rtx
gen_aarch64_store_exclusivedi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	18)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	18))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:747 */
rtx
gen_aarch64_store_exclusive_pair (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (1,
		const0_rtx),
	18)),
		gen_rtx_SET (operand1,
	gen_rtx_UNSPEC_VOLATILE (TImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	18))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
rtx
gen_aarch64_pred_movvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx32qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx16hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx8si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx4di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx16bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx16hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx8sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx4df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx48qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx48QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx24hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx12si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx6di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx24bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx24hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx12sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx6df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx64qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx64QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx32hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx16si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx8di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx32bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx32hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx16sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
rtx
gen_aarch64_pred_movvnx8df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1080 */
rtx
gen_aarch64_wrffr (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (VNx16BImode,
	84),
	operand0),
		gen_rtx_SET (gen_rtx_REG (VNx16BImode,
	85),
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (1,
		copy_rtx (operand0)),
	152))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1097 */
rtx
gen_aarch64_update_ffr_for_load (void)
{
  return gen_rtx_SET (gen_rtx_REG (VNx16BImode,
	84),
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		gen_rtx_REG (VNx16BImode,
	85),
		gen_rtx_REG (VNx16BImode,
	84)),
	149));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1112 */
rtx
gen_aarch64_copy_ffr_to_ffrt (void)
{
  return gen_rtx_SET (gen_rtx_REG (VNx16BImode,
	85),
	gen_rtx_REG (VNx16BImode,
	84));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1123 */
rtx
gen_aarch64_rdffr (rtx operand0 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_REG (VNx16BImode,
	85));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1131 */
rtx
gen_aarch64_rdffr_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_REG (VNx16BImode,
	85),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1208 */
rtx
gen_aarch64_update_ffrt (void)
{
  return gen_rtx_SET (gen_rtx_REG (VNx16BImode,
	85),
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (1,
		gen_rtx_REG (VNx16BImode,
	85)),
	150));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx16qivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx8qivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx4qivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2qivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx8hivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx4hivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2hivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx8hfvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx4hfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2hfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx8bfvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx4bfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2bfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx4sivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2sivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx4sfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2sfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2divnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1243 */
rtx
gen_maskloadvnx2dfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	108));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx32qivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx16hivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx8sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx4divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx16bfvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx16hfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx8sfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx4dfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx48qivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx48QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx24hivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx12sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx6divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx24bfvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx24hfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx12sfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx6dfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx64qivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx64QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx32hivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx16sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx8divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx32bfvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx32hfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx16sfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1267 */
rtx
gen_vec_mask_load_lanesvnx8dfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_x_zero_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
rtx
gen_aarch64_load_zero_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldff1vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1323 */
rtx
gen_aarch64_ldnf1vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldff1_zero_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
rtx
gen_aarch64_ldnf1_zero_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1383 */
rtx
gen_aarch64_ldnt1vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	110));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1420 */
rtx
gen_mask_gather_loadvnx4qivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1420 */
rtx
gen_mask_gather_loadvnx4hivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1420 */
rtx
gen_mask_gather_loadvnx4hfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1420 */
rtx
gen_mask_gather_loadvnx4bfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1420 */
rtx
gen_mask_gather_loadvnx4sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1420 */
rtx
gen_mask_gather_loadvnx4sfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2qivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2hivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2hfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2bfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2sivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2sfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1442 */
rtx
gen_mask_gather_loadvnx2dfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
rtx
gen_aarch64_gather_load_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
rtx
gen_aarch64_gather_load_zero_extendvnx4hivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
rtx
gen_aarch64_gather_load_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
rtx
gen_aarch64_gather_load_zero_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
rtx
gen_aarch64_gather_load_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
rtx
gen_aarch64_gather_load_zero_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_zero_extendvnx2hivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_zero_extendvnx2sivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_zero_extendvnx2sivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_zero_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_zero_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
rtx
gen_aarch64_gather_load_zero_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1702 */
rtx
gen_aarch64_ldff1_gathervnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1702 */
rtx
gen_aarch64_ldff1_gathervnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1725 */
rtx
gen_aarch64_ldff1_gathervnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1725 */
rtx
gen_aarch64_ldff1_gathervnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
rtx
gen_aarch64_ldff1_gather_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
rtx
gen_aarch64_ldff1_gather_zero_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
rtx
gen_aarch64_ldff1_gather_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
rtx
gen_aarch64_ldff1_gather_zero_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
rtx
gen_aarch64_ldff1_gather_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
rtx
gen_aarch64_ldff1_gather_zero_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
rtx
gen_aarch64_ldff1_gather_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
rtx
gen_aarch64_ldff1_gather_zero_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
rtx
gen_aarch64_ldff1_gather_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
rtx
gen_aarch64_ldff1_gather_zero_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1940 */
rtx
gen_aarch64_sve_prefetchvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	155),
	operand3,
	operand4);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1940 */
rtx
gen_aarch64_sve_prefetchvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	155),
	operand3,
	operand4);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1940 */
rtx
gen_aarch64_sve_prefetchvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	155),
	operand3,
	operand4);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1940 */
rtx
gen_aarch64_sve_prefetchvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand0,
		operand1,
		operand2),
	155),
	operand3,
	operand4);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1976 */
rtx
gen_aarch64_sve_gather_prefetchvnx16qivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1976 */
rtx
gen_aarch64_sve_gather_prefetchvnx8hivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1976 */
rtx
gen_aarch64_sve_gather_prefetchvnx4sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1976 */
rtx
gen_aarch64_sve_gather_prefetchvnx2divnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2005 */
rtx
gen_aarch64_sve_gather_prefetchvnx16qivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2005 */
rtx
gen_aarch64_sve_gather_prefetchvnx8hivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2005 */
rtx
gen_aarch64_sve_gather_prefetchvnx4sivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2005 */
rtx
gen_aarch64_sve_gather_prefetchvnx2divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED,
	rtx operand6 ATTRIBUTE_UNUSED,
	rtx operand7 ATTRIBUTE_UNUSED,
	rtx operand8 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8);
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx16qivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx8qivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx4qivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2qivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx8hivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx4hivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2hivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx8hfvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx4hfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2hfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx8bfvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx4bfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2bfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx4sivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2sivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx4sfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2sfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2divnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2116 */
rtx
gen_maskstorevnx2dfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx32qivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx16hivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx8sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx4divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx16bfvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx16hfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx8sfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx4dfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx48qivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx48QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx24hivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx12sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx6divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx24bfvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx24hfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx12sfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx6dfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx64qivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx64QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx32hivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx16sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx8divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx32bfvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx32hfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx16sfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2146 */
rtx
gen_vec_mask_store_lanesvnx8dfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	138));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2167 */
rtx
gen_aarch64_store_truncvnx8qivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_TRUNCATE (VNx8QImode,
	operand1),
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2180 */
rtx
gen_aarch64_store_truncvnx4qivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_TRUNCATE (VNx4QImode,
	operand1),
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2180 */
rtx
gen_aarch64_store_truncvnx4hivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_TRUNCATE (VNx4HImode,
	operand1),
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2193 */
rtx
gen_aarch64_store_truncvnx2qivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_TRUNCATE (VNx2QImode,
	operand1),
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2193 */
rtx
gen_aarch64_store_truncvnx2hivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_TRUNCATE (VNx2HImode,
	operand1),
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2193 */
rtx
gen_aarch64_store_truncvnx2sivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_TRUNCATE (VNx2SImode,
	operand1),
		operand0),
	109));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2215 */
rtx
gen_aarch64_stnt1vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		operand0),
	111));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2253 */
rtx
gen_mask_scatter_storevnx4qivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2253 */
rtx
gen_mask_scatter_storevnx4hivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2253 */
rtx
gen_mask_scatter_storevnx4hfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2253 */
rtx
gen_mask_scatter_storevnx4bfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2253 */
rtx
gen_mask_scatter_storevnx4sivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2253 */
rtx
gen_mask_scatter_storevnx4sfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2qivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2hivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2hfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2bfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2sivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2sfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2divnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2275 */
rtx
gen_mask_scatter_storevnx2dfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2376 */
rtx
gen_aarch64_scatter_store_truncvnx4qivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx4QImode,
	operand4)),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2376 */
rtx
gen_aarch64_scatter_store_truncvnx4hivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx4HImode,
	operand4)),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2399 */
rtx
gen_aarch64_scatter_store_truncvnx2qivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx2QImode,
	operand4)),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2399 */
rtx
gen_aarch64_scatter_store_truncvnx2hivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx2HImode,
	operand4)),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2399 */
rtx
gen_aarch64_scatter_store_truncvnx2sivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx2SImode,
	operand4)),
	116));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx16qi_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx16QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx8hi_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx4si_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx2di_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx8bf_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8BFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx8hf_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx4sf_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2536 */
rtx
gen_aarch64_vec_duplicate_vqvnx2df_le (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DFmode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx16qi_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx16QImode,
	gen_rtx_VEC_SELECT (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx8hi_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_VEC_SELECT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx4si_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_VEC_SELECT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx2di_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_VEC_SELECT (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx8bf_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8BFmode,
	gen_rtx_VEC_SELECT (V8BFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx8hf_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HFmode,
	gen_rtx_VEC_SELECT (V8HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx4sf_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SFmode,
	gen_rtx_VEC_SELECT (V4SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2552 */
rtx
gen_aarch64_vec_duplicate_vqvnx2df_be (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DFmode,
	gen_rtx_VEC_SELECT (V2DFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx8HFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx4HFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2HFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx8BFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx4BFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2BFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx4SFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2SFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2571 */
rtx
gen_sve_ld1rvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_VEC_DUPLICATE (VNx2DFmode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2585 */
rtx
gen_aarch64_sve_ld1rqvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	112));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2598 */
rtx
gen_aarch64_sve_ld1rovnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	162));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2630 */
rtx
gen_vec_shl_insert_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	139));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx4QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx2QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx2HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2652 */
rtx
gen_vec_seriesvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SERIES (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_after_last_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	376));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2859 */
rtx
gen_extract_last_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	377));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx16QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx8QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx4QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx2QImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx8HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx4HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx2HImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx4SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx2SImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_absvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ABS (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_negvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NEG (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_one_cmplvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_NOT (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clrsbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLRSB (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_clzvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_CLZ (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_popcountvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_POPCOUNT (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qabsvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_ABS (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2927 */
rtx
gen_aarch64_pred_qnegvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SS_NEG (VNx2DImode,
	operand2)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_rbitvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand2),
	66)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_rbitvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand2),
	66)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_revbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand2),
	300)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_rbitvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	66)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_revbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	300)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_revhvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	301)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_rbitvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	66)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_revbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	300)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_revhvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	301)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3003 */
rtx
gen_aarch64_pred_revwvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	302)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx16qivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx16qivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8qivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8hivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8hfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8bfvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx16qivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8qivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx4qivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8hivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx4hivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8hfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx4hfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx8bfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx4bfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx4sivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3022 */
rtx
gen_aarch64_sve_revbhw_vnx4sfvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand2),
	303)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_rbitvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand2),
	66),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_rbitvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand2),
	66),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_revbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand2),
	300),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_rbitvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	66),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_revbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	300),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_revhvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	301),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_rbitvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	66),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_revbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	300),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_revhvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	301),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3038 */
rtx
gen_cond_revwvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand2),
	302),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3097 */
rtx
gen_aarch64_pred_sxtvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_TRUNCATE (VNx8QImode,
	operand2))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3097 */
rtx
gen_aarch64_pred_sxtvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_TRUNCATE (VNx4QImode,
	operand2))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3097 */
rtx
gen_aarch64_pred_sxtvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_TRUNCATE (VNx4HImode,
	operand2))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3097 */
rtx
gen_aarch64_pred_sxtvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2QImode,
	operand2))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3097 */
rtx
gen_aarch64_pred_sxtvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2HImode,
	operand2))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3097 */
rtx
gen_aarch64_pred_sxtvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3114 */
rtx
gen_aarch64_cond_sxtvnx8hivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_TRUNCATE (VNx8QImode,
	operand2)),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3114 */
rtx
gen_aarch64_cond_sxtvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_TRUNCATE (VNx4QImode,
	operand2)),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3114 */
rtx
gen_aarch64_cond_sxtvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_TRUNCATE (VNx4HImode,
	operand2)),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3114 */
rtx
gen_aarch64_cond_sxtvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2QImode,
	operand2)),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3114 */
rtx
gen_aarch64_cond_sxtvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2HImode,
	operand2)),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3114 */
rtx
gen_aarch64_cond_sxtvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2)),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx8hivnx8qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx8QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx4hivnx4qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx4QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx2hivnx2qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx2QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx4sivnx4qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx4QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx4sivnx4hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx4HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx2sivnx2qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx2QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx2sivnx2hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx2HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx2divnx2qi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx2QImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx2divnx2hi2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx2HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
rtx
gen_truncvnx2divnx2si2 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3350 */
rtx
gen_aarch64_sve_fexpavnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	308));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3350 */
rtx
gen_aarch64_sve_fexpavnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	308));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3350 */
rtx
gen_aarch64_sve_fexpavnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	308));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3379 */
rtx
gen_aarch64_sve_frecpevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3379 */
rtx
gen_aarch64_sve_frsqrtevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3379 */
rtx
gen_aarch64_sve_frecpevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3379 */
rtx
gen_aarch64_sve_frsqrtevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3379 */
rtx
gen_aarch64_sve_frecpevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3379 */
rtx
gen_aarch64_sve_frsqrtevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_absvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	333));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_negvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	360));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_frecpxvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	363));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_roundvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	364));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_nearbyintvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	365));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_floorvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	366));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_frintnvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	367));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_ceilvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_rintvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_btruncvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	370));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_sqrtvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	372));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_absvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	333));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_negvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	360));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_frecpxvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	363));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_roundvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	364));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_nearbyintvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	365));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_floorvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	366));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_frintnvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	367));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_ceilvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_rintvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_btruncvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	370));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_sqrtvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	372));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_absvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	333));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_negvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	360));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_frecpxvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	363));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_roundvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	364));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_nearbyintvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	365));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_floorvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	366));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_frintnvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	367));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_ceilvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	368));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_rintvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	369));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_btruncvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	370));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3403 */
rtx
gen_aarch64_pred_sqrtvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	372));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_mulvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_smaxvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_sminvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_umaxvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
rtx
gen_aarch64_pred_uminvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx4qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx2qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx2hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3781 */
rtx
gen_addvnx2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx4qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx2qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx2hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3807 */
rtx
gen_subvnx2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3831 */
rtx
gen_aarch64_adrvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	282));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3831 */
rtx
gen_aarch64_adrvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	282));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx16QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx16QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx8QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx8QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx4QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx4QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx8HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx8HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx4HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx4HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx4SImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx4SImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2SImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2SImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_sabdvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_SMIN (VNx2DImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3990 */
rtx
gen_aarch64_pred_uabdvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UMIN (VNx2DImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_ssaddvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_sssubvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_ssaddvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_sssubvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_ssaddvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_sssubvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_ssaddvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4156 */
rtx
gen_aarch64_sve_sssubvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_usaddvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_ussubvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_usaddvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_ussubvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_usaddvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_ussubvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_usaddvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4172 */
rtx
gen_aarch64_sve_ussubvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_smulhvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4210 */
rtx
gen_aarch64_pred_umulhvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4305 */
rtx
gen_aarch64_pred_divvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_DIV (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4305 */
rtx
gen_aarch64_pred_udivvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UDIV (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4305 */
rtx
gen_aarch64_pred_divvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_DIV (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4305 */
rtx
gen_aarch64_pred_udivvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UDIV (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx16qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx8qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx4qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx4qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx4qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx2qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx2qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx2qi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx8hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx4hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx2hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx2hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx2hi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx4si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx2si3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_andvnx2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_iorvnx2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4408 */
rtx
gen_xorvnx2di3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx16QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx8QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx4QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx2QImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx8HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx4HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx2HImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx4SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx2SImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashlvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFT (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_ashrvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_ASHIFTRT (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
rtx
gen_aarch64_pred_lshrvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_LSHIFTRT (VNx2DImode,
	operand2,
	operand3)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_lslvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	378));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_asrvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	379));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_lsrvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	380));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_lslvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	378));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_asrvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	379));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_lsrvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	380));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_lslvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	378));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_asrvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	379));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4656 */
rtx
gen_aarch64_sve_lsrvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	380));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4842 */
rtx
gen_aarch64_sve_ftsmulvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	311));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4842 */
rtx
gen_aarch64_sve_ftsselvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	312));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4842 */
rtx
gen_aarch64_sve_ftsmulvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	311));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4842 */
rtx
gen_aarch64_sve_ftsselvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	312));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4842 */
rtx
gen_aarch64_sve_ftsmulvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	311));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4842 */
rtx
gen_aarch64_sve_ftsselvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	312));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4854 */
rtx
gen_aarch64_pred_fscalevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	371));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4854 */
rtx
gen_aarch64_pred_fscalevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	371));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4854 */
rtx
gen_aarch64_pred_fscalevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	371));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5038 */
rtx
gen_aarch64_sve_frecpsvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5038 */
rtx
gen_aarch64_sve_frsqrtsvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5038 */
rtx
gen_aarch64_sve_frecpsvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5038 */
rtx
gen_aarch64_sve_frsqrtsvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5038 */
rtx
gen_aarch64_sve_frecpsvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5038 */
rtx
gen_aarch64_sve_frsqrtsvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5065 */
rtx
gen_aarch64_pred_divvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	351));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5065 */
rtx
gen_aarch64_pred_mulxvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	359));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5065 */
rtx
gen_aarch64_pred_divvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	351));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5065 */
rtx
gen_aarch64_pred_mulxvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	359));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5065 */
rtx
gen_aarch64_pred_divvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	351));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5065 */
rtx
gen_aarch64_pred_mulxvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	359));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5371 */
rtx
gen_aarch64_pred_addvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	334));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5371 */
rtx
gen_aarch64_pred_addvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	334));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5371 */
rtx
gen_aarch64_pred_addvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	334));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5527 */
rtx
gen_aarch64_pred_cadd90vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	335));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5527 */
rtx
gen_aarch64_pred_cadd270vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	336));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5527 */
rtx
gen_aarch64_pred_cadd90vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	335));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5527 */
rtx
gen_aarch64_pred_cadd270vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	336));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5527 */
rtx
gen_aarch64_pred_cadd90vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	335));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5527 */
rtx
gen_aarch64_pred_cadd270vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	336));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5690 */
rtx
gen_aarch64_pred_subvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	373));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5690 */
rtx
gen_aarch64_pred_subvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	373));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5690 */
rtx
gen_aarch64_pred_subvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	373));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6115 */
rtx
gen_aarch64_pred_mulvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	358));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6115 */
rtx
gen_aarch64_pred_mulvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	358));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6115 */
rtx
gen_aarch64_pred_mulvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	358));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6144 */
rtx
gen_aarch64_mul_lane_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx8HFmode,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6144 */
rtx
gen_aarch64_mul_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx4SFmode,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6144 */
rtx
gen_aarch64_mul_lane_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx2DFmode,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_fmax_nanvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	352));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_smaxvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	353));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_fmin_nanvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	354));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_sminvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	355));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_fmax_nanvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	352));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_smaxvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	353));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_fmin_nanvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	354));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_sminvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	355));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_fmax_nanvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	352));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_smaxvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	353));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_fmin_nanvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	354));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6323 */
rtx
gen_aarch64_pred_sminvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	355));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6358 */
rtx
gen_andvnx16bi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6358 */
rtx
gen_andvnx8bi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6358 */
rtx
gen_andvnx4bi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6358 */
rtx
gen_andvnx2bi3 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_andvnx16bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_AND (VNx16BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_iorvnx16bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_IOR (VNx16BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_xorvnx16bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_XOR (VNx16BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_andvnx8bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_iorvnx8bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_IOR (VNx8BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_xorvnx8bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_XOR (VNx8BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_andvnx4bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_iorvnx4bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_IOR (VNx4BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_xorvnx4bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_XOR (VNx4BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_andvnx2bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_iorvnx2bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_IOR (VNx2BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6381 */
rtx
gen_aarch64_pred_xorvnx2bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_XOR (VNx2BImode,
	operand2,
	operand3),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_bicvnx16bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_NOT (VNx16BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_ornvnx16bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_IOR (VNx16BImode,
	gen_rtx_NOT (VNx16BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_bicvnx8bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_ornvnx8bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_IOR (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_bicvnx4bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_ornvnx4bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_IOR (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_bicvnx2bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6441 */
rtx
gen_aarch64_pred_ornvnx2bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_IOR (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	operand3),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_norvnx16bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_NOT (VNx16BImode,
	operand2),
	gen_rtx_NOT (VNx16BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_nandvnx16bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_IOR (VNx16BImode,
	gen_rtx_NOT (VNx16BImode,
	operand2),
	gen_rtx_NOT (VNx16BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_norvnx8bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	operand2),
	gen_rtx_NOT (VNx8BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_nandvnx8bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_IOR (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	operand2),
	gen_rtx_NOT (VNx8BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_norvnx4bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	operand2),
	gen_rtx_NOT (VNx4BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_nandvnx4bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_IOR (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	operand2),
	gen_rtx_NOT (VNx4BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_norvnx2bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	operand2),
	gen_rtx_NOT (VNx2BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6503 */
rtx
gen_aarch64_pred_nandvnx2bi_z (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_IOR (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	operand2),
	gen_rtx_NOT (VNx2BImode,
	operand3)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6590 */
rtx
gen_aarch64_pred_fmavnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3)),
	118),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx16QImode,
	operand4,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8QImode,
	operand4,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4QImode,
	operand4,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2QImode,
	operand4,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand4,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4HImode,
	operand4,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2HImode,
	operand4,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand4,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2SImode,
	operand4,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6731 */
rtx
gen_aarch64_pred_fnmavnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand4,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3)),
	118)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6856 */
rtx
gen_sdot_prodvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	263),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6856 */
rtx
gen_udot_prodvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6856 */
rtx
gen_sdot_prodvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	263),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6856 */
rtx
gen_udot_prodvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	264),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6872 */
rtx
gen_aarch64_sdot_prod_lanevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	263),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6872 */
rtx
gen_aarch64_udot_prod_lanevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	264),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6872 */
rtx
gen_aarch64_sdot_prod_lanevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	263),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6872 */
rtx
gen_aarch64_udot_prod_lanevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	264),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6890 */
rtx
gen_usdot_prodvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	520),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6905 */
rtx
gen_aarch64_usdot_prod_lanevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	520),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6905 */
rtx
gen_aarch64_sudot_prod_lanevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	521),
	operand4));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6962 */
rtx
gen_aarch64_sve_add_smatmulvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	313),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6962 */
rtx
gen_aarch64_sve_add_umatmulvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	314),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6962 */
rtx
gen_aarch64_sve_add_usmatmulvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	315),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fmavnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	356));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fnmavnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	357));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fnmsvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	361));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fmsvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	362));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fmavnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	356));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fnmavnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	357));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fnmsvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	361));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fmsvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	362));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fmavnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	356));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fnmavnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	357));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fnmsvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	361));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7008 */
rtx
gen_aarch64_pred_fmsvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	362));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7220 */
rtx
gen_aarch64_fma_lane_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	306));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7220 */
rtx
gen_aarch64_fnma_lane_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	307));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7220 */
rtx
gen_aarch64_fma_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	306));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7220 */
rtx
gen_aarch64_fnma_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	307));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7220 */
rtx
gen_aarch64_fma_lane_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	306));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7220 */
rtx
gen_aarch64_fnma_lane_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	307));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmlavnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	340));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla90vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	341));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla180vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	342));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla270vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	343));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmlavnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	340));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla90vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	341));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla180vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	342));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla270vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	343));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmlavnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	340));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla90vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	341));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla180vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	342));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7245 */
rtx
gen_aarch64_pred_fcmla270vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED,
	rtx operand5 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		operand5,
		operand2,
		operand3,
		operand4),
	343));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla_lane_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	385));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla90_lane_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	386));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla180_lane_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	387));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla270_lane_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	388));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	385));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla90_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	386));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla180_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	387));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7448 */
rtx
gen_aarch64_fcmla270_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	388));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7472 */
rtx
gen_aarch64_sve_tmadvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7472 */
rtx
gen_aarch64_sve_tmadvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7472 */
rtx
gen_aarch64_sve_tmadvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	310));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7496 */
rtx
gen_aarch64_sve_bfdotvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	522));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7496 */
rtx
gen_aarch64_sve_bfmlalbvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	523));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7496 */
rtx
gen_aarch64_sve_bfmlaltvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	524));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7496 */
rtx
gen_aarch64_sve_bfmmlavnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	525));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7511 */
rtx
gen_aarch64_sve_bfdot_lanevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	522));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7511 */
rtx
gen_aarch64_sve_bfmlalb_lanevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	523));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7511 */
rtx
gen_aarch64_sve_bfmlalt_lanevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	524));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7534 */
rtx
gen_aarch64_sve_fmmlavnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	309));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7534 */
rtx
gen_aarch64_sve_fmmlavnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	309));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx16QImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx8QImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx4QImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2QImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx8HImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx4HImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2HImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx8HFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx4HFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2HFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx8BFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx4BFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2BFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx4SImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2SImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx4SFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2SFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2DImode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7620 */
rtx
gen_aarch64_sel_dupvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		gen_rtx_VEC_DUPLICATE (VNx2DFmode,
	operand1),
		operand2),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx16BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx8BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx4BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplevnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpeqvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpnevnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_NE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgevnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GE (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmpgtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GT (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplovnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmplsvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_LEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphsvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GEU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7773 */
rtx
gen_aarch64_pred_cmphivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_GTU (VNx2BImode,
	operand3,
	operand4)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpeqvnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	323)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpgevnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	324)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpgtvnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	325)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmphivnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	326)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmphsvnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	327)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplevnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	328)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplovnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	329)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplsvnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	330)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpltvnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	331)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpnevnx16qi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	332)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpeqvnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	323)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpgevnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	324)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpgtvnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	325)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmphivnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	326)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmphsvnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	327)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplevnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	328)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplovnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	329)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplsvnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	330)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpltvnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	331)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpnevnx8hi_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	332)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpeqvnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	323)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpgevnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	324)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpgtvnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	325)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmphivnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	326)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmphsvnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	327)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplevnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	328)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplovnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	329)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmplsvnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	330)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpltvnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	331)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7886 */
rtx
gen_aarch64_pred_cmpnevnx4si_wide (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	332)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_lesivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultsivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ulesivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltsivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gesivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtsivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtsivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugesivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwsivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrsivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ledivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultdivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_uledivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltdivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gedivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtdivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtdivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugedivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwdivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrdivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_lesivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultsivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ulesivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltsivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gesivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtsivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtsivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugesivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwsivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrsivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ledivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultdivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_uledivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltdivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gedivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtdivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtdivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugedivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwdivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrdivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_lesivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultsivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ulesivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltsivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gesivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtsivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtsivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugesivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwsivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrsivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ledivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultdivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_uledivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltdivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gedivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtdivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtdivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugedivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwdivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrdivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_lesivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultsivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ulesivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltsivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gesivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtsivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtsivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugesivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwsivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrsivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ledivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ultdivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_uledivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ltdivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gedivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_gtdivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugtdivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_ugedivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_rwdivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7973 */
rtx
gen_while_wrdivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_lesivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultsivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ulesivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltsivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gesivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtsivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtsivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugesivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwsivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrsivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ledivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultdivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_uledivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltdivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gedivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtdivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtdivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugedivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwdivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrdivnx16bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_lesivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultsivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ulesivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltsivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gesivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtsivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtsivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugesivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwsivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrsivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ledivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultdivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_uledivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltdivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gedivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtdivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtdivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugedivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwdivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrdivnx8bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_lesivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultsivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ulesivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltsivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gesivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtsivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtsivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugesivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwsivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrsivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ledivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultdivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_uledivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltdivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gedivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtdivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtdivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugedivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwdivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrdivnx4bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_lesivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultsivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ulesivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltsivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gesivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtsivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtsivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugesivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwsivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrsivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ledivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ultdivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_uledivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ltdivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gedivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_gtdivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugtdivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_ugedivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_rwdivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
rtx
gen_while_wrdivnx2bi_ptest (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmeqvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	337));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmgevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	338));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmgtvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	339));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmlevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	344));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmltvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	345));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmnevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	346));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmeqvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	337));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmgevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	338));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmgtvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	339));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmlevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	344));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmltvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	345));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmnevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	346));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmeqvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	337));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmgevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	338));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmgtvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	339));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmlevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	344));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmltvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	345));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8066 */
rtx
gen_aarch64_pred_fcmnevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	346));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8081 */
rtx
gen_aarch64_pred_fcmuovnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	347));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8081 */
rtx
gen_aarch64_pred_fcmuovnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	347));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8081 */
rtx
gen_aarch64_pred_fcmuovnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	347));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8383 */
rtx
gen_vcond_mask_vnx16bivnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx16BImode,
	gen_rtx_AND (VNx16BImode,
	operand3,
	operand1),
	gen_rtx_AND (VNx16BImode,
	gen_rtx_NOT (VOIDmode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8383 */
rtx
gen_vcond_mask_vnx8bivnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	operand3,
	operand1),
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VOIDmode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8383 */
rtx
gen_vcond_mask_vnx4bivnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	operand3,
	operand1),
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VOIDmode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8383 */
rtx
gen_vcond_mask_vnx2bivnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	operand3,
	operand1),
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VOIDmode,
	operand3),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8433 */
rtx
gen_aarch64_ptestvnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	120));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8433 */
rtx
gen_aarch64_ptestvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	120));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8433 */
rtx
gen_aarch64_ptestvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	120));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8433 */
rtx
gen_aarch64_ptestvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	120));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_after_last_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8458 */
rtx
gen_fold_extract_last_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_after_last_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	140));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8471 */
rtx
gen_aarch64_fold_extract_vector_last_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	141));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8515 */
rtx
gen_aarch64_pred_reduc_sadd_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	292));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8515 */
rtx
gen_aarch64_pred_reduc_uadd_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	293));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8515 */
rtx
gen_aarch64_pred_reduc_sadd_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	292));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8515 */
rtx
gen_aarch64_pred_reduc_uadd_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	293));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8515 */
rtx
gen_aarch64_pred_reduc_sadd_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	292));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8515 */
rtx
gen_aarch64_pred_reduc_uadd_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	293));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8515 */
rtx
gen_aarch64_pred_reduc_uadd_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	293));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_and_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	294));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_ior_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smax_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smin_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umax_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umin_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_xor_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_and_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	294));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_ior_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smax_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smin_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umax_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umin_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_xor_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_and_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	294));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_ior_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smax_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smin_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umax_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umin_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_xor_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_and_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	294));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_ior_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	295));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smax_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	177));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_smin_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	178));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umax_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	179));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_umin_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	180));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8537 */
rtx
gen_aarch64_pred_reduc_xor_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	296));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_plus_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smax_nan_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smax_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smin_nan_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smin_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_plus_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smax_nan_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smax_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smin_nan_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smin_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_plus_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	173));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smax_nan_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	169));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smax_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	168));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smin_nan_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	172));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8581 */
rtx
gen_aarch64_pred_reduc_smin_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	171));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8611 */
rtx
gen_mask_fold_left_plus_vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	142));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8611 */
rtx
gen_mask_fold_left_plus_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	142));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8611 */
rtx
gen_mask_fold_left_plus_vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	142));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8645 */
rtx
gen_aarch64_sve_tblvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	228));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8665 */
rtx
gen_aarch64_sve_compactvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	157));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8665 */
rtx
gen_aarch64_sve_compactvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	157));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8665 */
rtx
gen_aarch64_sve_compactvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	157));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8665 */
rtx
gen_aarch64_sve_compactvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	157));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx16QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2QImode,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2HImode,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2HFmode,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2BFmode,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2SImode,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8676 */
rtx
gen_aarch64_sve_dup_lanevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DFmode,
	gen_rtx_VEC_SELECT (DFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx16QImode,
	gen_rtx_VEC_SELECT (V16QImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_VEC_SELECT (V8HImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_VEC_SELECT (V4SImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_VEC_SELECT (V2DImode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8BFmode,
	gen_rtx_VEC_SELECT (V8BFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HFmode,
	gen_rtx_VEC_SELECT (V8HFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SFmode,
	gen_rtx_VEC_SELECT (V4SFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8704 */
rtx
gen_aarch64_sve_dupq_lanevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DFmode,
	gen_rtx_VEC_SELECT (V2DFmode,
	operand1,
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8724 */
rtx
gen_aarch64_sve_revvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8747 */
rtx
gen_aarch64_sve_splicevnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	158));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip1vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_zip2vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn1vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_trn2vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp1vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8763 */
rtx
gen_aarch64_sve_uzp2vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip1qvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	320));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_zip2qvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	321));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn1qvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	316));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_trn2qvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	317));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp1qvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	318));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8775 */
rtx
gen_aarch64_sve_uzp2qvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	319));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx8qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx4hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx4bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8787 */
rtx
gen_aarch64_sve_extvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	237));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8812 */
rtx
gen_aarch64_sve_revvnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8812 */
rtx
gen_aarch64_sve_revvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8812 */
rtx
gen_aarch64_sve_revvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8812 */
rtx
gen_aarch64_sve_revvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (1,
		operand1),
	65));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip1vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip2vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn1vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn2vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp1vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp2vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip1vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip2vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn1vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn2vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp1vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp2vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip1vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip2vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn1vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn2vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp1vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp2vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip1vnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	231));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_zip2vnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	232));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn1vnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	235));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_trn2vnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	236));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp1vnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	233));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8833 */
rtx
gen_aarch64_sve_uzp2vnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	234));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8846 */
rtx
gen_aarch64_sve_trn1_convvnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	322));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8846 */
rtx
gen_aarch64_sve_trn1_convvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	322));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8846 */
rtx
gen_aarch64_sve_trn1_convvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	322));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8846 */
rtx
gen_aarch64_sve_trn1_convvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	322));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8869 */
rtx
gen_vec_pack_trunc_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	126));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8869 */
rtx
gen_vec_pack_trunc_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	126));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8869 */
rtx
gen_vec_pack_trunc_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	126));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_sunpkhi_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	122));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_uunpkhi_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	123));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_sunpklo_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	124));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_uunpklo_vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	125));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_sunpkhi_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	122));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_uunpkhi_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	123));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_sunpklo_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	124));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_uunpklo_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	125));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_sunpkhi_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	122));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_uunpkhi_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	123));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_sunpklo_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	124));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8906 */
rtx
gen_aarch64_sve_uunpklo_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	125));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fix_trunc_nontruncvnx8hfvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	349));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fixuns_trunc_nontruncvnx8hfvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	350));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fix_trunc_nontruncvnx8hfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	349));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fixuns_trunc_nontruncvnx8hfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	350));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fix_trunc_nontruncvnx4sfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	349));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fixuns_trunc_nontruncvnx4sfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	350));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fix_trunc_nontruncvnx8hfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	349));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fixuns_trunc_nontruncvnx8hfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	350));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fix_trunc_nontruncvnx4sfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	349));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fixuns_trunc_nontruncvnx4sfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	350));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fix_trunc_nontruncvnx2dfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	349));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8939 */
rtx
gen_aarch64_sve_fixuns_trunc_nontruncvnx2dfvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	350));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8954 */
rtx
gen_aarch64_sve_fix_trunc_truncvnx2dfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	349));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8954 */
rtx
gen_aarch64_sve_fixuns_trunc_truncvnx2dfvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	350));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_float_nonextendvnx8hivnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	374));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_floatuns_nonextendvnx8hivnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	375));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_float_nonextendvnx4sivnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	374));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_floatuns_nonextendvnx4sivnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	375));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_float_nonextendvnx4sivnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	374));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_floatuns_nonextendvnx4sivnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	375));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_float_nonextendvnx2divnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	374));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_floatuns_nonextendvnx2divnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	375));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_float_nonextendvnx2divnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	374));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_floatuns_nonextendvnx2divnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	375));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_float_nonextendvnx2divnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	374));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9126 */
rtx
gen_aarch64_sve_floatuns_nonextendvnx2divnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	375));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9141 */
rtx
gen_aarch64_sve_float_extendvnx4sivnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	374));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9141 */
rtx
gen_aarch64_sve_floatuns_extendvnx4sivnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	375));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9324 */
rtx
gen_aarch64_sve_fcvt_truncvnx4sfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	348));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9324 */
rtx
gen_aarch64_sve_fcvt_truncvnx2dfvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	348));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9324 */
rtx
gen_aarch64_sve_fcvt_truncvnx2dfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	348));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9381 */
rtx
gen_aarch64_sve_fcvt_truncvnx4sfvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	348));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9434 */
rtx
gen_aarch64_sve_cvtntvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (4,
		operand2,
		const1_rtx,
		operand1,
		operand3),
	416));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9481 */
rtx
gen_aarch64_sve_fcvt_nontruncvnx8hfvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	348));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9481 */
rtx
gen_aarch64_sve_fcvt_nontruncvnx8hfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	348));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9481 */
rtx
gen_aarch64_sve_fcvt_nontruncvnx4sfvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	348));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9538 */
rtx
gen_vec_pack_trunc_vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	126));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9538 */
rtx
gen_vec_pack_trunc_vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	126));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9538 */
rtx
gen_vec_pack_trunc_vnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	126));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9573 */
rtx
gen_aarch64_sve_punpklo_vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (1,
		operand1),
	125));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9573 */
rtx
gen_aarch64_sve_punpkhi_vnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (1,
		operand1),
	123));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9573 */
rtx
gen_aarch64_sve_punpklo_vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (1,
		operand1),
	125));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9573 */
rtx
gen_aarch64_sve_punpkhi_vnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (1,
		operand1),
	123));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9573 */
rtx
gen_aarch64_sve_punpklo_vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (1,
		operand1),
	125));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9573 */
rtx
gen_aarch64_sve_punpkhi_vnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (1,
		operand1),
	123));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9598 */
rtx
gen_aarch64_brka (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	284));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9598 */
rtx
gen_aarch64_brkb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	285));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9669 */
rtx
gen_aarch64_brkn (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	286));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9669 */
rtx
gen_aarch64_brkpa (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	287));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9669 */
rtx
gen_aarch64_brkpb (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	288));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9729 */
rtx
gen_aarch64_sve_pfirstvnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	289)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9729 */
rtx
gen_aarch64_sve_pnextvnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	290)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9729 */
rtx
gen_aarch64_sve_pnextvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	290)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9729 */
rtx
gen_aarch64_sve_pnextvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	290)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9729 */
rtx
gen_aarch64_sve_pnextvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	290)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9815 */
rtx
gen_aarch64_sve_cnt_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	154)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9839 */
rtx
gen_aarch64_sve_incdi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9839 */
rtx
gen_aarch64_sve_sqincdi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9839 */
rtx
gen_aarch64_sve_uqincdi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9874 */
rtx
gen_aarch64_sve_sqincsi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154),
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9874 */
rtx
gen_aarch64_sve_uqincsi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154),
	operand1)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9902 */
rtx
gen_aarch64_sve_incvnx2di_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9902 */
rtx
gen_aarch64_sve_sqincvnx2di_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9902 */
rtx
gen_aarch64_sve_uqincvnx2di_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9924 */
rtx
gen_aarch64_sve_incvnx4si_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9924 */
rtx
gen_aarch64_sve_sqincvnx4si_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9924 */
rtx
gen_aarch64_sve_uqincvnx4si_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9989 */
rtx
gen_aarch64_sve_decdi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9989 */
rtx
gen_aarch64_sve_sqdecdi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9989 */
rtx
gen_aarch64_sve_uqdecdi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10024 */
rtx
gen_aarch64_sve_sqdecsi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10024 */
rtx
gen_aarch64_sve_uqdecsi_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10052 */
rtx
gen_aarch64_sve_decvnx2di_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10052 */
rtx
gen_aarch64_sve_sqdecvnx2di_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10052 */
rtx
gen_aarch64_sve_uqdecvnx2di_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10074 */
rtx
gen_aarch64_sve_decvnx4si_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10074 */
rtx
gen_aarch64_sve_sqdecvnx4si_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10074 */
rtx
gen_aarch64_sve_uqdecvnx4si_pat (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10137 */
rtx
gen_aarch64_pred_cntpvnx16bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	291)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10137 */
rtx
gen_aarch64_pred_cntpvnx8bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	291)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10137 */
rtx
gen_aarch64_pred_cntpvnx4bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	291)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10137 */
rtx
gen_aarch64_pred_cntpvnx2bi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	291)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:104 */
rtx
gen_aarch64_gather_ldntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:104 */
rtx
gen_aarch64_gather_ldntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:104 */
rtx
gen_aarch64_gather_ldntvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:104 */
rtx
gen_aarch64_gather_ldntvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_zero_extendvnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_zero_extendvnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_zero_extendvnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_zero_extendvnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
rtx
gen_aarch64_gather_ldnt_zero_extendvnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:153 */
rtx
gen_aarch64_scatter_stntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:153 */
rtx
gen_aarch64_scatter_stntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:153 */
rtx
gen_aarch64_scatter_stntvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:153 */
rtx
gen_aarch64_scatter_stntvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		operand3),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:169 */
rtx
gen_aarch64_scatter_stnt_vnx4sivnx4qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		gen_rtx_TRUNCATE (VNx4QImode,
	operand3)),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:169 */
rtx
gen_aarch64_scatter_stnt_vnx2divnx2qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		gen_rtx_TRUNCATE (VNx2QImode,
	operand3)),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:169 */
rtx
gen_aarch64_scatter_stnt_vnx4sivnx4hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		gen_rtx_TRUNCATE (VNx4HImode,
	operand3)),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:169 */
rtx
gen_aarch64_scatter_stnt_vnx2divnx2hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		gen_rtx_TRUNCATE (VNx2HImode,
	operand3)),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:169 */
rtx
gen_aarch64_scatter_stnt_vnx2divnx2si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (4,
		operand0,
		operand1,
		operand2,
		gen_rtx_TRUNCATE (VNx2SImode,
	operand3)),
	117));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:196 */
rtx
gen_aarch64_mul_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:196 */
rtx
gen_aarch64_mul_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:196 */
rtx
gen_aarch64_mul_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:315 */
rtx
gen_aarch64_sve_suqaddvnx16qi_const (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:315 */
rtx
gen_aarch64_sve_suqaddvnx8hi_const (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:315 */
rtx
gen_aarch64_sve_suqaddvnx4si_const (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:315 */
rtx
gen_aarch64_sve_suqaddvnx2di_const (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	196));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shaddvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shsubvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_sqrshlvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srhaddvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srshlvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhaddvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhsubvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uqrshlvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urhaddvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urshlvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shaddvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shsubvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_sqrshlvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srhaddvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srshlvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhaddvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhsubvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uqrshlvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urhaddvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urshlvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shaddvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shsubvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_sqrshlvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srhaddvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srshlvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhaddvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhsubvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uqrshlvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urhaddvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urshlvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shaddvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_shsubvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_sqrshlvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srhaddvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_srshlvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhaddvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uhsubvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_uqrshlvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urhaddvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:330 */
rtx
gen_aarch64_pred_urshlvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqdmulhvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqrdmulhvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqdmulhvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqrdmulhvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqdmulhvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqrdmulhvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqdmulhvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:494 */
rtx
gen_aarch64_sve_sqrdmulhvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:504 */
rtx
gen_aarch64_sve_sqdmulh_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:504 */
rtx
gen_aarch64_sve_sqrdmulh_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:504 */
rtx
gen_aarch64_sve_sqdmulh_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:504 */
rtx
gen_aarch64_sve_sqrdmulh_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:504 */
rtx
gen_aarch64_sve_sqdmulh_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	191));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:504 */
rtx
gen_aarch64_sve_sqrdmulh_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	192));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_sqshlvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_uqshlvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_sqshlvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_uqshlvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_sqshlvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_uqshlvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_sqshlvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:528 */
rtx
gen_aarch64_pred_uqshlvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adclbvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	394));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adcltvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	395));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eorbtvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	420));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eortbvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	421));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbclbvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	452));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbcltvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	453));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlahvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlshvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adclbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	394));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adcltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	395));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eorbtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	420));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eortbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	421));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbclbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	452));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbcltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	453));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlahvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlshvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adclbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	394));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adcltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	395));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eorbtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	420));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eortbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	421));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbclbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	452));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbcltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	453));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlahvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlshvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adclbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	394));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_adcltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	395));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eorbtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	420));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_eortbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	421));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbclbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	452));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sbcltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	453));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlahvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:682 */
rtx
gen_aarch64_sve_sqrdmlshvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand1),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:696 */
rtx
gen_aarch64_sve_sqrdmlah_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
		operand1),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:696 */
rtx
gen_aarch64_sve_sqrdmlsh_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
		operand1),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:696 */
rtx
gen_aarch64_sve_sqrdmlah_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
		operand1),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:696 */
rtx
gen_aarch64_sve_sqrdmlsh_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
		operand1),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:696 */
rtx
gen_aarch64_sve_sqrdmlah_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
		operand1),
	259));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:696 */
rtx
gen_aarch64_sve_sqrdmlsh_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
		operand1),
	260));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:721 */
rtx
gen_aarch64_sve_add_mul_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_MULT (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:721 */
rtx
gen_aarch64_sve_add_mul_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_MULT (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:721 */
rtx
gen_aarch64_sve_add_mul_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_MULT (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
	operand2),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:738 */
rtx
gen_aarch64_sve_sub_mul_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_MULT (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:738 */
rtx
gen_aarch64_sve_sub_mul_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_MULT (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:738 */
rtx
gen_aarch64_sve_sub_mul_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_MULT (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153),
	operand2)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:762 */
rtx
gen_aarch64_sve2_xarvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:762 */
rtx
gen_aarch64_sve2_xarvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:762 */
rtx
gen_aarch64_sve2_xarvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:762 */
rtx
gen_aarch64_sve2_xarvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:829 */
rtx
gen_aarch64_sve2_eor3vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:829 */
rtx
gen_aarch64_sve2_eor3vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:829 */
rtx
gen_aarch64_sve2_eor3vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:829 */
rtx
gen_aarch64_sve2_eor3vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2),
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_srshrvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_urshrvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_srshrvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_urshrvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_srshrvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_urshrvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_srshrvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1134 */
rtx
gen_aarch64_sve_add_urshrvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_slivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	456));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_srivnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	484));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_slivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	456));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_srivnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	484));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_slivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	456));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_srivnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	484));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_slivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	456));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1158 */
rtx
gen_aarch64_sve_srivnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	484));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_saddwbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_saddwtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_ssubwbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	491));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_ssubwtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	492));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_uaddwbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	500));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_uaddwtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	501));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_usubwbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	518));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_usubwtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	519));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_saddwbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_saddwtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_ssubwbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	491));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_ssubwtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	492));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_uaddwbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	500));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_uaddwtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	501));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_usubwbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	518));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_usubwtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	519));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_saddwbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	450));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_saddwtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	451));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_ssubwbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	491));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_ssubwtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	492));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_uaddwbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	500));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_uaddwtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	501));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_usubwbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	518));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1245 */
rtx
gen_aarch64_sve_usubwtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	519));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sabdlbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	445));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sabdltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	446));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddlbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	447));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddlbtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	448));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	449));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_smullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	461));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_smulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	462));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sqdmullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	465));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sqdmulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	467));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssublbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	487));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssublbtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	488));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssubltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	489));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssubltbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	490));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uabdlbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	496));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uabdltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	497));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uaddlbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	498));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uaddltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	499));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_umullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	506));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_umulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	507));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_usublbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	516));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_usubltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	517));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sabdlbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	445));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sabdltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	446));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddlbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	447));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddlbtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	448));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	449));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_smullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	461));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_smulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	462));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sqdmullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	465));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sqdmulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	467));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssublbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	487));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssublbtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	488));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssubltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	489));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssubltbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	490));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uabdlbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	496));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uabdltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	497));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uaddlbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	498));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uaddltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	499));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_umullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	506));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_umulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	507));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_usublbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	516));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_usubltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	517));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sabdlbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	445));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sabdltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	446));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddlbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	447));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddlbtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	448));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_saddltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	449));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_smullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	461));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_smulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	462));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sqdmullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	465));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_sqdmulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	467));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssublbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	487));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssublbtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	488));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssubltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	489));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_ssubltbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	490));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uabdlbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	496));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uabdltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	497));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uaddlbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	498));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_uaddltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	499));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_umullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	506));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_umulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	507));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_usublbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	516));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1282 */
rtx
gen_aarch64_sve_usubltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	517));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_smullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	461));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_smullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	462));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_sqdmullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	465));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_sqdmullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	467));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_umullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	506));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_umullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	507));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_smullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	461));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_smullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	462));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_sqdmullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	465));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_sqdmullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	467));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_umullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	506));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1292 */
rtx
gen_aarch64_sve_umullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	153)),
	507));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_sshllbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	485));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_sshlltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	486));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_ushllbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	514));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_ushlltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	515));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_sshllbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	485));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_sshlltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	486));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_ushllbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	514));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_ushlltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	515));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_sshllbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	485));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_sshlltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	486));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_ushllbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	514));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1316 */
rtx
gen_aarch64_sve_ushlltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	515));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_sabdlbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	445),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_sabdltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	446),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_smullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	461),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_smulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	462),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_uabdlbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	496),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_uabdltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	497),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_umullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	506),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_umulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	507),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_sabdlbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	445),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_sabdltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	446),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_smullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	461),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_smulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	462),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_uabdlbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	496),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_uabdltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	497),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_umullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	506),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_umulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	507),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_sabdlbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	445),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_sabdltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	446),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_smullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	461),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_smulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	462),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_uabdlbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	496),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_uabdltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	497),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_umullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	506),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1351 */
rtx
gen_aarch64_sve_add_umulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	507),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_smullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	461),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_smullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	462),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_umullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	506),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_umullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	507),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_smullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	461),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_smullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	462),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_umullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	506),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1367 */
rtx
gen_aarch64_sve_add_umullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	507),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	465),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmullbtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	466),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	467),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	465),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmullbtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	466),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	467),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	465),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmullbtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	466),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1386 */
rtx
gen_aarch64_sve_qadd_sqdmulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	467),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1402 */
rtx
gen_aarch64_sve_qadd_sqdmullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	465),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1402 */
rtx
gen_aarch64_sve_qadd_sqdmullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	467),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1402 */
rtx
gen_aarch64_sve_qadd_sqdmullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	465),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1402 */
rtx
gen_aarch64_sve_qadd_sqdmullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	467),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_smullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	461)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_smulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	462)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_umullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	506)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_umulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	507)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_smullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	461)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_smulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	462)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_umullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	506)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_umulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	507)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_smullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	461)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_smulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	462)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_umullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	506)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1421 */
rtx
gen_aarch64_sve_sub_umulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	507)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_smullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	461)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_smullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	462)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_umullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	506)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_umullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	507)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_smullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	461)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_smullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	462)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_umullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	506)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1437 */
rtx
gen_aarch64_sve_sub_umullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	507)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	465)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmullbtvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	466)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	467)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmullbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	465)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmullbtvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	466)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmulltvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	467)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	465)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmullbtvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	466)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1456 */
rtx
gen_aarch64_sve_qsub_sqdmulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	467)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1472 */
rtx
gen_aarch64_sve_qsub_sqdmullb_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	465)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1472 */
rtx
gen_aarch64_sve_qsub_sqdmullt_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	467)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1472 */
rtx
gen_aarch64_sve_qsub_sqdmullb_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	465)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1472 */
rtx
gen_aarch64_sve_qsub_sqdmullt_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	467)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1499 */
rtx
gen_aarch64_sve_fmlalbvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	427));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1499 */
rtx
gen_aarch64_sve_fmlaltvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	428));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1499 */
rtx
gen_aarch64_sve_fmlslbvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	429));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1499 */
rtx
gen_aarch64_sve_fmlsltvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	430));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1513 */
rtx
gen_aarch64_fmlalb_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	427));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1513 */
rtx
gen_aarch64_fmlalt_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	428));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1513 */
rtx
gen_aarch64_fmlslb_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	429));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1513 */
rtx
gen_aarch64_fmlslt_lane_vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand2,
		operand3),
	153),
		operand4),
	430));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_sqxtnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand1),
	480));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_sqxtunbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand1),
	482));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_uqxtnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand1),
	512));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_sqxtnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	480));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_sqxtunbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	482));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_uqxtnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	512));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_sqxtnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	480));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_sqxtunbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	482));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1546 */
rtx
gen_aarch64_sve_uqxtnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	512));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_sqxtntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	481));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_sqxtuntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	483));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_uqxtntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	513));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_sqxtntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	481));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_sqxtuntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	483));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_uqxtntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	513));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_sqxtntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	481));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_sqxtuntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	483));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1556 */
rtx
gen_aarch64_sve_uqxtntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	513));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_addhnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	396));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_raddhnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	439));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_rsubhnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	443));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_subhnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	493));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_addhnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	396));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_raddhnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	439));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_rsubhnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	443));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_subhnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	493));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_addhnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	396));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_raddhnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	439));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_rsubhnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	443));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1580 */
rtx
gen_aarch64_sve_subhnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	493));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_addhntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	397));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_raddhntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	440));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_rsubhntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	444));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_subhntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	494));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_addhntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	397));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_raddhntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	440));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_rsubhntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	444));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_subhntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	494));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_addhntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	397));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_raddhntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	440));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_rsubhntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	444));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1591 */
rtx
gen_aarch64_sve_subhntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	494));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_rshrnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	441));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_shrnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	454));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqrshrnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	472));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqrshrunbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	474));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqshrnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	476));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqshrunbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	478));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_uqrshrnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	508));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_uqshrnbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	510));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_rshrnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	441));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_shrnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	454));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqrshrnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	472));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqrshrunbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	474));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqshrnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	476));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqshrunbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	478));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_uqrshrnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	508));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_uqshrnbvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	510));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_rshrnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	441));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_shrnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	454));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqrshrnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	472));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqrshrunbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	474));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqshrnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	476));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_sqshrunbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	478));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_uqrshrnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	508));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1625 */
rtx
gen_aarch64_sve_uqshrnbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	510));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_rshrntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	442));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_shrntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	455));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqrshrntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	473));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqrshruntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	475));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqshrntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	477));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqshruntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	479));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_uqrshrntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	509));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_uqshrntvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	511));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_rshrntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	442));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_shrntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	455));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqrshrntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	473));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqrshruntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	475));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqshrntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	477));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqshruntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	479));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_uqrshrntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	509));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_uqshrntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	511));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_rshrntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	442));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_shrntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	455));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqrshrntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	473));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqrshruntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	475));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqshrntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	477));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_sqshruntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	479));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_uqrshrntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	509));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1637 */
rtx
gen_aarch64_sve_uqshrntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	511));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_addpvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_smaxpvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	457));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_sminpvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	458));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_umaxpvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	502));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_uminpvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	503));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_addpvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_smaxpvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	457));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_sminpvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	458));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_umaxpvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	502));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_uminpvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	503));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_addpvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_smaxpvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	457));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_sminpvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	458));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_umaxpvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	502));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_uminpvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	503));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_addpvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	225));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_smaxpvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	457));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_sminpvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	458));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_umaxpvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	502));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1663 */
rtx
gen_aarch64_pred_uminpvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	503));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_faddpvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	422));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fmaxpvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	424));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fmaxnmpvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	423));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fminpvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	426));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fminnmpvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	425));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_faddpvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	422));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fmaxpvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	424));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fmaxnmpvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	423));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fminpvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	426));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fminnmpvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	425));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_faddpvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	422));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fmaxpvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	424));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fmaxnmpvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	423));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fminpvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	426));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1688 */
rtx
gen_aarch64_pred_fminnmpvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	425));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd90vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd270vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd90vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	464));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd270vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	463));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd90vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd270vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd90vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	464));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd270vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	463));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd90vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd270vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd90vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	464));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd270vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	463));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd90vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_cadd270vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd90vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	464));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1789 */
rtx
gen_aarch64_sve_sqcadd270vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	463));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmlavnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	407));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla90vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	410));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla180vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	408));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla270vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	409));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlahvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	468));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah90vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	471));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah180vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	469));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah270vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	470));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmlavnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	407));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla90vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	410));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla180vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	408));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla270vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	409));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlahvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	468));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah90vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	471));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah180vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	469));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah270vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	470));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmlavnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	407));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla90vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	410));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla180vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	408));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla270vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	409));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlahvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	468));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah90vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	471));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah180vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	469));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah270vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	470));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmlavnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	407));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla90vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	410));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla180vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	408));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_cmla270vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	409));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlahvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	468));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah90vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	471));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah180vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	469));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1820 */
rtx
gen_aarch64_sve_sqrdcmlah270vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	470));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	407));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla90_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	410));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla180_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	408));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla270_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	409));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	468));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah90_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	471));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah180_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	469));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah270_lane_vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	470));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	407));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla90_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	410));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla180_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	408));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_cmla270_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	409));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	468));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah90_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	471));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah180_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	469));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1834 */
rtx
gen_aarch64_sqrdcmlah270_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	470));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdotvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	403));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdot90vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	406));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdot180vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	404));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdot270vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	405));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdotvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	403));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdot90vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	406));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdot180vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	404));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1900 */
rtx
gen_aarch64_sve_cdot270vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	405));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	403));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot90_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	406));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot180_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	404));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot270_lane_vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	405));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	403));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot90_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	406));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot180_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	404));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1914 */
rtx
gen_aarch64_cdot270_lane_vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		operand4),
	153)),
	405));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1943 */
rtx
gen_aarch64_pred_fcvtltvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	415));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1943 */
rtx
gen_aarch64_pred_fcvtltvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	415));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2018 */
rtx
gen_aarch64_sve_cvtntvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand2,
		const1_rtx,
		operand1,
		operand3),
	416));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2018 */
rtx
gen_aarch64_sve_cvtntvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand2,
		const1_rtx,
		operand1,
		operand3),
	416));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2032 */
rtx
gen_aarch64_pred_fcvtxvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	417));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2108 */
rtx
gen_aarch64_sve2_cvtxntvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand2,
		const1_rtx,
		operand1,
		operand3),
	418));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2133 */
rtx
gen_aarch64_pred_urecpevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	22)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2133 */
rtx
gen_aarch64_pred_ursqrtevnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	104)),
	118));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2199 */
rtx
gen_aarch64_pred_flogbvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	419));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2199 */
rtx
gen_aarch64_pred_flogbvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	419));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2199 */
rtx
gen_aarch64_pred_flogbvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand3,
		operand2),
	419));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2280 */
rtx
gen_aarch64_sve2_pmulvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	193));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2292 */
rtx
gen_aarch64_sve_pmullbvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	435));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2292 */
rtx
gen_aarch64_sve_pmulltvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	437));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2292 */
rtx
gen_aarch64_sve_pmullbvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	435));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2292 */
rtx
gen_aarch64_sve_pmulltvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	437));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2305 */
rtx
gen_aarch64_sve_pmullb_pairvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	436));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2305 */
rtx
gen_aarch64_sve_pmullt_pairvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	438));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2305 */
rtx
gen_aarch64_sve_pmullb_pairvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	436));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2305 */
rtx
gen_aarch64_sve_pmullt_pairvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	438));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2305 */
rtx
gen_aarch64_sve_pmullb_pairvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	436));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2305 */
rtx
gen_aarch64_sve_pmullt_pairvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	438));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2328 */
rtx
gen_aarch64_sve2_tbl2vnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	495));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx8bf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx8hf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx4sf (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2339 */
rtx
gen_aarch64_sve2_tbxvnx2df (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	229));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bdepvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	398));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bextvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	399));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bgrpvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	400));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bdepvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	398));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bextvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	399));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bgrpvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	400));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bdepvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	398));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bextvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	399));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bgrpvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	400));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bdepvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	398));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bextvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	399));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2359 */
rtx
gen_aarch64_sve_bgrpvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	400));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2422 */
rtx
gen_aarch64_sve2_histcntvnx4si (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	431));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2422 */
rtx
gen_aarch64_sve2_histcntvnx2di (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	431));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2433 */
rtx
gen_aarch64_sve2_histsegvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	432));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2452 */
rtx
gen_aarch64_pred_matchvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	433)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2452 */
rtx
gen_aarch64_pred_nmatchvnx16qi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	434)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2452 */
rtx
gen_aarch64_pred_matchvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	433)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2452 */
rtx
gen_aarch64_pred_nmatchvnx8hi (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED,
	rtx operand3 ATTRIBUTE_UNUSED,
	rtx operand4 ATTRIBUTE_UNUSED)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand3,
		operand4),
	434)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2545 */
rtx
gen_aarch64_sve2_aese (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2)),
	241));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2545 */
rtx
gen_aarch64_sve2_aesd (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2)),
	242));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2558 */
rtx
gen_aarch64_sve2_aesmc (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand1),
	243));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2558 */
rtx
gen_aarch64_sve2_aesimc (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand1),
	244));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2610 */
rtx
gen_aarch64_sve2_rax1 (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_ROTATE (VNx2DImode,
	operand2,
	const1_rtx),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2631 */
rtx
gen_aarch64_sve2_sm4e (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	272));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2642 */
rtx
gen_aarch64_sve2_sm4ekey (rtx operand0 ATTRIBUTE_UNUSED,
	rtx operand1 ATTRIBUTE_UNUSED,
	rtx operand2 ATTRIBUTE_UNUSED)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	273));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:502 */
rtx
gen_cbranchsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 509 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1],
					 operands[2]);
  operands[2] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:502 */
rtx
gen_cbranchdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 509 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1],
					 operands[2]);
  operands[2] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:516 */
rtx
gen_cbranchsf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1],
					 operands[2]);
  operands[2] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:516 */
rtx
gen_cbranchdf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[1] = aarch64_gen_compare_reg (GET_CODE (operands[0]), operands[1],
					 operands[2]);
  operands[2] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:530 */
rtx
gen_cbranchcc4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:621 */
rtx
gen_modsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT val = INTVAL (operands[2]);

    if (val <= 0
       || exact_log2 (val) <= 0
       || !aarch64_bitmask_imm (val - 1, SImode))
      FAIL;

    rtx mask = GEN_INT (val - 1);

    /* In the special case of x0 % 2 we can do the even shorter:
	cmp    x0, xzr
	and    x0, x0, 1
	cneg   x0, x0, lt.  */
    if (val == 2)
      {
	rtx masked = gen_reg_rtx (SImode);
	rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
	emit_insn (gen_andsi3 (masked, operands[1], mask));
	rtx x = gen_rtx_LT (VOIDmode, ccreg, const0_rtx);
	emit_insn (gen_csneg3si_insn (operands[0], x, masked, masked));
	DONE;
      }

    rtx neg_op = gen_reg_rtx (SImode);
    rtx_insn *insn = emit_insn (gen_negsi2_compare0 (neg_op, operands[1]));

    /* Extract the condition register and mode.  */
    rtx cmp = XVECEXP (PATTERN (insn), 0, 0);
    rtx cc_reg = SET_DEST (cmp);
    rtx cond = gen_rtx_GE (VOIDmode, cc_reg, const0_rtx);

    rtx masked_pos = gen_reg_rtx (SImode);
    emit_insn (gen_andsi3 (masked_pos, operands[1], mask));

    rtx masked_neg = gen_reg_rtx (SImode);
    emit_insn (gen_andsi3 (masked_neg, neg_op, mask));

    emit_insn (gen_csneg3si_insn (operands[0], cond,
				       masked_neg, masked_pos));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:621 */
rtx
gen_moddi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT val = INTVAL (operands[2]);

    if (val <= 0
       || exact_log2 (val) <= 0
       || !aarch64_bitmask_imm (val - 1, DImode))
      FAIL;

    rtx mask = GEN_INT (val - 1);

    /* In the special case of x0 % 2 we can do the even shorter:
	cmp    x0, xzr
	and    x0, x0, 1
	cneg   x0, x0, lt.  */
    if (val == 2)
      {
	rtx masked = gen_reg_rtx (DImode);
	rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
	emit_insn (gen_anddi3 (masked, operands[1], mask));
	rtx x = gen_rtx_LT (VOIDmode, ccreg, const0_rtx);
	emit_insn (gen_csneg3di_insn (operands[0], x, masked, masked));
	DONE;
      }

    rtx neg_op = gen_reg_rtx (DImode);
    rtx_insn *insn = emit_insn (gen_negdi2_compare0 (neg_op, operands[1]));

    /* Extract the condition register and mode.  */
    rtx cmp = XVECEXP (PATTERN (insn), 0, 0);
    rtx cc_reg = SET_DEST (cmp);
    rtx cond = gen_rtx_GE (VOIDmode, cc_reg, const0_rtx);

    rtx masked_pos = gen_reg_rtx (DImode);
    emit_insn (gen_anddi3 (masked_pos, operands[1], mask));

    rtx masked_neg = gen_reg_rtx (DImode);
    emit_insn (gen_anddi3 (masked_neg, neg_op, mask));

    emit_insn (gen_csneg3di_insn (operands[0], cond,
				       masked_neg, masked_pos));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_1 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (SImode);
    emit_insn (gen_addsi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_addsi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (EQ, SImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_2 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (SImode);
    emit_insn (gen_addsi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_addsi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (NE, SImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_3 (rtx_insn *, rtx *);
rtx_insn *
gen_split_3 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_3 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (SImode);
    emit_insn (gen_addsi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_addsi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (EQ, SImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_4 (rtx_insn *, rtx *);
rtx_insn *
gen_split_4 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_4 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (SImode);
    emit_insn (gen_addsi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_addsi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (NE, SImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_5 (rtx_insn *, rtx *);
rtx_insn *
gen_split_5 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_5 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (DImode);
    emit_insn (gen_adddi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_adddi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (EQ, DImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_6 (rtx_insn *, rtx *);
rtx_insn *
gen_split_6 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_6 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (DImode);
    emit_insn (gen_adddi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_adddi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (NE, DImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_7 (rtx_insn *, rtx *);
rtx_insn *
gen_split_7 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_7 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (DImode);
    emit_insn (gen_adddi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_adddi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (EQ, DImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:709 */
extern rtx_insn *gen_split_8 (rtx_insn *, rtx *);
rtx_insn *
gen_split_8 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_8 (aarch64.md:709)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[1]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[1]) & 0xfff000;
    rtx tmp = gen_reg_rtx (DImode);
    emit_insn (gen_adddi3 (tmp, operands[0], GEN_INT (-hi_imm)));
    emit_insn (gen_adddi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (NE, DImode,
				  cc_reg, const0_rtx);
    emit_jump_insn (gen_condjump (cmp_rtx, cc_reg, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:735 */
rtx
gen_casesi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 742 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (operands[1] != const0_rtx)
      {
	rtx reg = gen_reg_rtx (SImode);

	/* Canonical RTL says that if you have:

	   (minus (X) (CONST))

           then this should be emitted as:

           (plus (X) (-CONST))

	   The use of trunc_int_for_mode ensures that the resulting
	   constant can be represented in SImode, this is important
	   for the corner case where operand[1] is INT_MIN.  */

	operands[1]
	  = GEN_INT (trunc_int_for_mode (-UINTVAL (operands[1]), SImode));

	if (!(*insn_data[CODE_FOR_addsi3].operand[2].predicate)
	      (operands[1], SImode))
	  operands[1] = force_reg (SImode, operands[1]);
	emit_insn (gen_addsi3 (reg, operands[0], operands[1]));
	operands[0] = reg;
      }

    if (!aarch64_plus_operand (operands[2], SImode))
      operands[2] = force_reg (SImode, operands[2]);
    emit_jump_insn (gen_cbranchsi4 (gen_rtx_GTU (SImode, const0_rtx,
						 const0_rtx),
				    operands[0], operands[2], operands[4]));

    operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, operands[3]));
    operands[2]
      = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, operands[2], operands[0]),
			UNSPEC_CASESI);
    operands[2] = gen_rtx_MEM (DImode, operands[2]);
    MEM_READONLY_P (operands[2]) = 1;
    MEM_NOTRAP_P (operands[2]) = 1;
    emit_jump_insn (gen_casesi_dispatch (operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:787 */
rtx
gen_casesi_dispatch (rtx operand0,
	rtx operand1)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (5,
		gen_rtx_SET (pc_rtx,
	operand0),
		gen_hard_reg_clobber (CCmode, 66),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode)),
		gen_rtx_USE (VOIDmode,
	gen_rtx_LABEL_REF (DImode,
	operand1))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:858 */
rtx
gen_prologue (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  aarch64_expand_prologue ();
  DONE;
  
#undef DONE
#undef FAIL
  }
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:867 */
rtx
gen_epilogue (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 870 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  aarch64_expand_epilogue (false);
  DONE;
  
#undef DONE
#undef FAIL
  }
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:876 */
rtx
gen_sibcall_epilogue (void)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 879 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  aarch64_expand_epilogue (true);
  DONE;
  
#undef DONE
#undef FAIL
  }
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	const0_rtx));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:907 */
rtx
gen_return (void)
{
  return simple_return_rtx;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1032 */
rtx
gen_call (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1039 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  {
    aarch64_expand_call (NULL_RTX, operands[0], operands[2], false);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	operand1),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand2),
	4),
		gen_hard_reg_clobber (DImode, 30))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1057 */
rtx
gen_call_value (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1065 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  {
    aarch64_expand_call (operands[0], operands[1], operands[3], false);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	operand1,
	operand2)),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand3),
	4),
		gen_hard_reg_clobber (DImode, 30))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1085 */
rtx
gen_sibcall (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1092 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    aarch64_expand_call (NULL_RTX, operands[0], operands[2], true);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	operand1),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand2),
	4),
		ret_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1098 */
rtx
gen_sibcall_value (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1106 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    aarch64_expand_call (operands[0], operands[1], operands[3], true);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	operand1,
	operand2)),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand3),
	4),
		ret_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1152 */
rtx
gen_untyped_call (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  int i;

  /* Untyped calls always use the default ABI.  It's only possible to use
     ABI variants if we know the type of the target function.  */
  emit_call_insn (gen_call (operands[0], const0_rtx, const0_rtx));

  for (i = 0; i < XVECLEN (operands[2], 0); i++)
    {
      rtx set = XVECEXP (operands[2], 0, i);
      emit_move_insn (SET_DEST (set), SET_SRC (set));
    }

  /* The optimizer does not know that the call sets the function value
     registers we stored in the result block.  We avoid problems by
     claiming that all hard registers are used and clobbered at this
     point.  */
  emit_insn (gen_blockage ());
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_CALL (VOIDmode,
	operand0,
	const0_rtx),
		operand1,
		operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1183 */
rtx
gen_movqi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1187 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

    if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
      operands[1] = force_reg (QImode, operands[1]);

    if (GET_CODE (operands[1]) == CONST_POLY_INT)
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1183 */
rtx
gen_movhi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1187 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

    if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
      operands[1] = force_reg (HImode, operands[1]);

    if (GET_CODE (operands[1]) == CONST_POLY_INT)
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1240 */
rtx
gen_movsi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1244 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

    if (MEM_P (operands[0]) && !MEM_VOLATILE_P (operands[0])
	&& CONST_INT_P (operands[1]) && SImode == DImode
	&& aarch64_split_dimode_const_store (operands[0], operands[1]))
      DONE;

    if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
      operands[1] = force_reg (SImode, operands[1]);

    /* Lower moves of symbolic constants into individual instructions.
       Doing this now is sometimes necessary for correctness, since some
       sequences require temporary pseudo registers.  Lowering now is also
       often better for optimization, since more RTL passes get the
       chance to optimize the individual instructions.

       When called after RA, also split multi-instruction moves into
       smaller pieces now, since we can't be sure that sure that there
       will be a following split pass.  */
    if (CONST_INT_P (operands[1])
	? (reload_completed
	   && !aarch64_mov_imm_operand (operands[1], SImode))
	: CONSTANT_P (operands[1]))
     {
       aarch64_expand_mov_immediate (operands[0], operands[1]);
       DONE;
     }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1240 */
rtx
gen_movdi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1244 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

    if (MEM_P (operands[0]) && !MEM_VOLATILE_P (operands[0])
	&& CONST_INT_P (operands[1]) && DImode == DImode
	&& aarch64_split_dimode_const_store (operands[0], operands[1]))
      DONE;

    if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
      operands[1] = force_reg (DImode, operands[1]);

    /* Lower moves of symbolic constants into individual instructions.
       Doing this now is sometimes necessary for correctness, since some
       sequences require temporary pseudo registers.  Lowering now is also
       often better for optimization, since more RTL passes get the
       chance to optimize the individual instructions.

       When called after RA, also split multi-instruction moves into
       smaller pieces now, since we can't be sure that sure that there
       will be a following split pass.  */
    if (CONST_INT_P (operands[1])
	? (reload_completed
	   && !aarch64_mov_imm_operand (operands[1], DImode))
	: CONSTANT_P (operands[1]))
     {
       aarch64_expand_mov_immediate (operands[0], operands[1]);
       DONE;
     }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1273 */
extern rtx_insn *gen_split_9 (rtx_insn *, rtx *);
rtx_insn *
gen_split_9 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_9 (aarch64.md:1273)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
       aarch64_expand_mov_immediate (operands[0], operands[1]);
       DONE;
    }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1311 */
extern rtx_insn *gen_split_10 (rtx_insn *, rtx *);
rtx_insn *
gen_split_10 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_10 (aarch64.md:1311)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1338 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
       aarch64_expand_mov_immediate (operands[0], operands[1]);
       DONE;
    }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1379 */
rtx
gen_movti (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

    if (GET_CODE (operands[0]) == MEM && operands[1] != const0_rtx)
      operands[1] = force_reg (TImode, operands[1]);

    if (GET_CODE (operands[1]) == CONST_POLY_INT)
      {
	emit_move_insn (gen_lowpart (DImode, operands[0]),
			gen_lowpart (DImode, operands[1]));
	emit_move_insn (gen_highpart (DImode, operands[0]), const0_rtx);
	DONE;
      }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1425 */
extern rtx_insn *gen_split_11 (rtx_insn *, rtx *);
rtx_insn *
gen_split_11 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_11 (aarch64.md:1425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  aarch64_split_128bit_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1435 */
rtx
gen_movhf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!TARGET_FLOAT)
      {
	aarch64_err_no_fpadvsimd (HFmode);
	machine_mode intmode
	  = int_mode_for_size (GET_MODE_BITSIZE (HFmode), 0).require ();
	emit_move_insn (gen_lowpart (intmode, operands[0]),
			gen_lowpart (intmode, operands[1]));
	DONE;
      }

    if (GET_CODE (operands[0]) == MEM
        && ! (GET_CODE (operands[1]) == CONST_DOUBLE
	      && aarch64_float_const_zero_rtx_p (operands[1])))
      operands[1] = force_reg (HFmode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1435 */
rtx
gen_movbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!TARGET_FLOAT)
      {
	aarch64_err_no_fpadvsimd (BFmode);
	machine_mode intmode
	  = int_mode_for_size (GET_MODE_BITSIZE (BFmode), 0).require ();
	emit_move_insn (gen_lowpart (intmode, operands[0]),
			gen_lowpart (intmode, operands[1]));
	DONE;
      }

    if (GET_CODE (operands[0]) == MEM
        && ! (GET_CODE (operands[1]) == CONST_DOUBLE
	      && aarch64_float_const_zero_rtx_p (operands[1])))
      operands[1] = force_reg (BFmode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1435 */
rtx
gen_movsf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!TARGET_FLOAT)
      {
	aarch64_err_no_fpadvsimd (SFmode);
	machine_mode intmode
	  = int_mode_for_size (GET_MODE_BITSIZE (SFmode), 0).require ();
	emit_move_insn (gen_lowpart (intmode, operands[0]),
			gen_lowpart (intmode, operands[1]));
	DONE;
      }

    if (GET_CODE (operands[0]) == MEM
        && ! (GET_CODE (operands[1]) == CONST_DOUBLE
	      && aarch64_float_const_zero_rtx_p (operands[1])))
      operands[1] = force_reg (SFmode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1435 */
rtx
gen_movdf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!TARGET_FLOAT)
      {
	aarch64_err_no_fpadvsimd (DFmode);
	machine_mode intmode
	  = int_mode_for_size (GET_MODE_BITSIZE (DFmode), 0).require ();
	emit_move_insn (gen_lowpart (intmode, operands[0]),
			gen_lowpart (intmode, operands[1]));
	DONE;
      }

    if (GET_CODE (operands[0]) == MEM
        && ! (GET_CODE (operands[1]) == CONST_DOUBLE
	      && aarch64_float_const_zero_rtx_p (operands[1])))
      operands[1] = force_reg (DFmode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1435 */
rtx
gen_movtf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!TARGET_FLOAT)
      {
	aarch64_err_no_fpadvsimd (TFmode);
	machine_mode intmode
	  = int_mode_for_size (GET_MODE_BITSIZE (TFmode), 0).require ();
	emit_move_insn (gen_lowpart (intmode, operands[0]),
			gen_lowpart (intmode, operands[1]));
	DONE;
      }

    if (GET_CODE (operands[0]) == MEM
        && ! (GET_CODE (operands[1]) == CONST_DOUBLE
	      && aarch64_float_const_zero_rtx_p (operands[1])))
      operands[1] = force_reg (TFmode, operands[1]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1528 */
extern rtx_insn *gen_split_12 (rtx_insn *, rtx *);
rtx_insn *
gen_split_12 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_12 (aarch64.md:1528)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    unsigned HOST_WIDE_INT ival;
    if (!aarch64_reinterpret_float_as_int (operands[1], &ival))
      FAIL;

    rtx tmp = gen_reg_rtx (HImode);
    emit_move_insn (tmp, gen_int_mode (ival, HImode));
    emit_move_insn (operands[0], gen_lowpart (HFmode, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1528 */
extern rtx_insn *gen_split_13 (rtx_insn *, rtx *);
rtx_insn *
gen_split_13 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_13 (aarch64.md:1528)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    unsigned HOST_WIDE_INT ival;
    if (!aarch64_reinterpret_float_as_int (operands[1], &ival))
      FAIL;

    rtx tmp = gen_reg_rtx (SImode);
    emit_move_insn (tmp, gen_int_mode (ival, SImode));
    emit_move_insn (operands[0], gen_lowpart (SFmode, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1528 */
extern rtx_insn *gen_split_14 (rtx_insn *, rtx *);
rtx_insn *
gen_split_14 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_14 (aarch64.md:1528)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1536 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    unsigned HOST_WIDE_INT ival;
    if (!aarch64_reinterpret_float_as_int (operands[1], &ival))
      FAIL;

    rtx tmp = gen_reg_rtx (DImode);
    emit_move_insn (tmp, gen_int_mode (ival, DImode));
    emit_move_insn (operands[0], gen_lowpart (DFmode, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1573 */
extern rtx_insn *gen_split_15 (rtx_insn *, rtx *);
rtx_insn *
gen_split_15 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_15 (aarch64.md:1573)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    aarch64_split_128bit_move (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1584 */
rtx
gen_aarch64_cpymemdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1592 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[3] = XEXP (operands[0], 0);
    operands[4] = XEXP (operands[1], 0);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand2,
	const0_rtx),
		gen_rtx_CLOBBER (VOIDmode,
	operand3),
		gen_rtx_CLOBBER (VOIDmode,
	operand4),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		copy_rtx (operand2)),
	6)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1614 */
rtx
gen_cpymemdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1620 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_expand_cpymem (operands))
    DONE;
  FAIL;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1644 */
rtx
gen_movmemdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1650 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   rtx sz_reg = operands[2];
   /* For constant-sized memmoves check the threshold.
      FIXME: We should add a non-MOPS memmove expansion for smaller,
      constant-sized memmove to avoid going to a libcall.  */
   if (CONST_INT_P (sz_reg)
       && INTVAL (sz_reg) < aarch64_mops_memmove_size_threshold)
     FAIL;

   rtx addr_dst = XEXP (operands[0], 0);
   rtx addr_src = XEXP (operands[1], 0);

   if (!REG_P (sz_reg))
     sz_reg = force_reg (DImode, sz_reg);
   if (!REG_P (addr_dst))
     addr_dst = force_reg (DImode, addr_dst);
   if (!REG_P (addr_src))
     addr_src = force_reg (DImode, addr_src);
   emit_insn (gen_aarch64_movmemdi (addr_dst, addr_src, sz_reg));
   DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1673 */
rtx
gen_aarch64_setmemdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1681 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[3] = XEXP (operands[0], 0);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (3,
		gen_rtx_SET (operand2,
	const0_rtx),
		gen_rtx_CLOBBER (VOIDmode,
	operand3),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		operand1,
		copy_rtx (operand2)),
	73)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1701 */
rtx
gen_setmemdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1707 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_expand_setmem (operands))
    DONE;

  FAIL;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand1));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1917 */
rtx
gen_extendsidi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1917 */
rtx
gen_zero_extendsidi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_extendqisi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_zero_extendqisi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_extendhisi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_zero_extendhisi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_extendqidi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_zero_extendqidi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_extendhidi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:1977 */
rtx
gen_zero_extendhidi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2008 */
rtx
gen_extendqihi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2008 */
rtx
gen_zero_extendqihi2 (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2038 */
rtx
gen_addsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2044 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  /* If operands[1] is a subreg extract the inner RTX.  */
  rtx op1 = REG_P (operands[1]) ? operands[1] : SUBREG_REG (operands[1]);

  /* If the constant is too large for a single instruction and isn't frame
     based, split off the immediate so it is available for CSE.  */
  if (!aarch64_plus_immediate (operands[2], SImode)
      && !(TARGET_SVE && aarch64_sve_plus_immediate (operands[2], SImode))
      && can_create_pseudo_p ()
      && (!REG_P (op1)
	 || !REGNO_PTR_FRAME_P (REGNO (op1))))
    operands[2] = force_reg (SImode, operands[2]);
  /* Some tunings prefer to avoid VL-based operations.
     Split off the poly immediate here.  The rtx costs hook will reject attempts
     to combine them back.  */
  else if (GET_CODE (operands[2]) == CONST_POLY_INT
	   && can_create_pseudo_p ()
	   && (aarch64_tune_params.extra_tuning_flags
	       & AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS))
    operands[2] = force_reg (SImode, operands[2]);
  /* Expand polynomial additions now if the destination is the stack
     pointer, since we don't want to use that as a temporary.  */
  else if (operands[0] == stack_pointer_rtx
	   && aarch64_split_add_offset_immediate (operands[2], SImode))
    {
      aarch64_split_add_offset (SImode, operands[0], operands[1],
				operands[2], NULL_RTX, NULL_RTX);
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2038 */
rtx
gen_adddi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2044 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  /* If operands[1] is a subreg extract the inner RTX.  */
  rtx op1 = REG_P (operands[1]) ? operands[1] : SUBREG_REG (operands[1]);

  /* If the constant is too large for a single instruction and isn't frame
     based, split off the immediate so it is available for CSE.  */
  if (!aarch64_plus_immediate (operands[2], DImode)
      && !(TARGET_SVE && aarch64_sve_plus_immediate (operands[2], DImode))
      && can_create_pseudo_p ()
      && (!REG_P (op1)
	 || !REGNO_PTR_FRAME_P (REGNO (op1))))
    operands[2] = force_reg (DImode, operands[2]);
  /* Some tunings prefer to avoid VL-based operations.
     Split off the poly immediate here.  The rtx costs hook will reject attempts
     to combine them back.  */
  else if (GET_CODE (operands[2]) == CONST_POLY_INT
	   && can_create_pseudo_p ()
	   && (aarch64_tune_params.extra_tuning_flags
	       & AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS))
    operands[2] = force_reg (DImode, operands[2]);
  /* Expand polynomial additions now if the destination is the stack
     pointer, since we don't want to use that as a temporary.  */
  else if (operands[0] == stack_pointer_rtx
	   && aarch64_split_add_offset_immediate (operands[2], DImode))
    {
      aarch64_split_add_offset (DImode, operands[0], operands[1],
				operands[2], NULL_RTX, NULL_RTX);
      DONE;
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2113 */
extern rtx_insn *gen_peephole2_1 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_1 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (0, 0, "r", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_1 (aarch64.md:2113)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2113 */
extern rtx_insn *gen_peephole2_2 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_2 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (0, 0, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_2 (aarch64.md:2113)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2124 */
extern rtx_insn *gen_peephole2_3 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_3 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[3] = peep2_find_free_register (0, 0, "r", SImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_3 (aarch64.md:2124)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	operand1,
	copy_rtx (operand3)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2138 */
extern rtx_insn *gen_split_16 (rtx_insn *, rtx *);
rtx_insn *
gen_split_16 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_16 (aarch64.md:2138)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2146 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT i = INTVAL (operands[2]);
    HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
    operands[3] = GEN_INT (i - s);
    operands[4] = GEN_INT (s);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_PLUS (SImode,
	copy_rtx (operand0),
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2138 */
extern rtx_insn *gen_split_17 (rtx_insn *, rtx *);
rtx_insn *
gen_split_17 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_17 (aarch64.md:2138)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2146 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT i = INTVAL (operands[2]);
    HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
    operands[3] = GEN_INT (i - s);
    operands[4] = GEN_INT (s);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_PLUS (DImode,
	copy_rtx (operand0),
	operand4)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2169 */
extern rtx_insn *gen_split_18 (rtx_insn *, rtx *);
rtx_insn *
gen_split_18 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_18 (aarch64.md:2169)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    aarch64_split_add_offset (SImode, operands[0], operands[1],
			      operands[2], operands[0], NULL_RTX);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2169 */
extern rtx_insn *gen_split_19 (rtx_insn *, rtx *);
rtx_insn *
gen_split_19 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_19 (aarch64.md:2169)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2188 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    aarch64_split_add_offset (DImode, operands[0], operands[1],
			      operands[2], operands[0], NULL_RTX);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2197 */
extern rtx_insn *gen_split_20 (rtx_insn *, rtx *);
rtx_insn *
gen_split_20 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_20 (aarch64.md:2197)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2206 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT i = INTVAL (operands[2]);
    HOST_WIDE_INT s = (i >= 0 ? i & 0xfff : -(-i & 0xfff));
    operands[3] = GEN_INT (i - s);
    operands[4] = GEN_INT (s);
    operands[5] = gen_lowpart (SImode, operands[0]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_PLUS (SImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand5),
	operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2215 */
rtx
gen_addvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2221 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (CONST_INT_P (operands[2]))
    emit_insn (gen_addsi3_compareV_imm (operands[0], operands[1],
					    operands[2]));
  else
    emit_insn (gen_addsi3_compareV (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2215 */
rtx
gen_addvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2221 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (CONST_INT_P (operands[2]))
    emit_insn (gen_adddi3_compareV_imm (operands[0], operands[1],
					    operands[2]));
  else
    emit_insn (gen_adddi3_compareV (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2232 */
rtx
gen_uaddvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  emit_insn (gen_addsi3_compareC (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (LTU, CC_Cmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2232 */
rtx
gen_uaddvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  emit_insn (gen_adddi3_compareC (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (LTU, CC_Cmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2245 */
rtx
gen_addti3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2250 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;

  aarch64_addti_scratch_regs (operands[1], operands[2],
			      &low_dest, &op1_low, &op2_low,
			      &high_dest, &op1_high, &op2_high);

  if (op2_low == const0_rtx)
    {
      low_dest = op1_low;
      if (!aarch64_pluslong_operand (op2_high, DImode))
	op2_high = force_reg (DImode, op2_high);
      emit_insn (gen_adddi3 (high_dest, op1_high, op2_high));
    }
  else
    {
      emit_insn (gen_adddi3_compareC (low_dest, op1_low,
				      force_reg (DImode, op2_low)));
      emit_insn (gen_adddi3_carryin (high_dest, op1_high,
				     force_reg (DImode, op2_high)));
    }

  emit_move_insn (gen_lowpart (DImode, operands[0]), low_dest);
  emit_move_insn (gen_highpart (DImode, operands[0]), high_dest);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (TImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2278 */
rtx
gen_addvti4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2284 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;

  aarch64_addti_scratch_regs (operands[1], operands[2],
			      &low_dest, &op1_low, &op2_low,
			      &high_dest, &op1_high, &op2_high);

  if (op2_low == const0_rtx)
    {
      low_dest = op1_low;
      emit_insn (gen_adddi3_compareV (high_dest, op1_high,
				      force_reg (DImode, op2_high)));
    }
  else
    {
      emit_insn (gen_adddi3_compareC (low_dest, op1_low,
				      force_reg (DImode, op2_low)));
      emit_insn (gen_adddi3_carryinV (high_dest, op1_high,
				      force_reg (DImode, op2_high)));
    }

  emit_move_insn (gen_lowpart (DImode, operands[0]), low_dest);
  emit_move_insn (gen_highpart (DImode, operands[0]), high_dest);

  aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2312 */
rtx
gen_uaddvti4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2318 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;

  aarch64_addti_scratch_regs (operands[1], operands[2],
			      &low_dest, &op1_low, &op2_low,
			      &high_dest, &op1_high, &op2_high);

  if (op2_low == const0_rtx)
    {
      low_dest = op1_low;
      emit_insn (gen_adddi3_compareC (high_dest, op1_high,
				      force_reg (DImode, op2_high)));
    }
  else
    {
      emit_insn (gen_adddi3_compareC (low_dest, op1_low,
				      force_reg (DImode, op2_low)));
      emit_insn (gen_adddi3_carryinC (high_dest, op1_high,
				      force_reg (DImode, op2_high)));
    }

  emit_move_insn (gen_lowpart (DImode, operands[0]), low_dest);
  emit_move_insn (gen_highpart (DImode, operands[0]), high_dest);

  aarch64_gen_unlikely_cbranch (GEU, CC_ADCmode, operands[3]);
  DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2669 */
rtx
gen_addsi3_carryin (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	gen_rtx_LTU (SImode,
	gen_rtx_REG (CC_Cmode,
	66),
	const0_rtx),
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2669 */
rtx
gen_adddi3_carryin (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CC_Cmode,
	66),
	const0_rtx),
	operand1),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2709 */
rtx
gen_addsi3_carryinC (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  operands[3] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
  rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
  operands[4] = gen_rtx_LTU (DImode, ccin, const0_rtx);
  operands[5] = gen_rtx_LTU (SImode, ccin, const0_rtx);
  operands[6] = immed_wide_int_const (wi::shwi (1, DImode)
				      << GET_MODE_BITSIZE (SImode),
				      TImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand3,
	gen_rtx_COMPARE (CC_ADCmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand4,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)),
	gen_rtx_ZERO_EXTEND (DImode,
	operand2)),
	operand6)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand5,
	copy_rtx (operand1)),
	copy_rtx (operand2))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2709 */
rtx
gen_adddi3_carryinC (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  operands[3] = gen_rtx_REG (CC_ADCmode, CC_REGNUM);
  rtx ccin = gen_rtx_REG (CC_Cmode, CC_REGNUM);
  operands[4] = gen_rtx_LTU (TImode, ccin, const0_rtx);
  operands[5] = gen_rtx_LTU (DImode, ccin, const0_rtx);
  operands[6] = immed_wide_int_const (wi::shwi (1, TImode)
				      << GET_MODE_BITSIZE (DImode),
				      TImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand3,
	gen_rtx_COMPARE (CC_ADCmode,
	gen_rtx_PLUS (TImode,
	gen_rtx_PLUS (TImode,
	operand4,
	gen_rtx_ZERO_EXTEND (TImode,
	operand1)),
	gen_rtx_ZERO_EXTEND (TImode,
	operand2)),
	operand6)),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand5,
	copy_rtx (operand1)),
	copy_rtx (operand2))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2772 */
rtx
gen_addsi3_carryinV (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx cc = gen_rtx_REG (CC_Cmode, CC_REGNUM);
  operands[3] = gen_rtx_LTU (DImode, cc, const0_rtx);
  operands[4] = gen_rtx_LTU (SImode, cc, const0_rtx);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand3,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)),
	gen_rtx_SIGN_EXTEND (DImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	operand4,
	copy_rtx (operand1)),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand4),
	copy_rtx (operand1)),
	copy_rtx (operand2))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2772 */
rtx
gen_adddi3_carryinV (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx cc = gen_rtx_REG (CC_Cmode, CC_REGNUM);
  operands[3] = gen_rtx_LTU (TImode, cc, const0_rtx);
  operands[4] = gen_rtx_LTU (DImode, cc, const0_rtx);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_PLUS (TImode,
	gen_rtx_PLUS (TImode,
	operand3,
	gen_rtx_SIGN_EXTEND (TImode,
	operand1)),
	gen_rtx_SIGN_EXTEND (TImode,
	operand2)),
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	operand4,
	copy_rtx (operand1)),
	copy_rtx (operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand4),
	copy_rtx (operand1)),
	copy_rtx (operand2))))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2902 */
rtx
gen_subvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2908 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (CONST_INT_P (operands[2]))
    emit_insn (gen_subvsi_imm (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_subvsi_insn (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2902 */
rtx
gen_subvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2908 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (CONST_INT_P (operands[2]))
    emit_insn (gen_subvdi_imm (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_subvdi_insn (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2952 */
rtx
gen_negvsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2957 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_negvsi_insn (operands[0], operands[1]));
    aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[2]);

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:2952 */
rtx
gen_negvdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2957 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_negvdi_insn (operands[0], operands[1]));
    aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[2]);

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3005 */
rtx
gen_usubvsi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3011 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  emit_insn (gen_subsi3_compare1 (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (LTU, CCmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3005 */
rtx
gen_usubvdi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3011 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  emit_insn (gen_subdi3_compare1 (operands[0], operands[1], operands[2]));
  aarch64_gen_unlikely_cbranch (LTU, CCmode, operands[3]);

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3018 */
rtx
gen_subti3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3023 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;

  aarch64_subvti_scratch_regs (operands[1], operands[2],
			       &low_dest, &op1_low, &op2_low,
			       &high_dest, &op1_high, &op2_high);

  emit_insn (gen_subdi3_compare1 (low_dest, op1_low, op2_low));
  emit_insn (gen_subdi3_carryin (high_dest, op1_high, op2_high));

  emit_move_insn (gen_lowpart (DImode, operands[0]), low_dest);
  emit_move_insn (gen_highpart (DImode, operands[0]), high_dest);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (TImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3038 */
rtx
gen_subvti4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3044 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;

  aarch64_subvti_scratch_regs (operands[1], operands[2],
			       &low_dest, &op1_low, &op2_low,
			       &high_dest, &op1_high, &op2_high);
  aarch64_expand_subvti (operands[0], low_dest, op1_low, op2_low,
			 high_dest, op1_high, op2_high, false);

  aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[3]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3057 */
rtx
gen_usubvti4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3063 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low_dest, op1_low, op2_low, high_dest, op1_high, op2_high;

  aarch64_subvti_scratch_regs (operands[1], operands[2],
				    &low_dest, &op1_low, &op2_low,
			       &high_dest, &op1_high, &op2_high);
  aarch64_expand_subvti (operands[0], low_dest, op1_low, op2_low,
			 high_dest, op1_high, op2_high, true);

  aarch64_gen_unlikely_cbranch (LTU, CCmode, operands[3]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3076 */
rtx
gen_negvti3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_negdi_carryout (gen_lowpart (DImode, operands[0]),
				   gen_lowpart (DImode, operands[1])));
    emit_insn (gen_negvdi_carryinV (gen_highpart (DImode, operands[0]),
				    gen_highpart (DImode, operands[1])));
    aarch64_gen_unlikely_cbranch (NE, CC_Vmode, operands[2]);

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_LABEL_REF (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3173 */
extern rtx_insn *gen_peephole2_4 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_4 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_4 (aarch64.md:3173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3184 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subsi3_compare1 (operands[0], operands[1],
					 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3173 */
extern rtx_insn *gen_peephole2_5 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_5 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_5 (aarch64.md:3173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3184 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subdi3_compare1 (operands[0], operands[1],
					 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3194 */
extern rtx_insn *gen_peephole2_6 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_6 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_6 (aarch64.md:3194)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subsi3_compare1 (operands[0], operands[1],
					 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3194 */
extern rtx_insn *gen_peephole2_7 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_7 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_7 (aarch64.md:3194)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subdi3_compare1 (operands[0], operands[1],
					 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3211 */
extern rtx_insn *gen_peephole2_8 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_8 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_8 (aarch64.md:3211)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3222 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subsi3_compare1_imm (operands[0], operands[1],
					 operands[3], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3211 */
extern rtx_insn *gen_peephole2_9 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_9 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_9 (aarch64.md:3211)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3222 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subdi3_compare1_imm (operands[0], operands[1],
					 operands[3], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3232 */
extern rtx_insn *gen_peephole2_10 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_10 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_10 (aarch64.md:3232)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3242 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subsi3_compare1_imm (operands[0], operands[1],
					 operands[3], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3232 */
extern rtx_insn *gen_peephole2_11 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_11 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_11 (aarch64.md:3232)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3242 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    emit_insn (gen_subdi3_compare1_imm (operands[0], operands[1],
					 operands[3], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3347 */
rtx
gen_subsi3_carryin (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2),
	gen_rtx_LTU (SImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3347 */
rtx
gen_subdi3_carryin (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2),
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3412 */
rtx
gen_usubsi3_carryinC (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	operand2),
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2),
	gen_rtx_LTU (SImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3412 */
rtx
gen_usubdi3_carryinC (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	gen_rtx_ZERO_EXTEND (TImode,
	operand1),
	gen_rtx_PLUS (TImode,
	gen_rtx_ZERO_EXTEND (TImode,
	operand2),
	gen_rtx_LTU (TImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2),
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3479 */
rtx
gen_subsi3_carryinV (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_MINUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1),
	gen_rtx_PLUS (DImode,
	gen_rtx_SIGN_EXTEND (DImode,
	operand2),
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx))),
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_MINUS (SImode,
	operand1,
	gen_rtx_PLUS (SImode,
	gen_rtx_LTU (SImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx),
	operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	gen_rtx_MINUS (SImode,
	operand1,
	operand2),
	gen_rtx_LTU (SImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3479 */
rtx
gen_subdi3_carryinV (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_Vmode,
	66),
	gen_rtx_COMPARE (CC_Vmode,
	gen_rtx_MINUS (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	operand1),
	gen_rtx_PLUS (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	operand2),
	gen_rtx_LTU (TImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx))),
	gen_rtx_SIGN_EXTEND (TImode,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_PLUS (DImode,
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx),
	operand2))))),
		gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	gen_rtx_MINUS (DImode,
	operand1,
	operand2),
	gen_rtx_LTU (DImode,
	gen_rtx_REG (CCmode,
	66),
	const0_rtx)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3574 */
rtx
gen_abssi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
    rtx x = gen_rtx_LT (VOIDmode, ccreg, const0_rtx);
    emit_insn (gen_csneg3si_insn (operands[0], x, operands[1], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3574 */
rtx
gen_absdi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3578 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg = aarch64_gen_compare_reg (LT, operands[1], const0_rtx);
    rtx x = gen_rtx_LT (VOIDmode, ccreg, const0_rtx);
    emit_insn (gen_csneg3di_insn (operands[0], x, operands[1], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3828 */
rtx
gen_mulditi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3833 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low = gen_reg_rtx (DImode);
  emit_insn (gen_muldi3 (low, operands[1], operands[2]));

  rtx high = gen_reg_rtx (DImode);
  emit_insn (gen_smuldi3_highpart (high, operands[1], operands[2]));

  emit_move_insn (gen_lowpart (DImode, operands[0]), low);
  emit_move_insn (gen_highpart (DImode, operands[0]), high);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (TImode,
	gen_rtx_SIGN_EXTEND (TImode,
	operand1),
	gen_rtx_SIGN_EXTEND (TImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3828 */
rtx
gen_umulditi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3833 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx low = gen_reg_rtx (DImode);
  emit_insn (gen_muldi3 (low, operands[1], operands[2]));

  rtx high = gen_reg_rtx (DImode);
  emit_insn (gen_umuldi3_highpart (high, operands[1], operands[2]));

  emit_move_insn (gen_lowpart (DImode, operands[0]), low);
  emit_move_insn (gen_highpart (DImode, operands[0]), high);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (TImode,
	gen_rtx_ZERO_EXTEND (TImode,
	operand1),
	gen_rtx_ZERO_EXTEND (TImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3847 */
rtx
gen_multi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3852 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx l0 = gen_reg_rtx (DImode);
  rtx l1 = gen_lowpart (DImode, operands[1]);
  rtx l2 = gen_lowpart (DImode, operands[2]);
  rtx h0 = gen_reg_rtx (DImode);
  rtx h1 = gen_highpart (DImode, operands[1]);
  rtx h2 = gen_highpart (DImode, operands[2]);

  emit_insn (gen_muldi3 (l0, l1, l2));
  emit_insn (gen_umuldi3_highpart (h0, l1, l2));
  emit_insn (gen_madddi (h0, h1, l2, h0));
  emit_insn (gen_madddi (h0, l1, h2, h0));

  emit_move_insn (gen_lowpart (DImode, operands[0]), l0);
  emit_move_insn (gen_highpart (DImode, operands[0]), h0);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (TImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3978 */
rtx
gen_cstoresi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3984 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3978 */
rtx
gen_cstoredi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3984 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:3991 */
rtx
gen_cstorecc4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3997 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  emit_insn (gen_rtx_SET (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4003 */
rtx
gen_cstoresf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4009 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4003 */
rtx
gen_cstoredf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4009 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), SImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4035 */
extern rtx_insn *gen_split_21 (rtx_insn *, rtx *);
rtx_insn *
gen_split_21 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_21 (aarch64.md:4035)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[2]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[2]) & 0xfff000;
    rtx tmp = gen_reg_rtx (SImode);
    emit_insn (gen_addsi3 (tmp, operands[1], GEN_INT (-hi_imm)));
    emit_insn (gen_addsi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (EQ, SImode, cc_reg, const0_rtx);
    emit_insn (gen_aarch64_cstoresi (operands[0], cmp_rtx, cc_reg));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4035 */
extern rtx_insn *gen_split_22 (rtx_insn *, rtx *);
rtx_insn *
gen_split_22 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_22 (aarch64.md:4035)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[2]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[2]) & 0xfff000;
    rtx tmp = gen_reg_rtx (SImode);
    emit_insn (gen_addsi3 (tmp, operands[1], GEN_INT (-hi_imm)));
    emit_insn (gen_addsi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (NE, SImode, cc_reg, const0_rtx);
    emit_insn (gen_aarch64_cstoresi (operands[0], cmp_rtx, cc_reg));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4035 */
extern rtx_insn *gen_split_23 (rtx_insn *, rtx *);
rtx_insn *
gen_split_23 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_23 (aarch64.md:4035)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[2]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[2]) & 0xfff000;
    rtx tmp = gen_reg_rtx (DImode);
    emit_insn (gen_adddi3 (tmp, operands[1], GEN_INT (-hi_imm)));
    emit_insn (gen_adddi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (EQ, DImode, cc_reg, const0_rtx);
    emit_insn (gen_aarch64_cstoredi (operands[0], cmp_rtx, cc_reg));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4035 */
extern rtx_insn *gen_split_24 (rtx_insn *, rtx *);
rtx_insn *
gen_split_24 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_24 (aarch64.md:4035)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    HOST_WIDE_INT lo_imm = UINTVAL (operands[2]) & 0xfff;
    HOST_WIDE_INT hi_imm = UINTVAL (operands[2]) & 0xfff000;
    rtx tmp = gen_reg_rtx (DImode);
    emit_insn (gen_adddi3 (tmp, operands[1], GEN_INT (-hi_imm)));
    emit_insn (gen_adddi3_compare0 (tmp, tmp, GEN_INT (-lo_imm)));
    rtx cc_reg = gen_rtx_REG (CC_NZmode, CC_REGNUM);
    rtx cmp_rtx = gen_rtx_fmt_ee (NE, DImode, cc_reg, const0_rtx);
    emit_insn (gen_aarch64_cstoredi (operands[0], cmp_rtx, cc_reg));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4091 */
rtx
gen_cmovsi6 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3),
	operand4,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4091 */
rtx
gen_cmovdi6 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3),
	operand4,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4107 */
rtx
gen_cmovsf6 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3),
	operand4,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4107 */
rtx
gen_cmovdf6 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4116 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  operands[2] = aarch64_gen_compare_reg (GET_CODE (operands[1]), operands[2],
				      operands[3]);
  operands[3] = const0_rtx;
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3),
	operand4,
	operand5)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4191 */
rtx
gen_movqicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				     XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (QImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4191 */
rtx
gen_movhicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				     XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (HImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4191 */
rtx
gen_movsicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				     XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4191 */
rtx
gen_movdicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				     XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4210 */
rtx
gen_movsfsicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4216 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				  XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4210 */
rtx
gen_movdfsicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4216 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				  XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4210 */
rtx
gen_movsfdicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4216 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				  XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4210 */
rtx
gen_movdfdicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4216 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				  XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4229 */
rtx
gen_movsfcc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4235 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				  XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SFmode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4229 */
rtx
gen_movdfcc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4235 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				  XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DFmode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4248 */
rtx
gen_negsicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4254 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				      XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	gen_rtx_NEG (SImode,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4248 */
rtx
gen_notsicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4254 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				      XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand1,
	gen_rtx_NOT (SImode,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4248 */
rtx
gen_negdicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4254 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				      XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand1,
	gen_rtx_NEG (DImode,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4248 */
rtx
gen_notdicc (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4254 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg;
    enum rtx_code code = GET_CODE (operands[1]);

    if (code == UNEQ || code == LTGT)
      FAIL;

    ccreg = aarch64_gen_compare_reg (code, XEXP (operands[1], 0),
				      XEXP (operands[1], 1));
    operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand1,
	gen_rtx_NOT (DImode,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4402 */
rtx
gen_umaxsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4407 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (aarch64_sve_cnt_immediate (operands[1], SImode))
      std::swap (operands[1], operands[2]);
    else if (!aarch64_sve_cnt_immediate (operands[2], SImode))
      FAIL;
    rtx temp = gen_reg_rtx (SImode);
    operands[1] = force_reg (SImode, operands[1]);
    emit_insn (gen_aarch64_uqdecsi (temp, operands[1], operands[2]));
    emit_insn (gen_addsi3 (operands[0], temp, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4402 */
rtx
gen_umaxdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4407 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (aarch64_sve_cnt_immediate (operands[1], DImode))
      std::swap (operands[1], operands[2]);
    else if (!aarch64_sve_cnt_immediate (operands[2], DImode))
      FAIL;
    rtx temp = gen_reg_rtx (DImode);
    operands[1] = force_reg (DImode, operands[1]);
    emit_insn (gen_aarch64_uqdecdi (temp, operands[1], operands[2]));
    emit_insn (gen_adddi3 (operands[0], temp, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_25 (rtx_insn *, rtx *);
rtx_insn *
gen_split_25 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_25 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (SMAX, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_26 (rtx_insn *, rtx *);
rtx_insn *
gen_split_26 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_26 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (SMIN, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_27 (rtx_insn *, rtx *);
rtx_insn *
gen_split_27 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_27 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (UMAX, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_28 (rtx_insn *, rtx *);
rtx_insn *
gen_split_28 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_28 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (UMIN, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (SImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (SImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_29 (rtx_insn *, rtx *);
rtx_insn *
gen_split_29 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_29 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (SMAX, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_30 (rtx_insn *, rtx *);
rtx_insn *
gen_split_30 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_30 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (SMIN, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_31 (rtx_insn *, rtx *);
rtx_insn *
gen_split_31 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_31 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (UMAX, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4435 */
extern rtx_insn *gen_split_32 (rtx_insn *, rtx *);
rtx_insn *
gen_split_32 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_32 (aarch64.md:4435)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4453 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!aarch64_maxmin_plus_const (UMIN, operands, true))
      gcc_unreachable ();
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CCmode,
	66),
	gen_rtx_COMPARE (CCmode,
	operand1,
	operand4)),
		gen_rtx_SET (operand6,
	gen_rtx_PLUS (DImode,
	copy_rtx (operand1),
	operand3)))), true);
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	operand5,
	copy_rtx (operand6),
	operand7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4465 */
extern rtx_insn *gen_split_33 (rtx_insn *, rtx *);
rtx_insn *
gen_split_33 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_33 (aarch64.md:4465)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4473 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
     HOST_WIDE_INT val = INTVAL (operands[2]);
     rtx imm1 = GEN_INT (aarch64_and_split_imm1 (val));
     rtx imm2 = GEN_INT (aarch64_and_split_imm2 (val));

     emit_insn (gen_andsi3 (operands[0], operands[1], imm1));
     emit_insn (gen_andsi3 (operands[0], operands[0], imm2));
     DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4465 */
extern rtx_insn *gen_split_34 (rtx_insn *, rtx *);
rtx_insn *
gen_split_34 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_34 (aarch64.md:4465)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4473 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
     HOST_WIDE_INT val = INTVAL (operands[2]);
     rtx imm1 = GEN_INT (aarch64_and_split_imm1 (val));
     rtx imm2 = GEN_INT (aarch64_and_split_imm2 (val));

     emit_insn (gen_anddi3 (operands[0], operands[1], imm1));
     emit_insn (gen_anddi3 (operands[0], operands[0], imm2));
     DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_35 (rtx_insn *, rtx *);
rtx_insn *
gen_split_35 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_35 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (AND == PLUS ? IOR : AND);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (SImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_36 (rtx_insn *, rtx *);
rtx_insn *
gen_split_36 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_36 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (IOR == PLUS ? IOR : IOR);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (SImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_37 (rtx_insn *, rtx *);
rtx_insn *
gen_split_37 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_37 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (XOR == PLUS ? IOR : XOR);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (SImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_38 (rtx_insn *, rtx *);
rtx_insn *
gen_split_38 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_38 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (PLUS == PLUS ? IOR : PLUS);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (SImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_39 (rtx_insn *, rtx *);
rtx_insn *
gen_split_39 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_39 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (AND == PLUS ? IOR : AND);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (DImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_40 (rtx_insn *, rtx *);
rtx_insn *
gen_split_40 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_40 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (IOR == PLUS ? IOR : IOR);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (DImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_41 (rtx_insn *, rtx *);
rtx_insn *
gen_split_41 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_41 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (XOR == PLUS ? IOR : XOR);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (DImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4584 */
extern rtx_insn *gen_split_42 (rtx_insn *, rtx *);
rtx_insn *
gen_split_42 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_42 (aarch64.md:4584)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (PLUS == PLUS ? IOR : PLUS);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_ZERO_EXTEND (DImode,
	operand4)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_43 (rtx_insn *, rtx *);
rtx_insn *
gen_split_43 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_43 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (AND == PLUS ? IOR : AND);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (SImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_44 (rtx_insn *, rtx *);
rtx_insn *
gen_split_44 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_44 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (IOR == PLUS ? IOR : IOR);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (SImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_45 (rtx_insn *, rtx *);
rtx_insn *
gen_split_45 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_45 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (XOR == PLUS ? IOR : XOR);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (SImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_46 (rtx_insn *, rtx *);
rtx_insn *
gen_split_46 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_46 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (SImode);
    rtx shift = gen_rtx_ASHIFT (SImode, operands[5], operands[2]);
    rtx_code new_code = (PLUS == PLUS ? IOR : PLUS);
    operands[6] = gen_rtx_fmt_ee (new_code, SImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (SImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_47 (rtx_insn *, rtx *);
rtx_insn *
gen_split_47 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_47 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (AND == PLUS ? IOR : AND);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (DImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_48 (rtx_insn *, rtx *);
rtx_insn *
gen_split_48 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_48 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (IOR == PLUS ? IOR : IOR);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (DImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_49 (rtx_insn *, rtx *);
rtx_insn *
gen_split_49 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_49 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (XOR == PLUS ? IOR : XOR);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (DImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4613 */
extern rtx_insn *gen_split_50 (rtx_insn *, rtx *);
rtx_insn *
gen_split_50 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_50 (aarch64.md:4613)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4629 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[5] = gen_reg_rtx (DImode);
    rtx shift = gen_rtx_ASHIFT (DImode, operands[5], operands[2]);
    rtx_code new_code = (PLUS == PLUS ? IOR : PLUS);
    operands[6] = gen_rtx_fmt_ee (new_code, DImode, shift, operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_AND (DImode,
	operand1,
	operand3)));
  emit_insn (gen_rtx_SET (operand0,
	operand6));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4637 */
extern rtx_insn *gen_split_51 (rtx_insn *, rtx *);
rtx_insn *
gen_split_51 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_51 (aarch64.md:4637)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
operands[3] = gen_reg_rtx (SImode);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (SImode,
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand3),
	operand2),
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4637 */
extern rtx_insn *gen_split_52 (rtx_insn *, rtx *);
rtx_insn *
gen_split_52 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_52 (aarch64.md:4637)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
operands[3] = gen_reg_rtx (SImode);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (SImode,
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand3),
	operand2),
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4637 */
extern rtx_insn *gen_split_53 (rtx_insn *, rtx *);
rtx_insn *
gen_split_53 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_53 (aarch64.md:4637)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
operands[3] = gen_reg_rtx (SImode);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_SIGN_EXTEND (SImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	gen_rtx_ASHIFT (SImode,
	copy_rtx (operand3),
	operand2),
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4637 */
extern rtx_insn *gen_split_54 (rtx_insn *, rtx *);
rtx_insn *
gen_split_54 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_54 (aarch64.md:4637)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
operands[3] = gen_reg_rtx (DImode);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (DImode,
	gen_rtx_ASHIFT (DImode,
	copy_rtx (operand3),
	operand2),
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4637 */
extern rtx_insn *gen_split_55 (rtx_insn *, rtx *);
rtx_insn *
gen_split_55 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_55 (aarch64.md:4637)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
operands[3] = gen_reg_rtx (DImode);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (DImode,
	gen_rtx_ASHIFT (DImode,
	copy_rtx (operand3),
	operand2),
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4637 */
extern rtx_insn *gen_split_56 (rtx_insn *, rtx *);
rtx_insn *
gen_split_56 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_56 (aarch64.md:4637)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
operands[3] = gen_reg_rtx (DImode);
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	gen_rtx_ASHIFT (DImode,
	copy_rtx (operand3),
	operand2),
	copy_rtx (operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4751 */
extern rtx_insn *gen_split_57 (rtx_insn *, rtx *);
rtx_insn *
gen_split_57 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_57 (aarch64.md:4751)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4764 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (SImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_NOT (SImode,
	copy_rtx (operand0))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4751 */
extern rtx_insn *gen_split_58 (rtx_insn *, rtx *);
rtx_insn *
gen_split_58 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_58 (aarch64.md:4751)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4764 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (DImode,
	operand1,
	operand2)));
  emit_insn (gen_rtx_SET (copy_rtx (operand0),
	gen_rtx_NOT (DImode,
	copy_rtx (operand0))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4907 */
rtx
gen_ffssi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"ffssi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg = aarch64_gen_compare_reg (EQ, operands[1], const0_rtx);
    rtx x = gen_rtx_NE (VOIDmode, ccreg, const0_rtx);

    emit_insn (gen_aarch64_rbit (SImode, operands[0], operands[1]));
    emit_insn (gen_clzsi2 (operands[0], operands[0]));
    emit_insn (gen_csinc3si_insn (operands[0], x, operands[0], const0_rtx));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4907 */
rtx
gen_ffsdi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"ffsdi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx ccreg = aarch64_gen_compare_reg (EQ, operands[1], const0_rtx);
    rtx x = gen_rtx_NE (VOIDmode, ccreg, const0_rtx);

    emit_insn (gen_aarch64_rbit (DImode, operands[0], operands[1]));
    emit_insn (gen_clzdi2 (operands[0], operands[0]));
    emit_insn (gen_csinc3di_insn (operands[0], x, operands[0], const0_rtx));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4929 */
rtx
gen_popcountsi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountsi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx v = gen_reg_rtx (V8QImode);
  rtx v1 = gen_reg_rtx (V8QImode);
  rtx in = operands[1];
  rtx out = operands[0];
  if(SImode == SImode)
    {
      rtx tmp;
      tmp = gen_reg_rtx (DImode);
      /* If we have SImode, zero extend to DImode, pop count does
         not change if we have extra zeros. */
      emit_insn (gen_zero_extendsidi2 (tmp, in));
      in = tmp;
    }
  emit_move_insn (v, gen_lowpart (V8QImode, in));
  emit_insn (gen_popcountv8qi2 (v1, v));
  emit_insn (gen_aarch64_zero_extendsi_reduc_plus_v8qi (out, v1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4929 */
rtx
gen_popcountdi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountdi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx v = gen_reg_rtx (V8QImode);
  rtx v1 = gen_reg_rtx (V8QImode);
  rtx in = operands[1];
  rtx out = operands[0];
  if(DImode == SImode)
    {
      rtx tmp;
      tmp = gen_reg_rtx (DImode);
      /* If we have SImode, zero extend to DImode, pop count does
         not change if we have extra zeros. */
      emit_insn (gen_zero_extendsidi2 (tmp, in));
      in = tmp;
    }
  emit_move_insn (v, gen_lowpart (V8QImode, in));
  emit_insn (gen_popcountv8qi2 (v1, v));
  emit_insn (gen_aarch64_zero_extenddi_reduc_plus_v8qi (out, v1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4974 */
extern rtx_insn *gen_split_59 (rtx_insn *, rtx *);
rtx_insn *
gen_split_59 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_59 (aarch64.md:4974)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  emit_insn (gen_aarch64_rbit (SImode, operands[0], operands[1]));
  emit_insn (gen_clzsi2 (operands[0], operands[0]));
  DONE;

#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:4974 */
extern rtx_insn *gen_split_60 (rtx_insn *, rtx *);
rtx_insn *
gen_split_60 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_60 (aarch64.md:4974)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  emit_insn (gen_aarch64_rbit (DImode, operands[0], operands[1]));
  emit_insn (gen_clzdi2 (operands[0], operands[0]));
  DONE;

#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5022 */
extern rtx_insn *gen_split_61 (rtx_insn *, rtx *);
rtx_insn *
gen_split_61 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_61 (aarch64.md:5022)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	operand0,
	copy_rtx (operand2)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5022 */
extern rtx_insn *gen_split_62 (rtx_insn *, rtx *);
rtx_insn *
gen_split_62 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_62 (aarch64.md:5022)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand2,
	operand1));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (DImode,
	operand0,
	copy_rtx (operand2)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_63 (rtx_insn *, rtx *);
rtx_insn *
gen_split_63 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_63 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	gen_rtx_ASHIFT (SImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_64 (rtx_insn *, rtx *);
rtx_insn *
gen_split_64 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_64 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	gen_rtx_ASHIFTRT (SImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_65 (rtx_insn *, rtx *);
rtx_insn *
gen_split_65 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_65 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	gen_rtx_LSHIFTRT (SImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_66 (rtx_insn *, rtx *);
rtx_insn *
gen_split_66 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_66 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (SImode,
	gen_rtx_ROTATERT (SImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_67 (rtx_insn *, rtx *);
rtx_insn *
gen_split_67 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_67 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (DImode,
	gen_rtx_ASHIFT (DImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_68 (rtx_insn *, rtx *);
rtx_insn *
gen_split_68 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_68 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (DImode,
	gen_rtx_ASHIFTRT (DImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_69 (rtx_insn *, rtx *);
rtx_insn *
gen_split_69 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_69 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (DImode,
	gen_rtx_LSHIFTRT (DImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5073 */
extern rtx_insn *gen_split_70 (rtx_insn *, rtx *);
rtx_insn *
gen_split_70 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_70 (aarch64.md:5073)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	operand2));
  emit_insn (gen_rtx_SET (gen_rtx_REG (CC_NZmode,
	66),
	gen_rtx_COMPARE (CC_NZmode,
	gen_rtx_AND (DImode,
	gen_rtx_ROTATERT (DImode,
	operand0,
	operand1),
	copy_rtx (operand3)),
	const0_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5097 */
rtx
gen_ashlsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (SImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movsi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5097 */
rtx
gen_ashrsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (SImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movsi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5097 */
rtx
gen_lshrsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (SImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movsi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5097 */
rtx
gen_ashldi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (DImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movdi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5097 */
rtx
gen_ashrdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (DImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movdi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5097 */
rtx
gen_lshrdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (DImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movdi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5117 */
rtx
gen_ashlqi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5122 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[2] = GEN_INT (INTVAL (operands[2]) & GET_MODE_MASK (QImode));

    if (operands[2] == const0_rtx)
      {
	emit_insn (gen_movqi (operands[0], operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5117 */
rtx
gen_ashlhi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5122 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[2] = GEN_INT (INTVAL (operands[2]) & GET_MODE_MASK (HImode));

    if (operands[2] == const0_rtx)
      {
	emit_insn (gen_movhi (operands[0], operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5133 */
rtx
gen_rotrsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5138 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (SImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movsi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5133 */
rtx
gen_rotrdi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5138 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT (INTVAL (operands[2])
                               & (GET_MODE_BITSIZE (DImode) - 1));

        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movdi (operands[0], operands[1]));
	    DONE;
          }
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5153 */
rtx
gen_rotlsi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    /* (SZ - cnt) % SZ == -cnt % SZ */
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT ((-UINTVAL (operands[2]))
			       & (GET_MODE_BITSIZE (SImode) - 1));
        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movsi (operands[0], operands[1]));
	    DONE;
          }
      }
    else
      operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					NULL_RTX, 1);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5153 */
rtx
gen_rotldi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    /* (SZ - cnt) % SZ == -cnt % SZ */
    if (CONST_INT_P (operands[2]))
      {
        operands[2] = GEN_INT ((-UINTVAL (operands[2]))
			       & (GET_MODE_BITSIZE (DImode) - 1));
        if (operands[2] == const0_rtx)
          {
	    emit_insn (gen_movdi (operands[0], operands[1]));
	    DONE;
          }
      }
    else
      operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					NULL_RTX, 1);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ROTATERT (DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_71 (rtx_insn *, rtx *);
rtx_insn *
gen_split_71 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_71 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], SImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_ashlsi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_72 (rtx_insn *, rtx *);
rtx_insn *
gen_split_72 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_72 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], SImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_ashrsi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_73 (rtx_insn *, rtx *);
rtx_insn *
gen_split_73 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_73 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], SImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_lshrsi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_74 (rtx_insn *, rtx *);
rtx_insn *
gen_split_74 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_74 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], SImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_rotrsi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_75 (rtx_insn *, rtx *);
rtx_insn *
gen_split_75 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_75 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], DImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_ashldi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_76 (rtx_insn *, rtx *);
rtx_insn *
gen_split_76 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_76 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], DImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_ashrdi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_77 (rtx_insn *, rtx *);
rtx_insn *
gen_split_77 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_77 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], DImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_lshrdi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5196 */
extern rtx_insn *gen_split_78 (rtx_insn *, rtx *);
rtx_insn *
gen_split_78 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_78 (aarch64.md:5196)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : lowpart_subreg (SImode, operands[0], DImode));
    emit_insn (gen_negsi2 (tmp, operands[2]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[3]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[4]), and_op,
				     SUBREG_BYTE (operands[4]));
    emit_insn (gen_rotrdi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5220 */
extern rtx_insn *gen_split_79 (rtx_insn *, rtx *);
rtx_insn *
gen_split_79 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_79 (aarch64.md:5220)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5233 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : operands[0]);

    emit_insn (gen_negsi2 (tmp, operands[3]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[4]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[5]), and_op,
				     SUBREG_BYTE (operands[5]));

    emit_insn (gen_ashlsi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5220 */
extern rtx_insn *gen_split_80 (rtx_insn *, rtx *);
rtx_insn *
gen_split_80 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_80 (aarch64.md:5220)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5233 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : operands[0]);

    emit_insn (gen_negsi2 (tmp, operands[3]));

    rtx and_op = gen_rtx_AND (SImode, tmp, operands[4]);
    rtx subreg_tmp = gen_rtx_SUBREG (GET_MODE (operands[5]), and_op,
				     SUBREG_BYTE (operands[5]));

    emit_insn (gen_ashldi3 (operands[0], operands[1], subreg_tmp));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5267 */
extern rtx_insn *gen_split_81 (rtx_insn *, rtx *);
rtx_insn *
gen_split_81 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_81 (aarch64.md:5267)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx subreg_tmp = gen_lowpart (SImode, operands[3]);

    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : gen_lowpart (SImode, operands[0]));

    emit_insn (gen_negsi2 (tmp, subreg_tmp));

    rtx and_op = gen_rtx_AND (SImode, tmp,
			      GEN_INT (GET_MODE_BITSIZE (SImode) - 1));

    rtx subreg_tmp2 = gen_lowpart_SUBREG (QImode, and_op);

    emit_insn (gen_ashlsi3 (operands[0], operands[1], subreg_tmp2));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5267 */
extern rtx_insn *gen_split_82 (rtx_insn *, rtx *);
rtx_insn *
gen_split_82 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_82 (aarch64.md:5267)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx subreg_tmp = gen_lowpart (SImode, operands[3]);

    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : gen_lowpart (SImode, operands[0]));

    emit_insn (gen_negsi2 (tmp, subreg_tmp));

    rtx and_op = gen_rtx_AND (SImode, tmp,
			      GEN_INT (GET_MODE_BITSIZE (SImode) - 1));

    rtx subreg_tmp2 = gen_lowpart_SUBREG (QImode, and_op);

    emit_insn (gen_ashrsi3 (operands[0], operands[1], subreg_tmp2));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5267 */
extern rtx_insn *gen_split_83 (rtx_insn *, rtx *);
rtx_insn *
gen_split_83 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_83 (aarch64.md:5267)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx subreg_tmp = gen_lowpart (SImode, operands[3]);

    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : gen_lowpart (SImode, operands[0]));

    emit_insn (gen_negsi2 (tmp, subreg_tmp));

    rtx and_op = gen_rtx_AND (SImode, tmp,
			      GEN_INT (GET_MODE_BITSIZE (SImode) - 1));

    rtx subreg_tmp2 = gen_lowpart_SUBREG (QImode, and_op);

    emit_insn (gen_lshrsi3 (operands[0], operands[1], subreg_tmp2));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5267 */
extern rtx_insn *gen_split_84 (rtx_insn *, rtx *);
rtx_insn *
gen_split_84 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_84 (aarch64.md:5267)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx subreg_tmp = gen_lowpart (SImode, operands[3]);

    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : gen_lowpart (SImode, operands[0]));

    emit_insn (gen_negsi2 (tmp, subreg_tmp));

    rtx and_op = gen_rtx_AND (SImode, tmp,
			      GEN_INT (GET_MODE_BITSIZE (DImode) - 1));

    rtx subreg_tmp2 = gen_lowpart_SUBREG (QImode, and_op);

    emit_insn (gen_ashldi3 (operands[0], operands[1], subreg_tmp2));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5267 */
extern rtx_insn *gen_split_85 (rtx_insn *, rtx *);
rtx_insn *
gen_split_85 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_85 (aarch64.md:5267)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx subreg_tmp = gen_lowpart (SImode, operands[3]);

    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : gen_lowpart (SImode, operands[0]));

    emit_insn (gen_negsi2 (tmp, subreg_tmp));

    rtx and_op = gen_rtx_AND (SImode, tmp,
			      GEN_INT (GET_MODE_BITSIZE (DImode) - 1));

    rtx subreg_tmp2 = gen_lowpart_SUBREG (QImode, and_op);

    emit_insn (gen_ashrdi3 (operands[0], operands[1], subreg_tmp2));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5267 */
extern rtx_insn *gen_split_86 (rtx_insn *, rtx *);
rtx_insn *
gen_split_86 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_86 (aarch64.md:5267)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx subreg_tmp = gen_lowpart (SImode, operands[3]);

    rtx tmp = (can_create_pseudo_p () ? gen_reg_rtx (SImode)
	       : gen_lowpart (SImode, operands[0]));

    emit_insn (gen_negsi2 (tmp, subreg_tmp));

    rtx and_op = gen_rtx_AND (SImode, tmp,
			      GEN_INT (GET_MODE_BITSIZE (DImode) - 1));

    rtx subreg_tmp2 = gen_lowpart_SUBREG (QImode, and_op);

    emit_insn (gen_lshrdi3 (operands[0], operands[1], subreg_tmp2));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5330 */
extern rtx_insn *gen_split_87 (rtx_insn *, rtx *);
rtx_insn *
gen_split_87 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_87 (aarch64.md:5330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[3] = gen_lowpart (QImode, operands[0]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand2),
	74)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		copy_rtx (operand3)),
	76)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5345 */
extern rtx_insn *gen_split_88 (rtx_insn *, rtx *);
rtx_insn *
gen_split_88 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_88 (aarch64.md:5345)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5355 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[3] = gen_lowpart (QImode, operands[0]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand2),
	74)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		copy_rtx (operand3)),
	97)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5378 */
extern rtx_insn *gen_split_89 (rtx_insn *, rtx *);
rtx_insn *
gen_split_89 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_89 (aarch64.md:5378)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5388 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  operands[3] = gen_lowpart (QImode, operands[0]);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand2),
	74)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand1,
		copy_rtx (operand3)),
	75)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5393 */
extern rtx_insn *gen_split_90 (rtx_insn *, rtx *);
rtx_insn *
gen_split_90 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_90 (aarch64.md:5393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5403 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  operands[3] = gen_lowpart (QImode, operands[0]);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand3,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (1,
		operand2),
	74)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand1,
		copy_rtx (operand3)),
	77)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5634 */
rtx
gen_extv (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5641 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!IN_RANGE (INTVAL (operands[2]) + INTVAL (operands[3]),
		   1, GET_MODE_BITSIZE (DImode) - 1))
     FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTRACT (DImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5634 */
rtx
gen_extzv (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5641 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (!IN_RANGE (INTVAL (operands[2]) + INTVAL (operands[3]),
		   1, GET_MODE_BITSIZE (DImode) - 1))
     FAIL;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTRACT (DImode,
	operand1,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5664 */
extern rtx_insn *gen_split_91 (rtx_insn *, rtx *);
rtx_insn *
gen_split_91 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_91 (aarch64.md:5664)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5677 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[4] = gen_lowpart (SImode, operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_LSHIFTRT (SImode,
	operand4,
	operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5683 */
rtx
gen_insvsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5689 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  unsigned HOST_WIDE_INT width = UINTVAL (operands[1]);
  unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]);
  rtx value = operands[3];

  if (width == 0 || (pos + width) > GET_MODE_BITSIZE (SImode))
    FAIL;

  if (CONST_INT_P (value))
    {
      unsigned HOST_WIDE_INT mask = ((unsigned HOST_WIDE_INT)1 << width) - 1;

      /* Prefer AND/OR for inserting all zeros or all ones.  */
      if ((UINTVAL (value) & mask) == 0
	   || (UINTVAL (value) & mask) == mask)
	FAIL;

      /* 16-bit aligned 16-bit wide insert is handled by insv_imm.  */
      if (width == 16 && (pos % 16) == 0)
	DONE;
    }
  operands[3] = force_reg (SImode, value);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (gen_rtx_ZERO_EXTRACT (SImode,
	operand0,
	operand1,
	operand2),
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5683 */
rtx
gen_insvdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5689 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  unsigned HOST_WIDE_INT width = UINTVAL (operands[1]);
  unsigned HOST_WIDE_INT pos = UINTVAL (operands[2]);
  rtx value = operands[3];

  if (width == 0 || (pos + width) > GET_MODE_BITSIZE (DImode))
    FAIL;

  if (CONST_INT_P (value))
    {
      unsigned HOST_WIDE_INT mask = ((unsigned HOST_WIDE_INT)1 << width) - 1;

      /* Prefer AND/OR for inserting all zeros or all ones.  */
      if ((UINTVAL (value) & mask) == 0
	   || (UINTVAL (value) & mask) == mask)
	FAIL;

      /* 16-bit aligned 16-bit wide insert is handled by insv_imm.  */
      if (width == 16 && (pos % 16) == 0)
	DONE;
    }
  operands[3] = force_reg (DImode, value);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (gen_rtx_ZERO_EXTRACT (DImode,
	operand0,
	operand1,
	operand2),
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:5941 */
extern rtx_insn *gen_split_92 (rtx_insn *, rtx *);
rtx_insn *
gen_split_92 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_92 (aarch64.md:5941)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5951 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    operands[4] = gen_lowpart (SImode, operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_ASHIFT (SImode,
	operand4,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6124 */
rtx
gen_fmahf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (HFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6124 */
rtx
gen_fmasf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (SFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6124 */
rtx
gen_fmadf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (DFmode,
	operand1,
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6142 */
rtx
gen_fnmahf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (HFmode,
	gen_rtx_NEG (HFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6142 */
rtx
gen_fnmasf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (SFmode,
	gen_rtx_NEG (SFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6142 */
rtx
gen_fnmadf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (DFmode,
	gen_rtx_NEG (DFmode,
	operand1),
	operand2,
	operand3));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6163 */
rtx
gen_fmssf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (SFmode,
	operand1,
	operand2,
	gen_rtx_NEG (SFmode,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6163 */
rtx
gen_fmsdf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (DFmode,
	operand1,
	operand2,
	gen_rtx_NEG (DFmode,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6181 */
rtx
gen_fnmssf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (SFmode,
	gen_rtx_NEG (SFmode,
	operand1),
	operand2,
	gen_rtx_NEG (SFmode,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6181 */
rtx
gen_fnmsdf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_FMA (DFmode,
	gen_rtx_NEG (DFmode,
	operand1),
	operand2,
	gen_rtx_NEG (DFmode,
	operand3)));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6380 */
rtx
gen_floatsihf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6384 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (TARGET_FP_F16INST)
    emit_insn (gen_aarch64_fp16_floatsihf2 (operands[0], operands[1]));
  else
    {
      rtx convert_target = gen_reg_rtx (DFmode);
      emit_insn (gen_floatsidf2 (convert_target, operands[1]));
      emit_insn (gen_truncdfhf2 (operands[0], convert_target));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6380 */
rtx
gen_floatunssihf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6384 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (TARGET_FP_F16INST)
    emit_insn (gen_aarch64_fp16_floatunssihf2 (operands[0], operands[1]));
  else
    {
      rtx convert_target = gen_reg_rtx (DFmode);
      emit_insn (gen_floatunssidf2 (convert_target, operands[1]));
      emit_insn (gen_truncdfhf2 (operands[0], convert_target));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6409 */
rtx
gen_floatdihf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (TARGET_FP_F16INST)
    emit_insn (gen_aarch64_fp16_floatdihf2 (operands[0], operands[1]));
  else
    {
      rtx sat_target = gen_reg_rtx (SImode);
      emit_insn (gen_aarch64_sqmovndi (sat_target, operands[1]));
      emit_insn (gen_floatsihf2 (operands[0], sat_target));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FLOAT (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6409 */
rtx
gen_floatunsdihf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (TARGET_FP_F16INST)
    emit_insn (gen_aarch64_fp16_floatunsdihf2 (operands[0], operands[1]));
  else
    {
      rtx sat_target = gen_reg_rtx (SImode);
      emit_insn (gen_aarch64_uqmovndi (sat_target, operands[1]));
      emit_insn (gen_floatunssihf2 (operands[0], sat_target));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FLOAT (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6549 */
rtx
gen_divhf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6554 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (HFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6549 */
rtx
gen_divsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6554 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (SFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6549 */
rtx
gen_divdf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6554 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (DFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (DFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6578 */
rtx
gen_sqrthf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrthf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6578 */
rtx
gen_sqrtsf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtsf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (SFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6578 */
rtx
gen_sqrtdf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtdf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (DFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6638 */
rtx
gen_lrintsfsi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6644 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx cvt = gen_reg_rtx (SFmode);
  emit_insn (gen_rintsf2 (cvt, operands[1]));
  emit_insn (gen_lbtruncsfsi2 (operands[0], cvt));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6638 */
rtx
gen_lrintdfsi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6644 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx cvt = gen_reg_rtx (DFmode);
  emit_insn (gen_rintdf2 (cvt, operands[1]));
  emit_insn (gen_lbtruncdfsi2 (operands[0], cvt));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6638 */
rtx
gen_lrintsfdi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6644 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx cvt = gen_reg_rtx (SFmode);
  emit_insn (gen_rintsf2 (cvt, operands[1]));
  emit_insn (gen_lbtruncsfdi2 (operands[0], cvt));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6638 */
rtx
gen_lrintdfdi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6644 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx cvt = gen_reg_rtx (DFmode);
  emit_insn (gen_rintdf2 (cvt, operands[1]));
  emit_insn (gen_lbtruncdfdi2 (operands[0], cvt));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6667 */
rtx
gen_copysignsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignsf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6672 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx bitmask = gen_reg_rtx (SImode);
  emit_move_insn (bitmask, GEN_INT (HOST_WIDE_INT_M1U
				    << (GET_MODE_BITSIZE (SFmode) - 1)));
  emit_insn (gen_copysignsf3_insn (operands[0], operands[1], operands[2],
				       bitmask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6667 */
rtx
gen_copysigndf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysigndf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6672 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx bitmask = gen_reg_rtx (DImode);
  emit_move_insn (bitmask, GEN_INT (HOST_WIDE_INT_M1U
				    << (GET_MODE_BITSIZE (DFmode) - 1)));
  emit_insn (gen_copysigndf3_insn (operands[0], operands[1], operands[2],
				       bitmask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6705 */
rtx
gen_xorsignsf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignsf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6710 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{

  machine_mode imode = SImode;
  rtx mask = gen_reg_rtx (imode);
  rtx op1x = gen_reg_rtx (imode);
  rtx op2x = gen_reg_rtx (imode);

  int bits = GET_MODE_BITSIZE (SFmode) - 1;
  emit_move_insn (mask, GEN_INT (trunc_int_for_mode (HOST_WIDE_INT_M1U << bits,
						     imode)));

  emit_insn (gen_andsi3 (op2x, mask,
				    lowpart_subreg (imode, operands[2],
						    SFmode)));
  emit_insn (gen_xorsi3 (op1x,
				    lowpart_subreg (imode, operands[1],
						    SFmode),
				    op2x));
  emit_move_insn (operands[0],
		  lowpart_subreg (SFmode, op1x, imode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6705 */
rtx
gen_xorsigndf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsigndf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6710 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{

  machine_mode imode = DImode;
  rtx mask = gen_reg_rtx (imode);
  rtx op1x = gen_reg_rtx (imode);
  rtx op2x = gen_reg_rtx (imode);

  int bits = GET_MODE_BITSIZE (DFmode) - 1;
  emit_move_insn (mask, GEN_INT (trunc_int_for_mode (HOST_WIDE_INT_M1U << bits,
						     imode)));

  emit_insn (gen_anddi3 (op2x, mask,
				    lowpart_subreg (imode, operands[2],
						    DFmode)));
  emit_insn (gen_xordi3 (op1x,
				    lowpart_subreg (imode, operands[1],
						    DFmode),
				    op2x));
  emit_move_insn (operands[0],
		  lowpart_subreg (DFmode, op1x, imode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6740 */
rtx
gen_aarch64_reload_movcpsfsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6745 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (SFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (SFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6740 */
rtx
gen_aarch64_reload_movcpdfsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6745 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (DFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (DFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6740 */
rtx
gen_aarch64_reload_movcptfsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6745 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (TFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (TFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6740 */
rtx
gen_aarch64_reload_movcpsfdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6745 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (SFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (SFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6740 */
rtx
gen_aarch64_reload_movcpdfdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6745 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (DFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (DFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6740 */
rtx
gen_aarch64_reload_movcptfdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6745 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (TFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (TFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv8qisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V8QImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V8QImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv8qidi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V8QImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V8QImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv16qisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V16QImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V16QImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv16qidi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V16QImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V16QImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv4hisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V4HImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V4HImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv4hidi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V4HImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V4HImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv8hisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V8HImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V8HImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv8hidi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V8HImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V8HImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2sisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2SImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2SImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2sidi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2SImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2SImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv4sisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V4SImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V4SImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv4sidi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V4SImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V4SImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2disi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2DImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2DImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2didi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2DImode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2DImode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2sfsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2SFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2SFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2sfdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2SFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2SFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv4sfsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V4SFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V4SFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv4sfdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V4SFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V4SFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2dfsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2DFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2DFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6753 */
rtx
gen_aarch64_reload_movcpv2dfdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6758 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
   aarch64_expand_mov_immediate (operands[2], XEXP (operands[1], 0));
   emit_move_insn (operands[0], gen_rtx_MEM (V2DFmode, operands[2]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MEM (V2DFmode,
	operand1)));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6765 */
rtx
gen_aarch64_reload_movti (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx op0 = simplify_gen_subreg (TImode, operands[0], TImode, 0);
    rtx op1 = simplify_gen_subreg (TImode, operands[1], TImode, 0);
    gen_aarch64_movtilow_tilow (op0, op1);
    gen_aarch64_movdi_tihigh (operands[2], op1);
    gen_aarch64_movtihigh_di (op0, operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6765 */
rtx
gen_aarch64_reload_movtf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    rtx op0 = simplify_gen_subreg (TImode, operands[0], TFmode, 0);
    rtx op1 = simplify_gen_subreg (TImode, operands[1], TFmode, 0);
    gen_aarch64_movtilow_tilow (op0, op1);
    gen_aarch64_movdi_tihigh (operands[2], op1);
    gen_aarch64_movtihigh_di (op0, operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  emit_insn (gen_rtx_CLOBBER (VOIDmode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6839 */
rtx
gen_add_losym (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6844 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  machine_mode mode = GET_MODE (operands[0]);

  emit_insn ((mode == DImode
	      ? gen_add_losym_di
	      : gen_add_losym_si) (operands[0],
				   operands[1],
				   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LO_SUM (VOIDmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6917 */
rtx
gen_tlsgd_small_si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6924 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  operands[2] = aarch64_tls_get_addr ();
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	gen_rtx_MEM (DImode,
	operand2),
	const1_rtx)),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	4),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	35),
		gen_hard_reg_clobber (DImode, 30))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:6917 */
rtx
gen_tlsgd_small_di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6924 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  operands[2] = aarch64_tls_get_addr ();
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_call_insn (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (4,
		gen_rtx_SET (operand0,
	gen_rtx_CALL (VOIDmode,
	gen_rtx_MEM (DImode,
	operand2),
	const1_rtx)),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		const0_rtx),
	4),
		gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand1),
	35),
		gen_hard_reg_clobber (DImode, 30))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7027 */
rtx
gen_tlsdesc_small_si (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (TARGET_SVE)
      {
	rtx abi = gen_int_mode (aarch64_tlsdesc_abi_id (), DImode);
	rtx_insn *call
	  = emit_call_insn (gen_tlsdesc_small_sve_si (operands[0], abi));
	RTL_CONST_CALL_P (call) = 1;
      }
    else
      emit_insn (gen_tlsdesc_small_advsimd_si (operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_UNSPEC (SImode,
	gen_rtvec (1,
		operand0),
	86));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7027 */
rtx
gen_tlsdesc_small_di (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
    if (TARGET_SVE)
      {
	rtx abi = gen_int_mode (aarch64_tlsdesc_abi_id (), DImode);
	rtx_insn *call
	  = emit_call_insn (gen_tlsdesc_small_sve_di (operands[0], abi));
	RTL_CONST_CALL_P (call) = 1;
      }
    else
      emit_insn (gen_tlsdesc_small_advsimd_di (operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit_insn (gen_rtx_UNSPEC (DImode,
	gen_rtvec (1,
		operand0),
	86));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7129 */
rtx
gen_scs_push (void)
{
  return gen_rtx_SET (gen_rtx_MEM (DImode,
	gen_rtx_POST_INC (DImode,
	gen_rtx_REG (DImode,
	18))),
	gen_rtx_REG (DImode,
	30));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7134 */
rtx
gen_scs_pop (void)
{
  return gen_rtx_SET (gen_rtx_REG (DImode,
	30),
	gen_rtx_MEM (DImode,
	gen_rtx_PRE_DEC (DImode,
	gen_rtx_REG (DImode,
	18))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7181 */
rtx
gen_get_thread_pointerdi (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7184 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx tmp = aarch64_load_tp (operands[0]);
  if (tmp != operands[0])
    emit_move_insn (operands[0], tmp);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit (operand0, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7194 */
rtx
gen_stack_protect_set (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7198 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  emit_insn (gen_stack_protect_combined_set (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7203 */
rtx
gen_stack_protect_combined_set (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7207 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  machine_mode mode = GET_MODE (operands[0]);
  operands[1] = aarch64_stack_protect_canary_mem (mode, operands[1],
						  AARCH64_SALT_SSP_SET);
  emit_insn ((mode == DImode
	      ? gen_stack_protect_set_di
	      : gen_stack_protect_set_si) (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7247 */
rtx
gen_stack_protect_test (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7252 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  emit_insn (gen_stack_protect_combined_test (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7258 */
rtx
gen_stack_protect_combined_test (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7263 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  machine_mode mode = GET_MODE (operands[0]);
  operands[1] = aarch64_stack_protect_canary_mem (mode, operands[1],
						  AARCH64_SALT_SSP_TEST);
  emit_insn ((mode == DImode
	     ? gen_stack_protect_test_di
	     : gen_stack_protect_test_si) (operands[0], operands[1]));

  rtx cc_reg = gen_rtx_REG (CCmode, CC_REGNUM);
  emit_jump_insn (gen_condjump (gen_rtx_EQ (VOIDmode, cc_reg, const0_rtx),
				cc_reg, operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7308 */
rtx
gen_doloop_end (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7312 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"
{
  rtx s0;
  rtx bcomp;
  rtx loc_ref;
  rtx cc_reg;
  rtx insn;
  rtx cmp;

  /* Currently SMS relies on the do-loop pattern to recognize loops
     where (1) the control part consists of all insns defining and/or
     using a certain 'count' register and (2) the loop count can be
     adjusted by modifying this register prior to the loop.
     ??? The possible introduction of a new block to initialize the
     new IV can potentially affect branch optimizations.  */

  if (GET_MODE (operands[0]) != DImode)
    FAIL;

  s0 = operands [0];
  insn = emit_insn (gen_adddi3_compare0 (s0, s0, GEN_INT (-1)));

  cmp = XVECEXP (PATTERN (insn), 0, 0);
  cc_reg = SET_DEST (cmp);
  bcomp = gen_rtx_NE (VOIDmode, cc_reg, const0_rtx);
  loc_ref = gen_rtx_LABEL_REF (VOIDmode, operands [1]);
  emit_jump_insn (gen_rtx_SET (pc_rtx,
			       gen_rtx_IF_THEN_ELSE (VOIDmode, bcomp,
						     loc_ref, pc_rtx)));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7414 */
rtx
gen_despeculate_copyqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7422 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  {
    if (operands[2] == const0_rtx)
      {
	rtx tracker;
	if (QImode == TImode)
	  tracker = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
	else
	  tracker = gen_rtx_REG (QImode, SPECULATION_TRACKER_REGNUM);

	emit_insn (gen_despeculate_simpleqi (operands[0], operands[1],
						 tracker));
	DONE;
      }
  }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_USE (VOIDmode,
	gen_rtx_REG (DImode,
	15)),
		gen_hard_reg_clobber (CCmode, 66)),
	7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7414 */
rtx
gen_despeculate_copyhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7422 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  {
    if (operands[2] == const0_rtx)
      {
	rtx tracker;
	if (HImode == TImode)
	  tracker = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
	else
	  tracker = gen_rtx_REG (HImode, SPECULATION_TRACKER_REGNUM);

	emit_insn (gen_despeculate_simplehi (operands[0], operands[1],
						 tracker));
	DONE;
      }
  }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_USE (VOIDmode,
	gen_rtx_REG (DImode,
	15)),
		gen_hard_reg_clobber (CCmode, 66)),
	7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7414 */
rtx
gen_despeculate_copysi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7422 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  {
    if (operands[2] == const0_rtx)
      {
	rtx tracker;
	if (SImode == TImode)
	  tracker = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
	else
	  tracker = gen_rtx_REG (SImode, SPECULATION_TRACKER_REGNUM);

	emit_insn (gen_despeculate_simplesi (operands[0], operands[1],
						 tracker));
	DONE;
      }
  }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_USE (VOIDmode,
	gen_rtx_REG (DImode,
	15)),
		gen_hard_reg_clobber (CCmode, 66)),
	7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7414 */
rtx
gen_despeculate_copydi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7422 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  {
    if (operands[2] == const0_rtx)
      {
	rtx tracker;
	if (DImode == TImode)
	  tracker = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
	else
	  tracker = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);

	emit_insn (gen_despeculate_simpledi (operands[0], operands[1],
						 tracker));
	DONE;
      }
  }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (DImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_USE (VOIDmode,
	gen_rtx_REG (DImode,
	15)),
		gen_hard_reg_clobber (CCmode, 66)),
	7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md:7414 */
rtx
gen_despeculate_copyti (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7422 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64.md"

  {
    if (operands[2] == const0_rtx)
      {
	rtx tracker;
	if (TImode == TImode)
	  tracker = gen_rtx_REG (DImode, SPECULATION_TRACKER_REGNUM);
	else
	  tracker = gen_rtx_REG (TImode, SPECULATION_TRACKER_REGNUM);

	emit_insn (gen_despeculate_simpleti (operands[0], operands[1],
						 tracker));
	DONE;
      }
  }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC_VOLATILE (TImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_USE (VOIDmode,
	gen_rtx_REG (DImode,
	15)),
		gen_hard_reg_clobber (CCmode, 66)),
	7)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V8QImode)
	   && ((known_eq (GET_MODE_SIZE (V8QImode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V8QImode), 8))))
      operands[1] = force_reg (V8QImode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V8QImode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V16QImode)
	   && ((known_eq (GET_MODE_SIZE (V16QImode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V16QImode), 8))))
      operands[1] = force_reg (V16QImode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V16QImode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V4HImode)
	   && ((known_eq (GET_MODE_SIZE (V4HImode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V4HImode), 8))))
      operands[1] = force_reg (V4HImode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V4HImode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V8HImode)
	   && ((known_eq (GET_MODE_SIZE (V8HImode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V8HImode), 8))))
      operands[1] = force_reg (V8HImode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V8HImode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V2SImode)
	   && ((known_eq (GET_MODE_SIZE (V2SImode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V2SImode), 8))))
      operands[1] = force_reg (V2SImode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V2SImode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V4SImode)
	   && ((known_eq (GET_MODE_SIZE (V4SImode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V4SImode), 8))))
      operands[1] = force_reg (V4SImode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V4SImode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V2DImode)
	   && ((known_eq (GET_MODE_SIZE (V2DImode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V2DImode), 8))))
      operands[1] = force_reg (V2DImode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V2DImode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V4HFmode)
	   && ((known_eq (GET_MODE_SIZE (V4HFmode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V4HFmode), 8))))
      operands[1] = force_reg (V4HFmode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V4HFmode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V8HFmode)
	   && ((known_eq (GET_MODE_SIZE (V8HFmode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V8HFmode), 8))))
      operands[1] = force_reg (V8HFmode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V8HFmode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V4BFmode)
	   && ((known_eq (GET_MODE_SIZE (V4BFmode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V4BFmode), 8))))
      operands[1] = force_reg (V4BFmode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V4BFmode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V8BFmode)
	   && ((known_eq (GET_MODE_SIZE (V8BFmode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V8BFmode), 8))))
      operands[1] = force_reg (V8BFmode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V8BFmode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V2SFmode)
	   && ((known_eq (GET_MODE_SIZE (V2SFmode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V2SFmode), 8))))
      operands[1] = force_reg (V2SFmode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V2SFmode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V4SFmode)
	   && ((known_eq (GET_MODE_SIZE (V4SFmode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V4SFmode), 8))))
      operands[1] = force_reg (V4SFmode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V4SFmode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:21 */
rtx
gen_movv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 25 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"

  /* Force the operand into a register if it is not an
     immediate whose use can be replaced with xzr.
     If the mode is 16 bytes wide, then we will be doing
     a stp in DI mode, so we check the validity of that.
     If the mode is 8 bytes wide, then we will do doing a
     normal str, so the check need not apply.  */
  if (GET_CODE (operands[0]) == MEM
      && !(aarch64_simd_imm_zero (operands[1], V2DFmode)
	   && ((known_eq (GET_MODE_SIZE (V2DFmode), 16)
		&& aarch64_mem_pair_operand (operands[0], DImode))
	       || known_eq (GET_MODE_SIZE (V2DFmode), 8))))
      operands[1] = force_reg (V2DFmode, operands[1]);

  /* If a constant is too complex to force to memory (e.g. because it
     contains CONST_POLY_INTs), build it up from individual elements instead.
     We should only need to do this before RA; aarch64_legitimate_constant_p
     should ensure that we don't try to rematerialize the constant later.  */
  if (GET_CODE (operands[1]) == CONST_VECTOR
      && targetm.cannot_force_const_mem (V2DFmode, operands[1]))
    {
      aarch64_expand_vector_init (operands[0], operands[1]);
      DONE;
    }
  
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V8QImode)
      && !register_operand (operands[1], V8QImode))
    operands[1] = force_reg (V8QImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V16QImode)
      && !register_operand (operands[1], V16QImode))
    operands[1] = force_reg (V16QImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V4HImode)
      && !register_operand (operands[1], V4HImode))
    operands[1] = force_reg (V4HImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V8HImode)
      && !register_operand (operands[1], V8HImode))
    operands[1] = force_reg (V8HImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V2SImode)
      && !register_operand (operands[1], V2SImode))
    operands[1] = force_reg (V2SImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V4SImode)
      && !register_operand (operands[1], V4SImode))
    operands[1] = force_reg (V4SImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V2DImode)
      && !register_operand (operands[1], V2DImode))
    operands[1] = force_reg (V2DImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V4HFmode)
      && !register_operand (operands[1], V4HFmode))
    operands[1] = force_reg (V4HFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V8HFmode)
      && !register_operand (operands[1], V8HFmode))
    operands[1] = force_reg (V8HFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V4BFmode)
      && !register_operand (operands[1], V4BFmode))
    operands[1] = force_reg (V4BFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V8BFmode)
      && !register_operand (operands[1], V8BFmode))
    operands[1] = force_reg (V8BFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V2SFmode)
      && !register_operand (operands[1], V2SFmode))
    operands[1] = force_reg (V2SFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V4SFmode)
      && !register_operand (operands[1], V4SFmode))
    operands[1] = force_reg (V4SFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:52 */
rtx
gen_movmisalignv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 56 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* This pattern is not permitted to fail during expansion: if both arguments
     are non-registers (e.g. memory := constant, which can be created by the
     auto-vectorizer), force operand 1 into a register.  */
  if (!register_operand (operands[0], V2DFmode)
      && !register_operand (operands[1], V2DFmode))
    operands[1] = force_reg (V2DFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_93 (rtx_insn *, rtx *);
rtx_insn *
gen_split_93 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_93 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_94 (rtx_insn *, rtx *);
rtx_insn *
gen_split_94 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_94 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_95 (rtx_insn *, rtx *);
rtx_insn *
gen_split_95 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_95 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_96 (rtx_insn *, rtx *);
rtx_insn *
gen_split_96 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_96 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_97 (rtx_insn *, rtx *);
rtx_insn *
gen_split_97 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_97 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_98 (rtx_insn *, rtx *);
rtx_insn *
gen_split_98 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_98 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_99 (rtx_insn *, rtx *);
rtx_insn *
gen_split_99 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_99 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:249 */
extern rtx_insn *gen_split_100 (rtx_insn *, rtx *);
rtx_insn *
gen_split_100 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_100 (aarch64-simd.md:249)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 256 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_101 (rtx_insn *, rtx *);
rtx_insn *
gen_split_101 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_101 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_102 (rtx_insn *, rtx *);
rtx_insn *
gen_split_102 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_102 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_103 (rtx_insn *, rtx *);
rtx_insn *
gen_split_103 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_103 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_104 (rtx_insn *, rtx *);
rtx_insn *
gen_split_104 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_104 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_105 (rtx_insn *, rtx *);
rtx_insn *
gen_split_105 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_105 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_106 (rtx_insn *, rtx *);
rtx_insn *
gen_split_106 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_106 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_107 (rtx_insn *, rtx *);
rtx_insn *
gen_split_107 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_107 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:261 */
extern rtx_insn *gen_split_108 (rtx_insn *, rtx *);
rtx_insn *
gen_split_108 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_108 (aarch64-simd.md:261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_simd_move (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (V8QImode, src);
	rtx src_high_part = gen_highpart (V8QImode, src);
	rtx dst_low_part = gen_lowpart (V8QImode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinev8qi (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (V8QImode, dst);
	rtx dst_high_part = gen_highpart (V8QImode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
	emit_insn (gen_aarch64_get_halfv16qi (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv16qi (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (V4HImode, src);
	rtx src_high_part = gen_highpart (V4HImode, src);
	rtx dst_low_part = gen_lowpart (V4HImode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinev4hi (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (V4HImode, dst);
	rtx dst_high_part = gen_highpart (V4HImode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
	emit_insn (gen_aarch64_get_halfv8hi (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv8hi (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (V2SImode, src);
	rtx src_high_part = gen_highpart (V2SImode, src);
	rtx dst_low_part = gen_lowpart (V2SImode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinev2si (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (V2SImode, dst);
	rtx dst_high_part = gen_highpart (V2SImode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
	emit_insn (gen_aarch64_get_halfv4si (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv4si (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (DImode, src);
	rtx src_high_part = gen_highpart (DImode, src);
	rtx dst_low_part = gen_lowpart (DImode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinedi (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (DImode, dst);
	rtx dst_high_part = gen_highpart (DImode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V2DImode, 2, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V2DImode, 2, true);
	emit_insn (gen_aarch64_get_halfv2di (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv2di (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (V4HFmode, src);
	rtx src_high_part = gen_highpart (V4HFmode, src);
	rtx dst_low_part = gen_lowpart (V4HFmode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinev4hf (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (V4HFmode, dst);
	rtx dst_high_part = gen_highpart (V4HFmode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, true);
	emit_insn (gen_aarch64_get_halfv8hf (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv8hf (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (V4BFmode, src);
	rtx src_high_part = gen_highpart (V4BFmode, src);
	rtx dst_low_part = gen_lowpart (V4BFmode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinev4bf (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (V4BFmode, dst);
	rtx dst_high_part = gen_highpart (V4BFmode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V8BFmode, 8, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V8BFmode, 8, true);
	emit_insn (gen_aarch64_get_halfv8bf (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv8bf (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (V2SFmode, src);
	rtx src_high_part = gen_highpart (V2SFmode, src);
	rtx dst_low_part = gen_lowpart (V2SFmode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinev2sf (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (V2SFmode, dst);
	rtx dst_high_part = gen_highpart (V2SFmode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V4SFmode, 4, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V4SFmode, 4, true);
	emit_insn (gen_aarch64_get_halfv4sf (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv4sf (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:273 */
rtx
gen_aarch64_split_simd_movv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 277 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx dst = operands[0];
    rtx src = operands[1];

    if (GP_REGNUM_P (REGNO (src)))
      {
	rtx src_low_part = gen_lowpart (DFmode, src);
	rtx src_high_part = gen_highpart (DFmode, src);
	rtx dst_low_part = gen_lowpart (DFmode, dst);

	emit_move_insn (dst_low_part, src_low_part);
	emit_insn (gen_aarch64_combinedf (dst, dst_low_part,
					       src_high_part));
      }
    else
      {
	rtx dst_low_part = gen_lowpart (DFmode, dst);
	rtx dst_high_part = gen_highpart (DFmode, dst);
	rtx lo = aarch64_simd_vect_par_cnst_half (V2DFmode, 2, false);
	rtx hi = aarch64_simd_vect_par_cnst_half (V2DFmode, 2, true);
	emit_insn (gen_aarch64_get_halfv2df (dst_low_part, src, lo));
	emit_insn (gen_aarch64_get_halfv2df (dst_high_part, src, hi));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V8QImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4HFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv8bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V4BFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (V2SFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:304 */
rtx
gen_aarch64_get_halfv2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DFmode,
	operand1,
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
    emit_insn (gen_aarch64_get_halfv16qi (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
    emit_insn (gen_aarch64_get_halfv8hi (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
    emit_insn (gen_aarch64_get_halfv4si (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V2DImode, 2, false);
    emit_insn (gen_aarch64_get_halfv2di (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, false);
    emit_insn (gen_aarch64_get_halfv8hf (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V8BFmode, 8, false);
    emit_insn (gen_aarch64_get_halfv8bf (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V4SFmode, 4, false);
    emit_insn (gen_aarch64_get_halfv4sf (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:312 */
rtx
gen_aarch64_get_lowv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx lo = aarch64_simd_vect_par_cnst_half (V2DFmode, 2, false);
    emit_insn (gen_aarch64_get_halfv2df (operands[0], operands[1], lo));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
    emit_insn (gen_aarch64_get_halfv16qi (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
    emit_insn (gen_aarch64_get_halfv8hi (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
    emit_insn (gen_aarch64_get_halfv4si (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V2DImode, 2, true);
    emit_insn (gen_aarch64_get_halfv2di (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, true);
    emit_insn (gen_aarch64_get_halfv8hf (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V8BFmode, 8, true);
    emit_insn (gen_aarch64_get_halfv8bf (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V4SFmode, 4, true);
    emit_insn (gen_aarch64_get_halfv4sf (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:323 */
rtx
gen_aarch64_get_highv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 327 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx hi = aarch64_simd_vect_par_cnst_half (V2DFmode, 2, true);
    emit_insn (gen_aarch64_get_halfv2df (operands[0], operands[1], hi));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
extern rtx_insn *gen_split_109 (rtx_insn *, rtx *);
rtx_insn *
gen_split_109 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_109 (aarch64-simd.md:334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], V8QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
extern rtx_insn *gen_split_110 (rtx_insn *, rtx *);
rtx_insn *
gen_split_110 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_110 (aarch64-simd.md:334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], V4HImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
extern rtx_insn *gen_split_111 (rtx_insn *, rtx *);
rtx_insn *
gen_split_111 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_111 (aarch64-simd.md:334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], V2SImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
extern rtx_insn *gen_split_112 (rtx_insn *, rtx *);
rtx_insn *
gen_split_112 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_112 (aarch64-simd.md:334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], V4HFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
extern rtx_insn *gen_split_113 (rtx_insn *, rtx *);
rtx_insn *
gen_split_113 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_113 (aarch64-simd.md:334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], V4BFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:334 */
extern rtx_insn *gen_split_114 (rtx_insn *, rtx *);
rtx_insn *
gen_split_114 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_114 (aarch64-simd.md:334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 345 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], V2SFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:427 */
rtx
gen_ctzv2si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"ctzv2si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 431 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
     emit_insn (gen_bswapv2si2 (operands[0], operands[1]));
     rtx op0_castsi2qi = simplify_gen_subreg(V8QImode, operands[0],
					     V2SImode, 0);
     emit_insn (gen_aarch64_rbitv8qi (op0_castsi2qi, op0_castsi2qi));
     emit_insn (gen_clzv2si2 (operands[0], operands[0]));
     DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_CTZ (V2SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:427 */
rtx
gen_ctzv4si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"ctzv4si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 431 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
     emit_insn (gen_bswapv4si2 (operands[0], operands[1]));
     rtx op0_castsi2qi = simplify_gen_subreg(V16QImode, operands[0],
					     V4SImode, 0);
     emit_insn (gen_aarch64_rbitv16qi (op0_castsi2qi, op0_castsi2qi));
     emit_insn (gen_clzv4si2 (operands[0], operands[0]));
     DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_CTZ (V4SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:441 */
rtx
gen_xorsignv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignv4hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 446 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{

  machine_mode imode = V4HImode;
  rtx v_bitmask = gen_reg_rtx (imode);
  rtx op1x = gen_reg_rtx (imode);
  rtx op2x = gen_reg_rtx (imode);

  rtx arg1 = lowpart_subreg (imode, operands[1], V4HFmode);
  rtx arg2 = lowpart_subreg (imode, operands[2], V4HFmode);

  int bits = GET_MODE_UNIT_BITSIZE (V4HFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V4HImode,
						     HOST_WIDE_INT_M1U << bits));

  emit_insn (gen_andv4hi3 (op2x, v_bitmask, arg2));
  emit_insn (gen_xorv4hi3 (op1x, arg1, op2x));
  emit_move_insn (operands[0],
		  lowpart_subreg (V4HFmode, op1x, imode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:441 */
rtx
gen_xorsignv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignv8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 446 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{

  machine_mode imode = V8HImode;
  rtx v_bitmask = gen_reg_rtx (imode);
  rtx op1x = gen_reg_rtx (imode);
  rtx op2x = gen_reg_rtx (imode);

  rtx arg1 = lowpart_subreg (imode, operands[1], V8HFmode);
  rtx arg2 = lowpart_subreg (imode, operands[2], V8HFmode);

  int bits = GET_MODE_UNIT_BITSIZE (V8HFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V8HImode,
						     HOST_WIDE_INT_M1U << bits));

  emit_insn (gen_andv8hi3 (op2x, v_bitmask, arg2));
  emit_insn (gen_xorv8hi3 (op1x, arg1, op2x));
  emit_move_insn (operands[0],
		  lowpart_subreg (V8HFmode, op1x, imode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:441 */
rtx
gen_xorsignv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignv2sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 446 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{

  machine_mode imode = V2SImode;
  rtx v_bitmask = gen_reg_rtx (imode);
  rtx op1x = gen_reg_rtx (imode);
  rtx op2x = gen_reg_rtx (imode);

  rtx arg1 = lowpart_subreg (imode, operands[1], V2SFmode);
  rtx arg2 = lowpart_subreg (imode, operands[2], V2SFmode);

  int bits = GET_MODE_UNIT_BITSIZE (V2SFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V2SImode,
						     HOST_WIDE_INT_M1U << bits));

  emit_insn (gen_andv2si3 (op2x, v_bitmask, arg2));
  emit_insn (gen_xorv2si3 (op1x, arg1, op2x));
  emit_move_insn (operands[0],
		  lowpart_subreg (V2SFmode, op1x, imode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:441 */
rtx
gen_xorsignv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignv4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 446 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{

  machine_mode imode = V4SImode;
  rtx v_bitmask = gen_reg_rtx (imode);
  rtx op1x = gen_reg_rtx (imode);
  rtx op2x = gen_reg_rtx (imode);

  rtx arg1 = lowpart_subreg (imode, operands[1], V4SFmode);
  rtx arg2 = lowpart_subreg (imode, operands[2], V4SFmode);

  int bits = GET_MODE_UNIT_BITSIZE (V4SFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V4SImode,
						     HOST_WIDE_INT_M1U << bits));

  emit_insn (gen_andv4si3 (op2x, v_bitmask, arg2));
  emit_insn (gen_xorv4si3 (op1x, arg1, op2x));
  emit_move_insn (operands[0],
		  lowpart_subreg (V4SFmode, op1x, imode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:441 */
rtx
gen_xorsignv2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignv2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 446 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{

  machine_mode imode = V2DImode;
  rtx v_bitmask = gen_reg_rtx (imode);
  rtx op1x = gen_reg_rtx (imode);
  rtx op2x = gen_reg_rtx (imode);

  rtx arg1 = lowpart_subreg (imode, operands[1], V2DFmode);
  rtx arg2 = lowpart_subreg (imode, operands[2], V2DFmode);

  int bits = GET_MODE_UNIT_BITSIZE (V2DFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V2DImode,
						     HOST_WIDE_INT_M1U << bits));

  emit_insn (gen_andv2di3 (op2x, v_bitmask, arg2));
  emit_insn (gen_xorv2di3 (op1x, arg1, op2x));
  emit_move_insn (operands[0],
		  lowpart_subreg (V2DFmode, op1x, imode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd90v4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd270v4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd90v8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd270v8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd90v2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd270v2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd90v4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd270v4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd90v2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	383));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:486 */
rtx
gen_cadd270v2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	384));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlav4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_aarch64_fcmla0v4hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v4hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	385),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlsv4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_aarch64_fcmla180v4hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v4hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	387),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmla_conjv4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_aarch64_fcmla0v4hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v4hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	391),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmls_conjv4hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv4hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4HFmode);
  emit_insn (gen_aarch64_fcmla180v4hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v4hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4HFmode,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	392),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlav8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_aarch64_fcmla0v8hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v8hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	385),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlsv8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_aarch64_fcmla180v8hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v8hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	387),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmla_conjv8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_aarch64_fcmla0v8hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v8hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	391),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmls_conjv8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V8HFmode);
  emit_insn (gen_aarch64_fcmla180v8hf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v8hf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HFmode,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	392),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlav2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_aarch64_fcmla0v2sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v2sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	385),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlsv2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_aarch64_fcmla180v2sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v2sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	387),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmla_conjv2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_aarch64_fcmla0v2sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v2sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	391),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmls_conjv2sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv2sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2SFmode);
  emit_insn (gen_aarch64_fcmla180v2sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v2sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	392),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlav4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_aarch64_fcmla0v4sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v4sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	385),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlsv4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_aarch64_fcmla180v4sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v4sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	387),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmla_conjv4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_aarch64_fcmla0v4sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v4sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	391),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmls_conjv4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V4SFmode);
  emit_insn (gen_aarch64_fcmla180v4sf (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v4sf (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	392),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlav2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlav2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2DFmode);
  emit_insn (gen_aarch64_fcmla0v2df (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v2df (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	385),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmlsv2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsv2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2DFmode);
  emit_insn (gen_aarch64_fcmla180v2df (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v2df (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	387),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmla_conjv2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjv2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2DFmode);
  emit_insn (gen_aarch64_fcmla0v2df (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v2df (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	391),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:556 */
rtx
gen_cmls_conjv2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjv2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = gen_reg_rtx (V2DFmode);
  emit_insn (gen_aarch64_fcmla180v2df (tmp, operands[3],
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v2df (operands[0], tmp,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	392),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmulv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv4hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V4HFmode, CONST0_RTX (V4HFmode));
  rtx res1 = gen_reg_rtx (V4HFmode);
  emit_insn (gen_aarch64_fcmla0v4hf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v4hf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmul_conjv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv4hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V4HFmode, CONST0_RTX (V4HFmode));
  rtx res1 = gen_reg_rtx (V4HFmode);
  emit_insn (gen_aarch64_fcmla0v4hf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v4hf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmulv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V8HFmode, CONST0_RTX (V8HFmode));
  rtx res1 = gen_reg_rtx (V8HFmode);
  emit_insn (gen_aarch64_fcmla0v8hf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v8hf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmul_conjv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V8HFmode, CONST0_RTX (V8HFmode));
  rtx res1 = gen_reg_rtx (V8HFmode);
  emit_insn (gen_aarch64_fcmla0v8hf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v8hf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmulv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv2sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V2SFmode, CONST0_RTX (V2SFmode));
  rtx res1 = gen_reg_rtx (V2SFmode);
  emit_insn (gen_aarch64_fcmla0v2sf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v2sf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmul_conjv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv2sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V2SFmode, CONST0_RTX (V2SFmode));
  rtx res1 = gen_reg_rtx (V2SFmode);
  emit_insn (gen_aarch64_fcmla0v2sf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v2sf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmulv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V4SFmode, CONST0_RTX (V4SFmode));
  rtx res1 = gen_reg_rtx (V4SFmode);
  emit_insn (gen_aarch64_fcmla0v4sf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v4sf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmul_conjv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V4SFmode, CONST0_RTX (V4SFmode));
  rtx res1 = gen_reg_rtx (V4SFmode);
  emit_insn (gen_aarch64_fcmla0v4sf (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v4sf (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmulv2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulv2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V2DFmode, CONST0_RTX (V2DFmode));
  rtx res1 = gen_reg_rtx (V2DFmode);
  emit_insn (gen_aarch64_fcmla0v2df (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla90v2df (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:575 */
rtx
gen_cmul_conjv2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjv2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 581 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tmp = force_reg (V2DFmode, CONST0_RTX (V2DFmode));
  rtx res1 = gen_reg_rtx (V2DFmode);
  emit_insn (gen_aarch64_fcmla0v2df (res1, tmp,
						 operands[2], operands[1]));
  emit_insn (gen_aarch64_fcmla270v2df (operands[0], res1,
						 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:692 */
rtx
gen_copysignv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignv4hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 697 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx v_bitmask = gen_reg_rtx (V4HImode);
  int bits = GET_MODE_UNIT_BITSIZE (V4HFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V4HImode,
						     HOST_WIDE_INT_M1U << bits));
  emit_insn (gen_aarch64_simd_bslv4hf (operands[0], v_bitmask,
					 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:692 */
rtx
gen_copysignv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignv8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 697 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx v_bitmask = gen_reg_rtx (V8HImode);
  int bits = GET_MODE_UNIT_BITSIZE (V8HFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V8HImode,
						     HOST_WIDE_INT_M1U << bits));
  emit_insn (gen_aarch64_simd_bslv8hf (operands[0], v_bitmask,
					 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:692 */
rtx
gen_copysignv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignv2sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 697 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx v_bitmask = gen_reg_rtx (V2SImode);
  int bits = GET_MODE_UNIT_BITSIZE (V2SFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V2SImode,
						     HOST_WIDE_INT_M1U << bits));
  emit_insn (gen_aarch64_simd_bslv2sf (operands[0], v_bitmask,
					 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:692 */
rtx
gen_copysignv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignv4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 697 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx v_bitmask = gen_reg_rtx (V4SImode);
  int bits = GET_MODE_UNIT_BITSIZE (V4SFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V4SImode,
						     HOST_WIDE_INT_M1U << bits));
  emit_insn (gen_aarch64_simd_bslv4sf (operands[0], v_bitmask,
					 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:692 */
rtx
gen_copysignv2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignv2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 697 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx v_bitmask = gen_reg_rtx (V2DImode);
  int bits = GET_MODE_UNIT_BITSIZE (V2DFmode) - 1;

  emit_move_insn (v_bitmask,
		  aarch64_simd_gen_const_vector_dup (V2DImode,
						     HOST_WIDE_INT_M1U << bits));
  emit_insn (gen_aarch64_simd_bslv2df (operands[0], v_bitmask,
					 operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:770 */
rtx
gen_rsqrtv2sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rsqrtv2sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_emit_approx_sqrt (operands[0], operands[1], true);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	103)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:770 */
rtx
gen_rsqrtv4sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rsqrtv4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_emit_approx_sqrt (operands[0], operands[1], true);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	103)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:770 */
rtx
gen_rsqrtv2df2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rsqrtv2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_emit_approx_sqrt (operands[0], operands[1], true);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	103)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:770 */
rtx
gen_rsqrtsf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rsqrtsf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_emit_approx_sqrt (operands[0], operands[1], true);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	103)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:770 */
rtx
gen_rsqrtdf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rsqrtdf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_emit_approx_sqrt (operands[0], operands[1], true);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	103)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:924 */
rtx
gen_ssadv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 930 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (TARGET_DOTPROD)
      {
	rtx ones = force_reg (V16QImode, CONST1_RTX (V16QImode));
	rtx abd = gen_reg_rtx (V16QImode);
	emit_insn (gen_aarch64_sabdv16qi (abd, operands[1], operands[2]));
	emit_insn (gen_udot_prodv16qi (operands[0], abd, ones, operands[3]));
	DONE;
      }
    rtx reduc = gen_reg_rtx (V8HImode);
    emit_insn (gen_aarch64_sabdl2v16qi (reduc, operands[1],
					    operands[2]));
    emit_insn (gen_aarch64_sabalv8qi (reduc, reduc,
					  gen_lowpart (V8QImode, operands[1]),
					  gen_lowpart (V8QImode,
						       operands[2])));
    emit_insn (gen_aarch64_sadalpv8hi (operands[3], operands[3], reduc));
    emit_move_insn (operands[0], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	67));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:924 */
rtx
gen_usadv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 930 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (TARGET_DOTPROD)
      {
	rtx ones = force_reg (V16QImode, CONST1_RTX (V16QImode));
	rtx abd = gen_reg_rtx (V16QImode);
	emit_insn (gen_aarch64_uabdv16qi (abd, operands[1], operands[2]));
	emit_insn (gen_udot_prodv16qi (operands[0], abd, ones, operands[3]));
	DONE;
      }
    rtx reduc = gen_reg_rtx (V8HImode);
    emit_insn (gen_aarch64_uabdl2v16qi (reduc, operands[1],
					    operands[2]));
    emit_insn (gen_aarch64_uabalv8qi (reduc, reduc,
					  gen_lowpart (V8QImode, operands[1]),
					  gen_lowpart (V8QImode,
						       operands[2])));
    emit_insn (gen_aarch64_uadalpv8hi (operands[3], operands[3], reduc));
    emit_move_insn (operands[0], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	91));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1106 */
rtx
gen_signbitv2sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"signbitv2sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1110 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int shift_amount = GET_MODE_UNIT_BITSIZE (V2SImode) - 1;
  rtx shift_vector = aarch64_simd_gen_const_vector_dup (V2SImode,
                                                        shift_amount);
  operands[1] = lowpart_subreg (V2SImode, operands[1], V2SFmode);

  emit_insn (gen_aarch64_simd_lshrv2si (operands[0], operands[1],
                                                 shift_vector));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1106 */
rtx
gen_signbitv4sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"signbitv4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1110 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int shift_amount = GET_MODE_UNIT_BITSIZE (V4SImode) - 1;
  rtx shift_vector = aarch64_simd_gen_const_vector_dup (V4SImode,
                                                        shift_amount);
  operands[1] = lowpart_subreg (V4SImode, operands[1], V4SFmode);

  emit_insn (gen_aarch64_simd_lshrv4si (operands[0], operands[1],
                                                 shift_vector));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1191 */
rtx
gen_ashlv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V8QImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount >= 0 && shift_amount < bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V8QImode,
						       shift_amount);
	  emit_insn (gen_aarch64_simd_imm_shlv8qi (operands[0],
						     operands[1],
						     tmp));
          DONE;
        }
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (V8QImode);
  emit_insn (gen_aarch64_simd_dupv8qi (tmp, convert_to_mode (QImode,
							       operands[2],
							       0)));
  emit_insn (gen_aarch64_simd_reg_sshlv8qi (operands[0], operands[1], tmp));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1191 */
rtx
gen_ashlv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V16QImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount >= 0 && shift_amount < bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V16QImode,
						       shift_amount);
	  emit_insn (gen_aarch64_simd_imm_shlv16qi (operands[0],
						     operands[1],
						     tmp));
          DONE;
        }
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (V16QImode);
  emit_insn (gen_aarch64_simd_dupv16qi (tmp, convert_to_mode (QImode,
							       operands[2],
							       0)));
  emit_insn (gen_aarch64_simd_reg_sshlv16qi (operands[0], operands[1], tmp));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1191 */
rtx
gen_ashlv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V4HImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount >= 0 && shift_amount < bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V4HImode,
						       shift_amount);
	  emit_insn (gen_aarch64_simd_imm_shlv4hi (operands[0],
						     operands[1],
						     tmp));
          DONE;
        }
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (V4HImode);
  emit_insn (gen_aarch64_simd_dupv4hi (tmp, convert_to_mode (HImode,
							       operands[2],
							       0)));
  emit_insn (gen_aarch64_simd_reg_sshlv4hi (operands[0], operands[1], tmp));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1191 */
rtx
gen_ashlv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V8HImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount >= 0 && shift_amount < bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V8HImode,
						       shift_amount);
	  emit_insn (gen_aarch64_simd_imm_shlv8hi (operands[0],
						     operands[1],
						     tmp));
          DONE;
        }
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (V8HImode);
  emit_insn (gen_aarch64_simd_dupv8hi (tmp, convert_to_mode (HImode,
							       operands[2],
							       0)));
  emit_insn (gen_aarch64_simd_reg_sshlv8hi (operands[0], operands[1], tmp));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1191 */
rtx
gen_ashlv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V2SImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount >= 0 && shift_amount < bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V2SImode,
						       shift_amount);
	  emit_insn (gen_aarch64_simd_imm_shlv2si (operands[0],
						     operands[1],
						     tmp));
          DONE;
        }
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (V2SImode);
  emit_insn (gen_aarch64_simd_dupv2si (tmp, convert_to_mode (SImode,
							       operands[2],
							       0)));
  emit_insn (gen_aarch64_simd_reg_sshlv2si (operands[0], operands[1], tmp));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1191 */
rtx
gen_ashlv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V4SImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount >= 0 && shift_amount < bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V4SImode,
						       shift_amount);
	  emit_insn (gen_aarch64_simd_imm_shlv4si (operands[0],
						     operands[1],
						     tmp));
          DONE;
        }
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (V4SImode);
  emit_insn (gen_aarch64_simd_dupv4si (tmp, convert_to_mode (SImode,
							       operands[2],
							       0)));
  emit_insn (gen_aarch64_simd_reg_sshlv4si (operands[0], operands[1], tmp));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1191 */
rtx
gen_ashlv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V2DImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount >= 0 && shift_amount < bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V2DImode,
						       shift_amount);
	  emit_insn (gen_aarch64_simd_imm_shlv2di (operands[0],
						     operands[1],
						     tmp));
          DONE;
        }
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (V2DImode);
  emit_insn (gen_aarch64_simd_dupv2di (tmp, convert_to_mode (DImode,
							       operands[2],
							       0)));
  emit_insn (gen_aarch64_simd_reg_sshlv2di (operands[0], operands[1], tmp));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1224 */
rtx
gen_lshrv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1229 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V8QImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V8QImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_lshrv8qi (operands[0],
						  operands[1],
						  tmp));
	  DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V8QImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv8qi (tmp1,
					 convert_to_mode (QImode, tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv8qi_unsigned (operands[0], operands[1],
						      tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1224 */
rtx
gen_lshrv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1229 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V16QImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V16QImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_lshrv16qi (operands[0],
						  operands[1],
						  tmp));
	  DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V16QImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv16qi (tmp1,
					 convert_to_mode (QImode, tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv16qi_unsigned (operands[0], operands[1],
						      tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1224 */
rtx
gen_lshrv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1229 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V4HImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V4HImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_lshrv4hi (operands[0],
						  operands[1],
						  tmp));
	  DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V4HImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv4hi (tmp1,
					 convert_to_mode (HImode, tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv4hi_unsigned (operands[0], operands[1],
						      tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1224 */
rtx
gen_lshrv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1229 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V8HImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V8HImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_lshrv8hi (operands[0],
						  operands[1],
						  tmp));
	  DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V8HImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv8hi (tmp1,
					 convert_to_mode (HImode, tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv8hi_unsigned (operands[0], operands[1],
						      tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1224 */
rtx
gen_lshrv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1229 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V2SImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V2SImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_lshrv2si (operands[0],
						  operands[1],
						  tmp));
	  DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V2SImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv2si (tmp1,
					 convert_to_mode (SImode, tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv2si_unsigned (operands[0], operands[1],
						      tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1224 */
rtx
gen_lshrv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1229 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V4SImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V4SImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_lshrv4si (operands[0],
						  operands[1],
						  tmp));
	  DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V4SImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv4si (tmp1,
					 convert_to_mode (SImode, tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv4si_unsigned (operands[0], operands[1],
						      tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1224 */
rtx
gen_lshrv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1229 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V2DImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V2DImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_lshrv2di (operands[0],
						  operands[1],
						  tmp));
	  DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V2DImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv2di (tmp1,
					 convert_to_mode (DImode, tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv2di_unsigned (operands[0], operands[1],
						      tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1259 */
rtx
gen_ashrv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1264 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V8QImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V8QImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_ashrv8qi (operands[0],
						  operands[1],
						  tmp));
          DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V8QImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv8qi (tmp1, convert_to_mode (QImode,
								tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv8qi_signed (operands[0], operands[1],
						    tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1259 */
rtx
gen_ashrv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1264 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V16QImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V16QImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_ashrv16qi (operands[0],
						  operands[1],
						  tmp));
          DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V16QImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv16qi (tmp1, convert_to_mode (QImode,
								tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv16qi_signed (operands[0], operands[1],
						    tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1259 */
rtx
gen_ashrv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1264 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V4HImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V4HImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_ashrv4hi (operands[0],
						  operands[1],
						  tmp));
          DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V4HImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv4hi (tmp1, convert_to_mode (HImode,
								tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv4hi_signed (operands[0], operands[1],
						    tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1259 */
rtx
gen_ashrv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1264 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V8HImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V8HImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_ashrv8hi (operands[0],
						  operands[1],
						  tmp));
          DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V8HImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv8hi (tmp1, convert_to_mode (HImode,
								tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv8hi_signed (operands[0], operands[1],
						    tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1259 */
rtx
gen_ashrv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1264 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V2SImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V2SImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_ashrv2si (operands[0],
						  operands[1],
						  tmp));
          DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V2SImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv2si (tmp1, convert_to_mode (SImode,
								tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv2si_signed (operands[0], operands[1],
						    tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1259 */
rtx
gen_ashrv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1264 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V4SImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V4SImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_ashrv4si (operands[0],
						  operands[1],
						  tmp));
          DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V4SImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv4si (tmp1, convert_to_mode (SImode,
								tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv4si_signed (operands[0], operands[1],
						    tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1259 */
rtx
gen_ashrv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1264 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int bit_width = GET_MODE_UNIT_SIZE (V2DImode) * BITS_PER_UNIT;
  int shift_amount;

  if (CONST_INT_P (operands[2]))
    {
      shift_amount = INTVAL (operands[2]);
      if (shift_amount > 0 && shift_amount <= bit_width)
        {
	  rtx tmp = aarch64_simd_gen_const_vector_dup (V2DImode,
						       shift_amount);
          emit_insn (gen_aarch64_simd_ashrv2di (operands[0],
						  operands[1],
						  tmp));
          DONE;
	}
    }

  operands[2] = force_reg (SImode, operands[2]);

  rtx tmp = gen_reg_rtx (SImode);
  rtx tmp1 = gen_reg_rtx (V2DImode);
  emit_insn (gen_negsi2 (tmp, operands[2]));
  emit_insn (gen_aarch64_simd_dupv2di (tmp1, convert_to_mode (DImode,
								tmp, 0)));
  emit_insn (gen_aarch64_simd_reg_shlv2di_signed (operands[0], operands[1],
						    tmp1));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1294 */
rtx
gen_vashlv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_simd_reg_sshlv8qi (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1294 */
rtx
gen_vashlv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_simd_reg_sshlv16qi (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1294 */
rtx
gen_vashlv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_simd_reg_sshlv4hi (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1294 */
rtx
gen_vashlv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_simd_reg_sshlv8hi (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1294 */
rtx
gen_vashlv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_simd_reg_sshlv2si (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1294 */
rtx
gen_vashlv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_simd_reg_sshlv4si (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1294 */
rtx
gen_vashlv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_simd_reg_sshlv2di (operands[0], operands[1],
					      operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1305 */
rtx
gen_vashrv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V8QImode);
  emit (gen_negv8qi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv8qi_signed (operands[0], operands[1],
						    neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1305 */
rtx
gen_vashrv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V16QImode);
  emit (gen_negv16qi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv16qi_signed (operands[0], operands[1],
						    neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1305 */
rtx
gen_vashrv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V4HImode);
  emit (gen_negv4hi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv4hi_signed (operands[0], operands[1],
						    neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1305 */
rtx
gen_vashrv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V8HImode);
  emit (gen_negv8hi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv8hi_signed (operands[0], operands[1],
						    neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1305 */
rtx
gen_vashrv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V2SImode);
  emit (gen_negv2si2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv2si_signed (operands[0], operands[1],
						    neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1305 */
rtx
gen_vashrv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V4SImode);
  emit (gen_negv4si2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv4si_signed (operands[0], operands[1],
						    neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1305 */
rtx
gen_vashrv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1310 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V2DImode);
  emit (gen_negv2di2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv2di_signed (operands[0], operands[1],
						    neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1319 */
rtx
gen_aarch64_ashr_simddi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1324 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* An arithmetic shift right by 64 fills the result with copies of the sign
       bit, just like asr by 63 - however the standard pattern does not handle
       a shift by 64.  */
    if (INTVAL (operands[2]) == 64)
      operands[2] = GEN_INT (63);
    emit_insn (gen_ashrdi3 (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1335 */
rtx
gen_vlshrv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V8QImode);
  emit (gen_negv8qi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv8qi_unsigned (operands[0], operands[1],
						      neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1335 */
rtx
gen_vlshrv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V16QImode);
  emit (gen_negv16qi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv16qi_unsigned (operands[0], operands[1],
						      neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1335 */
rtx
gen_vlshrv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V4HImode);
  emit (gen_negv4hi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv4hi_unsigned (operands[0], operands[1],
						      neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1335 */
rtx
gen_vlshrv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V8HImode);
  emit (gen_negv8hi2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv8hi_unsigned (operands[0], operands[1],
						      neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1335 */
rtx
gen_vlshrv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V2SImode);
  emit (gen_negv2si2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv2si_unsigned (operands[0], operands[1],
						      neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1335 */
rtx
gen_vlshrv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V4SImode);
  emit (gen_negv4si2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv4si_unsigned (operands[0], operands[1],
						      neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1335 */
rtx
gen_vlshrv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx neg = gen_reg_rtx (V2DImode);
  emit (gen_negv2di2 (neg, operands[2]));
  emit_insn (gen_aarch64_simd_reg_shlv2di_unsigned (operands[0], operands[1],
						      neg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1348 */
rtx
gen_aarch64_lshr_simddi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (INTVAL (operands[2]) == 64)
      emit_move_insn (operands[0], const0_rtx);
    else
      emit_insn (gen_lshrdi3 (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv8qi (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv16qi (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv4hi (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv8hi (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv2si (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv4si (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv2di (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv4hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv4hf (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv8hf (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv4bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv4bf (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv8bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv8bf (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv2sf (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv4sf (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1378 */
rtx
gen_vec_setv2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"vec_setv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1383 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    HOST_WIDE_INT elem = (HOST_WIDE_INT) 1 << INTVAL (operands[2]);
    emit_insn (gen_aarch64_simd_vec_setv2df (operands[0], operands[1],
					  GEN_INT (elem), operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1521 */
rtx
gen_smaxv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1526 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  enum rtx_code cmp_operator;
  rtx cmp_fmt;

  switch (SMAX)
    {
    case UMIN:
      cmp_operator = LTU;
      break;
    case SMIN:
      cmp_operator = LT;
      break;
    case UMAX:
      cmp_operator = GTU;
      break;
    case SMAX:
      cmp_operator = GT;
      break;
    default:
      gcc_unreachable ();
    }

  cmp_fmt = gen_rtx_fmt_ee (cmp_operator, V2DImode, operands[1], operands[2]);
  emit_insn (gen_vcondv2div2di (operands[0], operands[1],
              operands[2], cmp_fmt, operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (V2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1521 */
rtx
gen_sminv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1526 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  enum rtx_code cmp_operator;
  rtx cmp_fmt;

  switch (SMIN)
    {
    case UMIN:
      cmp_operator = LTU;
      break;
    case SMIN:
      cmp_operator = LT;
      break;
    case UMAX:
      cmp_operator = GTU;
      break;
    case SMAX:
      cmp_operator = GT;
      break;
    default:
      gcc_unreachable ();
    }

  cmp_fmt = gen_rtx_fmt_ee (cmp_operator, V2DImode, operands[1], operands[2]);
  emit_insn (gen_vcondv2div2di (operands[0], operands[1],
              operands[2], cmp_fmt, operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (V2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1521 */
rtx
gen_umaxv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1526 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  enum rtx_code cmp_operator;
  rtx cmp_fmt;

  switch (UMAX)
    {
    case UMIN:
      cmp_operator = LTU;
      break;
    case SMIN:
      cmp_operator = LT;
      break;
    case UMAX:
      cmp_operator = GTU;
      break;
    case SMAX:
      cmp_operator = GT;
      break;
    default:
      gcc_unreachable ();
    }

  cmp_fmt = gen_rtx_fmt_ee (cmp_operator, V2DImode, operands[1], operands[2]);
  emit_insn (gen_vcondv2div2di (operands[0], operands[1],
              operands[2], cmp_fmt, operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (V2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1521 */
rtx
gen_uminv2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1526 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  enum rtx_code cmp_operator;
  rtx cmp_fmt;

  switch (UMIN)
    {
    case UMIN:
      cmp_operator = LTU;
      break;
    case SMIN:
      cmp_operator = LT;
      break;
    case UMAX:
      cmp_operator = GTU;
      break;
    case SMAX:
      cmp_operator = GT;
      break;
    default:
      gcc_unreachable ();
    }

  cmp_fmt = gen_rtx_fmt_ee (cmp_operator, V2DImode, operands[1], operands[2]);
  emit_insn (gen_vcondv2div2di (operands[0], operands[1],
              operands[2], cmp_fmt, operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (V2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1604 */
rtx
gen_aarch64_xtnv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_xtnv8hi_insn_be (tmp, operands[1],
				CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_xtnv8hi_insn_le (tmp, operands[1],
				CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1604 */
rtx
gen_aarch64_xtnv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_xtnv4si_insn_be (tmp, operands[1],
				CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_xtnv4si_insn_le (tmp, operands[1],
				CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1604 */
rtx
gen_aarch64_xtnv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_xtnv2di_insn_be (tmp, operands[1],
				CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_xtnv2di_insn_le (tmp, operands[1],
				CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1645 */
rtx
gen_aarch64_xtn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1650 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_xtn2v8hi_insn_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_xtn2v8hi_insn_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_TRUNCATE (V8QImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1645 */
rtx
gen_aarch64_xtn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1650 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_xtn2v4si_insn_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_xtn2v4si_insn_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_TRUNCATE (V4HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1645 */
rtx
gen_aarch64_xtn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1650 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_xtn2v2di_insn_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_xtn2v2di_insn_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_TRUNCATE (V2SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1680 */
rtx
gen_vec_pack_trunc_v4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1685 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tempreg = gen_reg_rtx (V8HImode);
  emit_insn (gen_aarch64_vec_concatv4hi (tempreg, operands[1], operands[2]));
  emit_insn (gen_truncv8hiv8qi2 (operands[0], tempreg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1680 */
rtx
gen_vec_pack_trunc_v2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1685 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tempreg = gen_reg_rtx (V4SImode);
  emit_insn (gen_aarch64_vec_concatv2si (tempreg, operands[1], operands[2]));
  emit_insn (gen_truncv4siv4hi2 (operands[0], tempreg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1680 */
rtx
gen_vec_pack_trunc_di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1685 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx tempreg = gen_reg_rtx (V2DImode);
  emit_insn (gen_aarch64_vec_concatdi (tempreg, operands[1], operands[2]));
  emit_insn (gen_truncv2div2si2 (operands[0], tempreg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1694 */
rtx
gen_vec_pack_trunc_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1700 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx tmpreg = gen_reg_rtx (V8QImode);
   int lo = BYTES_BIG_ENDIAN ? 2 : 1;
   int hi = BYTES_BIG_ENDIAN ? 1 : 2;

   emit_insn (gen_truncv8hiv8qi2 (tmpreg, operands[lo]));

   if (BYTES_BIG_ENDIAN)
     emit_insn (gen_aarch64_xtn2v8hi_insn_be (operands[0], tmpreg,
						operands[hi]));
   else
     emit_insn (gen_aarch64_xtn2v8hi_insn_le (operands[0], tmpreg,
						operands[hi]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	gen_rtx_TRUNCATE (V8QImode,
	operand1),
	gen_rtx_TRUNCATE (V8QImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1694 */
rtx
gen_vec_pack_trunc_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1700 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx tmpreg = gen_reg_rtx (V4HImode);
   int lo = BYTES_BIG_ENDIAN ? 2 : 1;
   int hi = BYTES_BIG_ENDIAN ? 1 : 2;

   emit_insn (gen_truncv4siv4hi2 (tmpreg, operands[lo]));

   if (BYTES_BIG_ENDIAN)
     emit_insn (gen_aarch64_xtn2v4si_insn_be (operands[0], tmpreg,
						operands[hi]));
   else
     emit_insn (gen_aarch64_xtn2v4si_insn_le (operands[0], tmpreg,
						operands[hi]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	gen_rtx_TRUNCATE (V4HImode,
	operand1),
	gen_rtx_TRUNCATE (V4HImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1694 */
rtx
gen_vec_pack_trunc_v2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1700 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx tmpreg = gen_reg_rtx (V2SImode);
   int lo = BYTES_BIG_ENDIAN ? 2 : 1;
   int hi = BYTES_BIG_ENDIAN ? 1 : 2;

   emit_insn (gen_truncv2div2si2 (tmpreg, operands[lo]));

   if (BYTES_BIG_ENDIAN)
     emit_insn (gen_aarch64_xtn2v2di_insn_be (operands[0], tmpreg,
						operands[hi]));
   else
     emit_insn (gen_aarch64_xtn2v2di_insn_le (operands[0], tmpreg,
						operands[hi]));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	gen_rtx_TRUNCATE (V2SImode,
	operand1),
	gen_rtx_TRUNCATE (V2SImode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1803 */
rtx
gen_aarch64_shrnv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1809 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_shrnv8hi_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_shrnv8hi_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V8QImode,
	gen_rtx_LSHIFTRT (V8HImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1803 */
rtx
gen_aarch64_shrnv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1809 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_shrnv4si_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_shrnv4si_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V4HImode,
	gen_rtx_LSHIFTRT (V4SImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1803 */
rtx
gen_aarch64_shrnv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1809 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_shrnv2di_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_shrnv2di_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_TRUNCATE (V2SImode,
	gen_rtx_LSHIFTRT (V2DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1852 */
rtx
gen_aarch64_rshrnv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (INTVAL (operands[2]) == GET_MODE_UNIT_BITSIZE (V8QImode))
      {
	rtx tmp0 = aarch64_gen_shareable_zero (V8HImode);
	emit_insn (gen_aarch64_raddhnv8hi (operands[0], operands[1], tmp0));
      }
    else
      {
	rtx tmp = gen_reg_rtx (V16QImode);
	operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						         INTVAL (operands[2]));
	if (BYTES_BIG_ENDIAN)
	  emit_insn (
		gen_aarch64_rshrnv8hi_insn_be (tmp, operands[1],
						 operands[2],
						 CONST0_RTX (V8QImode)));
	else
	  emit_insn (
		gen_aarch64_rshrnv8hi_insn_le (tmp, operands[1],
						 operands[2],
						 CONST0_RTX (V8QImode)));

	/* The intrinsic expects a narrow result, so emit a subreg that will
	   get optimized away as appropriate.  */
	emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						     V16QImode));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1852 */
rtx
gen_aarch64_rshrnv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (INTVAL (operands[2]) == GET_MODE_UNIT_BITSIZE (V4HImode))
      {
	rtx tmp0 = aarch64_gen_shareable_zero (V4SImode);
	emit_insn (gen_aarch64_raddhnv4si (operands[0], operands[1], tmp0));
      }
    else
      {
	rtx tmp = gen_reg_rtx (V8HImode);
	operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						         INTVAL (operands[2]));
	if (BYTES_BIG_ENDIAN)
	  emit_insn (
		gen_aarch64_rshrnv4si_insn_be (tmp, operands[1],
						 operands[2],
						 CONST0_RTX (V4HImode)));
	else
	  emit_insn (
		gen_aarch64_rshrnv4si_insn_le (tmp, operands[1],
						 operands[2],
						 CONST0_RTX (V4HImode)));

	/* The intrinsic expects a narrow result, so emit a subreg that will
	   get optimized away as appropriate.  */
	emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						     V8HImode));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1852 */
rtx
gen_aarch64_rshrnv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1857 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (INTVAL (operands[2]) == GET_MODE_UNIT_BITSIZE (V2SImode))
      {
	rtx tmp0 = aarch64_gen_shareable_zero (V2DImode);
	emit_insn (gen_aarch64_raddhnv2di (operands[0], operands[1], tmp0));
      }
    else
      {
	rtx tmp = gen_reg_rtx (V4SImode);
	operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						         INTVAL (operands[2]));
	if (BYTES_BIG_ENDIAN)
	  emit_insn (
		gen_aarch64_rshrnv2di_insn_be (tmp, operands[1],
						 operands[2],
						 CONST0_RTX (V2SImode)));
	else
	  emit_insn (
		gen_aarch64_rshrnv2di_insn_le (tmp, operands[1],
						 operands[2],
						 CONST0_RTX (V2SImode)));

	/* The intrinsic expects a narrow result, so emit a subreg that will
	   get optimized away as appropriate.  */
	emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						     V4SImode));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1913 */
rtx
gen_aarch64_shrn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1919 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[3]));
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_shrn2v8hi_insn_be (operands[0], operands[1],
						  operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_shrn2v8hi_insn_le (operands[0], operands[1],
						  operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1913 */
rtx
gen_aarch64_shrn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1919 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[3]));
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_shrn2v4si_insn_be (operands[0], operands[1],
						  operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_shrn2v4si_insn_le (operands[0], operands[1],
						  operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1913 */
rtx
gen_aarch64_shrn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1919 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[3]));
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_shrn2v2di_insn_be (operands[0], operands[1],
						  operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_shrn2v2di_insn_le (operands[0], operands[1],
						  operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1956 */
rtx
gen_aarch64_rshrn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (INTVAL (operands[3]) == GET_MODE_UNIT_BITSIZE (V16QImode))
      {
	rtx tmp = aarch64_gen_shareable_zero (V8HImode);
	emit_insn (gen_aarch64_raddhn2v8hi (operands[0], operands[1],
					      operands[2], tmp));
      }
    else
      {
	operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
							 INTVAL (operands[3]));
	if (BYTES_BIG_ENDIAN)
	  emit_insn (gen_aarch64_rshrn2v8hi_insn_be (operands[0],
						       operands[1],
						       operands[2],
						       operands[3]));
	else
	  emit_insn (gen_aarch64_rshrn2v8hi_insn_le (operands[0],
						       operands[1],
						       operands[2],
						       operands[3]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1956 */
rtx
gen_aarch64_rshrn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (INTVAL (operands[3]) == GET_MODE_UNIT_BITSIZE (V8HImode))
      {
	rtx tmp = aarch64_gen_shareable_zero (V4SImode);
	emit_insn (gen_aarch64_raddhn2v4si (operands[0], operands[1],
					      operands[2], tmp));
      }
    else
      {
	operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
							 INTVAL (operands[3]));
	if (BYTES_BIG_ENDIAN)
	  emit_insn (gen_aarch64_rshrn2v4si_insn_be (operands[0],
						       operands[1],
						       operands[2],
						       operands[3]));
	else
	  emit_insn (gen_aarch64_rshrn2v4si_insn_le (operands[0],
						       operands[1],
						       operands[2],
						       operands[3]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:1956 */
rtx
gen_aarch64_rshrn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1962 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (INTVAL (operands[3]) == GET_MODE_UNIT_BITSIZE (V4SImode))
      {
	rtx tmp = aarch64_gen_shareable_zero (V2DImode);
	emit_insn (gen_aarch64_raddhn2v2di (operands[0], operands[1],
					      operands[2], tmp));
      }
    else
      {
	operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
							 INTVAL (operands[3]));
	if (BYTES_BIG_ENDIAN)
	  emit_insn (gen_aarch64_rshrn2v2di_insn_be (operands[0],
						       operands[1],
						       operands[2],
						       operands[3]));
	else
	  emit_insn (gen_aarch64_rshrn2v2di_insn_le (operands[0],
						       operands[1],
						       operands[2],
						       operands[3]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2012 */
rtx
gen_vec_unpacks_hi_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
    emit_insn (gen_aarch64_simd_vec_unpacks_hi_v16qi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2012 */
rtx
gen_vec_unpacku_hi_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
    emit_insn (gen_aarch64_simd_vec_unpacku_hi_v16qi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2012 */
rtx
gen_vec_unpacks_hi_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
    emit_insn (gen_aarch64_simd_vec_unpacks_hi_v8hi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2012 */
rtx
gen_vec_unpacku_hi_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
    emit_insn (gen_aarch64_simd_vec_unpacku_hi_v8hi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2012 */
rtx
gen_vec_unpacks_hi_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
    emit_insn (gen_aarch64_simd_vec_unpacks_hi_v4si (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2012 */
rtx
gen_vec_unpacku_hi_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
    emit_insn (gen_aarch64_simd_vec_unpacku_hi_v4si (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2024 */
rtx
gen_vec_unpacks_lo_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2028 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
    emit_insn (gen_aarch64_simd_vec_unpacks_lo_v16qi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2024 */
rtx
gen_vec_unpacku_lo_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2028 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
    emit_insn (gen_aarch64_simd_vec_unpacku_lo_v16qi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2024 */
rtx
gen_vec_unpacks_lo_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2028 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
    emit_insn (gen_aarch64_simd_vec_unpacks_lo_v8hi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2024 */
rtx
gen_vec_unpacku_lo_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2028 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
    emit_insn (gen_aarch64_simd_vec_unpacku_lo_v8hi (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2024 */
rtx
gen_vec_unpacks_lo_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2028 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
    emit_insn (gen_aarch64_simd_vec_unpacks_lo_v4si (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2024 */
rtx
gen_vec_unpacku_lo_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2028 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
    emit_insn (gen_aarch64_simd_vec_unpacku_lo_v4si (operands[0],
							  operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2070 */
rtx
gen_aarch64_smlal_hiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_smlal_hiv16qi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2070 */
rtx
gen_aarch64_umlal_hiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_umlal_hiv16qi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2070 */
rtx
gen_aarch64_smlal_hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlal_hiv8hi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2070 */
rtx
gen_aarch64_umlal_hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlal_hiv8hi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2070 */
rtx
gen_aarch64_smlal_hiv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlal_hiv4si_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2070 */
rtx
gen_aarch64_umlal_hiv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlal_hiv4si_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2101 */
rtx
gen_aarch64_smlal_hi_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2107 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlal_hi_nv8hi_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2101 */
rtx
gen_aarch64_umlal_hi_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2107 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlal_hi_nv8hi_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2101 */
rtx
gen_aarch64_smlal_hi_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2107 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlal_hi_nv4si_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2101 */
rtx
gen_aarch64_umlal_hi_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2107 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlal_hi_nv4si_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2147 */
rtx
gen_aarch64_smlsl_hiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2153 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_smlsl_hiv16qi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2147 */
rtx
gen_aarch64_umlsl_hiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2153 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_umlsl_hiv16qi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2147 */
rtx
gen_aarch64_smlsl_hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2153 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlsl_hiv8hi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2147 */
rtx
gen_aarch64_umlsl_hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2153 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlsl_hiv8hi_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2147 */
rtx
gen_aarch64_smlsl_hiv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2153 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlsl_hiv4si_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2147 */
rtx
gen_aarch64_umlsl_hiv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2153 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlsl_hiv4si_insn (operands[0], operands[1],
						 operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2178 */
rtx
gen_aarch64_smlsl_hi_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2184 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlsl_hi_nv8hi_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2178 */
rtx
gen_aarch64_umlsl_hi_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2184 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlsl_hi_nv8hi_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2178 */
rtx
gen_aarch64_smlsl_hi_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2184 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlsl_hi_nv4si_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2178 */
rtx
gen_aarch64_umlsl_hi_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2184 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlsl_hi_nv4si_insn (operands[0],
             operands[1], operands[2], p, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2274 */
rtx
gen_vec_widen_smult_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
   emit_insn (gen_aarch64_simd_vec_smult_lo_v16qi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2274 */
rtx
gen_vec_widen_umult_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
   emit_insn (gen_aarch64_simd_vec_umult_lo_v16qi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2274 */
rtx
gen_vec_widen_smult_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
   emit_insn (gen_aarch64_simd_vec_smult_lo_v8hi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2274 */
rtx
gen_vec_widen_umult_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
   emit_insn (gen_aarch64_simd_vec_umult_lo_v8hi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2274 */
rtx
gen_vec_widen_smult_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
   emit_insn (gen_aarch64_simd_vec_smult_lo_v4si (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2274 */
rtx
gen_vec_widen_umult_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
   emit_insn (gen_aarch64_simd_vec_umult_lo_v4si (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2301 */
rtx
gen_vec_widen_smult_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2306 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
   emit_insn (gen_aarch64_simd_vec_smult_hi_v16qi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2301 */
rtx
gen_vec_widen_umult_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2306 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
   emit_insn (gen_aarch64_simd_vec_umult_hi_v16qi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2301 */
rtx
gen_vec_widen_smult_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2306 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
   emit_insn (gen_aarch64_simd_vec_smult_hi_v8hi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2301 */
rtx
gen_vec_widen_umult_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2306 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
   emit_insn (gen_aarch64_simd_vec_umult_hi_v8hi (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2301 */
rtx
gen_vec_widen_smult_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2306 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
   emit_insn (gen_aarch64_simd_vec_smult_hi_v4si (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2301 */
rtx
gen_vec_widen_umult_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2306 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
   emit_insn (gen_aarch64_simd_vec_umult_hi_v4si (operands[0],
						       operands[1],
						       operands[2], p));
   DONE;

 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2355 */
rtx
gen_aarch64_smull_hi_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2361 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smull_hi_lanev8hi_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2355 */
rtx
gen_aarch64_umull_hi_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2361 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umull_hi_lanev8hi_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2355 */
rtx
gen_aarch64_smull_hi_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2361 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smull_hi_lanev4si_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2355 */
rtx
gen_aarch64_umull_hi_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2361 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umull_hi_lanev4si_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2389 */
rtx
gen_aarch64_smull_hi_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smull_hi_laneqv8hi_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2389 */
rtx
gen_aarch64_umull_hi_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umull_hi_laneqv8hi_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2389 */
rtx
gen_aarch64_smull_hi_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smull_hi_laneqv4si_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2389 */
rtx
gen_aarch64_umull_hi_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2395 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umull_hi_laneqv4si_insn (operands[0],
	     operands[1], p, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2431 */
rtx
gen_aarch64_smull_hi_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
   emit_insn (gen_aarch64_smull_hi_nv8hi_insn (operands[0], operands[1],
						    operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2431 */
rtx
gen_aarch64_umull_hi_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
   emit_insn (gen_aarch64_umull_hi_nv8hi_insn (operands[0], operands[1],
						    operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2431 */
rtx
gen_aarch64_smull_hi_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
   emit_insn (gen_aarch64_smull_hi_nv4si_insn (operands[0], operands[1],
						    operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2431 */
rtx
gen_aarch64_umull_hi_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
   emit_insn (gen_aarch64_umull_hi_nv4si_insn (operands[0], operands[1],
						    operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2487 */
rtx
gen_aarch64_smlal_hi_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2494 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlal_hi_lanev8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2487 */
rtx
gen_aarch64_umlal_hi_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2494 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlal_hi_lanev8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2487 */
rtx
gen_aarch64_smlal_hi_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2494 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlal_hi_lanev4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2487 */
rtx
gen_aarch64_umlal_hi_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2494 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlal_hi_lanev4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2524 */
rtx
gen_aarch64_smlal_hi_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlal_hi_laneqv8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2524 */
rtx
gen_aarch64_umlal_hi_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlal_hi_laneqv8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2524 */
rtx
gen_aarch64_smlal_hi_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlal_hi_laneqv4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2524 */
rtx
gen_aarch64_umlal_hi_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlal_hi_laneqv4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2582 */
rtx
gen_aarch64_smlsl_hi_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2589 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlsl_hi_lanev8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2582 */
rtx
gen_aarch64_umlsl_hi_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2589 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlsl_hi_lanev8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2582 */
rtx
gen_aarch64_smlsl_hi_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2589 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlsl_hi_lanev4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2582 */
rtx
gen_aarch64_umlsl_hi_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2589 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlsl_hi_lanev4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2620 */
rtx
gen_aarch64_smlsl_hi_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2627 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_smlsl_hi_laneqv8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2620 */
rtx
gen_aarch64_umlsl_hi_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2627 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_umlsl_hi_laneqv8hi_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2620 */
rtx
gen_aarch64_smlsl_hi_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2627 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_smlsl_hi_laneqv4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2620 */
rtx
gen_aarch64_umlsl_hi_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2627 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_umlsl_hi_laneqv4si_insn (operands[0],
	     operands[1], operands[2], p, operands[3], operands[4]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2687 */
rtx
gen_divv4hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (V4HFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (V4HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2687 */
rtx
gen_divv8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (V8HFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (V8HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2687 */
rtx
gen_divv2sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (V2SFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2687 */
rtx
gen_divv4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (V4SFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2687 */
rtx
gen_divv2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
    DONE;

  operands[1] = force_reg (V2DFmode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_DIV (V2DFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2724 */
rtx
gen_aarch64_float_mlav2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2732 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mulv2sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_addv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_MULT (V2SFmode,
	operand2,
	operand3),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2724 */
rtx
gen_aarch64_float_mlav4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2732 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mulv4sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_addv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_MULT (V4SFmode,
	operand2,
	operand3),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2724 */
rtx
gen_aarch64_float_mlav2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2732 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2DFmode);
    emit_insn (gen_mulv2df3 (scratch, operands[2], operands[3]));
    emit_insn (gen_addv2df3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DFmode,
	gen_rtx_MULT (V2DFmode,
	operand2,
	operand3),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2724 */
rtx
gen_aarch64_float_mladf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2732 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (DFmode);
    emit_insn (gen_muldf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_adddf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DFmode,
	gen_rtx_MULT (DFmode,
	operand2,
	operand3),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2740 */
rtx
gen_aarch64_float_mlsv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mulv2sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_subv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	gen_rtx_MULT (V2SFmode,
	operand2,
	operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2740 */
rtx
gen_aarch64_float_mlsv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mulv4sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_subv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	gen_rtx_MULT (V4SFmode,
	operand2,
	operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2740 */
rtx
gen_aarch64_float_mlsv2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2DFmode);
    emit_insn (gen_mulv2df3 (scratch, operands[2], operands[3]));
    emit_insn (gen_subv2df3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2DFmode,
	operand1,
	gen_rtx_MULT (V2DFmode,
	operand2,
	operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2740 */
rtx
gen_aarch64_float_mlsdf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (DFmode);
    emit_insn (gen_muldf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_subdf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DFmode,
	operand1,
	gen_rtx_MULT (DFmode,
	operand2,
	operand3))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2756 */
rtx
gen_aarch64_float_mla_nv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mul_nv2sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_addv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand3),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2756 */
rtx
gen_aarch64_float_mla_nv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mul_nv4sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_addv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand3),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2773 */
rtx
gen_aarch64_float_mls_nv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mul_nv2sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_subv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	operand3),
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2773 */
rtx
gen_aarch64_float_mls_nv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mul_nv4sf3 (scratch, operands[2], operands[3]));
    emit_insn (gen_subv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	operand3),
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2790 */
rtx
gen_aarch64_float_mla_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2801 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mul_lanev2sf3 (scratch, operands[2],
				    operands[3], operands[4]));
    emit_insn (gen_addv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2790 */
rtx
gen_aarch64_float_mla_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2801 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mul_lanev4sf3 (scratch, operands[2],
				    operands[3], operands[4]));
    emit_insn (gen_addv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2810 */
rtx
gen_aarch64_float_mls_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mul_lanev2sf3 (scratch, operands[2],
				    operands[3], operands[4]));
    emit_insn (gen_subv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2810 */
rtx
gen_aarch64_float_mls_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mul_lanev4sf3 (scratch, operands[2],
				    operands[3], operands[4]));
    emit_insn (gen_subv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2830 */
rtx
gen_aarch64_float_mla_laneqv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2841 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mul_laneqv2sf3 (scratch, operands[2],
				     operands[3], operands[4]));
    emit_insn (gen_addv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2SFmode,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2830 */
rtx
gen_aarch64_float_mla_laneqv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2841 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mul_laneqv4sf3 (scratch, operands[2],
				     operands[3], operands[4]));
    emit_insn (gen_addv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SFmode,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2850 */
rtx
gen_aarch64_float_mls_laneqv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_mul_laneqv2sf3 (scratch, operands[2],
				     operands[3], operands[4]));
    emit_insn (gen_subv2sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V2SFmode,
	operand1,
	gen_rtx_MULT (V2SFmode,
	gen_rtx_VEC_DUPLICATE (V2SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:2850 */
rtx
gen_aarch64_float_mls_laneqv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_mul_laneqv4sf3 (scratch, operands[2],
				     operands[3], operands[4]));
    emit_insn (gen_subv4sf3 (operands[0], operands[1], scratch));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (V4SFmode,
	operand1,
	gen_rtx_MULT (V4SFmode,
	gen_rtx_VEC_DUPLICATE (V4SFmode,
	gen_rtx_VEC_SELECT (SFmode,
	operand3,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand4)))),
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixv4hfv4hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixunsv4hfv4hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixv8hfv8hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixunsv8hfv8hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixunsv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixunsv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixv2dfv2di2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3088 */
rtx
gen_fixunsv2dfv2di2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3094 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fix_truncv4hfv4hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fixuns_truncv4hfv4hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4HImode,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fix_truncv8hfv8hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fixuns_truncv8hfv8hi2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V8HImode,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fix_truncv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fixuns_truncv2sfv2si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2SImode,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fix_truncv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fixuns_truncv4sfv4si2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V4SImode,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fix_truncv2dfv2di2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3096 */
rtx
gen_fixuns_truncv2dfv2di2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSIGNED_FIX (V2DImode,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (1,
		operand1),
	32))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3104 */
rtx
gen_ftruncv4hf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3109 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HFmode,
	gen_rtvec (1,
		operand1),
	32)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3104 */
rtx
gen_ftruncv8hf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3109 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HFmode,
	gen_rtvec (1,
		operand1),
	32)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3104 */
rtx
gen_ftruncv2sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3109 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (1,
		operand1),
	32)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3104 */
rtx
gen_ftruncv4sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3109 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (1,
		operand1),
	32)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3104 */
rtx
gen_ftruncv2df2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3109 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DFmode,
	gen_rtvec (1,
		operand1),
	32)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3170 */
rtx
gen_vec_unpacks_lo_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3174 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, false);
    emit_insn (gen_aarch64_simd_vec_unpacks_lo_v8hf (operands[0],
						       operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3170 */
rtx
gen_vec_unpacks_lo_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3174 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SFmode, 4, false);
    emit_insn (gen_aarch64_simd_vec_unpacks_lo_v4sf (operands[0],
						       operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3193 */
rtx
gen_vec_unpacks_hi_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, true);
    emit_insn (gen_aarch64_simd_vec_unpacks_lo_v8hf (operands[0],
						       operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3193 */
rtx
gen_vec_unpacks_hi_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3197 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SFmode, 4, true);
    emit_insn (gen_aarch64_simd_vec_unpacks_lo_v4sf (operands[0],
						       operands[1], p));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3255 */
rtx
gen_aarch64_float_trunc_rodd_hi_v4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3260 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx (*gen) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN
			     ? gen_aarch64_float_trunc_rodd_hi_v4sf_be
			     : gen_aarch64_float_trunc_rodd_hi_v4sf_le;
  emit_insn (gen (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3300 */
rtx
gen_aarch64_float_truncate_hi_v4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx (*gen) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN
			     ? gen_aarch64_float_truncate_hi_v4sf_be
			     : gen_aarch64_float_truncate_hi_v4sf_le;
  emit_insn (gen (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3300 */
rtx
gen_aarch64_float_truncate_hi_v8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3305 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx (*gen) (rtx, rtx, rtx) = BYTES_BIG_ENDIAN
			     ? gen_aarch64_float_truncate_hi_v8hf_be
			     : gen_aarch64_float_truncate_hi_v8hf_le;
  emit_insn (gen (operands[0], operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3314 */
rtx
gen_vec_pack_trunc_v2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3323 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V2SFmode);
    int lo = BYTES_BIG_ENDIAN ? 2 : 1;
    int hi = BYTES_BIG_ENDIAN ? 1 : 2;

    emit_insn (gen_aarch64_float_truncate_lo_v2sf (tmp, operands[lo]));
    emit_insn (gen_aarch64_float_truncate_hi_v4sf (operands[0],
						   tmp, operands[hi]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	gen_rtx_FLOAT_TRUNCATE (V2SFmode,
	operand1),
	gen_rtx_FLOAT_TRUNCATE (V2SFmode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3335 */
rtx
gen_vec_pack_trunc_df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3341 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V2SFmode);
    emit_insn (gen_aarch64_vec_concatdf (tmp, operands[1], operands[2]));
    emit_insn (gen_aarch64_float_truncate_lo_v2sf (operands[0], tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SFmode,
	gen_rtx_FLOAT_TRUNCATE (SFmode,
	operand1),
	gen_rtx_FLOAT_TRUNCATE (SFmode,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3436 */
rtx
gen_reduc_plus_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_v4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx elt = aarch64_endian_lane_rtx (V4SFmode, 0);
  rtx scratch = gen_reg_rtx (V4SFmode);
  emit_insn (gen_aarch64_faddpv4sf (scratch, operands[1], operands[1]));
  emit_insn (gen_aarch64_faddpv4sf (scratch, scratch, scratch));
  emit_insn (gen_aarch64_get_lanev4sf (operands[0], scratch, elt));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	173)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_nan_scal_v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HFmode, 0);
    rtx scratch = gen_reg_rtx (V4HFmode);
    emit_insn (gen_aarch64_reduc_smax_nan_internalv4hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	169));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_nan_scal_v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HFmode, 0);
    rtx scratch = gen_reg_rtx (V4HFmode);
    emit_insn (gen_aarch64_reduc_smin_nan_internalv4hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	172));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_scal_v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HFmode, 0);
    rtx scratch = gen_reg_rtx (V4HFmode);
    emit_insn (gen_aarch64_reduc_smax_internalv4hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_scal_v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HFmode, 0);
    rtx scratch = gen_reg_rtx (V4HFmode);
    emit_insn (gen_aarch64_reduc_smin_internalv4hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_nan_scal_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HFmode, 0);
    rtx scratch = gen_reg_rtx (V8HFmode);
    emit_insn (gen_aarch64_reduc_smax_nan_internalv8hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	169));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_nan_scal_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HFmode, 0);
    rtx scratch = gen_reg_rtx (V8HFmode);
    emit_insn (gen_aarch64_reduc_smin_nan_internalv8hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	172));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_scal_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HFmode, 0);
    rtx scratch = gen_reg_rtx (V8HFmode);
    emit_insn (gen_aarch64_reduc_smax_internalv8hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_scal_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HFmode, 0);
    rtx scratch = gen_reg_rtx (V8HFmode);
    emit_insn (gen_aarch64_reduc_smin_internalv8hf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_nan_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SFmode, 0);
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_aarch64_reduc_smax_nan_internalv2sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	169));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_nan_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SFmode, 0);
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_aarch64_reduc_smin_nan_internalv2sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	172));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SFmode, 0);
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_aarch64_reduc_smax_internalv2sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SFmode, 0);
    rtx scratch = gen_reg_rtx (V2SFmode);
    emit_insn (gen_aarch64_reduc_smin_internalv2sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_nan_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SFmode, 0);
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_aarch64_reduc_smax_nan_internalv4sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	169));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_nan_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SFmode, 0);
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_aarch64_reduc_smin_nan_internalv4sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	172));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SFmode, 0);
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_aarch64_reduc_smax_internalv4sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SFmode, 0);
    rtx scratch = gen_reg_rtx (V4SFmode);
    emit_insn (gen_aarch64_reduc_smin_internalv4sf (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4sf (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_nan_scal_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2DFmode, 0);
    rtx scratch = gen_reg_rtx (V2DFmode);
    emit_insn (gen_aarch64_reduc_smax_nan_internalv2df (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2df (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	169));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_nan_scal_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2DFmode, 0);
    rtx scratch = gen_reg_rtx (V2DFmode);
    emit_insn (gen_aarch64_reduc_smin_nan_internalv2df (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2df (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	172));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smax_scal_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2DFmode, 0);
    rtx scratch = gen_reg_rtx (V2DFmode);
    emit_insn (gen_aarch64_reduc_smax_internalv2df (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2df (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3496 */
rtx
gen_reduc_smin_scal_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3501 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2DFmode, 0);
    rtx scratch = gen_reg_rtx (V2DFmode);
    emit_insn (gen_aarch64_reduc_smin_internalv2df (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2df (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmax_scal_v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_v4hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smax_scal_v4hf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmin_scal_v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_v4hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smin_scal_v4hf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmax_scal_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_v8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smax_scal_v8hf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmin_scal_v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_v8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smin_scal_v8hf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmax_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_v2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smax_scal_v2sf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmin_scal_v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_v2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smin_scal_v2sf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmax_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_v4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smax_scal_v4sf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmin_scal_v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_v4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smin_scal_v4sf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmax_scal_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_v2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smax_scal_v2df (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3511 */
rtx
gen_reduc_fmin_scal_v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_v2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3516 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn (gen_reduc_smin_scal_v2df (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umax_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8QImode, 0);
    rtx scratch = gen_reg_rtx (V8QImode);
    emit_insn (gen_aarch64_reduc_umax_internalv8qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	179));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umin_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8QImode, 0);
    rtx scratch = gen_reg_rtx (V8QImode);
    emit_insn (gen_aarch64_reduc_umin_internalv8qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	180));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smax_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8QImode, 0);
    rtx scratch = gen_reg_rtx (V8QImode);
    emit_insn (gen_aarch64_reduc_smax_internalv8qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	177));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smin_scal_v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8QImode, 0);
    rtx scratch = gen_reg_rtx (V8QImode);
    emit_insn (gen_aarch64_reduc_smin_internalv8qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	178));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umax_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V16QImode, 0);
    rtx scratch = gen_reg_rtx (V16QImode);
    emit_insn (gen_aarch64_reduc_umax_internalv16qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev16qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	179));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umin_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V16QImode, 0);
    rtx scratch = gen_reg_rtx (V16QImode);
    emit_insn (gen_aarch64_reduc_umin_internalv16qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev16qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	180));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smax_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V16QImode, 0);
    rtx scratch = gen_reg_rtx (V16QImode);
    emit_insn (gen_aarch64_reduc_smax_internalv16qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev16qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	177));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smin_scal_v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V16QImode, 0);
    rtx scratch = gen_reg_rtx (V16QImode);
    emit_insn (gen_aarch64_reduc_smin_internalv16qi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev16qi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (1,
		operand1),
	178));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umax_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HImode, 0);
    rtx scratch = gen_reg_rtx (V4HImode);
    emit_insn (gen_aarch64_reduc_umax_internalv4hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	179));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umin_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HImode, 0);
    rtx scratch = gen_reg_rtx (V4HImode);
    emit_insn (gen_aarch64_reduc_umin_internalv4hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	180));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smax_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HImode, 0);
    rtx scratch = gen_reg_rtx (V4HImode);
    emit_insn (gen_aarch64_reduc_smax_internalv4hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	177));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smin_scal_v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4HImode, 0);
    rtx scratch = gen_reg_rtx (V4HImode);
    emit_insn (gen_aarch64_reduc_smin_internalv4hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	178));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umax_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HImode, 0);
    rtx scratch = gen_reg_rtx (V8HImode);
    emit_insn (gen_aarch64_reduc_umax_internalv8hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	179));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umin_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HImode, 0);
    rtx scratch = gen_reg_rtx (V8HImode);
    emit_insn (gen_aarch64_reduc_umin_internalv8hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	180));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smax_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HImode, 0);
    rtx scratch = gen_reg_rtx (V8HImode);
    emit_insn (gen_aarch64_reduc_smax_internalv8hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	177));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smin_scal_v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V8HImode, 0);
    rtx scratch = gen_reg_rtx (V8HImode);
    emit_insn (gen_aarch64_reduc_smin_internalv8hi (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev8hi (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (1,
		operand1),
	178));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umax_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SImode, 0);
    rtx scratch = gen_reg_rtx (V2SImode);
    emit_insn (gen_aarch64_reduc_umax_internalv2si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	179));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umin_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SImode, 0);
    rtx scratch = gen_reg_rtx (V2SImode);
    emit_insn (gen_aarch64_reduc_umin_internalv2si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	180));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smax_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SImode, 0);
    rtx scratch = gen_reg_rtx (V2SImode);
    emit_insn (gen_aarch64_reduc_smax_internalv2si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	177));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smin_scal_v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V2SImode, 0);
    rtx scratch = gen_reg_rtx (V2SImode);
    emit_insn (gen_aarch64_reduc_smin_internalv2si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev2si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	178));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umax_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SImode, 0);
    rtx scratch = gen_reg_rtx (V4SImode);
    emit_insn (gen_aarch64_reduc_umax_internalv4si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	179));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_umin_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SImode, 0);
    rtx scratch = gen_reg_rtx (V4SImode);
    emit_insn (gen_aarch64_reduc_umin_internalv4si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	180));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smax_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SImode, 0);
    rtx scratch = gen_reg_rtx (V4SImode);
    emit_insn (gen_aarch64_reduc_smax_internalv4si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	177));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3523 */
rtx
gen_reduc_smin_scal_v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3528 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx elt = aarch64_endian_lane_rtx (V4SImode, 0);
    rtx scratch = gen_reg_rtx (V4SImode);
    emit_insn (gen_aarch64_reduc_smin_internalv4si (scratch,
							 operands[1]));
    emit_insn (gen_aarch64_get_lanev4si (operands[0], scratch, elt));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (1,
		operand1),
	178));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3636 */
extern rtx_insn *gen_split_115 (rtx_insn *, rtx *);
rtx_insn *
gen_split_115 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_115 (aarch64-simd.md:3636)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3654 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* Split back to individual operations.  If we're before reload, and
     able to create a temporary register, do so.  If we're after reload,
     we've got an early-clobber destination register, so use that.
     Otherwise, we can't create pseudos and we can't yet guarantee that
     operands[0] is safe to write, so FAIL to split.  */

  rtx scratch;
  if (reload_completed)
    scratch = operands[0];
  else if (can_create_pseudo_p ())
    scratch = gen_reg_rtx (DImode);
  else
    FAIL;

  emit_insn (gen_xordi3 (scratch, operands[2], operands[3]));
  emit_insn (gen_anddi3 (scratch, scratch, operands[1]));
  emit_insn (gen_xordi3 (operands[0], scratch, operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (operand1, true);
  emit (copy_rtx (operand1), true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3678 */
extern rtx_insn *gen_split_116 (rtx_insn *, rtx *);
rtx_insn *
gen_split_116 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_116 (aarch64-simd.md:3678)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3696 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* Split back to individual operations.  If we're before reload, and
     able to create a temporary register, do so.  If we're after reload,
     we've got an early-clobber destination register, so use that.
     Otherwise, we can't create pseudos and we can't yet guarantee that
     operands[0] is safe to write, so FAIL to split.  */

  rtx scratch;
  if (reload_completed)
    scratch = operands[0];
  else if (can_create_pseudo_p ())
    scratch = gen_reg_rtx (DImode);
  else
    FAIL;

  emit_insn (gen_xordi3 (scratch, operands[2], operands[3]));
  emit_insn (gen_anddi3 (scratch, scratch, operands[1]));
  emit_insn (gen_xordi3 (operands[0], scratch, operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V8QImode))
    {
      operands[2] = gen_lowpart (V8QImode, operands[2]);
      operands[3] = gen_lowpart (V8QImode, operands[3]);
      tmp = gen_reg_rtx (V8QImode);
    }
  operands[1] = gen_lowpart (V8QImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv8qi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V8QImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V16QImode))
    {
      operands[2] = gen_lowpart (V16QImode, operands[2]);
      operands[3] = gen_lowpart (V16QImode, operands[3]);
      tmp = gen_reg_rtx (V16QImode);
    }
  operands[1] = gen_lowpart (V16QImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv16qi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V16QImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V4HImode))
    {
      operands[2] = gen_lowpart (V4HImode, operands[2]);
      operands[3] = gen_lowpart (V4HImode, operands[3]);
      tmp = gen_reg_rtx (V4HImode);
    }
  operands[1] = gen_lowpart (V4HImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv4hi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V4HImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V8HImode))
    {
      operands[2] = gen_lowpart (V8HImode, operands[2]);
      operands[3] = gen_lowpart (V8HImode, operands[3]);
      tmp = gen_reg_rtx (V8HImode);
    }
  operands[1] = gen_lowpart (V8HImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv8hi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V8HImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V2SImode))
    {
      operands[2] = gen_lowpart (V2SImode, operands[2]);
      operands[3] = gen_lowpart (V2SImode, operands[3]);
      tmp = gen_reg_rtx (V2SImode);
    }
  operands[1] = gen_lowpart (V2SImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv2si_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V2SImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V4SImode))
    {
      operands[2] = gen_lowpart (V4SImode, operands[2]);
      operands[3] = gen_lowpart (V4SImode, operands[3]);
      tmp = gen_reg_rtx (V4SImode);
    }
  operands[1] = gen_lowpart (V4SImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv4si_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V4SImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv4bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V4BFmode))
    {
      operands[2] = gen_lowpart (V4HImode, operands[2]);
      operands[3] = gen_lowpart (V4HImode, operands[3]);
      tmp = gen_reg_rtx (V4HImode);
    }
  operands[1] = gen_lowpart (V4HImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv4hi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V4BFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V8BFmode))
    {
      operands[2] = gen_lowpart (V8HImode, operands[2]);
      operands[3] = gen_lowpart (V8HImode, operands[3]);
      tmp = gen_reg_rtx (V8HImode);
    }
  operands[1] = gen_lowpart (V8HImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv8hi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V8BFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V2DImode))
    {
      operands[2] = gen_lowpart (V2DImode, operands[2]);
      operands[3] = gen_lowpart (V2DImode, operands[3]);
      tmp = gen_reg_rtx (V2DImode);
    }
  operands[1] = gen_lowpart (V2DImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv2di_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V2DImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V4HFmode))
    {
      operands[2] = gen_lowpart (V4HImode, operands[2]);
      operands[3] = gen_lowpart (V4HImode, operands[3]);
      tmp = gen_reg_rtx (V4HImode);
    }
  operands[1] = gen_lowpart (V4HImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv4hi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V4HFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V8HFmode))
    {
      operands[2] = gen_lowpart (V8HImode, operands[2]);
      operands[3] = gen_lowpart (V8HImode, operands[3]);
      tmp = gen_reg_rtx (V8HImode);
    }
  operands[1] = gen_lowpart (V8HImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv8hi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V8HFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V2SFmode))
    {
      operands[2] = gen_lowpart (V2SImode, operands[2]);
      operands[3] = gen_lowpart (V2SImode, operands[3]);
      tmp = gen_reg_rtx (V2SImode);
    }
  operands[1] = gen_lowpart (V2SImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv2si_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V2SFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V4SFmode))
    {
      operands[2] = gen_lowpart (V4SImode, operands[2]);
      operands[3] = gen_lowpart (V4SImode, operands[3]);
      tmp = gen_reg_rtx (V4SImode);
    }
  operands[1] = gen_lowpart (V4SImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv4si_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V4SFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bslv2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (V2DFmode))
    {
      operands[2] = gen_lowpart (V2DImode, operands[2]);
      operands[3] = gen_lowpart (V2DImode, operands[3]);
      tmp = gen_reg_rtx (V2DImode);
    }
  operands[1] = gen_lowpart (V2DImode, operands[1]);
  emit_insn (gen_aarch64_simd_bslv2di_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (V2DFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bsldi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (DImode))
    {
      operands[2] = gen_lowpart (DImode, operands[2]);
      operands[3] = gen_lowpart (DImode, operands[3]);
      tmp = gen_reg_rtx (DImode);
    }
  operands[1] = gen_lowpart (DImode, operands[1]);
  emit_insn (gen_aarch64_simd_bsldi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (DImode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3720 */
rtx
gen_aarch64_simd_bsldf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3726 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* We can't alias operands together if they have different modes.  */
  rtx tmp = operands[0];
  if (FLOAT_MODE_P (DFmode))
    {
      operands[2] = gen_lowpart (DImode, operands[2]);
      operands[3] = gen_lowpart (DImode, operands[3]);
      tmp = gen_reg_rtx (DImode);
    }
  operands[1] = gen_lowpart (DImode, operands[1]);
  emit_insn (gen_aarch64_simd_bsldi_internal (tmp,
							 operands[1],
							 operands[2],
							 operands[3]));
  if (tmp != operands[0])
    emit_move_insn (operands[0], gen_lowpart (DFmode, tmp));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v8qiv8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V8QImode)
      && operands[2] == CONST0_RTX (V8QImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V8QImode)
	   && operands[2] == CONSTM1_RTX (V8QImode))
    emit_insn (gen_one_cmplv8qi2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V8QImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V8QImode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv8qi (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V16QImode)
      && operands[2] == CONST0_RTX (V16QImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V16QImode)
	   && operands[2] == CONSTM1_RTX (V16QImode))
    emit_insn (gen_one_cmplv16qi2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V16QImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V16QImode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv16qi (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4hiv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V4HImode)
      && operands[2] == CONST0_RTX (V4HImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V4HImode)
	   && operands[2] == CONSTM1_RTX (V4HImode))
    emit_insn (gen_one_cmplv4hi2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V4HImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V4HImode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv4hi (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V8HImode)
      && operands[2] == CONST0_RTX (V8HImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V8HImode)
	   && operands[2] == CONSTM1_RTX (V8HImode))
    emit_insn (gen_one_cmplv8hi2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V8HImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V8HImode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv8hi (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v2siv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V2SImode)
      && operands[2] == CONST0_RTX (V2SImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V2SImode)
	   && operands[2] == CONSTM1_RTX (V2SImode))
    emit_insn (gen_one_cmplv2si2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V2SImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V2SImode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv2si (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V4SImode)
      && operands[2] == CONST0_RTX (V4SImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V4SImode)
	   && operands[2] == CONSTM1_RTX (V4SImode))
    emit_insn (gen_one_cmplv4si2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V4SImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V4SImode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv4si (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v2div2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V2DImode)
      && operands[2] == CONST0_RTX (V2DImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V2DImode)
	   && operands[2] == CONSTM1_RTX (V2DImode))
    emit_insn (gen_one_cmplv2di2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V2DImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V2DImode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv2di (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v2sfv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V2SFmode)
      && operands[2] == CONST0_RTX (V2SFmode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V2SFmode)
	   && operands[2] == CONSTM1_RTX (V2SFmode))
    emit_insn (gen_one_cmplv2si2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V2SFmode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V2SFmode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv2sf (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v4sfv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V4SFmode)
      && operands[2] == CONST0_RTX (V4SFmode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V4SFmode)
	   && operands[2] == CONSTM1_RTX (V4SFmode))
    emit_insn (gen_one_cmplv4si2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V4SFmode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V4SFmode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv4sf (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_v2dfv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_v2dfv2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (V2DFmode)
      && operands[2] == CONST0_RTX (V2DFmode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (V2DFmode)
	   && operands[2] == CONSTM1_RTX (V2DFmode))
    emit_insn (gen_one_cmplv2di2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (V2DFmode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (V2DFmode, operands[2]);
      emit_insn (gen_aarch64_simd_bslv2df (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3746 */
rtx
gen_vcond_mask_didi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_didi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3752 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* If we have (a = (P) ? -1 : 0);
     Then we can simply move the generated mask (result must be int).  */
  if (operands[1] == CONSTM1_RTX (DImode)
      && operands[2] == CONST0_RTX (DImode))
    emit_move_insn (operands[0], operands[3]);
  /* Similarly, (a = (P) ? 0 : -1) is just inverting the generated mask.  */
  else if (operands[1] == CONST0_RTX (DImode)
	   && operands[2] == CONSTM1_RTX (DImode))
    emit_insn (gen_one_cmpldi2 (operands[0], operands[3]));
  else
    {
      if (!REG_P (operands[1]))
	operands[1] = force_reg (DImode, operands[1]);
      if (!REG_P (operands[2]))
	operands[2] = force_reg (DImode, operands[2]);
      emit_insn (gen_aarch64_simd_bsldi (operands[0], operands[3],
					     operands[1], operands[2]));
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V8QImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V8QImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltv8qi (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgev8qi (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmlev8qi (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtv8qi (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtuv8qi (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeuv8qi (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeuv8qi (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtuv8qi (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqv8qi (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmplv8qi2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqv8qi (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V16QImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V16QImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltv16qi (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgev16qi (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmlev16qi (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtv16qi (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtuv16qi (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeuv16qi (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeuv16qi (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtuv16qi (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqv16qi (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmplv16qi2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqv16qi (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V4HImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V4HImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltv4hi (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgev4hi (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmlev4hi (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtv4hi (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtuv4hi (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeuv4hi (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeuv4hi (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtuv4hi (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqv4hi (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmplv4hi2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqv4hi (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V8HImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V8HImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltv8hi (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgev8hi (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmlev8hi (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtv8hi (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtuv8hi (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeuv8hi (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeuv8hi (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtuv8hi (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqv8hi (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmplv8hi2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqv8hi (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V2SImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V2SImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltv2si (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgev2si (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmlev2si (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtv2si (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtuv2si (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeuv2si (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeuv2si (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtuv2si (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqv2si (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmplv2si2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqv2si (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V4SImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V4SImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltv4si (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgev4si (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmlev4si (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtv4si (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtuv4si (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeuv4si (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeuv4si (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtuv4si (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqv4si (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmplv4si2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqv4si (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpv2div2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V2DImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V2DImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltv2di (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgev2di (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmlev2di (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtv2di (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtuv2di (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeuv2di (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeuv2di (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtuv2di (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqv2di (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmplv2di2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqv2di (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3777 */
rtx
gen_vec_cmpdidi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3783 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = operands[0];
  enum rtx_code code = GET_CODE (operands[1]);

  switch (code)
    {
    case NE:
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (DImode))
	break;

      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (DImode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      emit_insn (gen_aarch64_cmltdi (mask, operands[2], operands[3]));
      break;

    case GE:
      emit_insn (gen_aarch64_cmgedi (mask, operands[2], operands[3]));
      break;

    case LE:
      emit_insn (gen_aarch64_cmledi (mask, operands[2], operands[3]));
      break;

    case GT:
      emit_insn (gen_aarch64_cmgtdi (mask, operands[2], operands[3]));
      break;

    case LTU:
      emit_insn (gen_aarch64_cmgtudi (mask, operands[3], operands[2]));
      break;

    case GEU:
      emit_insn (gen_aarch64_cmgeudi (mask, operands[2], operands[3]));
      break;

    case LEU:
      emit_insn (gen_aarch64_cmgeudi (mask, operands[3], operands[2]));
      break;

    case GTU:
      emit_insn (gen_aarch64_cmgtudi (mask, operands[2], operands[3]));
      break;

    case NE:
      /* Handle NE as !EQ.  */
      emit_insn (gen_aarch64_cmeqdi (mask, operands[2], operands[3]));
      emit_insn (gen_one_cmpldi2 (mask, mask));
      break;

    case EQ:
      emit_insn (gen_aarch64_cmeqdi (mask, operands[2], operands[3]));
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3857 */
rtx
gen_vec_cmpv2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int use_zero_form = 0;
  enum rtx_code code = GET_CODE (operands[1]);
  rtx tmp = gen_reg_rtx (V2SImode);

  rtx (*comparison) (rtx, rtx, rtx) = NULL;

  switch (code)
    {
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V2SFmode))
	{
	  use_zero_form = 1;
	  break;
	}
      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V2SFmode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      if (use_zero_form)
	{
	  comparison = gen_aarch64_cmltv2sf;
	  break;
	}
      /* Fall through.  */
    case UNLT:
      std::swap (operands[2], operands[3]);
      /* Fall through.  */
    case UNGT:
    case GT:
      comparison = gen_aarch64_cmgtv2sf;
      break;
    case LE:
      if (use_zero_form)
	{
	  comparison = gen_aarch64_cmlev2sf;
	  break;
	}
      /* Fall through.  */
    case UNLE:
      std::swap (operands[2], operands[3]);
      /* Fall through.  */
    case UNGE:
    case GE:
      comparison = gen_aarch64_cmgev2sf;
      break;
    case NE:
    case EQ:
      comparison = gen_aarch64_cmeqv2sf;
      break;
    case UNEQ:
    case ORDERED:
    case UNORDERED:
    case LTGT:
      break;
    default:
      gcc_unreachable ();
    }

  switch (code)
    {
    case UNGE:
    case UNGT:
    case UNLE:
    case UNLT:
      {
	/* All of the above must not raise any FP exceptions.  Thus we first
	   check each operand for NaNs and force any elements containing NaN to
	   zero before using them in the compare.
	   Example: UN<cc> (a, b) -> UNORDERED (a, b) |
				     (cm<cc> (isnan (a) ? 0.0 : a,
					      isnan (b) ? 0.0 : b))
	   We use the following transformations for doing the comparisions:
	   a UNGE b -> a GE b
	   a UNGT b -> a GT b
	   a UNLE b -> b GE a
	   a UNLT b -> b GT a.  */

	rtx tmp0 = gen_reg_rtx (V2SImode);
	rtx tmp1 = gen_reg_rtx (V2SImode);
	rtx tmp2 = gen_reg_rtx (V2SImode);
	emit_insn (gen_aarch64_cmeqv2sf (tmp0, operands[2], operands[2]));
	emit_insn (gen_aarch64_cmeqv2sf (tmp1, operands[3], operands[3]));
	emit_insn (gen_andv2si3 (tmp2, tmp0, tmp1));
	emit_insn (gen_andv2si3 (tmp0, tmp0,
					  lowpart_subreg (V2SImode,
							  operands[2],
							  V2SFmode)));
	emit_insn (gen_andv2si3 (tmp1, tmp1,
					  lowpart_subreg (V2SImode,
							  operands[3],
							  V2SFmode)));
	gcc_assert (comparison != NULL);
	emit_insn (comparison (operands[0],
			       lowpart_subreg (V2SFmode,
					       tmp0, V2SImode),
			       lowpart_subreg (V2SFmode,
					       tmp1, V2SImode)));
	emit_insn (gen_ornv2si3 (operands[0], tmp2, operands[0]));
      }
      break;

    case LT:
    case LE:
    case GT:
    case GE:
    case EQ:
    case NE:
      /* The easy case.  Here we emit one of FCMGE, FCMGT or FCMEQ.
	 As a LT b <=> b GE a && a LE b <=> b GT a.  Our transformations are:
	 a GE b -> a GE b
	 a GT b -> a GT b
	 a LE b -> b GE a
	 a LT b -> b GT a
	 a EQ b -> a EQ b
	 a NE b -> ~(a EQ b)  */
      gcc_assert (comparison != NULL);
      emit_insn (comparison (operands[0], operands[2], operands[3]));
      if (code == NE)
	emit_insn (gen_one_cmplv2si2 (operands[0], operands[0]));
      break;

    case LTGT:
      /* LTGT is not guranteed to not generate a FP exception.  So let's
	 go the faster way : ((a > b) || (b > a)).  */
      emit_insn (gen_aarch64_cmgtv2sf (operands[0],
					 operands[2], operands[3]));
      emit_insn (gen_aarch64_cmgtv2sf (tmp, operands[3], operands[2]));
      emit_insn (gen_iorv2si3 (operands[0], operands[0], tmp));
      break;

    case ORDERED:
    case UNORDERED:
    case UNEQ:
      /* cmeq (a, a) & cmeq (b, b).  */
      emit_insn (gen_aarch64_cmeqv2sf (operands[0],
					 operands[2], operands[2]));
      emit_insn (gen_aarch64_cmeqv2sf (tmp, operands[3], operands[3]));
      emit_insn (gen_andv2si3 (operands[0], operands[0], tmp));

      if (code == UNORDERED)
	emit_insn (gen_one_cmplv2si2 (operands[0], operands[0]));
      else if (code == UNEQ)
	{
	  emit_insn (gen_aarch64_cmeqv2sf (tmp, operands[2], operands[3]));
	  emit_insn (gen_ornv2si3 (operands[0], operands[0], tmp));
	}
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3857 */
rtx
gen_vec_cmpv4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int use_zero_form = 0;
  enum rtx_code code = GET_CODE (operands[1]);
  rtx tmp = gen_reg_rtx (V4SImode);

  rtx (*comparison) (rtx, rtx, rtx) = NULL;

  switch (code)
    {
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V4SFmode))
	{
	  use_zero_form = 1;
	  break;
	}
      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V4SFmode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      if (use_zero_form)
	{
	  comparison = gen_aarch64_cmltv4sf;
	  break;
	}
      /* Fall through.  */
    case UNLT:
      std::swap (operands[2], operands[3]);
      /* Fall through.  */
    case UNGT:
    case GT:
      comparison = gen_aarch64_cmgtv4sf;
      break;
    case LE:
      if (use_zero_form)
	{
	  comparison = gen_aarch64_cmlev4sf;
	  break;
	}
      /* Fall through.  */
    case UNLE:
      std::swap (operands[2], operands[3]);
      /* Fall through.  */
    case UNGE:
    case GE:
      comparison = gen_aarch64_cmgev4sf;
      break;
    case NE:
    case EQ:
      comparison = gen_aarch64_cmeqv4sf;
      break;
    case UNEQ:
    case ORDERED:
    case UNORDERED:
    case LTGT:
      break;
    default:
      gcc_unreachable ();
    }

  switch (code)
    {
    case UNGE:
    case UNGT:
    case UNLE:
    case UNLT:
      {
	/* All of the above must not raise any FP exceptions.  Thus we first
	   check each operand for NaNs and force any elements containing NaN to
	   zero before using them in the compare.
	   Example: UN<cc> (a, b) -> UNORDERED (a, b) |
				     (cm<cc> (isnan (a) ? 0.0 : a,
					      isnan (b) ? 0.0 : b))
	   We use the following transformations for doing the comparisions:
	   a UNGE b -> a GE b
	   a UNGT b -> a GT b
	   a UNLE b -> b GE a
	   a UNLT b -> b GT a.  */

	rtx tmp0 = gen_reg_rtx (V4SImode);
	rtx tmp1 = gen_reg_rtx (V4SImode);
	rtx tmp2 = gen_reg_rtx (V4SImode);
	emit_insn (gen_aarch64_cmeqv4sf (tmp0, operands[2], operands[2]));
	emit_insn (gen_aarch64_cmeqv4sf (tmp1, operands[3], operands[3]));
	emit_insn (gen_andv4si3 (tmp2, tmp0, tmp1));
	emit_insn (gen_andv4si3 (tmp0, tmp0,
					  lowpart_subreg (V4SImode,
							  operands[2],
							  V4SFmode)));
	emit_insn (gen_andv4si3 (tmp1, tmp1,
					  lowpart_subreg (V4SImode,
							  operands[3],
							  V4SFmode)));
	gcc_assert (comparison != NULL);
	emit_insn (comparison (operands[0],
			       lowpart_subreg (V4SFmode,
					       tmp0, V4SImode),
			       lowpart_subreg (V4SFmode,
					       tmp1, V4SImode)));
	emit_insn (gen_ornv4si3 (operands[0], tmp2, operands[0]));
      }
      break;

    case LT:
    case LE:
    case GT:
    case GE:
    case EQ:
    case NE:
      /* The easy case.  Here we emit one of FCMGE, FCMGT or FCMEQ.
	 As a LT b <=> b GE a && a LE b <=> b GT a.  Our transformations are:
	 a GE b -> a GE b
	 a GT b -> a GT b
	 a LE b -> b GE a
	 a LT b -> b GT a
	 a EQ b -> a EQ b
	 a NE b -> ~(a EQ b)  */
      gcc_assert (comparison != NULL);
      emit_insn (comparison (operands[0], operands[2], operands[3]));
      if (code == NE)
	emit_insn (gen_one_cmplv4si2 (operands[0], operands[0]));
      break;

    case LTGT:
      /* LTGT is not guranteed to not generate a FP exception.  So let's
	 go the faster way : ((a > b) || (b > a)).  */
      emit_insn (gen_aarch64_cmgtv4sf (operands[0],
					 operands[2], operands[3]));
      emit_insn (gen_aarch64_cmgtv4sf (tmp, operands[3], operands[2]));
      emit_insn (gen_iorv4si3 (operands[0], operands[0], tmp));
      break;

    case ORDERED:
    case UNORDERED:
    case UNEQ:
      /* cmeq (a, a) & cmeq (b, b).  */
      emit_insn (gen_aarch64_cmeqv4sf (operands[0],
					 operands[2], operands[2]));
      emit_insn (gen_aarch64_cmeqv4sf (tmp, operands[3], operands[3]));
      emit_insn (gen_andv4si3 (operands[0], operands[0], tmp));

      if (code == UNORDERED)
	emit_insn (gen_one_cmplv4si2 (operands[0], operands[0]));
      else if (code == UNEQ)
	{
	  emit_insn (gen_aarch64_cmeqv4sf (tmp, operands[2], operands[3]));
	  emit_insn (gen_ornv4si3 (operands[0], operands[0], tmp));
	}
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:3857 */
rtx
gen_vec_cmpv2dfv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int use_zero_form = 0;
  enum rtx_code code = GET_CODE (operands[1]);
  rtx tmp = gen_reg_rtx (V2DImode);

  rtx (*comparison) (rtx, rtx, rtx) = NULL;

  switch (code)
    {
    case LE:
    case LT:
    case GE:
    case GT:
    case EQ:
      if (operands[3] == CONST0_RTX (V2DFmode))
	{
	  use_zero_form = 1;
	  break;
	}
      /* Fall through.  */
    default:
      if (!REG_P (operands[3]))
	operands[3] = force_reg (V2DFmode, operands[3]);

      break;
    }

  switch (code)
    {
    case LT:
      if (use_zero_form)
	{
	  comparison = gen_aarch64_cmltv2df;
	  break;
	}
      /* Fall through.  */
    case UNLT:
      std::swap (operands[2], operands[3]);
      /* Fall through.  */
    case UNGT:
    case GT:
      comparison = gen_aarch64_cmgtv2df;
      break;
    case LE:
      if (use_zero_form)
	{
	  comparison = gen_aarch64_cmlev2df;
	  break;
	}
      /* Fall through.  */
    case UNLE:
      std::swap (operands[2], operands[3]);
      /* Fall through.  */
    case UNGE:
    case GE:
      comparison = gen_aarch64_cmgev2df;
      break;
    case NE:
    case EQ:
      comparison = gen_aarch64_cmeqv2df;
      break;
    case UNEQ:
    case ORDERED:
    case UNORDERED:
    case LTGT:
      break;
    default:
      gcc_unreachable ();
    }

  switch (code)
    {
    case UNGE:
    case UNGT:
    case UNLE:
    case UNLT:
      {
	/* All of the above must not raise any FP exceptions.  Thus we first
	   check each operand for NaNs and force any elements containing NaN to
	   zero before using them in the compare.
	   Example: UN<cc> (a, b) -> UNORDERED (a, b) |
				     (cm<cc> (isnan (a) ? 0.0 : a,
					      isnan (b) ? 0.0 : b))
	   We use the following transformations for doing the comparisions:
	   a UNGE b -> a GE b
	   a UNGT b -> a GT b
	   a UNLE b -> b GE a
	   a UNLT b -> b GT a.  */

	rtx tmp0 = gen_reg_rtx (V2DImode);
	rtx tmp1 = gen_reg_rtx (V2DImode);
	rtx tmp2 = gen_reg_rtx (V2DImode);
	emit_insn (gen_aarch64_cmeqv2df (tmp0, operands[2], operands[2]));
	emit_insn (gen_aarch64_cmeqv2df (tmp1, operands[3], operands[3]));
	emit_insn (gen_andv2di3 (tmp2, tmp0, tmp1));
	emit_insn (gen_andv2di3 (tmp0, tmp0,
					  lowpart_subreg (V2DImode,
							  operands[2],
							  V2DFmode)));
	emit_insn (gen_andv2di3 (tmp1, tmp1,
					  lowpart_subreg (V2DImode,
							  operands[3],
							  V2DFmode)));
	gcc_assert (comparison != NULL);
	emit_insn (comparison (operands[0],
			       lowpart_subreg (V2DFmode,
					       tmp0, V2DImode),
			       lowpart_subreg (V2DFmode,
					       tmp1, V2DImode)));
	emit_insn (gen_ornv2di3 (operands[0], tmp2, operands[0]));
      }
      break;

    case LT:
    case LE:
    case GT:
    case GE:
    case EQ:
    case NE:
      /* The easy case.  Here we emit one of FCMGE, FCMGT or FCMEQ.
	 As a LT b <=> b GE a && a LE b <=> b GT a.  Our transformations are:
	 a GE b -> a GE b
	 a GT b -> a GT b
	 a LE b -> b GE a
	 a LT b -> b GT a
	 a EQ b -> a EQ b
	 a NE b -> ~(a EQ b)  */
      gcc_assert (comparison != NULL);
      emit_insn (comparison (operands[0], operands[2], operands[3]));
      if (code == NE)
	emit_insn (gen_one_cmplv2di2 (operands[0], operands[0]));
      break;

    case LTGT:
      /* LTGT is not guranteed to not generate a FP exception.  So let's
	 go the faster way : ((a > b) || (b > a)).  */
      emit_insn (gen_aarch64_cmgtv2df (operands[0],
					 operands[2], operands[3]));
      emit_insn (gen_aarch64_cmgtv2df (tmp, operands[3], operands[2]));
      emit_insn (gen_iorv2di3 (operands[0], operands[0], tmp));
      break;

    case ORDERED:
    case UNORDERED:
    case UNEQ:
      /* cmeq (a, a) & cmeq (b, b).  */
      emit_insn (gen_aarch64_cmeqv2df (operands[0],
					 operands[2], operands[2]));
      emit_insn (gen_aarch64_cmeqv2df (tmp, operands[3], operands[3]));
      emit_insn (gen_andv2di3 (operands[0], operands[0], tmp));

      if (code == UNORDERED)
	emit_insn (gen_one_cmplv2di2 (operands[0], operands[0]));
      else if (code == UNEQ)
	{
	  emit_insn (gen_aarch64_cmeqv2df (tmp, operands[2], operands[3]));
	  emit_insn (gen_ornv2di3 (operands[0], operands[0], tmp));
	}
      break;

    default:
      gcc_unreachable ();
    }

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpuv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpv8qiv8qi (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpuv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpv16qiv16qi (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpuv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpv4hiv4hi (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpuv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpv8hiv8hi (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpuv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpv2siv2si (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpuv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpv4siv4si (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpuv2div2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpv2div2di (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4030 */
rtx
gen_vec_cmpudidi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_vec_cmpdidi (operands[0], operands[1],
				      operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VOIDmode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv8qiv8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V8QImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv8qiv8qi (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v8qiv8qi (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V16QImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv16qiv16qi (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v16qiv16qi (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V16QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4hiv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4HImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4hiv4hi (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4hiv4hi (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V8HImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv8hiv8hi (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v8hiv8hi (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2siv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2siv2si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2siv2si (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4siv4si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4siv4si (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv2div2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2div2di (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2div2di (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv2sfv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2sfv2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2sfv2si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2sfv2si (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv4sfv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4sfv4si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4sfv4si (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vcondv2dfv2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2dfv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2dfv2di (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2dfv2di (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4042 */
rtx
gen_vconddidi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconddidi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4051 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpdidi (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_didi (operands[0], operands[1],
						 operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4072 */
rtx
gen_vcondv2siv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2siv2sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2sfv2si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2siv2si (
						operands[0], operands[1],
						operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4072 */
rtx
gen_vcondv2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2sfv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2siv2si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2sfv2si (
						operands[0], operands[1],
						operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4072 */
rtx
gen_vcondv4siv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4siv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4sfv4si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4siv4si (
						operands[0], operands[1],
						operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4072 */
rtx
gen_vcondv4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv4sfv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4siv4si (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4sfv4si (
						operands[0], operands[1],
						operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4072 */
rtx
gen_vcondv2div2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2div2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2dfv2di (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2div2di (
						operands[0], operands[1],
						operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4072 */
rtx
gen_vcondv2dfv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondv2dfv2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4081 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2div2di (mask, operands[3],
					     operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2dfv2di (
						operands[0], operands[1],
						operands[2], mask));

  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vconduv8qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv8qiv8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V8QImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv8qiv8qi (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v8qiv8qi (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vconduv16qiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V16QImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv16qiv16qi (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v16qiv16qi (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V16QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vconduv4hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv4hiv4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4HImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4hiv4hi (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4hiv4hi (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vconduv8hiv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V8HImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv8hiv8hi (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v8hiv8hi (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vconduv2siv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv2siv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2siv2si (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2siv2si (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vconduv4siv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4siv4si (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4siv4si (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vconduv2div2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2div2di (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2div2di (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4103 */
rtx
gen_vcondudidi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondudidi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpdidi (mask, operands[3],
				      operands[4], operands[5]));
  emit_insn (gen_vcond_mask_didi (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4132 */
rtx
gen_vconduv2sfv2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv2sfv2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4141 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2siv2si (
						  mask, operands[3],
						  operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2sfv2si (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4132 */
rtx
gen_vconduv4sfv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv4sfv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4141 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V4SImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv4siv4si (
						  mask, operands[3],
						  operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v4sfv4si (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4132 */
rtx
gen_vconduv2dfv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduv2dfv2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4141 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mask = gen_reg_rtx (V2DImode);
  enum rtx_code code = GET_CODE (operands[3]);

  /* NE is handled as !EQ in vec_cmp patterns, we can explicitly invert
     it as well as switch operands 1/2 in order to avoid the additional
     NOT instruction.  */
  if (code == NE)
    {
      operands[3] = gen_rtx_fmt_ee (EQ, GET_MODE (operands[3]),
				    operands[4], operands[5]);
      std::swap (operands[1], operands[2]);
    }
  emit_insn (gen_vec_cmpv2div2di (
						  mask, operands[3],
						  operands[4], operands[5]));
  emit_insn (gen_vcond_mask_v2dfv2di (operands[0], operands[1],
						 operands[2], mask));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (V2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_117 (rtx_insn *, rtx *);
rtx_insn *
gen_split_117 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_117 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], QImode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_118 (rtx_insn *, rtx *);
rtx_insn *
gen_split_118 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_118 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], QImode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_119 (rtx_insn *, rtx *);
rtx_insn *
gen_split_119 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_119 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], HImode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_120 (rtx_insn *, rtx *);
rtx_insn *
gen_split_120 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_120 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], HImode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_121 (rtx_insn *, rtx *);
rtx_insn *
gen_split_121 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_121 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], SImode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_122 (rtx_insn *, rtx *);
rtx_insn *
gen_split_122 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_122 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], SImode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_123 (rtx_insn *, rtx *);
rtx_insn *
gen_split_123 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_123 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], DImode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_124 (rtx_insn *, rtx *);
rtx_insn *
gen_split_124 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_124 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], HFmode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_125 (rtx_insn *, rtx *);
rtx_insn *
gen_split_125 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_125 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], HFmode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_126 (rtx_insn *, rtx *);
rtx_insn *
gen_split_126 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_126 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], BFmode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_127 (rtx_insn *, rtx *);
rtx_insn *
gen_split_127 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_127 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], BFmode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_128 (rtx_insn *, rtx *);
rtx_insn *
gen_split_128 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_128 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], SFmode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_129 (rtx_insn *, rtx *);
rtx_insn *
gen_split_129 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_129 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], SFmode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4200 */
extern rtx_insn *gen_split_130 (rtx_insn *, rtx *);
rtx_insn *
gen_split_130 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_130 (aarch64-simd.md:4200)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   operands[1] = aarch64_replace_reg_mode (operands[1], DFmode);
 }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V16QImode, operands[1], operands[2]))
    /* Use load_pair_lanesv8qi.  */
    ;
  else if (operands[hi] == CONST0_RTX (V8QImode))
    {
      /* Use *aarch64_combinezv8qi.  */
      if (!nonimmediate_operand (operands[lo], V8QImode))
	operands[lo] = force_reg (V8QImode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalv8qi.  */
      operands[lo] = force_reg (V8QImode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], V8QImode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (V8QImode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V8HImode, operands[1], operands[2]))
    /* Use load_pair_lanesv4hi.  */
    ;
  else if (operands[hi] == CONST0_RTX (V4HImode))
    {
      /* Use *aarch64_combinezv4hi.  */
      if (!nonimmediate_operand (operands[lo], V4HImode))
	operands[lo] = force_reg (V4HImode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalv4hi.  */
      operands[lo] = force_reg (V4HImode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], V4HImode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (V4HImode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatv4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V8BFmode, operands[1], operands[2]))
    /* Use load_pair_lanesv4bf.  */
    ;
  else if (operands[hi] == CONST0_RTX (V4BFmode))
    {
      /* Use *aarch64_combinezv4bf.  */
      if (!nonimmediate_operand (operands[lo], V4BFmode))
	operands[lo] = force_reg (V4BFmode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalv4bf.  */
      operands[lo] = force_reg (V4BFmode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], V4BFmode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (V4BFmode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8BFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V8HFmode, operands[1], operands[2]))
    /* Use load_pair_lanesv4hf.  */
    ;
  else if (operands[hi] == CONST0_RTX (V4HFmode))
    {
      /* Use *aarch64_combinezv4hf.  */
      if (!nonimmediate_operand (operands[lo], V4HFmode))
	operands[lo] = force_reg (V4HFmode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalv4hf.  */
      operands[lo] = force_reg (V4HFmode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], V4HFmode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (V4HFmode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V8HFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V4SImode, operands[1], operands[2]))
    /* Use load_pair_lanesv2si.  */
    ;
  else if (operands[hi] == CONST0_RTX (V2SImode))
    {
      /* Use *aarch64_combinezv2si.  */
      if (!nonimmediate_operand (operands[lo], V2SImode))
	operands[lo] = force_reg (V2SImode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalv2si.  */
      operands[lo] = force_reg (V2SImode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], V2SImode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (V2SImode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V4SFmode, operands[1], operands[2]))
    /* Use load_pair_lanesv2sf.  */
    ;
  else if (operands[hi] == CONST0_RTX (V2SFmode))
    {
      /* Use *aarch64_combinezv2sf.  */
      if (!nonimmediate_operand (operands[lo], V2SFmode))
	operands[lo] = force_reg (V2SFmode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalv2sf.  */
      operands[lo] = force_reg (V2SFmode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], V2SFmode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (V2SFmode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V4SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V2SImode, operands[1], operands[2]))
    /* Use load_pair_lanessi.  */
    ;
  else if (operands[hi] == CONST0_RTX (SImode))
    {
      /* Use *aarch64_combinezsi.  */
      if (!nonimmediate_operand (operands[lo], SImode))
	operands[lo] = force_reg (SImode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalsi.  */
      operands[lo] = force_reg (SImode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], SImode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (SImode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatsf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V2SFmode, operands[1], operands[2]))
    /* Use load_pair_lanessf.  */
    ;
  else if (operands[hi] == CONST0_RTX (SFmode))
    {
      /* Use *aarch64_combinezsf.  */
      if (!nonimmediate_operand (operands[lo], SFmode))
	operands[lo] = force_reg (SFmode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generalsf.  */
      operands[lo] = force_reg (SFmode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], SFmode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (SFmode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2SFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V2DImode, operands[1], operands[2]))
    /* Use load_pair_lanesdi.  */
    ;
  else if (operands[hi] == CONST0_RTX (DImode))
    {
      /* Use *aarch64_combinezdi.  */
      if (!nonimmediate_operand (operands[lo], DImode))
	operands[lo] = force_reg (DImode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generaldi.  */
      operands[lo] = force_reg (DImode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], DImode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (DImode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4348 */
rtx
gen_aarch64_vec_concatdf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int lo = BYTES_BIG_ENDIAN ? 2 : 1;
  int hi = BYTES_BIG_ENDIAN ? 1 : 2;

  if (MEM_P (operands[1])
      && MEM_P (operands[2])
      && aarch64_mergeable_load_pair_p (V2DFmode, operands[1], operands[2]))
    /* Use load_pair_lanesdf.  */
    ;
  else if (operands[hi] == CONST0_RTX (DFmode))
    {
      /* Use *aarch64_combinezdf.  */
      if (!nonimmediate_operand (operands[lo], DFmode))
	operands[lo] = force_reg (DFmode, operands[lo]);
    }
  else
    {
      /* Use *aarch64_combine_generaldf.  */
      operands[lo] = force_reg (DFmode, operands[lo]);
      if (!aarch64_simd_nonimmediate_operand (operands[hi], DFmode))
	{
	  if (MEM_P (operands[hi]))
	    {
	      rtx addr = force_reg (Pmode, XEXP (operands[hi], 0));
	      operands[hi] = replace_equiv_address (operands[hi], addr);
	    }
	  else
	    operands[hi] = force_reg (DFmode, operands[hi]);
	}
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_CONCAT (V2DFmode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatv8qi (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatv4hi (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinev4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatv4bf (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatv4hf (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatv2si (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatv2sf (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinedi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatdi (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4389 */
rtx
gen_aarch64_combinedf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    std::swap (operands[1], operands[2]);
  emit_insn (gen_aarch64_vec_concatdf (operands[0], operands[1],
					   operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4431 */
rtx
gen_vec_widen_saddl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
  emit_insn (gen_aarch64_saddlv16qi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4431 */
rtx
gen_vec_widen_uaddl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
  emit_insn (gen_aarch64_uaddlv16qi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4431 */
rtx
gen_vec_widen_saddl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
  emit_insn (gen_aarch64_saddlv8hi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4431 */
rtx
gen_vec_widen_uaddl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
  emit_insn (gen_aarch64_uaddlv8hi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4431 */
rtx
gen_vec_widen_saddl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
  emit_insn (gen_aarch64_saddlv4si_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4431 */
rtx
gen_vec_widen_uaddl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4436 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
  emit_insn (gen_aarch64_uaddlv4si_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4443 */
rtx
gen_vec_widen_saddl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4448 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_saddlv16qi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4443 */
rtx
gen_vec_widen_uaddl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4448 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_uaddlv16qi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4443 */
rtx
gen_vec_widen_saddl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4448 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_saddlv8hi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4443 */
rtx
gen_vec_widen_uaddl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4448 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_uaddlv8hi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4443 */
rtx
gen_vec_widen_saddl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4448 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_saddlv4si_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4443 */
rtx
gen_vec_widen_uaddl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4448 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_uaddlv4si_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4455 */
rtx
gen_vec_widen_ssubl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4460 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
  emit_insn (gen_aarch64_ssublv16qi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4455 */
rtx
gen_vec_widen_usubl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4460 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
  emit_insn (gen_aarch64_usublv16qi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4455 */
rtx
gen_vec_widen_ssubl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4460 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
  emit_insn (gen_aarch64_ssublv8hi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4455 */
rtx
gen_vec_widen_usubl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4460 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
  emit_insn (gen_aarch64_usublv8hi_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4455 */
rtx
gen_vec_widen_ssubl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4460 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
  emit_insn (gen_aarch64_ssublv4si_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4455 */
rtx
gen_vec_widen_usubl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4460 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
  emit_insn (gen_aarch64_usublv4si_lo_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4467 */
rtx
gen_vec_widen_ssubl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_ssublv16qi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4467 */
rtx
gen_vec_widen_usubl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_usublv16qi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V8HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4467 */
rtx
gen_vec_widen_ssubl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_ssublv8hi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4467 */
rtx
gen_vec_widen_usubl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_usublv8hi_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V4SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4467 */
rtx
gen_vec_widen_ssubl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_ssublv4si_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_SIGN_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4467 */
rtx
gen_vec_widen_usubl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4472 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_usublv4si_hi_internal (operands[0], operands[1],
						     operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
  emit_insn (gen_rtx_ZERO_EXTEND (V2DImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4479 */
rtx
gen_aarch64_saddl2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4484 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_saddlv16qi_hi_internal (operands[0], operands[1],
                                                  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4479 */
rtx
gen_aarch64_saddl2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4484 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_saddlv8hi_hi_internal (operands[0], operands[1],
                                                  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4479 */
rtx
gen_aarch64_saddl2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4484 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_saddlv4si_hi_internal (operands[0], operands[1],
                                                  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4491 */
rtx
gen_aarch64_uaddl2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_uaddlv16qi_hi_internal (operands[0], operands[1],
                                                  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4491 */
rtx
gen_aarch64_uaddl2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_uaddlv8hi_hi_internal (operands[0], operands[1],
                                                  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4491 */
rtx
gen_aarch64_uaddl2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_uaddlv4si_hi_internal (operands[0], operands[1],
                                                  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4503 */
rtx
gen_aarch64_ssubl2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4508 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_ssublv16qi_hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4503 */
rtx
gen_aarch64_ssubl2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4508 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_ssublv8hi_hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4503 */
rtx
gen_aarch64_ssubl2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4508 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_ssublv4si_hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4515 */
rtx
gen_aarch64_usubl2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4520 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_usublv16qi_hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4515 */
rtx
gen_aarch64_usubl2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4520 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_usublv8hi_hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4515 */
rtx
gen_aarch64_usubl2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4520 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_usublv4si_hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4540 */
rtx
gen_widen_ssumv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4546 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));

    emit_insn (gen_aarch64_saddwv16qi_internal (temp, operands[2],
						operands[1], p));
    emit_insn (gen_aarch64_saddw2v16qi (operands[0], temp, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4540 */
rtx
gen_widen_ssumv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4546 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));

    emit_insn (gen_aarch64_saddwv8hi_internal (temp, operands[2],
						operands[1], p));
    emit_insn (gen_aarch64_saddw2v8hi (operands[0], temp, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4540 */
rtx
gen_widen_ssumv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4546 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));

    emit_insn (gen_aarch64_saddwv4si_internal (temp, operands[2],
						operands[1], p));
    emit_insn (gen_aarch64_saddw2v4si (operands[0], temp, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4557 */
rtx
gen_widen_ssumv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_saddwv8qi (operands[0], operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4557 */
rtx
gen_widen_ssumv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_saddwv4hi (operands[0], operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4557 */
rtx
gen_widen_ssumv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4563 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_saddwv2si (operands[0], operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4568 */
rtx
gen_widen_usumv16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));

    emit_insn (gen_aarch64_uaddwv16qi_internal (temp, operands[2],
						 operands[1], p));
    emit_insn (gen_aarch64_uaddw2v16qi (operands[0], temp, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4568 */
rtx
gen_widen_usumv8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));

    emit_insn (gen_aarch64_uaddwv8hi_internal (temp, operands[2],
						 operands[1], p));
    emit_insn (gen_aarch64_uaddw2v8hi (operands[0], temp, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4568 */
rtx
gen_widen_usumv4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
    rtx temp = gen_reg_rtx (GET_MODE (operands[0]));

    emit_insn (gen_aarch64_uaddwv4si_internal (temp, operands[2],
						 operands[1], p));
    emit_insn (gen_aarch64_uaddw2v4si (operands[0], temp, operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4585 */
rtx
gen_widen_usumv8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4591 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_uaddwv8qi (operands[0], operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V8HImode,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4585 */
rtx
gen_widen_usumv4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4591 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_uaddwv4hi (operands[0], operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V4SImode,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4585 */
rtx
gen_widen_usumv2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4591 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  emit_insn (gen_aarch64_uaddwv2si (operands[0], operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (V2DImode,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4666 */
rtx
gen_aarch64_saddw2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4671 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_saddw2v16qi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4666 */
rtx
gen_aarch64_saddw2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4671 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_saddw2v8hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4666 */
rtx
gen_aarch64_saddw2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4671 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_saddw2v4si_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4678 */
rtx
gen_aarch64_uaddw2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4683 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_uaddw2v16qi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4678 */
rtx
gen_aarch64_uaddw2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4683 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_uaddw2v8hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4678 */
rtx
gen_aarch64_uaddw2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4683 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_uaddw2v4si_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4691 */
rtx
gen_aarch64_ssubw2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4696 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_ssubw2v16qi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4691 */
rtx
gen_aarch64_ssubw2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4696 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_ssubw2v8hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4691 */
rtx
gen_aarch64_ssubw2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4696 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_ssubw2v4si_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4703 */
rtx
gen_aarch64_usubw2v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4708 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
  emit_insn (gen_aarch64_usubw2v16qi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4703 */
rtx
gen_aarch64_usubw2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4708 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_usubw2v8hi_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4703 */
rtx
gen_aarch64_usubw2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4708 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_usubw2v4si_internal (operands[0], operands[1],
						operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_avgv8qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_uavgv8qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_avgv16qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_uavgv16qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_avgv4hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_uavgv4hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_avgv8hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_uavgv8hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_avgv2si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_uavgv2si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_avgv4si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4717 */
rtx
gen_uavgv4si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_avgv8qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_uavgv8qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_avgv16qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_uavgv16qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_avgv4hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_uavgv4hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_avgv8hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_uavgv8hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_avgv2si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_uavgv2si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_avgv4si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4725 */
rtx
gen_uavgv4si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_addhnv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_addhnv8hi_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_addhnv8hi_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_raddhnv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_raddhnv8hi_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_raddhnv8hi_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_subhnv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_subhnv8hi_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_subhnv8hi_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_rsubhnv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_rsubhnv8hi_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_rsubhnv8hi_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_addhnv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_addhnv4si_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_addhnv4si_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_raddhnv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_raddhnv4si_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_raddhnv4si_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_subhnv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_subhnv4si_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_subhnv4si_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_rsubhnv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_rsubhnv4si_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_rsubhnv4si_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_addhnv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_addhnv2di_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_addhnv2di_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	187)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_raddhnv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_raddhnv2di_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_raddhnv2di_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	188)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_subhnv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_subhnv2di_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_subhnv2di_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	189)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4769 */
rtx
gen_aarch64_rsubhnv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4775 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_rsubhnv2di_insn_be (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_rsubhnv2di_insn_le (tmp, operands[1],
				operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	190)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_addhn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_addhn2v8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_addhn2v8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	187));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_raddhn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_raddhn2v8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_raddhn2v8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	188));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_subhn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_subhn2v8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_subhn2v8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	189));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_rsubhn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_rsubhn2v8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_rsubhn2v8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	190));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_addhn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_addhn2v4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_addhn2v4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	187));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_raddhn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_raddhn2v4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_raddhn2v4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	188));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_subhn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_subhn2v4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_subhn2v4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	189));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_rsubhn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_rsubhn2v4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_rsubhn2v4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	190));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_addhn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_addhn2v2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_addhn2v2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	187));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_raddhn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_raddhn2v2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_raddhn2v2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	188));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_subhn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_subhn2v2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_subhn2v2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	189));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4816 */
rtx
gen_aarch64_rsubhn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_rsubhn2v2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_rsubhn2v2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (VOIDmode,
	gen_rtvec (2,
		operand2,
		operand3),
	190));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:4871 */
rtx
gen_aarch64_pmull_hiv16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4876 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
   rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
   emit_insn (gen_aarch64_pmull_hiv16qi_insn (operands[0], operands[1],
					      operands[2], p));
   DONE;
 }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5024 */
rtx
gen_aarch64_sqmovnv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5029 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqmovnv8hi_insn_be (tmp, operands[1],
				CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_sqmovnv8hi_insn_le (tmp, operands[1],
				CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_TRUNCATE (V8QImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5024 */
rtx
gen_aarch64_uqmovnv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5029 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqmovnv8hi_insn_be (tmp, operands[1],
				CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_uqmovnv8hi_insn_le (tmp, operands[1],
				CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_TRUNCATE (V8QImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5024 */
rtx
gen_aarch64_sqmovnv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5029 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqmovnv4si_insn_be (tmp, operands[1],
				CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_sqmovnv4si_insn_le (tmp, operands[1],
				CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_TRUNCATE (V4HImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5024 */
rtx
gen_aarch64_uqmovnv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5029 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqmovnv4si_insn_be (tmp, operands[1],
				CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_uqmovnv4si_insn_le (tmp, operands[1],
				CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_TRUNCATE (V4HImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5024 */
rtx
gen_aarch64_sqmovnv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5029 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqmovnv2di_insn_be (tmp, operands[1],
				CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_sqmovnv2di_insn_le (tmp, operands[1],
				CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_TRUNCATE (V2SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5024 */
rtx
gen_aarch64_uqmovnv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5029 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqmovnv2di_insn_be (tmp, operands[1],
				CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_uqmovnv2di_insn_le (tmp, operands[1],
				CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_TRUNCATE (V2SImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5068 */
rtx
gen_aarch64_sqxtn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5074 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqxtn2v8hi_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_sqxtn2v8hi_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SS_TRUNCATE (V8QImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5068 */
rtx
gen_aarch64_uqxtn2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5074 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqxtn2v8hi_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_uqxtn2v8hi_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_US_TRUNCATE (V8QImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5068 */
rtx
gen_aarch64_sqxtn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5074 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqxtn2v4si_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_sqxtn2v4si_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SS_TRUNCATE (V4HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5068 */
rtx
gen_aarch64_uqxtn2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5074 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqxtn2v4si_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_uqxtn2v4si_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_US_TRUNCATE (V4HImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5068 */
rtx
gen_aarch64_sqxtn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5074 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqxtn2v2di_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_sqxtn2v2di_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_SS_TRUNCATE (V2SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5068 */
rtx
gen_aarch64_uqxtn2v2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5074 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqxtn2v2di_be (operands[0], operands[1],
						 operands[2]));
    else
      emit_insn (gen_aarch64_uqxtn2v2di_le (operands[0], operands[1],
						 operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_US_TRUNCATE (V2SImode,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5118 */
rtx
gen_aarch64_sqmovunv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5123 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqmovunv8hi_insn_be (tmp, operands[1],
				CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_sqmovunv8hi_insn_le (tmp, operands[1],
				CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand1),
	197)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5118 */
rtx
gen_aarch64_sqmovunv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5123 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqmovunv4si_insn_be (tmp, operands[1],
				CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_sqmovunv4si_insn_le (tmp, operands[1],
				CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand1),
	197)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5118 */
rtx
gen_aarch64_sqmovunv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5123 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqmovunv2di_insn_be (tmp, operands[1],
				CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_sqmovunv2di_insn_le (tmp, operands[1],
				CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand1),
	197)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5162 */
rtx
gen_aarch64_sqxtun2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqxtun2v8hi_be (operands[0], operands[1],
					      operands[2]));
    else
      emit_insn (gen_aarch64_sqxtun2v8hi_le (operands[0], operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (1,
		operand2),
	197));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5162 */
rtx
gen_aarch64_sqxtun2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqxtun2v4si_be (operands[0], operands[1],
					      operands[2]));
    else
      emit_insn (gen_aarch64_sqxtun2v4si_le (operands[0], operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (1,
		operand2),
	197));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5162 */
rtx
gen_aarch64_sqxtun2v2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqxtun2v2di_be (operands[0], operands[1],
					      operands[2]));
    else
      emit_insn (gen_aarch64_sqxtun2v2di_le (operands[0], operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (1,
		operand2),
	197));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5673 */
rtx
gen_aarch64_sqdmlal2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5681 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlal2v8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5673 */
rtx
gen_aarch64_sqdmlsl2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5681 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlsl2v8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5673 */
rtx
gen_aarch64_sqdmlal2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5681 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlal2v4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5673 */
rtx
gen_aarch64_sqdmlsl2v4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5681 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlsl2v4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5795 */
rtx
gen_aarch64_sqdmlal2_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlal2_lanev8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5795 */
rtx
gen_aarch64_sqdmlsl2_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlsl2_lanev8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5795 */
rtx
gen_aarch64_sqdmlal2_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlal2_lanev4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5795 */
rtx
gen_aarch64_sqdmlsl2_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5804 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlsl2_lanev4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5812 */
rtx
gen_aarch64_sqdmlal2_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlal2_laneqv8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5812 */
rtx
gen_aarch64_sqdmlsl2_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlsl2_laneqv8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5812 */
rtx
gen_aarch64_sqdmlal2_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlal2_laneqv4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5812 */
rtx
gen_aarch64_sqdmlsl2_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5821 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlsl2_laneqv4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], operands[4], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5867 */
rtx
gen_aarch64_sqdmlal2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlal2_nv8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5867 */
rtx
gen_aarch64_sqdmlsl2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmlsl2_nv8hi_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V4SImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5867 */
rtx
gen_aarch64_sqdmlal2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlal2_nv4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_PLUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:5867 */
rtx
gen_aarch64_sqdmlsl2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmlsl2_nv4si_internal (operands[0],
						operands[1], operands[2],
						operands[3], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_SS_MINUS (V2DImode,
	operand1,
	copy_rtx (operand1)));
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6022 */
rtx
gen_aarch64_sqdmull2v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmull2v8hi_internal (operands[0], operands[1],
						  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6022 */
rtx
gen_aarch64_sqdmull2v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6027 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmull2v4si_internal (operands[0], operands[1],
						  operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6082 */
rtx
gen_aarch64_sqdmull2_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6088 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmull2_lanev8hi_internal (operands[0], operands[1],
						       operands[2], operands[3],
						       p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6082 */
rtx
gen_aarch64_sqdmull2_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6088 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmull2_lanev4si_internal (operands[0], operands[1],
						       operands[2], operands[3],
						       p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6096 */
rtx
gen_aarch64_sqdmull2_laneqv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmull2_laneqv8hi_internal (operands[0], operands[1],
						       operands[2], operands[3],
						       p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6096 */
rtx
gen_aarch64_sqdmull2_laneqv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6102 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmull2_laneqv4si_internal (operands[0], operands[1],
						       operands[2], operands[3],
						       p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6130 */
rtx
gen_aarch64_sqdmull2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6135 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
  emit_insn (gen_aarch64_sqdmull2_nv8hi_internal (operands[0], operands[1],
						    operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6130 */
rtx
gen_aarch64_sqdmull2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6135 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
  emit_insn (gen_aarch64_sqdmull2_nv4si_internal (operands[0], operands[1],
						    operands[2], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6169 */
rtx
gen_vec_widen_sshiftl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6176 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
    emit_insn (gen_aarch64_sshllv16qi_internal (operands[0], operands[1],
						     p, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6169 */
rtx
gen_vec_widen_ushiftl_lo_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6176 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, false);
    emit_insn (gen_aarch64_ushllv16qi_internal (operands[0], operands[1],
						     p, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6169 */
rtx
gen_vec_widen_sshiftl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6176 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
    emit_insn (gen_aarch64_sshllv8hi_internal (operands[0], operands[1],
						     p, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6169 */
rtx
gen_vec_widen_ushiftl_lo_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6176 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, false);
    emit_insn (gen_aarch64_ushllv8hi_internal (operands[0], operands[1],
						     p, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6169 */
rtx
gen_vec_widen_sshiftl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6176 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
    emit_insn (gen_aarch64_sshllv4si_internal (operands[0], operands[1],
						     p, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6169 */
rtx
gen_vec_widen_ushiftl_lo_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6176 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, false);
    emit_insn (gen_aarch64_ushllv4si_internal (operands[0], operands[1],
						     p, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6184 */
rtx
gen_vec_widen_sshiftl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
    emit_insn (gen_aarch64_sshll2v16qi_internal (operands[0], operands[1],
						      p, operands[2]));
    DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6184 */
rtx
gen_vec_widen_ushiftl_hi_v16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V16QImode, 16, true);
    emit_insn (gen_aarch64_ushll2v16qi_internal (operands[0], operands[1],
						      p, operands[2]));
    DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6184 */
rtx
gen_vec_widen_sshiftl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
    emit_insn (gen_aarch64_sshll2v8hi_internal (operands[0], operands[1],
						      p, operands[2]));
    DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6184 */
rtx
gen_vec_widen_ushiftl_hi_v8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V8HImode, 8, true);
    emit_insn (gen_aarch64_ushll2v8hi_internal (operands[0], operands[1],
						      p, operands[2]));
    DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6184 */
rtx
gen_vec_widen_sshiftl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
    emit_insn (gen_aarch64_sshll2v4si_internal (operands[0], operands[1],
						      p, operands[2]));
    DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	223)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6184 */
rtx
gen_vec_widen_ushiftl_hi_v4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p = aarch64_simd_vect_par_cnst_half (V4SImode, 4, true);
    emit_insn (gen_aarch64_ushll2v4si_internal (operands[0], operands[1],
						      p, operands[2]));
    DONE;
   }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	224)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqshrun_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrun_nv8hi_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_sqshrun_nv8hi_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqrshrun_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrun_nv8hi_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_sqrshrun_nv8hi_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqshrn_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrn_nv8hi_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_sqshrn_nv8hi_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_uqshrn_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqshrn_nv8hi_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_uqshrn_nv8hi_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqrshrn_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrn_nv8hi_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_sqrshrn_nv8hi_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_uqrshrn_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V16QImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqrshrn_nv8hi_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));
    else
      emit_insn (gen_aarch64_uqrshrn_nv8hi_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V8QImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V8QImode, tmp,
						 V16QImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqshrun_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrun_nv4si_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_sqshrun_nv4si_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqrshrun_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrun_nv4si_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_sqrshrun_nv4si_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqshrn_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrn_nv4si_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_sqshrn_nv4si_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_uqshrn_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqshrn_nv4si_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_uqshrn_nv4si_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqrshrn_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrn_nv4si_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_sqrshrn_nv4si_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_uqrshrn_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V8HImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqrshrn_nv4si_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));
    else
      emit_insn (gen_aarch64_uqrshrn_nv4si_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V4HImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V4HImode, tmp,
						 V8HImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqshrun_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrun_nv2di_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_sqshrun_nv2di_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	207)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqrshrun_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrun_nv2di_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_sqrshrun_nv2di_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	208)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqshrn_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrn_nv2di_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_sqshrn_nv2di_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	209)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_uqshrn_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqshrn_nv2di_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_uqshrn_nv2di_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	210)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_sqrshrn_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrn_nv2di_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_sqrshrn_nv2di_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	211)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6364 */
rtx
gen_aarch64_uqrshrn_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6371 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[2] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[2]));
    rtx tmp = gen_reg_rtx (V4SImode);
    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqrshrn_nv2di_insn_be (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));
    else
      emit_insn (gen_aarch64_uqrshrn_nv2di_insn_le (tmp,
		    operands[1], operands[2], CONST0_RTX (V2SImode)));

    /* The intrinsic expects a narrow result, so emit a subreg that will get
       optimized away as appropriate.  */
    emit_move_insn (operands[0], lowpart_subreg (V2SImode, tmp,
						 V4SImode));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	212)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqshrun2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrun2_nv8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqshrun2_nv8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqrshrun2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrun2_nv8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqrshrun2_nv8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqshrn2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrn2_nv8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqshrn2_nv8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_uqshrn2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqshrn2_nv8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_uqshrn2_nv8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqrshrn2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrn2_nv8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqrshrn2_nv8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_uqrshrn2_nv8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V8HImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqrshrn2_nv8hi_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_uqrshrn2_nv8hi_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqshrun2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrun2_nv4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqshrun2_nv4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqrshrun2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrun2_nv4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqrshrun2_nv4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqshrn2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrn2_nv4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqshrn2_nv4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_uqshrn2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqshrn2_nv4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_uqshrn2_nv4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqrshrn2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrn2_nv4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqrshrn2_nv4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_uqrshrn2_nv4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V4SImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqrshrn2_nv4si_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_uqrshrn2_nv4si_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqshrun2_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrun2_nv2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqshrun2_nv2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	207));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqrshrun2_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrun2_nv2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqrshrun2_nv2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	208));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqshrn2_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqshrn2_nv2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqshrn2_nv2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	209));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_uqshrn2_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqshrn2_nv2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_uqshrn2_nv2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	210));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_sqrshrn2_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_sqrshrn2_nv2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_sqrshrn2_nv2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	211));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6416 */
rtx
gen_aarch64_uqrshrn2_nv2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    operands[3] = aarch64_simd_gen_const_vector_dup (V2DImode,
						 INTVAL (operands[3]));

    if (BYTES_BIG_ENDIAN)
      emit_insn (gen_aarch64_uqrshrn2_nv2di_insn_be (operands[0],
				operands[1], operands[2], operands[3]));
    else
      emit_insn (gen_aarch64_uqrshrn2_nv2di_insn_le (operands[0],
				operands[1], operands[2], operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_UNSPEC (V2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	212));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
extern rtx_insn *gen_split_131 (rtx_insn *, rtx *);
rtx_insn *
gen_split_131 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_131 (aarch64-simd.md:6457)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6474 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = SELECT_CC_MODE (LT, operands[1], operands[2]);
	rtx cc_reg = aarch64_gen_compare_reg (LT, operands[1], operands[2]);
	rtx comparison = gen_rtx_LT (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LT (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
extern rtx_insn *gen_split_132 (rtx_insn *, rtx *);
rtx_insn *
gen_split_132 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_132 (aarch64-simd.md:6457)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6474 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = SELECT_CC_MODE (LE, operands[1], operands[2]);
	rtx cc_reg = aarch64_gen_compare_reg (LE, operands[1], operands[2]);
	rtx comparison = gen_rtx_LE (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LE (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
extern rtx_insn *gen_split_133 (rtx_insn *, rtx *);
rtx_insn *
gen_split_133 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_133 (aarch64-simd.md:6457)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6474 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = SELECT_CC_MODE (EQ, operands[1], operands[2]);
	rtx cc_reg = aarch64_gen_compare_reg (EQ, operands[1], operands[2]);
	rtx comparison = gen_rtx_EQ (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_EQ (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
extern rtx_insn *gen_split_134 (rtx_insn *, rtx *);
rtx_insn *
gen_split_134 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_134 (aarch64-simd.md:6457)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6474 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = SELECT_CC_MODE (GE, operands[1], operands[2]);
	rtx cc_reg = aarch64_gen_compare_reg (GE, operands[1], operands[2]);
	rtx comparison = gen_rtx_GE (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GE (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6457 */
extern rtx_insn *gen_split_135 (rtx_insn *, rtx *);
rtx_insn *
gen_split_135 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_135 (aarch64-simd.md:6457)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6474 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = SELECT_CC_MODE (GT, operands[1], operands[2]);
	rtx cc_reg = aarch64_gen_compare_reg (GT, operands[1], operands[2]);
	rtx comparison = gen_rtx_GT (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GT (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
extern rtx_insn *gen_split_136 (rtx_insn *, rtx *);
rtx_insn *
gen_split_136 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_136 (aarch64-simd.md:6520)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6537 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = CCmode;
	rtx cc_reg = aarch64_gen_compare_reg (LTU, operands[1], operands[2]);
	rtx comparison = gen_rtx_LTU (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LTU (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
extern rtx_insn *gen_split_137 (rtx_insn *, rtx *);
rtx_insn *
gen_split_137 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_137 (aarch64-simd.md:6520)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6537 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = CCmode;
	rtx cc_reg = aarch64_gen_compare_reg (LEU, operands[1], operands[2]);
	rtx comparison = gen_rtx_LEU (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_LEU (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
extern rtx_insn *gen_split_138 (rtx_insn *, rtx *);
rtx_insn *
gen_split_138 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_138 (aarch64-simd.md:6520)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6537 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = CCmode;
	rtx cc_reg = aarch64_gen_compare_reg (GEU, operands[1], operands[2]);
	rtx comparison = gen_rtx_GEU (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GEU (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6520 */
extern rtx_insn *gen_split_139 (rtx_insn *, rtx *);
rtx_insn *
gen_split_139 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_139 (aarch64-simd.md:6520)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6537 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	machine_mode mode = CCmode;
	rtx cc_reg = aarch64_gen_compare_reg (GTU, operands[1], operands[2]);
	rtx comparison = gen_rtx_GTU (mode, operands[1], operands[2]);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_GTU (DImode,
	operand1,
	operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6607 */
extern rtx_insn *gen_split_140 (rtx_insn *, rtx *);
rtx_insn *
gen_split_140 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_140 (aarch64-simd.md:6607)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    /* If we are in the general purpose register file,
       we split to a sequence of comparison and store.  */
    if (GP_REGNUM_P (REGNO (operands[0]))
	&& GP_REGNUM_P (REGNO (operands[1])))
      {
	rtx and_tree = gen_rtx_AND (DImode, operands[1], operands[2]);
	machine_mode mode = SELECT_CC_MODE (NE, and_tree, const0_rtx);
	rtx cc_reg = aarch64_gen_compare_reg (NE, and_tree, const0_rtx);
	rtx comparison = gen_rtx_NE (mode, and_tree, const0_rtx);
	emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg));
	DONE;
      }
    /* Otherwise, we expand to a similar pattern which does not
       clobber CC_REGNUM.  */
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_NEG (DImode,
	gen_rtx_NE (DImode,
	gen_rtx_AND (DImode,
	operand1,
	operand2),
	const0_rtx))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6717 */
rtx
gen_sqrtv4hf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtv4hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (V4HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6717 */
rtx
gen_sqrtv8hf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtv8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (V8HFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6717 */
rtx
gen_sqrtv2sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtv2sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (V2SFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6717 */
rtx
gen_sqrtv4sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtv4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (V4SFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6717 */
rtx
gen_sqrtv2df2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtv2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SQRT (V2DFmode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x16qiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x16QImode);
      rtx mask = aarch64_reverse_mask (V16QImode,
			GET_MODE_NUNITS (V2x16QImode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v16qi (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x16qi (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x8hiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x8HImode);
      rtx mask = aarch64_reverse_mask (V8HImode,
			GET_MODE_NUNITS (V2x8HImode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v8hi (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x8hi (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x4siv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x4SImode);
      rtx mask = aarch64_reverse_mask (V4SImode,
			GET_MODE_NUNITS (V2x4SImode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v4si (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x4si (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x2div2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x2DImode);
      rtx mask = aarch64_reverse_mask (V2DImode,
			GET_MODE_NUNITS (V2x2DImode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v2di (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x2di (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v2di (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x8hfv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x8hfv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x8HFmode);
      rtx mask = aarch64_reverse_mask (V8HFmode,
			GET_MODE_NUNITS (V2x8HFmode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v8hf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x8hf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x4sfv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x4SFmode);
      rtx mask = aarch64_reverse_mask (V4SFmode,
			GET_MODE_NUNITS (V2x4SFmode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v4sf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x4sf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x2dfv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x2dfv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x2DFmode);
      rtx mask = aarch64_reverse_mask (V2DFmode,
			GET_MODE_NUNITS (V2x2DFmode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v2df (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x2df (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v2df (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6772 */
rtx
gen_vec_load_lanesv2x8bfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv2x8bfv8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6778 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x8BFmode);
      rtx mask = aarch64_reverse_mask (V8BFmode,
			GET_MODE_NUNITS (V2x8BFmode).to_constant () / 2);
      emit_insn (gen_aarch64_simd_ld2v8bf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv2x8bf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld2v8bf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (1,
		operand1),
	39)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x16qiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x16QImode);
      rtx mask = aarch64_reverse_mask (V16QImode,
			GET_MODE_NUNITS (V2x16QImode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x16qi (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v16qi (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x16QImode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x8hiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x8HImode);
      rtx mask = aarch64_reverse_mask (V8HImode,
			GET_MODE_NUNITS (V2x8HImode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x8hi (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v8hi (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HImode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x4siv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x4SImode);
      rtx mask = aarch64_reverse_mask (V4SImode,
			GET_MODE_NUNITS (V2x4SImode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x4si (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v4si (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SImode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x2div2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x2DImode);
      rtx mask = aarch64_reverse_mask (V2DImode,
			GET_MODE_NUNITS (V2x2DImode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x2di (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v2di (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v2di (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DImode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x8hfv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x8hfv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x8HFmode);
      rtx mask = aarch64_reverse_mask (V8HFmode,
			GET_MODE_NUNITS (V2x8HFmode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x8hf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v8hf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8HFmode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x4sfv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x4SFmode);
      rtx mask = aarch64_reverse_mask (V4SFmode,
			GET_MODE_NUNITS (V2x4SFmode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x4sf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v4sf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x4SFmode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x2dfv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x2dfv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x2DFmode);
      rtx mask = aarch64_reverse_mask (V2DFmode,
			GET_MODE_NUNITS (V2x2DFmode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x2df (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v2df (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v2df (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x2DFmode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6817 */
rtx
gen_vec_store_lanesv2x8bfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv2x8bfv8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V2x8BFmode);
      rtx mask = aarch64_reverse_mask (V8BFmode,
			GET_MODE_NUNITS (V2x8BFmode).to_constant () / 2);
      emit_insn (gen_aarch64_rev_reglistv2x8bf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st2v8bf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st2v8bf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2x8BFmode,
	gen_rtvec (1,
		operand1),
	79)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x16qiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x16QImode);
      rtx mask = aarch64_reverse_mask (V16QImode,
			GET_MODE_NUNITS (V3x16QImode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v16qi (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x16qi (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x8hiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x8HImode);
      rtx mask = aarch64_reverse_mask (V8HImode,
			GET_MODE_NUNITS (V3x8HImode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v8hi (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x8hi (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x4siv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x4SImode);
      rtx mask = aarch64_reverse_mask (V4SImode,
			GET_MODE_NUNITS (V3x4SImode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v4si (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x4si (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x2div2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x2DImode);
      rtx mask = aarch64_reverse_mask (V2DImode,
			GET_MODE_NUNITS (V3x2DImode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v2di (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x2di (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v2di (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x8hfv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x8hfv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x8HFmode);
      rtx mask = aarch64_reverse_mask (V8HFmode,
			GET_MODE_NUNITS (V3x8HFmode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v8hf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x8hf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x4sfv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x4SFmode);
      rtx mask = aarch64_reverse_mask (V4SFmode,
			GET_MODE_NUNITS (V3x4SFmode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v4sf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x4sf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x2dfv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x2dfv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x2DFmode);
      rtx mask = aarch64_reverse_mask (V2DFmode,
			GET_MODE_NUNITS (V3x2DFmode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v2df (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x2df (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v2df (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6872 */
rtx
gen_vec_load_lanesv3x8bfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv3x8bfv8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6878 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x8BFmode);
      rtx mask = aarch64_reverse_mask (V8BFmode,
			GET_MODE_NUNITS (V3x8BFmode).to_constant () / 3);
      emit_insn (gen_aarch64_simd_ld3v8bf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv3x8bf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld3v8bf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (1,
		operand1),
	42)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x16qiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x16QImode);
      rtx mask = aarch64_reverse_mask (V16QImode,
			GET_MODE_NUNITS (V3x16QImode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x16qi (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v16qi (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x16QImode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x8hiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x8HImode);
      rtx mask = aarch64_reverse_mask (V8HImode,
			GET_MODE_NUNITS (V3x8HImode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x8hi (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v8hi (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HImode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x4siv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x4SImode);
      rtx mask = aarch64_reverse_mask (V4SImode,
			GET_MODE_NUNITS (V3x4SImode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x4si (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v4si (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SImode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x2div2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x2DImode);
      rtx mask = aarch64_reverse_mask (V2DImode,
			GET_MODE_NUNITS (V3x2DImode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x2di (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v2di (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v2di (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DImode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x8hfv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x8hfv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x8HFmode);
      rtx mask = aarch64_reverse_mask (V8HFmode,
			GET_MODE_NUNITS (V3x8HFmode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x8hf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v8hf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8HFmode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x4sfv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x4SFmode);
      rtx mask = aarch64_reverse_mask (V4SFmode,
			GET_MODE_NUNITS (V3x4SFmode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x4sf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v4sf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x4SFmode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x2dfv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x2dfv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x2DFmode);
      rtx mask = aarch64_reverse_mask (V2DFmode,
			GET_MODE_NUNITS (V3x2DFmode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x2df (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v2df (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v2df (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x2DFmode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6916 */
rtx
gen_vec_store_lanesv3x8bfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv3x8bfv8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6922 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V3x8BFmode);
      rtx mask = aarch64_reverse_mask (V8BFmode,
			GET_MODE_NUNITS (V3x8BFmode).to_constant () / 3);
      emit_insn (gen_aarch64_rev_reglistv3x8bf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st3v8bf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st3v8bf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V3x8BFmode,
	gen_rtvec (1,
		operand1),
	80)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x16qiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x16QImode);
      rtx mask = aarch64_reverse_mask (V16QImode,
			GET_MODE_NUNITS (V4x16QImode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v16qi (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x16qi (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x8hiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x8HImode);
      rtx mask = aarch64_reverse_mask (V8HImode,
			GET_MODE_NUNITS (V4x8HImode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v8hi (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x8hi (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x4siv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x4SImode);
      rtx mask = aarch64_reverse_mask (V4SImode,
			GET_MODE_NUNITS (V4x4SImode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v4si (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x4si (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x2div2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x2DImode);
      rtx mask = aarch64_reverse_mask (V2DImode,
			GET_MODE_NUNITS (V4x2DImode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v2di (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x2di (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v2di (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x8hfv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x8hfv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x8HFmode);
      rtx mask = aarch64_reverse_mask (V8HFmode,
			GET_MODE_NUNITS (V4x8HFmode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v8hf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x8hf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x4sfv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x4SFmode);
      rtx mask = aarch64_reverse_mask (V4SFmode,
			GET_MODE_NUNITS (V4x4SFmode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v4sf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x4sf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x2dfv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x2dfv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x2DFmode);
      rtx mask = aarch64_reverse_mask (V2DFmode,
			GET_MODE_NUNITS (V4x2DFmode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v2df (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x2df (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v2df (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:6972 */
rtx
gen_vec_load_lanesv4x8bfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesv4x8bfv8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6978 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x8BFmode);
      rtx mask = aarch64_reverse_mask (V8BFmode,
			GET_MODE_NUNITS (V4x8BFmode).to_constant () / 4);
      emit_insn (gen_aarch64_simd_ld4v8bf (tmp, operands[1]));
      emit_insn (gen_aarch64_rev_reglistv4x8bf (operands[0], tmp, mask));
    }
  else
    emit_insn (gen_aarch64_simd_ld4v8bf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (1,
		operand1),
	45)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x16qiv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x16qiv16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x16QImode);
      rtx mask = aarch64_reverse_mask (V16QImode,
			GET_MODE_NUNITS (V4x16QImode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x16qi (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v16qi (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v16qi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x16QImode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x8hiv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x8hiv8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x8HImode);
      rtx mask = aarch64_reverse_mask (V8HImode,
			GET_MODE_NUNITS (V4x8HImode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x8hi (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v8hi (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v8hi (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HImode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x4siv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x4siv4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x4SImode);
      rtx mask = aarch64_reverse_mask (V4SImode,
			GET_MODE_NUNITS (V4x4SImode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x4si (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v4si (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v4si (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SImode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x2div2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x2div2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x2DImode);
      rtx mask = aarch64_reverse_mask (V2DImode,
			GET_MODE_NUNITS (V4x2DImode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x2di (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v2di (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v2di (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DImode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x8hfv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x8hfv8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x8HFmode);
      rtx mask = aarch64_reverse_mask (V8HFmode,
			GET_MODE_NUNITS (V4x8HFmode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x8hf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v8hf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v8hf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8HFmode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x4sfv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x4sfv4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x4SFmode);
      rtx mask = aarch64_reverse_mask (V4SFmode,
			GET_MODE_NUNITS (V4x4SFmode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x4sf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v4sf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v4sf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x4SFmode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x2dfv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x2dfv2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x2DFmode);
      rtx mask = aarch64_reverse_mask (V2DFmode,
			GET_MODE_NUNITS (V4x2DFmode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x2df (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v2df (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v2df (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x2DFmode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7017 */
rtx
gen_vec_store_lanesv4x8bfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesv4x8bfv8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7022 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (BYTES_BIG_ENDIAN)
    {
      rtx tmp = gen_reg_rtx (V4x8BFmode);
      rtx mask = aarch64_reverse_mask (V8BFmode,
			GET_MODE_NUNITS (V4x8BFmode).to_constant () / 4);
      emit_insn (gen_aarch64_rev_reglistv4x8bf (tmp, operands[1], mask));
      emit_insn (gen_aarch64_simd_st4v8bf (operands[0], tmp));
    }
  else
    emit_insn (gen_aarch64_simd_st4v8bf (operands[0], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4x8BFmode,
	gen_rtvec (1,
		operand1),
	81)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_141 (rtx_insn *, rtx *);
rtx_insn *
gen_split_141 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_141 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x8QImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_142 (rtx_insn *, rtx *);
rtx_insn *
gen_split_142 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_142 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x4HImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_143 (rtx_insn *, rtx *);
rtx_insn *
gen_split_143 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_143 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x2SImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_144 (rtx_insn *, rtx *);
rtx_insn *
gen_split_144 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_144 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x1DImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_145 (rtx_insn *, rtx *);
rtx_insn *
gen_split_145 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_145 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x4HFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_146 (rtx_insn *, rtx *);
rtx_insn *
gen_split_146 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_146 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x2SFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_147 (rtx_insn *, rtx *);
rtx_insn *
gen_split_147 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_147 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x1DFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_148 (rtx_insn *, rtx *);
rtx_insn *
gen_split_148 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_148 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x4BFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_149 (rtx_insn *, rtx *);
rtx_insn *
gen_split_149 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_149 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x8QImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_150 (rtx_insn *, rtx *);
rtx_insn *
gen_split_150 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_150 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x4HImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_151 (rtx_insn *, rtx *);
rtx_insn *
gen_split_151 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_151 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x2SImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_152 (rtx_insn *, rtx *);
rtx_insn *
gen_split_152 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_152 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x1DImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_153 (rtx_insn *, rtx *);
rtx_insn *
gen_split_153 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_153 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x4HFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_154 (rtx_insn *, rtx *);
rtx_insn *
gen_split_154 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_154 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x2SFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_155 (rtx_insn *, rtx *);
rtx_insn *
gen_split_155 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_155 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x1DFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_156 (rtx_insn *, rtx *);
rtx_insn *
gen_split_156 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_156 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x4BFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_157 (rtx_insn *, rtx *);
rtx_insn *
gen_split_157 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_157 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x8QImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_158 (rtx_insn *, rtx *);
rtx_insn *
gen_split_158 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_158 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x4HImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_159 (rtx_insn *, rtx *);
rtx_insn *
gen_split_159 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_159 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x2SImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_160 (rtx_insn *, rtx *);
rtx_insn *
gen_split_160 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_160 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x1DImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_161 (rtx_insn *, rtx *);
rtx_insn *
gen_split_161 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_161 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x4HFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_162 (rtx_insn *, rtx *);
rtx_insn *
gen_split_162 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_162 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x2SFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_163 (rtx_insn *, rtx *);
rtx_insn *
gen_split_163 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_163 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x1DFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_164 (rtx_insn *, rtx *);
rtx_insn *
gen_split_164 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_164 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x4BFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_165 (rtx_insn *, rtx *);
rtx_insn *
gen_split_165 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_165 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x16QImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_166 (rtx_insn *, rtx *);
rtx_insn *
gen_split_166 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_166 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x8HImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_167 (rtx_insn *, rtx *);
rtx_insn *
gen_split_167 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_167 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x4SImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_168 (rtx_insn *, rtx *);
rtx_insn *
gen_split_168 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_168 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x2DImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_169 (rtx_insn *, rtx *);
rtx_insn *
gen_split_169 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_169 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x8HFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_170 (rtx_insn *, rtx *);
rtx_insn *
gen_split_170 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_170 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x4SFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_171 (rtx_insn *, rtx *);
rtx_insn *
gen_split_171 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_171 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x2DFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_172 (rtx_insn *, rtx *);
rtx_insn *
gen_split_172 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_172 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V2x8BFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_173 (rtx_insn *, rtx *);
rtx_insn *
gen_split_173 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_173 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x16QImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_174 (rtx_insn *, rtx *);
rtx_insn *
gen_split_174 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_174 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x8HImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_175 (rtx_insn *, rtx *);
rtx_insn *
gen_split_175 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_175 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x4SImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_176 (rtx_insn *, rtx *);
rtx_insn *
gen_split_176 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_176 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x2DImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_177 (rtx_insn *, rtx *);
rtx_insn *
gen_split_177 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_177 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x8HFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_178 (rtx_insn *, rtx *);
rtx_insn *
gen_split_178 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_178 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x4SFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_179 (rtx_insn *, rtx *);
rtx_insn *
gen_split_179 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_179 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x2DFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_180 (rtx_insn *, rtx *);
rtx_insn *
gen_split_180 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_180 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V3x8BFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_181 (rtx_insn *, rtx *);
rtx_insn *
gen_split_181 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_181 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x16QImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_182 (rtx_insn *, rtx *);
rtx_insn *
gen_split_182 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_182 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x8HImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_183 (rtx_insn *, rtx *);
rtx_insn *
gen_split_183 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_183 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x4SImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_184 (rtx_insn *, rtx *);
rtx_insn *
gen_split_184 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_184 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x2DImode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_185 (rtx_insn *, rtx *);
rtx_insn *
gen_split_185 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_185 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x8HFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_186 (rtx_insn *, rtx *);
rtx_insn *
gen_split_186 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_186 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x4SFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_187 (rtx_insn *, rtx *);
rtx_insn *
gen_split_187 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_187 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x2DFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7036 */
extern rtx_insn *gen_split_188 (rtx_insn *, rtx *);
rtx_insn *
gen_split_188 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_188 (aarch64-simd.md:7036)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7046 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int i;
  int nregs = GET_MODE_SIZE (V4x8BFmode).to_constant () / UNITS_PER_VREG;
  for (i = 0; i < nregs; i++)
    {
      rtx op0 = gen_rtx_REG (V16QImode, REGNO (operands[0]) + i);
      rtx op1 = gen_rtx_REG (V16QImode, REGNO (operands[1]) + i);
      emit_insn (gen_aarch64_qtbl1v16qi (op0, op1, operands[2]));
    }
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x8QImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x4HImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x2SImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x1di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x1DImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x4HFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x2SFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x1df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x1DFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x4BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x8QImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x4HImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x2SImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x1di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x1DImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x4HFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x2SFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x1df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x1DFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x4BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x8QImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x4HImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x2SImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x1di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x1DImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x4HFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x2SFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x1df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x1DFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x4BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x16QImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x8HImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x4SImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x2DImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x8HFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x4SFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x2DFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv2x8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V2x8BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x16QImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x8HImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x4SImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x2DImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x8HFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x4SFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x2DFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv3x8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V3x8BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x16QImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x8HImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x4SImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x2DImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x8HFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x4SFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x2DFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7063 */
rtx
gen_movv4x8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (V4x8BFmode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7075 */
rtx
gen_movoi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7079 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (OImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7075 */
rtx
gen_movci (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7079 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (CImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7075 */
rtx
gen_movxi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7079 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p ())
    {
      if (GET_CODE (operands[0]) != REG)
	operands[1] = force_reg (XImode, operands[1]);
    }
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7087 */
rtx
gen_movv8di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7091 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (can_create_pseudo_p () && MEM_P (operands[0]))
    operands[1] = force_reg (V8DImode, operands[1]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8QImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v8qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v4hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v2si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v4hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v2sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4BFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v4bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x16QImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7096 */
rtx
gen_aarch64_ld1x3v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7100 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8BFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x3_v8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8QImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v8qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v4hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v2si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v4hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v2sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4BFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v4bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x16QImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DImode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7116 */
rtx
gen_aarch64_ld1x4v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8BFmode, operands[1]);
  emit_insn (gen_aarch64_ld1_x4_v8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8QImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v8qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4HImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v4hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2SImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v2si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x1DImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4HFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v4hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2SFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v2sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x1DFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4BFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v4bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x16QImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8HImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4SImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2DImode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v2di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8HFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4SFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2DFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v2df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7136 */
rtx
gen_aarch64_st1x2v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8BFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x2_v8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8QImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v8qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v4hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v2si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v4hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v2sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4BFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v4bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x16QImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DImode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v2di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v2df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7156 */
rtx
gen_aarch64_st1x3v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7160 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8BFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x3_v8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8QImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v8qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v4hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v2si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v4hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v2sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4BFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v4bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x16QImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DImode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v2di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v2df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7176 */
rtx
gen_aarch64_st1x4v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7180 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8BFmode, operands[0]);
  emit_insn (gen_aarch64_st1_x4_v8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_189 (rtx_insn *, rtx *);
rtx_insn *
gen_split_189 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_189 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V8QImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_190 (rtx_insn *, rtx *);
rtx_insn *
gen_split_190 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_190 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V4HImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_191 (rtx_insn *, rtx *);
rtx_insn *
gen_split_191 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_191 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V2SImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_192 (rtx_insn *, rtx *);
rtx_insn *
gen_split_192 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_192 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_193 (rtx_insn *, rtx *);
rtx_insn *
gen_split_193 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_193 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V4HFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_194 (rtx_insn *, rtx *);
rtx_insn *
gen_split_194 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_194 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V2SFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_195 (rtx_insn *, rtx *);
rtx_insn *
gen_split_195 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_195 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, DFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_196 (rtx_insn *, rtx *);
rtx_insn *
gen_split_196 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_196 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V4BFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_197 (rtx_insn *, rtx *);
rtx_insn *
gen_split_197 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_197 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V16QImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_198 (rtx_insn *, rtx *);
rtx_insn *
gen_split_198 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_198 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V8HImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_199 (rtx_insn *, rtx *);
rtx_insn *
gen_split_199 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_199 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V4SImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_200 (rtx_insn *, rtx *);
rtx_insn *
gen_split_200 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_200 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V2DImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_201 (rtx_insn *, rtx *);
rtx_insn *
gen_split_201 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_201 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V8HFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_202 (rtx_insn *, rtx *);
rtx_insn *
gen_split_202 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_202 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V4SFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_203 (rtx_insn *, rtx *);
rtx_insn *
gen_split_203 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_203 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V2DFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7341 */
extern rtx_insn *gen_split_204 (rtx_insn *, rtx *);
rtx_insn *
gen_split_204 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_204 (aarch64-simd.md:7341)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7346 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, V8BFmode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7351 */
extern rtx_insn *gen_split_205 (rtx_insn *, rtx *);
rtx_insn *
gen_split_205 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_205 (aarch64-simd.md:7351)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7356 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_simd_emit_reg_reg_move (operands, TImode, 2);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_206 (rtx_insn *, rtx *);
rtx_insn *
gen_split_206 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_206 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x8QImode)
      && register_operand (operands[1], V3x8QImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8QImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x8QImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x8QImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x8QImode, 0));
      emit_move_insn (gen_lowpart (V8QImode,
				   simplify_gen_subreg (V8QImode,
							operands[0],
							V3x8QImode,
							2 * elt_size)),
		      gen_lowpart (V8QImode,
				   simplify_gen_subreg (V8QImode,
							operands[1],
							V3x8QImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_207 (rtx_insn *, rtx *);
rtx_insn *
gen_split_207 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_207 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x4HImode)
      && register_operand (operands[1], V3x4HImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4HImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x4HImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x4HImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x4HImode, 0));
      emit_move_insn (gen_lowpart (V4HImode,
				   simplify_gen_subreg (V4HImode,
							operands[0],
							V3x4HImode,
							2 * elt_size)),
		      gen_lowpart (V4HImode,
				   simplify_gen_subreg (V4HImode,
							operands[1],
							V3x4HImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_208 (rtx_insn *, rtx *);
rtx_insn *
gen_split_208 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_208 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x2SImode)
      && register_operand (operands[1], V3x2SImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2SImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x2SImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x2SImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x2SImode, 0));
      emit_move_insn (gen_lowpart (V2SImode,
				   simplify_gen_subreg (V2SImode,
							operands[0],
							V3x2SImode,
							2 * elt_size)),
		      gen_lowpart (V2SImode,
				   simplify_gen_subreg (V2SImode,
							operands[1],
							V3x2SImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_209 (rtx_insn *, rtx *);
rtx_insn *
gen_split_209 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_209 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x1DImode)
      && register_operand (operands[1], V3x1DImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, DImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x1DImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x1DImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x1DImode, 0));
      emit_move_insn (gen_lowpart (DImode,
				   simplify_gen_subreg (DImode,
							operands[0],
							V3x1DImode,
							2 * elt_size)),
		      gen_lowpart (DImode,
				   simplify_gen_subreg (DImode,
							operands[1],
							V3x1DImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_210 (rtx_insn *, rtx *);
rtx_insn *
gen_split_210 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_210 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x4HFmode)
      && register_operand (operands[1], V3x4HFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4HFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x4HFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x4HFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x4HFmode, 0));
      emit_move_insn (gen_lowpart (V4HFmode,
				   simplify_gen_subreg (V4HFmode,
							operands[0],
							V3x4HFmode,
							2 * elt_size)),
		      gen_lowpart (V4HFmode,
				   simplify_gen_subreg (V4HFmode,
							operands[1],
							V3x4HFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_211 (rtx_insn *, rtx *);
rtx_insn *
gen_split_211 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_211 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x2SFmode)
      && register_operand (operands[1], V3x2SFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2SFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x2SFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x2SFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x2SFmode, 0));
      emit_move_insn (gen_lowpart (V2SFmode,
				   simplify_gen_subreg (V2SFmode,
							operands[0],
							V3x2SFmode,
							2 * elt_size)),
		      gen_lowpart (V2SFmode,
				   simplify_gen_subreg (V2SFmode,
							operands[1],
							V3x2SFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_212 (rtx_insn *, rtx *);
rtx_insn *
gen_split_212 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_212 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x1DFmode)
      && register_operand (operands[1], V3x1DFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, DFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x1DFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x1DFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x1DFmode, 0));
      emit_move_insn (gen_lowpart (DFmode,
				   simplify_gen_subreg (DFmode,
							operands[0],
							V3x1DFmode,
							2 * elt_size)),
		      gen_lowpart (DFmode,
				   simplify_gen_subreg (DFmode,
							operands[1],
							V3x1DFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_213 (rtx_insn *, rtx *);
rtx_insn *
gen_split_213 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_213 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x4BFmode)
      && register_operand (operands[1], V3x4BFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4BFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x4BFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x4BFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x4BFmode, 0));
      emit_move_insn (gen_lowpart (V4BFmode,
				   simplify_gen_subreg (V4BFmode,
							operands[0],
							V3x4BFmode,
							2 * elt_size)),
		      gen_lowpart (V4BFmode,
				   simplify_gen_subreg (V4BFmode,
							operands[1],
							V3x4BFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_214 (rtx_insn *, rtx *);
rtx_insn *
gen_split_214 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_214 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x16QImode)
      && register_operand (operands[1], V3x16QImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V16QImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x16QImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x16QImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x16QImode, 0));
      emit_move_insn (gen_lowpart (V16QImode,
				   simplify_gen_subreg (V16QImode,
							operands[0],
							V3x16QImode,
							2 * elt_size)),
		      gen_lowpart (V16QImode,
				   simplify_gen_subreg (V16QImode,
							operands[1],
							V3x16QImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_215 (rtx_insn *, rtx *);
rtx_insn *
gen_split_215 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_215 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x8HImode)
      && register_operand (operands[1], V3x8HImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8HImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x8HImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x8HImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x8HImode, 0));
      emit_move_insn (gen_lowpart (V8HImode,
				   simplify_gen_subreg (V8HImode,
							operands[0],
							V3x8HImode,
							2 * elt_size)),
		      gen_lowpart (V8HImode,
				   simplify_gen_subreg (V8HImode,
							operands[1],
							V3x8HImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_216 (rtx_insn *, rtx *);
rtx_insn *
gen_split_216 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_216 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x4SImode)
      && register_operand (operands[1], V3x4SImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4SImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x4SImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x4SImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x4SImode, 0));
      emit_move_insn (gen_lowpart (V4SImode,
				   simplify_gen_subreg (V4SImode,
							operands[0],
							V3x4SImode,
							2 * elt_size)),
		      gen_lowpart (V4SImode,
				   simplify_gen_subreg (V4SImode,
							operands[1],
							V3x4SImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_217 (rtx_insn *, rtx *);
rtx_insn *
gen_split_217 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_217 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x2DImode)
      && register_operand (operands[1], V3x2DImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2DImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x2DImode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x2DImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x2DImode, 0));
      emit_move_insn (gen_lowpart (V2DImode,
				   simplify_gen_subreg (V2DImode,
							operands[0],
							V3x2DImode,
							2 * elt_size)),
		      gen_lowpart (V2DImode,
				   simplify_gen_subreg (V2DImode,
							operands[1],
							V3x2DImode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_218 (rtx_insn *, rtx *);
rtx_insn *
gen_split_218 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_218 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x8HFmode)
      && register_operand (operands[1], V3x8HFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8HFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x8HFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x8HFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x8HFmode, 0));
      emit_move_insn (gen_lowpart (V8HFmode,
				   simplify_gen_subreg (V8HFmode,
							operands[0],
							V3x8HFmode,
							2 * elt_size)),
		      gen_lowpart (V8HFmode,
				   simplify_gen_subreg (V8HFmode,
							operands[1],
							V3x8HFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_219 (rtx_insn *, rtx *);
rtx_insn *
gen_split_219 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_219 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x4SFmode)
      && register_operand (operands[1], V3x4SFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4SFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x4SFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x4SFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x4SFmode, 0));
      emit_move_insn (gen_lowpart (V4SFmode,
				   simplify_gen_subreg (V4SFmode,
							operands[0],
							V3x4SFmode,
							2 * elt_size)),
		      gen_lowpart (V4SFmode,
				   simplify_gen_subreg (V4SFmode,
							operands[1],
							V3x4SFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_220 (rtx_insn *, rtx *);
rtx_insn *
gen_split_220 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_220 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x2DFmode)
      && register_operand (operands[1], V3x2DFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2DFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x2DFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x2DFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x2DFmode, 0));
      emit_move_insn (gen_lowpart (V2DFmode,
				   simplify_gen_subreg (V2DFmode,
							operands[0],
							V3x2DFmode,
							2 * elt_size)),
		      gen_lowpart (V2DFmode,
				   simplify_gen_subreg (V2DFmode,
							operands[1],
							V3x2DFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7361 */
extern rtx_insn *gen_split_221 (rtx_insn *, rtx *);
rtx_insn *
gen_split_221 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_221 (aarch64-simd.md:7361)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7366 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V3x8BFmode)
      && register_operand (operands[1], V3x8BFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8BFmode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V3x8BFmode).to_constant () / 3;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V3x8BFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V3x8BFmode, 0));
      emit_move_insn (gen_lowpart (V8BFmode,
				   simplify_gen_subreg (V8BFmode,
							operands[0],
							V3x8BFmode,
							2 * elt_size)),
		      gen_lowpart (V8BFmode,
				   simplify_gen_subreg (V8BFmode,
							operands[1],
							V3x8BFmode,
							2 * elt_size)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7397 */
extern rtx_insn *gen_split_222 (rtx_insn *, rtx *);
rtx_insn *
gen_split_222 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_222 (aarch64-simd.md:7397)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7402 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], CImode)
      && register_operand (operands[1], CImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, TImode, 3);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      emit_move_insn (simplify_gen_subreg (OImode, operands[0], CImode, 0),
		      simplify_gen_subreg (OImode, operands[1], CImode, 0));
      emit_move_insn (gen_lowpart (V16QImode,
				   simplify_gen_subreg (TImode, operands[0],
							CImode, 32)),
		      gen_lowpart (V16QImode,
				   simplify_gen_subreg (TImode, operands[1],
							CImode, 32)));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_223 (rtx_insn *, rtx *);
rtx_insn *
gen_split_223 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_223 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x8QImode)
      && register_operand (operands[1], V4x8QImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8QImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x8QImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8QImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8QImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8QImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8QImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_224 (rtx_insn *, rtx *);
rtx_insn *
gen_split_224 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_224 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x4HImode)
      && register_operand (operands[1], V4x4HImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4HImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x4HImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4HImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4HImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4HImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4HImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_225 (rtx_insn *, rtx *);
rtx_insn *
gen_split_225 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_225 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x2SImode)
      && register_operand (operands[1], V4x2SImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2SImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x2SImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2SImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2SImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2SImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2SImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_226 (rtx_insn *, rtx *);
rtx_insn *
gen_split_226 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_226 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x1DImode)
      && register_operand (operands[1], V4x1DImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, DImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x1DImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x1DImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x1DImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x1DImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x1DImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_227 (rtx_insn *, rtx *);
rtx_insn *
gen_split_227 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_227 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x4HFmode)
      && register_operand (operands[1], V4x4HFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4HFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x4HFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4HFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4HFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4HFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4HFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_228 (rtx_insn *, rtx *);
rtx_insn *
gen_split_228 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_228 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x2SFmode)
      && register_operand (operands[1], V4x2SFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2SFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x2SFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2SFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2SFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2SFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2SFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_229 (rtx_insn *, rtx *);
rtx_insn *
gen_split_229 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_229 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x1DFmode)
      && register_operand (operands[1], V4x1DFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, DFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x1DFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x1DFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x1DFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x1DFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x1DFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_230 (rtx_insn *, rtx *);
rtx_insn *
gen_split_230 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_230 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x4BFmode)
      && register_operand (operands[1], V4x4BFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4BFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x4BFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4BFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4BFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4BFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4BFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_231 (rtx_insn *, rtx *);
rtx_insn *
gen_split_231 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_231 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x16QImode)
      && register_operand (operands[1], V4x16QImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V16QImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x16QImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x16QImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x16QImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x16QImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x16QImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_232 (rtx_insn *, rtx *);
rtx_insn *
gen_split_232 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_232 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x8HImode)
      && register_operand (operands[1], V4x8HImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8HImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x8HImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8HImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8HImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8HImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8HImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_233 (rtx_insn *, rtx *);
rtx_insn *
gen_split_233 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_233 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x4SImode)
      && register_operand (operands[1], V4x4SImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4SImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x4SImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4SImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4SImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4SImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4SImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_234 (rtx_insn *, rtx *);
rtx_insn *
gen_split_234 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_234 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x2DImode)
      && register_operand (operands[1], V4x2DImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2DImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x2DImode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2DImode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2DImode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2DImode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2DImode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_235 (rtx_insn *, rtx *);
rtx_insn *
gen_split_235 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_235 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x8HFmode)
      && register_operand (operands[1], V4x8HFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8HFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x8HFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8HFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8HFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8HFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8HFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_236 (rtx_insn *, rtx *);
rtx_insn *
gen_split_236 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_236 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x4SFmode)
      && register_operand (operands[1], V4x4SFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V4SFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x4SFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4SFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4SFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x4SFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x4SFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_237 (rtx_insn *, rtx *);
rtx_insn *
gen_split_237 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_237 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x2DFmode)
      && register_operand (operands[1], V4x2DFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V2DFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x2DFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2DFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2DFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x2DFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x2DFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7425 */
extern rtx_insn *gen_split_238 (rtx_insn *, rtx *);
rtx_insn *
gen_split_238 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_238 (aarch64-simd.md:7425)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7430 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V4x8BFmode)
      && register_operand (operands[1], V4x8BFmode))
    {
      aarch64_simd_emit_reg_reg_move (operands, V8BFmode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      int elt_size = GET_MODE_SIZE (V4x8BFmode).to_constant () / 4;
      machine_mode pair_mode = elt_size == 16 ? V2x16QImode : V2x8QImode;
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8BFmode, 0),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8BFmode, 0));
      emit_move_insn (simplify_gen_subreg (pair_mode, operands[0],
					   V4x8BFmode, 2 * elt_size),
		      simplify_gen_subreg (pair_mode, operands[1],
					   V4x8BFmode, 2 * elt_size));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7455 */
extern rtx_insn *gen_split_239 (rtx_insn *, rtx *);
rtx_insn *
gen_split_239 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_239 (aarch64-simd.md:7455)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7460 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], XImode)
      && register_operand (operands[1], XImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, TImode, 4);
      DONE;
    }
  else if (BYTES_BIG_ENDIAN)
    {
      emit_move_insn (simplify_gen_subreg (OImode, operands[0], XImode, 0),
		      simplify_gen_subreg (OImode, operands[1], XImode, 0));
      emit_move_insn (simplify_gen_subreg (OImode, operands[0], XImode, 32),
		      simplify_gen_subreg (OImode, operands[1], XImode, 32));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7479 */
extern rtx_insn *gen_split_240 (rtx_insn *, rtx *);
rtx_insn *
gen_split_240 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_240 (aarch64-simd.md:7479)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7484 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  if (register_operand (operands[0], V8DImode)
      && register_operand (operands[1], V8DImode))
    {
      aarch64_simd_emit_reg_reg_move (operands, DImode, 8);
      DONE;
    }
  else if ((register_operand (operands[0], V8DImode)
            && memory_operand (operands[1], V8DImode))
           || (memory_operand (operands[0], V8DImode)
            && register_operand (operands[1], V8DImode)))
    {
      for (int offset = 0; offset < 64; offset += 16)
        emit_move_insn (simplify_gen_subreg (TImode, operands[0],
                                             V8DImode, offset),
                        simplify_gen_subreg (TImode, operands[1],
                                             V8DImode, offset));
      DONE;
    }
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8QImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv8qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4HImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv4hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2SImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv2si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rdi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x1DImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rdi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4HFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv4hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2SFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv2sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rdf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x1DFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rdf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4BFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv4bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8QImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv8qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4HImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv4hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2SImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv2si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rdi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x1DImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rdi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4HFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv4hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2SFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv2sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rdf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x1DFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rdf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4BFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv4bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8QImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv8qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4HImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv4hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2SImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv2si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rdi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x1DImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rdi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4HFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv4hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2SFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv2sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rdf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x1DFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rdf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4BFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv4bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x16QImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8HImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4SImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2DImode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8HFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4SFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2DFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld2rv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8BFmode)) * 2);

  emit_insn (gen_aarch64_simd_ld2rv8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x16QImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8HImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4SImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2DImode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8HFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4SFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2DFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld3rv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8BFmode)) * 3);

  emit_insn (gen_aarch64_simd_ld3rv8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x16QImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8HImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4SImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2DImode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8HFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4SFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2DFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7507 */
rtx
gen_aarch64_ld4rv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7511 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8BFmode)) * 4);

  emit_insn (gen_aarch64_simd_ld4rv8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8QImode, operands[1]);
  emit_insn (gen_aarch64_ld2v8qi_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4HImode, operands[1]);
  emit_insn (gen_aarch64_ld2v4hi_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2SImode, operands[1]);
  emit_insn (gen_aarch64_ld2v2si_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x1DImode, operands[1]);
  emit_insn (gen_aarch64_ld2di_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4HFmode, operands[1]);
  emit_insn (gen_aarch64_ld2v4hf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2SFmode, operands[1]);
  emit_insn (gen_aarch64_ld2v2sf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x1DFmode, operands[1]);
  emit_insn (gen_aarch64_ld2df_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld2v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4BFmode, operands[1]);
  emit_insn (gen_aarch64_ld2v4bf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8QImode, operands[1]);
  emit_insn (gen_aarch64_ld3v8qi_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HImode, operands[1]);
  emit_insn (gen_aarch64_ld3v4hi_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SImode, operands[1]);
  emit_insn (gen_aarch64_ld3v2si_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DImode, operands[1]);
  emit_insn (gen_aarch64_ld3di_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HFmode, operands[1]);
  emit_insn (gen_aarch64_ld3v4hf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SFmode, operands[1]);
  emit_insn (gen_aarch64_ld3v2sf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DFmode, operands[1]);
  emit_insn (gen_aarch64_ld3df_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld3v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4BFmode, operands[1]);
  emit_insn (gen_aarch64_ld3v4bf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8QImode, operands[1]);
  emit_insn (gen_aarch64_ld4v8qi_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HImode, operands[1]);
  emit_insn (gen_aarch64_ld4v4hi_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SImode, operands[1]);
  emit_insn (gen_aarch64_ld4v2si_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DImode, operands[1]);
  emit_insn (gen_aarch64_ld4di_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HFmode, operands[1]);
  emit_insn (gen_aarch64_ld4v4hf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SFmode, operands[1]);
  emit_insn (gen_aarch64_ld4v2sf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DFmode, operands[1]);
  emit_insn (gen_aarch64_ld4df_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7579 */
rtx
gen_aarch64_ld4v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7583 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4BFmode, operands[1]);
  emit_insn (gen_aarch64_ld4v4bf_dreg (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8QImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v8qi (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V16QImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v16qi (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4HImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v4hi (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8HImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v8hi (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2SImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v2si (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4SImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v4si (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2DImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v2di (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4HFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v4hf (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8HFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v8hf (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4BFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v4bf (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8BFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v8bf (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2SFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v2sf (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4SFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v4sf (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7589 */
rtx
gen_aarch64_ld1v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7593 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2DFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_ld1v2df (operands[0], mem));
  else
    emit_move_insn (operands[0], mem);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x16QImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8HImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4SImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2DImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8HFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4SFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2DFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld2v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8BFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld2v8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x16QImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld3v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8BFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld3v8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x16QImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v16qi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v8hi (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v4si (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DImode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v2di (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v8hf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v4sf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v2df (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7604 */
rtx
gen_aarch64_ld4v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7608 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8BFmode, operands[1]);
  emit_insn (gen_aarch64_simd_ld4v8bf (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x8QImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v8qi_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x4HImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v4hi_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x2SImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v2si_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x1DImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1di_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x4HFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v4hf_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x2SFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v2sf_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x1DFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1df_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x4BFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v4bf_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x16QImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v16qi_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x8HImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v8hi_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x4SImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v4si_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x2DImode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v2di_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x8HFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v8hf_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x4SFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v4sf_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x2DFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v2df_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7614 */
rtx
gen_aarch64_ld1x2v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7618 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2x8BFmode;
  rtx mem = gen_rtx_MEM (mode, operands[1]);

  emit_insn (gen_aarch64_simd_ld1v8bf_x2 (operands[0], mem));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8QImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x8QImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x8qi_lanev8qi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4HImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x4HImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x4hi_lanev4hi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2SImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x2SImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x2si_lanev2si (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x1DImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x1DImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x1di_lanedi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4HFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x4HFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x4hf_lanev4hf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2SFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x2SFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x2sf_lanev2sf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanedf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x1DFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x1DFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x1df_lanedf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev4bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4BFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x4BFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x4bf_lanev4bf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8QImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x8QImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x8qi_lanev8qi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4HImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x4HImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x4hi_lanev4hi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2SImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x2SImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x2si_lanev2si (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x1DImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x1DImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x1di_lanedi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4HFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x4HFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x4hf_lanev4hf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2SFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x2SFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x2sf_lanev2sf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanedf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x1DFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x1DFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x1df_lanedf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev4bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4BFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x4BFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x4bf_lanev4bf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8QImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x8QImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x8qi_lanev8qi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4HImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x4HImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x4hi_lanev4hi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2SImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x2SImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x2si_lanev2si (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x1DImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x1DImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x1di_lanedi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4HFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x4HFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x4hf_lanev4hf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2SFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x2SFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x2sf_lanev2sf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanedf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x1DFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x1DFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x1df_lanedf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev4bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4BFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x4BFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x4bf_lanev4bf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x16QImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x16QImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x16qi_lanev16qi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8HImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x8HImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x8hi_lanev8hi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4SImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x4SImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x4si_lanev4si (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2DImode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x2DImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x2di_lanev2di (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8HFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x8HFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x8hf_lanev8hf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4SFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x4SFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x4sf_lanev4sf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2DFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x2DFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x2df_lanev2df (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld2_lanev8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8BFmode)) * 2);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V2x8BFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv2x8bf_lanev8bf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x16QImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x16QImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x16qi_lanev16qi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8HImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x8HImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x8hi_lanev8hi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4SImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x4SImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x4si_lanev4si (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2DImode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x2DImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x2di_lanev2di (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8HFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x8HFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x8hf_lanev8hf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4SFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x4SFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x4sf_lanev4sf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2DFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x2DFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x2df_lanev2df (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld3_lanev8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8BFmode)) * 3);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V3x8BFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv3x8bf_lanev8bf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x16QImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x16QImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x16qi_lanev16qi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8HImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x8HImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x8hi_lanev8hi (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4SImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x4SImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x4si_lanev4si (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2DImode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x2DImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x2di_lanev2di (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8HFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x8HFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x8hf_lanev8hf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4SFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x4SFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x4sf_lanev4sf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2DFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x2DFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x2df_lanev2df (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7626 */
rtx
gen_aarch64_ld4_lanev8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7632 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[1]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8BFmode)) * 4);

  aarch64_simd_lane_bounds (operands[3], 0,
		GET_MODE_NUNITS (V4x8BFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_load_lanesv4x8bf_lanev8bf (operands[0],
				mem, operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7649 */
rtx
gen_vec_permv8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7655 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vec_perm (operands[0], operands[1],
			   operands[2], operands[3], 8);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7649 */
rtx
gen_vec_permv16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7655 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vec_perm (operands[0], operands[1],
			   operands[2], operands[3], 16);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7751 */
extern rtx_insn *gen_split_241 (rtx_insn *, rtx *);
rtx_insn *
gen_split_241 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_241 (aarch64-simd.md:7751)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7760 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_split_combinev16qi (operands);
  DONE;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8QImode, operands[0]);
  emit_insn (gen_aarch64_st2v8qi_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4HImode, operands[0]);
  emit_insn (gen_aarch64_st2v4hi_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2SImode, operands[0]);
  emit_insn (gen_aarch64_st2v2si_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x1DImode, operands[0]);
  emit_insn (gen_aarch64_st2di_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4HFmode, operands[0]);
  emit_insn (gen_aarch64_st2v4hf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2SFmode, operands[0]);
  emit_insn (gen_aarch64_st2v2sf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x1DFmode, operands[0]);
  emit_insn (gen_aarch64_st2df_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st2v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4BFmode, operands[0]);
  emit_insn (gen_aarch64_st2v4bf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8QImode, operands[0]);
  emit_insn (gen_aarch64_st3v8qi_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HImode, operands[0]);
  emit_insn (gen_aarch64_st3v4hi_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SImode, operands[0]);
  emit_insn (gen_aarch64_st3v2si_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DImode, operands[0]);
  emit_insn (gen_aarch64_st3di_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4HFmode, operands[0]);
  emit_insn (gen_aarch64_st3v4hf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2SFmode, operands[0]);
  emit_insn (gen_aarch64_st3v2sf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x1DFmode, operands[0]);
  emit_insn (gen_aarch64_st3df_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st3v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4BFmode, operands[0]);
  emit_insn (gen_aarch64_st3v4bf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8QImode, operands[0]);
  emit_insn (gen_aarch64_st4v8qi_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HImode, operands[0]);
  emit_insn (gen_aarch64_st4v4hi_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SImode, operands[0]);
  emit_insn (gen_aarch64_st4v2si_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DImode, operands[0]);
  emit_insn (gen_aarch64_st4di_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4HFmode, operands[0]);
  emit_insn (gen_aarch64_st4v4hf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2SFmode, operands[0]);
  emit_insn (gen_aarch64_st4v2sf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x1DFmode, operands[0]);
  emit_insn (gen_aarch64_st4df_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7871 */
rtx
gen_aarch64_st4v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4BFmode, operands[0]);
  emit_insn (gen_aarch64_st4v4bf_dreg (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x16QImode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8HImode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4SImode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2DImode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v2di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8HFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x4SFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x2DFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v2df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st2v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V2x8BFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st2v8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x16QImode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HImode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SImode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DImode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v2di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8HFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x4SFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x2DFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v2df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st3v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V3x8BFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st3v8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x16QImode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v16qi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HImode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v8hi (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SImode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v4si (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DImode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v2di (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8HFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v8hf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x4SFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v4sf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x2DFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v2df (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7881 */
rtx
gen_aarch64_st4v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7885 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (V4x8BFmode, operands[0]);
  emit_insn (gen_aarch64_simd_st4v8bf (mem, operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8QImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x8QImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x8qi_lanev8qi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4HImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x4HImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x4hi_lanev4hi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2SImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x2SImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x2si_lanev2si (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x1DImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x1DImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x1di_lanedi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4HFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x4HFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x4hf_lanev4hf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2SFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x2SFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x2sf_lanev2sf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanedf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x1DFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x1DFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x1df_lanedf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4BFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x4BFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x4bf_lanev4bf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8QImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x8QImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x8qi_lanev8qi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4HImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x4HImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x4hi_lanev4hi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2SImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x2SImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x2si_lanev2si (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x1DImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x1DImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x1di_lanedi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4HFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x4HFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x4hf_lanev4hf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2SFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x2SFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x2sf_lanev2sf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanedf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x1DFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x1DFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x1df_lanedf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4BFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x4BFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x4bf_lanev4bf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8QImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x8QImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x8qi_lanev8qi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4HImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x4HImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x4hi_lanev4hi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2SImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x2SImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x2si_lanev2si (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanedi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x1DImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x1DImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x1di_lanedi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4HFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x4HFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x4hf_lanev4hf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2SFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x2SFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x2sf_lanev2sf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanedf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x1DFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x1DFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x1df_lanedf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4BFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x4BFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x4bf_lanev4bf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x16QImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x16QImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x16qi_lanev16qi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8HImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x8HImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x8hi_lanev8hi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4SImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x4SImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x4si_lanev4si (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2DImode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x2DImode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x2di_lanev2di (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8HFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x8HFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x8hf_lanev8hf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x4SFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x4SFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x4sf_lanev4sf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x2DFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x2DFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x2df_lanev2df (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st2_lanev8bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V2x8BFmode)) * 2);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V2x8BFmode).to_constant () / 2, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv2x8bf_lanev8bf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x16QImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x16QImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x16qi_lanev16qi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8HImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x8HImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x8hi_lanev8hi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4SImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x4SImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x4si_lanev4si (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2DImode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x2DImode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x2di_lanev2di (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8HFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x8HFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x8hf_lanev8hf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x4SFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x4SFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x4sf_lanev4sf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x2DFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x2DFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x2df_lanev2df (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st3_lanev8bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V3x8BFmode)) * 3);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V3x8BFmode).to_constant () / 3, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv3x8bf_lanev8bf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x16QImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x16QImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x16qi_lanev16qi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8HImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x8HImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x8hi_lanev8hi (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4SImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x4SImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x4si_lanev4si (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2DImode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x2DImode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x2di_lanev2di (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8HFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x8HFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x8hf_lanev8hf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x4SFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x4SFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x4sf_lanev4sf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x2DFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x2DFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x2df_lanev2df (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7891 */
rtx
gen_aarch64_st4_lanev8bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7896 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx mem = gen_rtx_MEM (BLKmode, operands[0]);
  set_mem_size (mem, GET_MODE_SIZE (GET_MODE_INNER (V4x8BFmode)) * 4);

  aarch64_simd_lane_bounds (operands[2], 0,
		GET_MODE_NUNITS (V4x8BFmode).to_constant () / 4, NULL);
  emit_insn (gen_aarch64_vec_store_lanesv4x8bf_lanev8bf (mem,
					operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8QImode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v8qi (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V16QImode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v16qi (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4HImode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v4hi (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8HImode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v8hi (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2SImode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v2si (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4SImode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v4si (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2DImode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v2di (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4HFmode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v4hf (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8HFmode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v8hf (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4BFmode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v4bf (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V8BFmode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v8bf (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2SFmode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v2sf (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V4SFmode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v4sf (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7907 */
rtx
gen_aarch64_st1v2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7911 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  machine_mode mode = V2DFmode;
  rtx mem = gen_rtx_MEM (mode, operands[0]);

  if (BYTES_BIG_ENDIAN)
    emit_insn (gen_aarch64_be_st1v2df (mem, operands[1]));
  else
    emit_move_insn (mem, operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv8qiqi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv16qiqi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv4hihi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv8hihi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv2sisi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv4sisi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv2didi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv4hfhf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv8hfhf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv4bfbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv8bfbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv2sfsf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv4sfsf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7924 */
rtx
gen_vec_initv2dfdf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7928 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7933 */
rtx
gen_vec_initv16qiv8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7937 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7933 */
rtx
gen_vec_initv8hiv4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7937 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7933 */
rtx
gen_vec_initv4siv2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7937 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7933 */
rtx
gen_vec_initv8hfv4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7937 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7933 */
rtx
gen_vec_initv4sfv2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7937 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:7933 */
rtx
gen_vec_initv8bfv4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7937 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  aarch64_expand_vector_init (operands[0], operands[1]);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv8qiqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev8qi (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv16qiqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev16qi (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv4hihi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev4hi (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv8hihi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev8hi (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv2sisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev2si (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv4sisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev4si (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv2didi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev2di (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv4hfhf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev4hf (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv8hfhf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev8hf (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv4bfbf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev4bf (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv8bfbf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev8bf (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv2sfsf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev2sf (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv4sfsf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev4sf (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8002 */
rtx
gen_vec_extractv2dfdf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8007 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    emit_insn
      (gen_aarch64_get_lanev2df (operands[0], operands[1], operands[2]));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8014 */
rtx
gen_vec_extractv16qiv8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8019 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int start = INTVAL (operands[2]);
  if (start != 0 && start != 16 / 2)
    FAIL;
  rtx sel = aarch64_gen_stepped_int_parallel (16 / 2, start, 1);
  emit_insn (gen_aarch64_get_halfv16qi (operands[0], operands[1], sel));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8014 */
rtx
gen_vec_extractv8hiv4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8019 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int start = INTVAL (operands[2]);
  if (start != 0 && start != 8 / 2)
    FAIL;
  rtx sel = aarch64_gen_stepped_int_parallel (8 / 2, start, 1);
  emit_insn (gen_aarch64_get_halfv8hi (operands[0], operands[1], sel));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8014 */
rtx
gen_vec_extractv4siv2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8019 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int start = INTVAL (operands[2]);
  if (start != 0 && start != 4 / 2)
    FAIL;
  rtx sel = aarch64_gen_stepped_int_parallel (4 / 2, start, 1);
  emit_insn (gen_aarch64_get_halfv4si (operands[0], operands[1], sel));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8014 */
rtx
gen_vec_extractv8hfv4hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8019 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int start = INTVAL (operands[2]);
  if (start != 0 && start != 8 / 2)
    FAIL;
  rtx sel = aarch64_gen_stepped_int_parallel (8 / 2, start, 1);
  emit_insn (gen_aarch64_get_halfv8hf (operands[0], operands[1], sel));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8014 */
rtx
gen_vec_extractv8bfv4bf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8019 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int start = INTVAL (operands[2]);
  if (start != 0 && start != 8 / 2)
    FAIL;
  rtx sel = aarch64_gen_stepped_int_parallel (8 / 2, start, 1);
  emit_insn (gen_aarch64_get_halfv8bf (operands[0], operands[1], sel));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8014 */
rtx
gen_vec_extractv4sfv2sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8019 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  int start = INTVAL (operands[2]);
  if (start != 0 && start != 4 / 2)
    FAIL;
  rtx sel = aarch64_gen_stepped_int_parallel (4 / 2, start, 1);
  emit_insn (gen_aarch64_get_halfv4sf (operands[0], operands[1], sel));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8029 */
rtx
gen_vec_extractv2dfv1df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8034 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  /* V1DF is rarely used by other patterns, so it should be better to hide
     it in a subreg destination of a normal DF op.  */
  rtx scalar0 = gen_lowpart (DFmode, operands[0]);
  emit_insn (gen_vec_extractv2dfdf (scalar0, operands[1], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8350 */
rtx
gen_aarch64_fmlal_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8358 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode,
					    2 * 2, false);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V4HFmode,
					    2 * 2, false);

  emit_insn (gen_aarch64_simd_fmlal_lowv2sf (operands[0],
								operands[1],
								operands[2],
								operands[3],
								p1, p2));
  DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	278)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8350 */
rtx
gen_aarch64_fmlsl_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8358 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode,
					    2 * 2, false);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V4HFmode,
					    2 * 2, false);

  emit_insn (gen_aarch64_simd_fmlsl_lowv2sf (operands[0],
								operands[1],
								operands[2],
								operands[3],
								p1, p2));
  DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	279)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8350 */
rtx
gen_aarch64_fmlalq_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8358 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode,
					    4 * 2, false);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V8HFmode,
					    4 * 2, false);

  emit_insn (gen_aarch64_simd_fmlalq_lowv4sf (operands[0],
								operands[1],
								operands[2],
								operands[3],
								p1, p2));
  DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	278)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8350 */
rtx
gen_aarch64_fmlslq_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8358 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode,
					    4 * 2, false);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V8HFmode,
					    4 * 2, false);

  emit_insn (gen_aarch64_simd_fmlslq_lowv4sf (operands[0],
								operands[1],
								operands[2],
								operands[3],
								p1, p2));
  DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	279)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8373 */
rtx
gen_aarch64_fmlal_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8381 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 2 * 2, true);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V4HFmode, 2 * 2, true);

  emit_insn (gen_aarch64_simd_fmlal_highv2sf (operands[0],
								 operands[1],
								 operands[2],
								 operands[3],
								 p1, p2));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	280)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8373 */
rtx
gen_aarch64_fmlsl_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8381 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 2 * 2, true);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V4HFmode, 2 * 2, true);

  emit_insn (gen_aarch64_simd_fmlsl_highv2sf (operands[0],
								 operands[1],
								 operands[2],
								 operands[3],
								 p1, p2));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	281)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8373 */
rtx
gen_aarch64_fmlalq_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8381 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 4 * 2, true);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V8HFmode, 4 * 2, true);

  emit_insn (gen_aarch64_simd_fmlalq_highv4sf (operands[0],
								 operands[1],
								 operands[2],
								 operands[3],
								 p1, p2));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	280)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8373 */
rtx
gen_aarch64_fmlslq_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8381 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 4 * 2, true);
  rtx p2 = aarch64_simd_vect_par_cnst_half (V8HFmode, 4 * 2, true);

  emit_insn (gen_aarch64_simd_fmlslq_highv4sf (operands[0],
								 operands[1],
								 operands[2],
								 operands[3],
								 p1, p2));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	281)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8463 */
rtx
gen_aarch64_fmlal_lane_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8471 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, false);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlal_lane_lowv2sf (operands[0],
							    operands[1],
							    operands[2],
							    operands[3],
							    p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	278)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8463 */
rtx
gen_aarch64_fmlsl_lane_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8471 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, false);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlsl_lane_lowv2sf (operands[0],
							    operands[1],
							    operands[2],
							    operands[3],
							    p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	279)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8484 */
rtx
gen_aarch64_fmlal_lane_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8492 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, true);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlal_lane_highv2sf (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	280)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8484 */
rtx
gen_aarch64_fmlsl_lane_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8492 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, true);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlsl_lane_highv2sf (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	281)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8578 */
rtx
gen_aarch64_fmlalq_laneq_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, false);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlalq_laneq_lowv4sf (operands[0],
							      operands[1],
							      operands[2],
							      operands[3],
							      p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	278)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8578 */
rtx
gen_aarch64_fmlslq_laneq_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, false);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlslq_laneq_lowv4sf (operands[0],
							      operands[1],
							      operands[2],
							      operands[3],
							      p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	279)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8598 */
rtx
gen_aarch64_fmlalq_laneq_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, true);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlalq_laneq_highv4sf (operands[0],
							       operands[1],
							       operands[2],
							       operands[3],
							       p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	280)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8598 */
rtx
gen_aarch64_fmlslq_laneq_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8606 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, true);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlslq_laneq_highv4sf (operands[0],
							       operands[1],
							       operands[2],
							       operands[3],
							       p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	281)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8692 */
rtx
gen_aarch64_fmlal_laneq_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8700 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, false);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlal_laneq_lowv2sf (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     p1, lane));
    DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	278)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8692 */
rtx
gen_aarch64_fmlsl_laneq_lowv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8700 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, false);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlsl_laneq_lowv2sf (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     p1, lane));
    DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	279)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8713 */
rtx
gen_aarch64_fmlal_laneq_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, true);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlal_laneq_highv2sf (operands[0],
							      operands[1],
							      operands[2],
							      operands[3],
							      p1, lane));
    DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	280)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8713 */
rtx
gen_aarch64_fmlsl_laneq_highv2sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8721 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V4HFmode, 4, true);
    rtx lane = aarch64_endian_lane_rtx (V8HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlsl_laneq_highv2sf (operands[0],
							      operands[1],
							      operands[2],
							      operands[3],
							      p1, lane));
    DONE;

}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V2SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	281)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8808 */
rtx
gen_aarch64_fmlalq_lane_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8816 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, false);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlalq_lane_lowv4sf (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	278)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8808 */
rtx
gen_aarch64_fmlslq_lane_lowv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8816 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, false);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlslq_lane_lowv4sf (operands[0],
							     operands[1],
							     operands[2],
							     operands[3],
							     p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	279)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8828 */
rtx
gen_aarch64_fmlalq_lane_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8836 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, true);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlalq_lane_highv4sf (operands[0],
							      operands[1],
							      operands[2],
							      operands[3],
							      p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	280)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8828 */
rtx
gen_aarch64_fmlslq_lane_highv4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8836 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
    rtx p1 = aarch64_simd_vect_par_cnst_half (V8HFmode, 8, true);
    rtx lane = aarch64_endian_lane_rtx (V4HFmode, INTVAL (operands[4]));

    emit_insn (gen_aarch64_simd_fmlslq_lane_highv4sf (operands[0],
							      operands[1],
							      operands[2],
							      operands[3],
							      p1, lane));
    DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (V4SFmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	281)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8953 */
rtx
gen_aarch64_sxtlv8hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8953 */
rtx
gen_aarch64_uxtlv8hi (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V8HImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8953 */
rtx
gen_aarch64_sxtlv4si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8953 */
rtx
gen_aarch64_uxtlv4si (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V4SImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8953 */
rtx
gen_aarch64_sxtlv2di (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:8953 */
rtx
gen_aarch64_uxtlv2di (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (V2DImode,
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9002 */
rtx
gen_aarch64_vget_lo_halfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8BFmode, 8, false);
  emit_insn (gen_aarch64_get_halfv8bf (operands[0], operands[1], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md:9012 */
rtx
gen_aarch64_vget_hi_halfv8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9016 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-simd.md"
{
  rtx p = aarch64_simd_vect_par_cnst_half (V8BFmode, 8, true);
  emit_insn (gen_aarch64_get_halfv8bf (operands[0], operands[1], p));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:23 */
rtx
gen_atomic_compare_and_swapqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 33 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_expand_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:23 */
rtx
gen_atomic_compare_and_swaphi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 33 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_expand_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:23 */
rtx
gen_atomic_compare_and_swapsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 33 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_expand_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:23 */
rtx
gen_atomic_compare_and_swapdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 33 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_expand_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:23 */
rtx
gen_atomic_compare_and_swapti (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5,
	rtx operand6,
	rtx operand7)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[8];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
    operands[6] = operand6;
    operands[7] = operand7;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 33 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_expand_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
    operand7 = operands[7];
    (void) operand7;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, true);
  emit (operand4, true);
  emit (operand5, true);
  emit (operand6, true);
  emit (operand7, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:44 */
extern rtx_insn *gen_split_242 (rtx_insn *, rtx *);
rtx_insn *
gen_split_242 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_242 (atomics.md:44)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 64 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:44 */
extern rtx_insn *gen_split_243 (rtx_insn *, rtx *);
rtx_insn *
gen_split_243 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_243 (atomics.md:44)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 64 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:70 */
extern rtx_insn *gen_split_244 (rtx_insn *, rtx *);
rtx_insn *
gen_split_244 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_244 (atomics.md:70)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 88 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:70 */
extern rtx_insn *gen_split_245 (rtx_insn *, rtx *);
rtx_insn *
gen_split_245 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_245 (atomics.md:70)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 88 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:94 */
extern rtx_insn *gen_split_246 (rtx_insn *, rtx *);
rtx_insn *
gen_split_246 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_246 (atomics.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 112 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_compare_and_swap (operands);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:185 */
rtx
gen_atomic_exchangeqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    /* Use an atomic SWP when available.  */
    if (TARGET_LSE)
      {
	emit_insn (gen_aarch64_atomic_exchangeqi_lse
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
	machine_mode mode = QImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[3],
					    &aarch64_ool_swp_names);
	rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL,
					    mode, operands[2], mode,
					    XEXP (operands[1], 0), Pmode);
        emit_move_insn (operands[0], rval);
      }
    else
      {
	emit_insn (gen_aarch64_atomic_exchangeqi
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:185 */
rtx
gen_atomic_exchangehi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    /* Use an atomic SWP when available.  */
    if (TARGET_LSE)
      {
	emit_insn (gen_aarch64_atomic_exchangehi_lse
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
	machine_mode mode = HImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[3],
					    &aarch64_ool_swp_names);
	rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL,
					    mode, operands[2], mode,
					    XEXP (operands[1], 0), Pmode);
        emit_move_insn (operands[0], rval);
      }
    else
      {
	emit_insn (gen_aarch64_atomic_exchangehi
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:185 */
rtx
gen_atomic_exchangesi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    /* Use an atomic SWP when available.  */
    if (TARGET_LSE)
      {
	emit_insn (gen_aarch64_atomic_exchangesi_lse
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
	machine_mode mode = SImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[3],
					    &aarch64_ool_swp_names);
	rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL,
					    mode, operands[2], mode,
					    XEXP (operands[1], 0), Pmode);
        emit_move_insn (operands[0], rval);
      }
    else
      {
	emit_insn (gen_aarch64_atomic_exchangesi
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:185 */
rtx
gen_atomic_exchangedi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    /* Use an atomic SWP when available.  */
    if (TARGET_LSE)
      {
	emit_insn (gen_aarch64_atomic_exchangedi_lse
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
	machine_mode mode = DImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[3],
					    &aarch64_ool_swp_names);
	rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL,
					    mode, operands[2], mode,
					    XEXP (operands[1], 0), Pmode);
        emit_move_insn (operands[0], rval);
      }
    else
      {
	emit_insn (gen_aarch64_atomic_exchangedi
		   (operands[0], operands[1], operands[2], operands[3]));
      }
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
extern rtx_insn *gen_split_247 (rtx_insn *, rtx *);
rtx_insn *
gen_split_247 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_247 (atomics.md:217)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 231 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (SET, operands[0], NULL, operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
extern rtx_insn *gen_split_248 (rtx_insn *, rtx *);
rtx_insn *
gen_split_248 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_248 (atomics.md:217)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 231 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (SET, operands[0], NULL, operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
extern rtx_insn *gen_split_249 (rtx_insn *, rtx *);
rtx_insn *
gen_split_249 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_249 (atomics.md:217)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 231 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (SET, operands[0], NULL, operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:217 */
extern rtx_insn *gen_split_250 (rtx_insn *, rtx *);
rtx_insn *
gen_split_250 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_250 (atomics.md:217)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 231 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (SET, operands[0], NULL, operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_addqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addqi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorqi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorqi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicqi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (QImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = QImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_addqi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_subqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addqi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorqi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorqi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicqi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (QImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = QImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_subqi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_orqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addqi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorqi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorqi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicqi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (QImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = QImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_orqi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_xorqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addqi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorqi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorqi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicqi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (QImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = QImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_xorqi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_andqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addqi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorqi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorqi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicqi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (QImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (QImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (QImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = QImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_andqi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_addhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addhi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorhi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorhi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bichi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (HImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = HImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_addhi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_subhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addhi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorhi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorhi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bichi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (HImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = HImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_subhi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_orhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addhi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorhi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorhi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bichi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (HImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = HImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_orhi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_xorhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addhi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorhi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorhi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bichi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (HImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = HImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_xorhi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_andhi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addhi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorhi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorhi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bichi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (HImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (HImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (HImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = HImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_andhi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_addsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addsi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorsi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorsi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicsi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (SImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = SImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_addsi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_subsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addsi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorsi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorsi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicsi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (SImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = SImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_subsi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_orsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addsi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorsi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorsi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicsi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (SImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = SImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_orsi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_xorsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addsi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorsi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorsi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicsi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (SImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = SImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_xorsi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_andsi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_addsi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iorsi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xorsi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicsi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (SImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (SImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (SImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = SImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_andsi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_adddi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_adddi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iordi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xordi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicdi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (DImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (PLUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = DImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_adddi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (DImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_subdi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_adddi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iordi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xordi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicdi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (DImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (MINUS)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = DImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_subdi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (DImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_ordi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_adddi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iordi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xordi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicdi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (DImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (IOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = DImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_ordi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (DImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_xordi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_adddi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iordi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xordi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicdi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (DImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (XOR)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = DImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_xordi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (DImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:260 */
rtx
gen_atomic_anddi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 266 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    rtx (*gen) (rtx, rtx, rtx);

    /* Use an atomic load-operate instruction when possible.  */
    if (TARGET_LSE)
      {
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    gen = gen_aarch64_atomic_adddi_lse;
	    break;
	  case IOR:
	    gen = gen_aarch64_atomic_iordi_lse;
	    break;
	  case XOR:
	    gen = gen_aarch64_atomic_xordi_lse;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    gen = gen_aarch64_atomic_bicdi_lse;
	    break;
	  default:
	    gcc_unreachable ();
	  }
	operands[1] = force_reg (DImode, operands[1]);
      }
    else if (TARGET_OUTLINE_ATOMICS)
      {
        const atomic_ool_names *names;
	switch (AND)
	  {
	  case MINUS:
	    operands[1] = expand_simple_unop (DImode, NEG, operands[1],
					      NULL, 1);
	    /* fallthru */
	  case PLUS:
	    names = &aarch64_ool_ldadd_names;
	    break;
	  case IOR:
	    names = &aarch64_ool_ldset_names;
	    break;
	  case XOR:
	    names = &aarch64_ool_ldeor_names;
	    break;
	  case AND:
	    operands[1] = expand_simple_unop (DImode, NOT, operands[1],
					      NULL, 1);
	    names = &aarch64_ool_ldclr_names;
	    break;
	  default:
	    gcc_unreachable ();
	  }
        machine_mode mode = DImode;
	rtx func = aarch64_atomic_ool_func (mode, operands[2], names);
	emit_library_call_value (func, NULL_RTX, LCT_NORMAL, mode,
				 operands[1], mode,
				 XEXP (operands[0], 0), Pmode);
        DONE;
      }
    else
      gen = gen_aarch64_atomic_anddi;

    emit_insn (gen (operands[0], operands[1], operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (DImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_251 (rtx_insn *, rtx *);
rtx_insn *
gen_split_251 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_251 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_252 (rtx_insn *, rtx *);
rtx_insn *
gen_split_252 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_252 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_253 (rtx_insn *, rtx *);
rtx_insn *
gen_split_253 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_253 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_254 (rtx_insn *, rtx *);
rtx_insn *
gen_split_254 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_254 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_255 (rtx_insn *, rtx *);
rtx_insn *
gen_split_255 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_255 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_256 (rtx_insn *, rtx *);
rtx_insn *
gen_split_256 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_256 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_257 (rtx_insn *, rtx *);
rtx_insn *
gen_split_257 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_257 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_258 (rtx_insn *, rtx *);
rtx_insn *
gen_split_258 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_258 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_259 (rtx_insn *, rtx *);
rtx_insn *
gen_split_259 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_259 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_260 (rtx_insn *, rtx *);
rtx_insn *
gen_split_260 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_260 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_261 (rtx_insn *, rtx *);
rtx_insn *
gen_split_261 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_261 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_262 (rtx_insn *, rtx *);
rtx_insn *
gen_split_262 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_262 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_263 (rtx_insn *, rtx *);
rtx_insn *
gen_split_263 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_263 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_264 (rtx_insn *, rtx *);
rtx_insn *
gen_split_264 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_264 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_265 (rtx_insn *, rtx *);
rtx_insn *
gen_split_265 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_265 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_266 (rtx_insn *, rtx *);
rtx_insn *
gen_split_266 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_266 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_267 (rtx_insn *, rtx *);
rtx_insn *
gen_split_267 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_267 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_268 (rtx_insn *, rtx *);
rtx_insn *
gen_split_268 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_268 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_269 (rtx_insn *, rtx *);
rtx_insn *
gen_split_269 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_269 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:338 */
extern rtx_insn *gen_split_270 (rtx_insn *, rtx *);
rtx_insn *
gen_split_270 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_270 (atomics.md:338)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 352 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
extern rtx_insn *gen_split_271 (rtx_insn *, rtx *);
rtx_insn *
gen_split_271 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_271 (atomics.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
     aarch64_split_atomic_op (NOT, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
     DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
extern rtx_insn *gen_split_272 (rtx_insn *, rtx *);
rtx_insn *
gen_split_272 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_272 (atomics.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
     aarch64_split_atomic_op (NOT, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
     DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
extern rtx_insn *gen_split_273 (rtx_insn *, rtx *);
rtx_insn *
gen_split_273 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_273 (atomics.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
     aarch64_split_atomic_op (NOT, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
     DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:393 */
extern rtx_insn *gen_split_274 (rtx_insn *, rtx *);
rtx_insn *
gen_split_274 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_274 (atomics.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 408 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
     aarch64_split_atomic_op (NOT, NULL, operands[3], operands[0],
			     operands[1], operands[2], operands[4]);
     DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_addqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (PLUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addqi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorqi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorqi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicqi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (QImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (PLUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = QImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_addqi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_PLUS (QImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_subqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (MINUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addqi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorqi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorqi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicqi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (QImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (MINUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = QImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_subqi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_MINUS (QImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_orqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (IOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addqi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorqi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorqi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicqi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (QImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (IOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = QImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_orqi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_IOR (QImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_xorqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (XOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addqi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorqi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorqi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicqi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (QImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (XOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = QImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_xorqi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_XOR (QImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_andqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (AND)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addqi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorqi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorqi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicqi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (QImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (AND)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (QImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (QImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = QImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_andqi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_AND (QImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_addhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (PLUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addhi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorhi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorhi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bichi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (HImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (PLUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = HImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_addhi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_PLUS (HImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_subhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (MINUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addhi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorhi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorhi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bichi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (HImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (MINUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = HImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_subhi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_MINUS (HImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_orhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (IOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addhi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorhi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorhi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bichi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (HImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (IOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = HImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_orhi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_IOR (HImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_xorhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (XOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addhi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorhi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorhi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bichi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (HImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (XOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = HImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_xorhi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_XOR (HImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_andhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (AND)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addhi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorhi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorhi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bichi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (HImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (AND)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (HImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (HImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = HImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_andhi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_AND (HImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_addsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (PLUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addsi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorsi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorsi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicsi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (SImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (PLUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = SImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_addsi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_PLUS (SImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_subsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (MINUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addsi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorsi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorsi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicsi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (SImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (MINUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = SImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_subsi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_MINUS (SImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_orsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (IOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addsi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorsi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorsi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicsi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (SImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (IOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = SImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_orsi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_IOR (SImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_xorsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (XOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addsi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorsi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorsi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicsi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (SImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (XOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = SImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_xorsi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_XOR (SImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_andsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (AND)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_addsi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iorsi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xorsi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicsi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (SImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (AND)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (SImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (SImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = SImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_andsi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_AND (SImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_adddi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (PLUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_adddi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iordi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xordi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicdi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (DImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (PLUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = DImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_adddi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_PLUS (DImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_subdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (MINUS)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_adddi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iordi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xordi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicdi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (DImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (MINUS)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = DImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_subdi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_MINUS (DImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_ordi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (IOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_adddi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iordi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xordi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicdi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (DImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (IOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = DImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_ordi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_IOR (DImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_xordi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (XOR)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_adddi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iordi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xordi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicdi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (DImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (XOR)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = DImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_xordi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_XOR (DImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:417 */
rtx
gen_atomic_fetch_anddi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 424 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  rtx (*gen) (rtx, rtx, rtx, rtx);

  /* Use an atomic load-operate instruction when possible.  */
  if (TARGET_LSE)
    {
      switch (AND)
        {
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  gen = gen_aarch64_atomic_fetch_adddi_lse;
	  break;
	case IOR:
	  gen = gen_aarch64_atomic_fetch_iordi_lse;
	  break;
	case XOR:
	  gen = gen_aarch64_atomic_fetch_xordi_lse;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  gen = gen_aarch64_atomic_fetch_bicdi_lse;
	  break;
	default:
	  gcc_unreachable ();
	}
      operands[2] = force_reg (DImode, operands[2]);
    }
  else if (TARGET_OUTLINE_ATOMICS)
    {
      const atomic_ool_names *names;
      switch (AND)
	{
	case MINUS:
	  operands[2] = expand_simple_unop (DImode, NEG, operands[2],
					    NULL, 1);
	  /* fallthru */
	case PLUS:
	  names = &aarch64_ool_ldadd_names;
	  break;
	case IOR:
	  names = &aarch64_ool_ldset_names;
	  break;
	case XOR:
	  names = &aarch64_ool_ldeor_names;
	  break;
	case AND:
	  operands[2] = expand_simple_unop (DImode, NOT, operands[2],
					    NULL, 1);
	  names = &aarch64_ool_ldclr_names;
	  break;
	default:
	  gcc_unreachable ();
	}
      machine_mode mode = DImode;
      rtx func = aarch64_atomic_ool_func (mode, operands[3], names);
      rtx rval = emit_library_call_value (func, operands[0], LCT_NORMAL, mode,
					  operands[2], mode,
					  XEXP (operands[1], 0), Pmode);
      emit_move_insn (operands[0], rval);
      DONE;
    }
  else
    gen = gen_aarch64_atomic_fetch_anddi;

  emit_insn (gen (operands[0], operands[1], operands[2], operands[3]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit_insn (gen_rtx_AND (DImode,
	operand2,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_275 (rtx_insn *, rtx *);
rtx_insn *
gen_split_275 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_275 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_276 (rtx_insn *, rtx *);
rtx_insn *
gen_split_276 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_276 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_277 (rtx_insn *, rtx *);
rtx_insn *
gen_split_277 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_277 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_278 (rtx_insn *, rtx *);
rtx_insn *
gen_split_278 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_278 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_279 (rtx_insn *, rtx *);
rtx_insn *
gen_split_279 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_279 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_280 (rtx_insn *, rtx *);
rtx_insn *
gen_split_280 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_280 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_281 (rtx_insn *, rtx *);
rtx_insn *
gen_split_281 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_281 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_282 (rtx_insn *, rtx *);
rtx_insn *
gen_split_282 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_282 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_283 (rtx_insn *, rtx *);
rtx_insn *
gen_split_283 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_283 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_284 (rtx_insn *, rtx *);
rtx_insn *
gen_split_284 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_284 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_285 (rtx_insn *, rtx *);
rtx_insn *
gen_split_285 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_285 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_286 (rtx_insn *, rtx *);
rtx_insn *
gen_split_286 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_286 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_287 (rtx_insn *, rtx *);
rtx_insn *
gen_split_287 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_287 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_288 (rtx_insn *, rtx *);
rtx_insn *
gen_split_288 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_288 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_289 (rtx_insn *, rtx *);
rtx_insn *
gen_split_289 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_289 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_290 (rtx_insn *, rtx *);
rtx_insn *
gen_split_290 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_290 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_291 (rtx_insn *, rtx *);
rtx_insn *
gen_split_291 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_291 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_292 (rtx_insn *, rtx *);
rtx_insn *
gen_split_292 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_292 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_293 (rtx_insn *, rtx *);
rtx_insn *
gen_split_293 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_293 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:496 */
extern rtx_insn *gen_split_294 (rtx_insn *, rtx *);
rtx_insn *
gen_split_294 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_294 (atomics.md:496)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 512 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, operands[0], operands[4], operands[1],
			     operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
extern rtx_insn *gen_split_295 (rtx_insn *, rtx *);
rtx_insn *
gen_split_295 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_295 (atomics.md:542)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 559 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			    operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
extern rtx_insn *gen_split_296 (rtx_insn *, rtx *);
rtx_insn *
gen_split_296 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_296 (atomics.md:542)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 559 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			    operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
extern rtx_insn *gen_split_297 (rtx_insn *, rtx *);
rtx_insn *
gen_split_297 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_297 (atomics.md:542)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 559 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			    operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:542 */
extern rtx_insn *gen_split_298 (rtx_insn *, rtx *);
rtx_insn *
gen_split_298 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_298 (atomics.md:542)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 559 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, operands[0], operands[4], operands[1],
			    operands[2], operands[3], operands[5]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_add_fetchqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (QImode);
      operands[2] = force_reg (QImode, operands[2]);
      emit_insn (gen_atomic_fetch_addqi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (QImode, PLUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_add_fetchqi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (QImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_sub_fetchqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (QImode);
      operands[2] = force_reg (QImode, operands[2]);
      emit_insn (gen_atomic_fetch_subqi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (QImode, MINUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_sub_fetchqi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (QImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_or_fetchqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (QImode);
      operands[2] = force_reg (QImode, operands[2]);
      emit_insn (gen_atomic_fetch_orqi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (QImode, IOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_or_fetchqi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (QImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_xor_fetchqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (QImode);
      operands[2] = force_reg (QImode, operands[2]);
      emit_insn (gen_atomic_fetch_xorqi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (QImode, XOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_xor_fetchqi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (QImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_and_fetchqi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (QImode);
      operands[2] = force_reg (QImode, operands[2]);
      emit_insn (gen_atomic_fetch_andqi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (QImode, AND, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_and_fetchqi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (QImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_add_fetchhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (HImode);
      operands[2] = force_reg (HImode, operands[2]);
      emit_insn (gen_atomic_fetch_addhi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (HImode, PLUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_add_fetchhi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (HImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_sub_fetchhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (HImode);
      operands[2] = force_reg (HImode, operands[2]);
      emit_insn (gen_atomic_fetch_subhi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (HImode, MINUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_sub_fetchhi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (HImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_or_fetchhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (HImode);
      operands[2] = force_reg (HImode, operands[2]);
      emit_insn (gen_atomic_fetch_orhi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (HImode, IOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_or_fetchhi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (HImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_xor_fetchhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (HImode);
      operands[2] = force_reg (HImode, operands[2]);
      emit_insn (gen_atomic_fetch_xorhi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (HImode, XOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_xor_fetchhi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (HImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_and_fetchhi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (HImode);
      operands[2] = force_reg (HImode, operands[2]);
      emit_insn (gen_atomic_fetch_andhi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (HImode, AND, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_and_fetchhi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (HImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_add_fetchsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (SImode);
      operands[2] = force_reg (SImode, operands[2]);
      emit_insn (gen_atomic_fetch_addsi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (SImode, PLUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_add_fetchsi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (SImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_sub_fetchsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (SImode);
      operands[2] = force_reg (SImode, operands[2]);
      emit_insn (gen_atomic_fetch_subsi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (SImode, MINUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_sub_fetchsi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (SImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_or_fetchsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (SImode);
      operands[2] = force_reg (SImode, operands[2]);
      emit_insn (gen_atomic_fetch_orsi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (SImode, IOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_or_fetchsi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (SImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_xor_fetchsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (SImode);
      operands[2] = force_reg (SImode, operands[2]);
      emit_insn (gen_atomic_fetch_xorsi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (SImode, XOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_xor_fetchsi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (SImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_and_fetchsi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (SImode);
      operands[2] = force_reg (SImode, operands[2]);
      emit_insn (gen_atomic_fetch_andsi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (SImode, AND, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_and_fetchsi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (SImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_add_fetchdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (DImode);
      operands[2] = force_reg (DImode, operands[2]);
      emit_insn (gen_atomic_fetch_adddi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (DImode, PLUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_add_fetchdi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_PLUS (DImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_sub_fetchdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (DImode);
      operands[2] = force_reg (DImode, operands[2]);
      emit_insn (gen_atomic_fetch_subdi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (DImode, MINUS, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_sub_fetchdi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_MINUS (DImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_or_fetchdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (DImode);
      operands[2] = force_reg (DImode, operands[2]);
      emit_insn (gen_atomic_fetch_ordi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (DImode, IOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_or_fetchdi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_IOR (DImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_xor_fetchdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (DImode);
      operands[2] = force_reg (DImode, operands[2]);
      emit_insn (gen_atomic_fetch_xordi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (DImode, XOR, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_xor_fetchdi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_XOR (DImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:568 */
rtx
gen_atomic_and_fetchdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 575 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
  /* Use an atomic load-operate instruction when possible.  In this case
     we will re-compute the result from the original mem value. */
  if (TARGET_LSE || TARGET_OUTLINE_ATOMICS)
    {
      rtx tmp = gen_reg_rtx (DImode);
      operands[2] = force_reg (DImode, operands[2]);
      emit_insn (gen_atomic_fetch_anddi
                 (tmp, operands[1], operands[2], operands[3]));
      tmp = expand_simple_binop (DImode, AND, tmp, operands[2],
				 operands[0], 1, OPTAB_WIDEN);
      emit_move_insn (operands[0], tmp);
    }
  else
    {
      emit_insn (gen_aarch64_atomic_and_fetchdi
                 (operands[0], operands[1], operands[2], operands[3]));
    }
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_AND (DImode,
	operand1,
	operand2));
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_299 (rtx_insn *, rtx *);
rtx_insn *
gen_split_299 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_299 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_300 (rtx_insn *, rtx *);
rtx_insn *
gen_split_300 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_300 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_301 (rtx_insn *, rtx *);
rtx_insn *
gen_split_301 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_301 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_302 (rtx_insn *, rtx *);
rtx_insn *
gen_split_302 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_302 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_303 (rtx_insn *, rtx *);
rtx_insn *
gen_split_303 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_303 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_304 (rtx_insn *, rtx *);
rtx_insn *
gen_split_304 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_304 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_305 (rtx_insn *, rtx *);
rtx_insn *
gen_split_305 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_305 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_306 (rtx_insn *, rtx *);
rtx_insn *
gen_split_306 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_306 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_307 (rtx_insn *, rtx *);
rtx_insn *
gen_split_307 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_307 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_308 (rtx_insn *, rtx *);
rtx_insn *
gen_split_308 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_308 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_309 (rtx_insn *, rtx *);
rtx_insn *
gen_split_309 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_309 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_310 (rtx_insn *, rtx *);
rtx_insn *
gen_split_310 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_310 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_311 (rtx_insn *, rtx *);
rtx_insn *
gen_split_311 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_311 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_312 (rtx_insn *, rtx *);
rtx_insn *
gen_split_312 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_312 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_313 (rtx_insn *, rtx *);
rtx_insn *
gen_split_313 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_313 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_314 (rtx_insn *, rtx *);
rtx_insn *
gen_split_314 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_314 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (PLUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_315 (rtx_insn *, rtx *);
rtx_insn *
gen_split_315 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_315 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (MINUS, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_316 (rtx_insn *, rtx *);
rtx_insn *
gen_split_316 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_316 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (IOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_317 (rtx_insn *, rtx *);
rtx_insn *
gen_split_317 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_317 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (XOR, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:596 */
extern rtx_insn *gen_split_318 (rtx_insn *, rtx *);
rtx_insn *
gen_split_318 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_318 (atomics.md:596)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 612 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (AND, NULL, operands[0], operands[1],
			     operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
extern rtx_insn *gen_split_319 (rtx_insn *, rtx *);
rtx_insn *
gen_split_319 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_319 (atomics.md:619)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 636 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, NULL, operands[0], operands[1],
			    operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
extern rtx_insn *gen_split_320 (rtx_insn *, rtx *);
rtx_insn *
gen_split_320 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_320 (atomics.md:619)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 636 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, NULL, operands[0], operands[1],
			    operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
extern rtx_insn *gen_split_321 (rtx_insn *, rtx *);
rtx_insn *
gen_split_321 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_321 (atomics.md:619)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 636 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, NULL, operands[0], operands[1],
			    operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:619 */
extern rtx_insn *gen_split_322 (rtx_insn *, rtx *);
rtx_insn *
gen_split_322 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_322 (atomics.md:619)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 636 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    aarch64_split_atomic_op (NOT, NULL, operands[0], operands[1],
			    operands[2], operands[3], operands[4]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:766 */
rtx
gen_mem_thread_fence (rtx operand0)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[1];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 769 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    enum memmodel model = memmodel_from_int (INTVAL (operands[0]));
    if (!(is_mm_relaxed (model) || is_mm_consume (model)))
      emit_insn (gen_dmb (operands[0]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
  }
  emit (operand0, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md:777 */
rtx
gen_dmb (rtx operand0)
{
  rtx operand1;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/atomics.md"
{
    operands[1] = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (Pmode));
    MEM_VOLATILE_P (operands[1]) = 1;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand1,
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (2,
		copy_rtx (operand1),
		operand0),
	57)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:21 */
extern rtx_insn *gen_peephole2_12 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_12 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_12 (aarch64-ldpstp.md:21)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 29 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:21 */
extern rtx_insn *gen_peephole2_13 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_13 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_13 (aarch64-ldpstp.md:21)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 29 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:33 */
extern rtx_insn *gen_peephole2_14 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_14 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_14 (aarch64-ldpstp.md:33)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 41 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:33 */
extern rtx_insn *gen_peephole2_15 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_15 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_15 (aarch64-ldpstp.md:33)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 41 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:45 */
extern rtx_insn *gen_peephole2_16 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_16 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_16 (aarch64-ldpstp.md:45)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 53 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:45 */
extern rtx_insn *gen_peephole2_17 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_17 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_17 (aarch64-ldpstp.md:45)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 53 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:57 */
extern rtx_insn *gen_peephole2_18 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_18 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_18 (aarch64-ldpstp.md:57)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:57 */
extern rtx_insn *gen_peephole2_19 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_19 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_19 (aarch64-ldpstp.md:57)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 65 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_20 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_20 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_20 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_21 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_21 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_21 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_22 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_22 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_22 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_23 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_23 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_23 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_24 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_24 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_24 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_25 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_25 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_25 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_26 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_26 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_26 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_27 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_27 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_27 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_28 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_28 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_28 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_29 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_29 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_29 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_30 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_30 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_30 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_31 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_31 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_31 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_32 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_32 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_32 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_33 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_33 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_33 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_34 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_34 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_34 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_35 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_35 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_35 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_36 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_36 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_36 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_37 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_37 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_37 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_38 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_38 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_38 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_39 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_39 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_39 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_40 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_40 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_40 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_41 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_41 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_41 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_42 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_42 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_42 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_43 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_43 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_43 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_44 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_44 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_44 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_45 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_45 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_45 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_46 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_46 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_46 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_47 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_47 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_47 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_48 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_48 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_48 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_49 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_49 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_49 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_50 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_50 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_50 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_51 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_51 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_51 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_52 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_52 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_52 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_53 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_53 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_53 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_54 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_54 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_54 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:69 */
extern rtx_insn *gen_peephole2_55 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_55 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_55 (aarch64-ldpstp.md:69)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 77 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_56 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_56 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_56 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_57 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_57 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_57 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_58 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_58 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_58 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_59 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_59 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_59 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_60 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_60 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_60 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_61 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_61 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_61 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_62 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_62 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_62 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_63 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_63 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_63 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_64 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_64 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_64 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_65 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_65 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_65 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_66 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_66 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_66 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_67 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_67 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_67 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_68 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_68 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_68 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_69 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_69 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_69 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_70 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_70 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_70 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_71 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_71 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_71 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_72 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_72 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_72 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_73 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_73 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_73 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_74 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_74 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_74 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_75 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_75 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_75 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_76 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_76 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_76 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_77 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_77 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_77 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_78 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_78 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_78 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_79 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_79 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_79 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_80 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_80 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_80 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_81 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_81 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_81 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_82 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_82 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_82 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_83 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_83 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_83 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_84 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_84 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_84 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_85 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_85 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_85 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_86 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_86 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_86 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_87 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_87 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_87 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_88 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_88 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_88 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_89 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_89 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_89 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_90 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_90 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_90 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:81 */
extern rtx_insn *gen_peephole2_91 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_91 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_91 (aarch64-ldpstp.md:81)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 90 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_92 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_92 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_92 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_93 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_93 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_93 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_94 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_94 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_94 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_95 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_95 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_95 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_96 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_96 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_96 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_97 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_97 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_97 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_98 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_98 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_98 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_99 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_99 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_99 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_100 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_100 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_100 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_101 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_101 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_101 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_102 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_102 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_102 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_103 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_103 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_103 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_104 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_104 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_104 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_105 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_105 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_105 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_106 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_106 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_106 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_107 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_107 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_107 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_108 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_108 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_108 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_109 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_109 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_109 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_110 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_110 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_110 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_111 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_111 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_111 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_112 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_112 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_112 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_113 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_113 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_113 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_114 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_114 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_114 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_115 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_115 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_115 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_116 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_116 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_116 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_117 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_117 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_117 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_118 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_118 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_118 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_119 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_119 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_119 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_120 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_120 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_120 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_121 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_121 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_121 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_122 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_122 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_122 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_123 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_123 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_123 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_124 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_124 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_124 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_125 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_125 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_125 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_126 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_126 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_126 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_127 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_127 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_127 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_128 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_128 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_128 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_129 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_129 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_129 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_130 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_130 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_130 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_131 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_131 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_131 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_132 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_132 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_132 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_133 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_133 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_133 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_134 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_134 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_134 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_135 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_135 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_135 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_136 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_136 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_136 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_137 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_137 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_137 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_138 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_138 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_138 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_139 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_139 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_139 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_140 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_140 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_140 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_141 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_141 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_141 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_142 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_142 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_142 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_143 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_143 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_143 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_144 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_144 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_144 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_145 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_145 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_145 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_146 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_146 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_146 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_147 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_147 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_147 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_148 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_148 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_148 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_149 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_149 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_149 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_150 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_150 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_150 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_151 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_151 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_151 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_152 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_152 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_152 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_153 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_153 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_153 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_154 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_154 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_154 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:94 */
extern rtx_insn *gen_peephole2_155 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_155 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_155 (aarch64-ldpstp.md:94)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_156 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_156 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_156 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_157 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_157 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_157 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_158 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_158 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_158 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_159 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_159 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_159 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_160 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_160 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_160 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_161 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_161 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_161 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_162 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_162 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_162 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_163 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_163 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_163 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_164 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_164 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_164 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_165 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_165 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_165 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_166 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_166 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_166 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_167 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_167 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_167 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_168 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_168 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_168 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_169 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_169 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_169 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_170 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_170 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_170 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_171 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_171 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_171 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_172 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_172 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_172 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_173 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_173 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_173 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_174 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_174 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_174 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_175 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_175 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_175 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_176 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_176 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_176 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_177 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_177 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_177 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_178 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_178 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_178 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_179 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_179 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_179 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_180 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_180 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_180 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_181 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_181 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_181 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_182 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_182 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_182 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_183 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_183 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_183 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_184 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_184 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_184 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_185 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_185 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_185 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_186 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_186 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_186 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_187 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_187 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_187 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_188 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_188 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_188 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_189 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_189 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_189 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_190 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_190 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_190 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_191 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_191 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_191 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_192 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_192 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_192 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_193 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_193 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_193 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_194 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_194 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_194 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_195 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_195 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_195 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_196 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_196 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_196 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_197 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_197 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_197 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_198 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_198 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_198 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_199 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_199 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_199 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_200 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_200 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_200 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_201 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_201 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_201 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_202 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_202 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_202 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_203 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_203 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_203 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_204 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_204 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_204 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_205 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_205 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_205 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_206 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_206 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_206 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_207 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_207 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_207 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_208 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_208 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_208 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_209 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_209 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_209 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_210 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_210 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_210 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_211 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_211 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_211 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_212 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_212 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_212 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_213 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_213 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_213 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_214 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_214 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_214 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_215 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_215 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_215 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_216 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_216 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_216 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_217 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_217 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_217 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_218 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_218 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_218 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:109 */
extern rtx_insn *gen_peephole2_219 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_219 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_219 (aarch64-ldpstp.md:109)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 120 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:127 */
extern rtx_insn *gen_peephole2_220 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_220 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_220 (aarch64-ldpstp.md:127)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 135 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	operand1)),
		gen_rtx_SET (operand2,
	gen_rtx_SIGN_EXTEND (DImode,
	operand3)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:139 */
extern rtx_insn *gen_peephole2_221 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_221 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_221 (aarch64-ldpstp.md:139)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 147 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, true);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	operand1)),
		gen_rtx_SET (operand2,
	gen_rtx_ZERO_EXTEND (DImode,
	operand3)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:161 */
extern rtx_insn *gen_peephole2_222 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_222 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_222 (aarch64-ldpstp.md:161)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 169 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:161 */
extern rtx_insn *gen_peephole2_223 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_223 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_223 (aarch64-ldpstp.md:161)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 169 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:161 */
extern rtx_insn *gen_peephole2_224 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_224 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_224 (aarch64-ldpstp.md:161)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 169 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:161 */
extern rtx_insn *gen_peephole2_225 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_225 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_225 (aarch64-ldpstp.md:161)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 169 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  aarch64_swap_ldrstr_operands (operands, false);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_SET (operand2,
	operand3))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:178 */
extern rtx_insn *gen_peephole2_226 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_226 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_226 (aarch64-ldpstp.md:178)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, SImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:178 */
extern rtx_insn *gen_peephole2_227 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_227 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_227 (aarch64-ldpstp.md:178)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 191 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, DImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:198 */
extern rtx_insn *gen_peephole2_228 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_228 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_228 (aarch64-ldpstp.md:198)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 211 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, SFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:198 */
extern rtx_insn *gen_peephole2_229 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_229 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_229 (aarch64-ldpstp.md:198)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 211 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, DFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:218 */
extern rtx_insn *gen_peephole2_230 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_230 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_230 (aarch64-ldpstp.md:218)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 231 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, SImode, SIGN_EXTEND))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:238 */
extern rtx_insn *gen_peephole2_231 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_231 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_231 (aarch64-ldpstp.md:238)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 251 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, SImode, ZERO_EXTEND))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:258 */
extern rtx_insn *gen_peephole2_232 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_232 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_232 (aarch64-ldpstp.md:258)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 271 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, SImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:258 */
extern rtx_insn *gen_peephole2_233 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_233 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_233 (aarch64-ldpstp.md:258)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 271 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, DImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:278 */
extern rtx_insn *gen_peephole2_234 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_234 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_234 (aarch64-ldpstp.md:278)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 291 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, SFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:278 */
extern rtx_insn *gen_peephole2_235 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_235 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_235 (aarch64-ldpstp.md:278)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 291 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, DFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:298 */
extern rtx_insn *gen_peephole2_236 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_236 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_236 (aarch64-ldpstp.md:298)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 312 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, V2SImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:298 */
extern rtx_insn *gen_peephole2_237 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_237 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_237 (aarch64-ldpstp.md:298)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 312 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, V2SFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:298 */
extern rtx_insn *gen_peephole2_238 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_238 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_238 (aarch64-ldpstp.md:298)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 312 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, V2DImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:298 */
extern rtx_insn *gen_peephole2_239 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_239 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_239 (aarch64-ldpstp.md:298)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 312 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, false, V2DFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:319 */
extern rtx_insn *gen_peephole2_240 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_240 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_240 (aarch64-ldpstp.md:319)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 333 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, V2SImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:319 */
extern rtx_insn *gen_peephole2_241 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_241 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_241 (aarch64-ldpstp.md:319)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 333 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, V2SFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:319 */
extern rtx_insn *gen_peephole2_242 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_242 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_242 (aarch64-ldpstp.md:319)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 333 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, V2DImode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md:319 */
extern rtx_insn *gen_peephole2_243 (rtx_insn *, rtx *);
rtx_insn *
gen_peephole2_243 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  HARD_REG_SET _regs_allocated;
  CLEAR_HARD_REG_SET (_regs_allocated);
  if ((operands[8] = peep2_find_free_register (0, 4, "r", DImode, &_regs_allocated)) == NULL_RTX)
    return NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_peephole2_243 (aarch64-ldpstp.md:319)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 333 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-ldpstp.md"
{
  if (aarch64_gen_adjusted_ldpstp (operands, true, V2DFmode, UNKNOWN))
    DONE;
  else
    FAIL;
}
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx16BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx4qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:644 */
rtx
gen_movvnx2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 648 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use the predicated load and store patterns where possible.
       This is required for big-endian targets (see the comment at the
       head of the file) and increases the addressing choices for
       little-endian.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& can_create_pseudo_p ())
      {
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }

    /* Optimize subregs on big-endian targets: we can use REV[BHW]
       instead of going through memory.  */
    if (BYTES_BIG_ENDIAN
	&& aarch64_maybe_expand_sve_subreg_move (operands[0], operands[1]))
      DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx4qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:674 */
rtx
gen_movmisalignvnx2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 678 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Equivalent to a normal move for our purpooses.  */
    emit_move_insn (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:722 */
rtx
gen_aarch64_sve_reload_mem (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 728 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Create a PTRUE.  */
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));

    /* Refer to the PTRUE in the appropriate mode for this move.  */
    machine_mode mode = GET_MODE (operands[0]);
    rtx pred = gen_lowpart (aarch64_sve_pred_mode (mode), operands[2]);

    /* Emit a predicated load or store.  */
    aarch64_emit_sve_pred_move (operands[0], pred, operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	operand1),
		gen_rtx_CLOBBER (VOIDmode,
	operand2))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_323 (rtx_insn *, rtx *);
rtx_insn *
gen_split_323 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_323 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_324 (rtx_insn *, rtx *);
rtx_insn *
gen_split_324 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_324 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_325 (rtx_insn *, rtx *);
rtx_insn *
gen_split_325 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_325 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_326 (rtx_insn *, rtx *);
rtx_insn *
gen_split_326 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_326 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_327 (rtx_insn *, rtx *);
rtx_insn *
gen_split_327 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_327 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_328 (rtx_insn *, rtx *);
rtx_insn *
gen_split_328 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_328 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_329 (rtx_insn *, rtx *);
rtx_insn *
gen_split_329 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_329 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_330 (rtx_insn *, rtx *);
rtx_insn *
gen_split_330 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_330 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_331 (rtx_insn *, rtx *);
rtx_insn *
gen_split_331 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_331 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_332 (rtx_insn *, rtx *);
rtx_insn *
gen_split_332 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_332 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_333 (rtx_insn *, rtx *);
rtx_insn *
gen_split_333 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_333 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_334 (rtx_insn *, rtx *);
rtx_insn *
gen_split_334 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_334 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_335 (rtx_insn *, rtx *);
rtx_insn *
gen_split_335 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_335 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_336 (rtx_insn *, rtx *);
rtx_insn *
gen_split_336 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_336 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_337 (rtx_insn *, rtx *);
rtx_insn *
gen_split_337 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_337 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_338 (rtx_insn *, rtx *);
rtx_insn *
gen_split_338 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_338 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_339 (rtx_insn *, rtx *);
rtx_insn *
gen_split_339 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_339 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_340 (rtx_insn *, rtx *);
rtx_insn *
gen_split_340 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_340 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:745 */
extern rtx_insn *gen_split_341 (rtx_insn *, rtx *);
rtx_insn *
gen_split_341 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_341 (aarch64-sve.md:745)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  emit_insn (gen_rtx_SET (operand0,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_342 (rtx_insn *, rtx *);
rtx_insn *
gen_split_342 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_342 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_343 (rtx_insn *, rtx *);
rtx_insn *
gen_split_343 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_343 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_344 (rtx_insn *, rtx *);
rtx_insn *
gen_split_344 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_344 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_345 (rtx_insn *, rtx *);
rtx_insn *
gen_split_345 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_345 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_346 (rtx_insn *, rtx *);
rtx_insn *
gen_split_346 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_346 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_347 (rtx_insn *, rtx *);
rtx_insn *
gen_split_347 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_347 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_348 (rtx_insn *, rtx *);
rtx_insn *
gen_split_348 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_348 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_349 (rtx_insn *, rtx *);
rtx_insn *
gen_split_349 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_349 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_350 (rtx_insn *, rtx *);
rtx_insn *
gen_split_350 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_350 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_351 (rtx_insn *, rtx *);
rtx_insn *
gen_split_351 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_351 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_352 (rtx_insn *, rtx *);
rtx_insn *
gen_split_352 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_352 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_353 (rtx_insn *, rtx *);
rtx_insn *
gen_split_353 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_353 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_354 (rtx_insn *, rtx *);
rtx_insn *
gen_split_354 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_354 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_355 (rtx_insn *, rtx *);
rtx_insn *
gen_split_355 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_355 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_356 (rtx_insn *, rtx *);
rtx_insn *
gen_split_356 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_356 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_357 (rtx_insn *, rtx *);
rtx_insn *
gen_split_357 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_357 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_358 (rtx_insn *, rtx *);
rtx_insn *
gen_split_358 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_358 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_359 (rtx_insn *, rtx *);
rtx_insn *
gen_split_359 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_359 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:767 */
extern rtx_insn *gen_split_360 (rtx_insn *, rtx *);
rtx_insn *
gen_split_360 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_360 (aarch64-sve.md:767)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 777 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_split_sve_subreg_move (operands[0], operands[1], operands[2]);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx16QImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx16QImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx8QImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx8QImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx4qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx4QImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx4QImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2QImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2QImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx8HImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx8HImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx4HImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx4HImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2HImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2HImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx8HFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx8HFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx4HFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx4HFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2HFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2HFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx8BFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx8BFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx4BFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx4BFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2BFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2BFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx4SImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx4SImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2SImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2SImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx4SFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx4SFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2SFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2SFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2DImode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2DImode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:786 */
rtx
gen_aarch64_sve_reinterpretvnx2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 792 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    machine_mode src_mode = GET_MODE (operands[1]);
    if (targetm.can_change_mode_class (VNx2DFmode, src_mode, FP_REGS))
      {
	emit_move_insn (operands[0], gen_lowpart (VNx2DFmode, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	144)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_361 (rtx_insn *, rtx *);
rtx_insn *
gen_split_361 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_361 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx16QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_362 (rtx_insn *, rtx *);
rtx_insn *
gen_split_362 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_362 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx8QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_363 (rtx_insn *, rtx *);
rtx_insn *
gen_split_363 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_363 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx4QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_364 (rtx_insn *, rtx *);
rtx_insn *
gen_split_364 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_364 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_365 (rtx_insn *, rtx *);
rtx_insn *
gen_split_365 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_365 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx8HImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_366 (rtx_insn *, rtx *);
rtx_insn *
gen_split_366 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_366 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx4HImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_367 (rtx_insn *, rtx *);
rtx_insn *
gen_split_367 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_367 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2HImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_368 (rtx_insn *, rtx *);
rtx_insn *
gen_split_368 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_368 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx8HFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_369 (rtx_insn *, rtx *);
rtx_insn *
gen_split_369 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_369 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx4HFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_370 (rtx_insn *, rtx *);
rtx_insn *
gen_split_370 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_370 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2HFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_371 (rtx_insn *, rtx *);
rtx_insn *
gen_split_371 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_371 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx8BFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_372 (rtx_insn *, rtx *);
rtx_insn *
gen_split_372 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_372 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx4BFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_373 (rtx_insn *, rtx *);
rtx_insn *
gen_split_373 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_373 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2BFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_374 (rtx_insn *, rtx *);
rtx_insn *
gen_split_374 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_374 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx4SImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_375 (rtx_insn *, rtx *);
rtx_insn *
gen_split_375 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_375 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2SImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_376 (rtx_insn *, rtx *);
rtx_insn *
gen_split_376 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_376 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx4SFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_377 (rtx_insn *, rtx *);
rtx_insn *
gen_split_377 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_377 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2SFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_378 (rtx_insn *, rtx *);
rtx_insn *
gen_split_378 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_378 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2DImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:804 */
extern rtx_insn *gen_split_379 (rtx_insn *, rtx *);
rtx_insn *
gen_split_379 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_379 (aarch64-sve.md:804)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 813 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1], VNx2DFmode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx32qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx16BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx16hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx8si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx4di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx16bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx16hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx8sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx4df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx48qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx16BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx24hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx12si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx6di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx24bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx24hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx12sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx6df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx64qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx16BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx32hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx16si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx8di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx32bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx32hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx8BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx16sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx4BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:825 */
rtx
gen_movvnx8df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Big-endian loads and stores need to be done via LD1 and ST1;
       see the comment at the head of the file for details.  */
    if ((MEM_P (operands[0]) || MEM_P (operands[1]))
	&& BYTES_BIG_ENDIAN)
      {
	gcc_assert (can_create_pseudo_p ());
	aarch64_expand_sve_mem_move (operands[0], operands[1], VNx2BImode);
	DONE;
      }

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_380 (rtx_insn *, rtx *);
rtx_insn *
gen_split_380 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_380 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx16QImode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx16QImode, dest, VNx32QImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx16QImode, src, VNx32QImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_381 (rtx_insn *, rtx *);
rtx_insn *
gen_split_381 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_381 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8HImode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8HImode, dest, VNx16HImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8HImode, src, VNx16HImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_382 (rtx_insn *, rtx *);
rtx_insn *
gen_split_382 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_382 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx4SImode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx4SImode, dest, VNx8SImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx4SImode, src, VNx8SImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_383 (rtx_insn *, rtx *);
rtx_insn *
gen_split_383 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_383 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx2DImode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx2DImode, dest, VNx4DImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx2DImode, src, VNx4DImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_384 (rtx_insn *, rtx *);
rtx_insn *
gen_split_384 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_384 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8BFmode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8BFmode, dest, VNx16BFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8BFmode, src, VNx16BFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_385 (rtx_insn *, rtx *);
rtx_insn *
gen_split_385 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_385 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8HFmode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8HFmode, dest, VNx16HFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8HFmode, src, VNx16HFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_386 (rtx_insn *, rtx *);
rtx_insn *
gen_split_386 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_386 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx4SFmode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx4SFmode, dest, VNx8SFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx4SFmode, src, VNx8SFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_387 (rtx_insn *, rtx *);
rtx_insn *
gen_split_387 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_387 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx2DFmode, 2);
    else
      for (unsigned int i = 0; i < 2; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx2DFmode, dest, VNx4DFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx2DFmode, src, VNx4DFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_388 (rtx_insn *, rtx *);
rtx_insn *
gen_split_388 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_388 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx16QImode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx16QImode, dest, VNx48QImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx16QImode, src, VNx48QImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_389 (rtx_insn *, rtx *);
rtx_insn *
gen_split_389 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_389 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8HImode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8HImode, dest, VNx24HImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8HImode, src, VNx24HImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_390 (rtx_insn *, rtx *);
rtx_insn *
gen_split_390 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_390 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx4SImode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx4SImode, dest, VNx12SImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx4SImode, src, VNx12SImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_391 (rtx_insn *, rtx *);
rtx_insn *
gen_split_391 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_391 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx2DImode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx2DImode, dest, VNx6DImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx2DImode, src, VNx6DImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_392 (rtx_insn *, rtx *);
rtx_insn *
gen_split_392 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_392 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8BFmode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8BFmode, dest, VNx24BFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8BFmode, src, VNx24BFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_393 (rtx_insn *, rtx *);
rtx_insn *
gen_split_393 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_393 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8HFmode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8HFmode, dest, VNx24HFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8HFmode, src, VNx24HFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_394 (rtx_insn *, rtx *);
rtx_insn *
gen_split_394 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_394 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx4SFmode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx4SFmode, dest, VNx12SFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx4SFmode, src, VNx12SFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_395 (rtx_insn *, rtx *);
rtx_insn *
gen_split_395 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_395 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx2DFmode, 3);
    else
      for (unsigned int i = 0; i < 3; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx2DFmode, dest, VNx6DFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx2DFmode, src, VNx6DFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_396 (rtx_insn *, rtx *);
rtx_insn *
gen_split_396 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_396 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx16QImode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx16QImode, dest, VNx64QImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx16QImode, src, VNx64QImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_397 (rtx_insn *, rtx *);
rtx_insn *
gen_split_397 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_397 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8HImode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8HImode, dest, VNx32HImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8HImode, src, VNx32HImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_398 (rtx_insn *, rtx *);
rtx_insn *
gen_split_398 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_398 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx4SImode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx4SImode, dest, VNx16SImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx4SImode, src, VNx16SImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_399 (rtx_insn *, rtx *);
rtx_insn *
gen_split_399 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_399 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx2DImode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx2DImode, dest, VNx8DImode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx2DImode, src, VNx8DImode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_400 (rtx_insn *, rtx *);
rtx_insn *
gen_split_400 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_400 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8BFmode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8BFmode, dest, VNx32BFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8BFmode, src, VNx32BFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_401 (rtx_insn *, rtx *);
rtx_insn *
gen_split_401 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_401 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx8HFmode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx8HFmode, dest, VNx32HFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx8HFmode, src, VNx32HFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_402 (rtx_insn *, rtx *);
rtx_insn *
gen_split_402 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_402 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx4SFmode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx4SFmode, dest, VNx16SFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx4SFmode, src, VNx16SFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:870 */
extern rtx_insn *gen_split_403 (rtx_insn *, rtx *);
rtx_insn *
gen_split_403 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_403 (aarch64-sve.md:870)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 875 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx dest = operands[0];
    rtx src = operands[1];
    if (REG_P (dest) && REG_P (src))
      aarch64_simd_emit_reg_reg_move (operands, VNx2DFmode, 4);
    else
      for (unsigned int i = 0; i < 4; ++i)
	{
	  rtx subdest = simplify_gen_subreg (VNx2DFmode, dest, VNx8DFmode,
					     i * BYTES_PER_SVE_VECTOR);
	  rtx subsrc = simplify_gen_subreg (VNx2DFmode, src, VNx8DFmode,
					    i * BYTES_PER_SVE_VECTOR);
	  emit_insn (gen_rtx_SET (subdest, subsrc));
	}
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_404 (rtx_insn *, rtx *);
rtx_insn *
gen_split_404 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_404 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx16QImode, operands[0],
					   VNx32QImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx16QImode, operands[2],
					  VNx32QImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_405 (rtx_insn *, rtx *);
rtx_insn *
gen_split_405 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_405 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8HImode, operands[0],
					   VNx16HImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8HImode, operands[2],
					  VNx16HImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_406 (rtx_insn *, rtx *);
rtx_insn *
gen_split_406 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_406 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx4SImode, operands[0],
					   VNx8SImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx4SImode, operands[2],
					  VNx8SImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_407 (rtx_insn *, rtx *);
rtx_insn *
gen_split_407 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_407 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx2DImode, operands[0],
					   VNx4DImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx2DImode, operands[2],
					  VNx4DImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_408 (rtx_insn *, rtx *);
rtx_insn *
gen_split_408 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_408 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8BFmode, operands[0],
					   VNx16BFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8BFmode, operands[2],
					  VNx16BFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_409 (rtx_insn *, rtx *);
rtx_insn *
gen_split_409 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_409 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8HFmode, operands[0],
					   VNx16HFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8HFmode, operands[2],
					  VNx16HFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_410 (rtx_insn *, rtx *);
rtx_insn *
gen_split_410 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_410 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx4SFmode, operands[0],
					   VNx8SFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx4SFmode, operands[2],
					  VNx8SFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_411 (rtx_insn *, rtx *);
rtx_insn *
gen_split_411 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_411 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 2; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx2DFmode, operands[0],
					   VNx4DFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx2DFmode, operands[2],
					  VNx4DFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_412 (rtx_insn *, rtx *);
rtx_insn *
gen_split_412 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_412 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx16QImode, operands[0],
					   VNx48QImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx16QImode, operands[2],
					  VNx48QImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_413 (rtx_insn *, rtx *);
rtx_insn *
gen_split_413 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_413 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8HImode, operands[0],
					   VNx24HImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8HImode, operands[2],
					  VNx24HImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_414 (rtx_insn *, rtx *);
rtx_insn *
gen_split_414 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_414 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx4SImode, operands[0],
					   VNx12SImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx4SImode, operands[2],
					  VNx12SImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_415 (rtx_insn *, rtx *);
rtx_insn *
gen_split_415 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_415 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx2DImode, operands[0],
					   VNx6DImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx2DImode, operands[2],
					  VNx6DImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_416 (rtx_insn *, rtx *);
rtx_insn *
gen_split_416 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_416 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8BFmode, operands[0],
					   VNx24BFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8BFmode, operands[2],
					  VNx24BFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_417 (rtx_insn *, rtx *);
rtx_insn *
gen_split_417 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_417 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8HFmode, operands[0],
					   VNx24HFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8HFmode, operands[2],
					  VNx24HFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_418 (rtx_insn *, rtx *);
rtx_insn *
gen_split_418 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_418 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx4SFmode, operands[0],
					   VNx12SFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx4SFmode, operands[2],
					  VNx12SFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_419 (rtx_insn *, rtx *);
rtx_insn *
gen_split_419 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_419 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 3; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx2DFmode, operands[0],
					   VNx6DFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx2DFmode, operands[2],
					  VNx6DFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_420 (rtx_insn *, rtx *);
rtx_insn *
gen_split_420 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_420 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx16QImode, operands[0],
					   VNx64QImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx16QImode, operands[2],
					  VNx64QImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_421 (rtx_insn *, rtx *);
rtx_insn *
gen_split_421 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_421 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8HImode, operands[0],
					   VNx32HImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8HImode, operands[2],
					  VNx32HImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_422 (rtx_insn *, rtx *);
rtx_insn *
gen_split_422 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_422 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx4SImode, operands[0],
					   VNx16SImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx4SImode, operands[2],
					  VNx16SImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_423 (rtx_insn *, rtx *);
rtx_insn *
gen_split_423 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_423 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx2DImode, operands[0],
					   VNx8DImode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx2DImode, operands[2],
					  VNx8DImode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_424 (rtx_insn *, rtx *);
rtx_insn *
gen_split_424 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_424 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8BFmode, operands[0],
					   VNx32BFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8BFmode, operands[2],
					  VNx32BFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_425 (rtx_insn *, rtx *);
rtx_insn *
gen_split_425 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_425 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx8HFmode, operands[0],
					   VNx32HFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx8HFmode, operands[2],
					  VNx32HFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_426 (rtx_insn *, rtx *);
rtx_insn *
gen_split_426 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_426 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx4SFmode, operands[0],
					   VNx16SFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx4SFmode, operands[2],
					  VNx16SFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:895 */
extern rtx_insn *gen_split_427 (rtx_insn *, rtx *);
rtx_insn *
gen_split_427 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_427 (aarch64-sve.md:895)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 907 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    for (unsigned int i = 0; i < 4; ++i)
      {
	rtx subdest = simplify_gen_subreg (VNx2DFmode, operands[0],
					   VNx8DFmode,
					   i * BYTES_PER_SVE_VECTOR);
	rtx subsrc = simplify_gen_subreg (VNx2DFmode, operands[2],
					  VNx8DFmode,
					  i * BYTES_PER_SVE_VECTOR);
	aarch64_emit_sve_pred_move (subdest, operands[1], subsrc);
      }
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:935 */
rtx
gen_movvnx16bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 939 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[0]) == MEM)
      operands[1] = force_reg (VNx16BImode, operands[1]);

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:935 */
rtx
gen_movvnx8bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 939 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[0]) == MEM)
      operands[1] = force_reg (VNx8BImode, operands[1]);

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:935 */
rtx
gen_movvnx4bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 939 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[0]) == MEM)
      operands[1] = force_reg (VNx4BImode, operands[1]);

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:935 */
rtx
gen_movvnx2bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 939 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[0]) == MEM)
      operands[1] = force_reg (VNx2BImode, operands[1]);

    if (CONSTANT_P (operands[1]))
      {
	aarch64_expand_mov_immediate (operands[0], operands[1]);
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:965 */
extern rtx_insn *gen_split_428 (rtx_insn *, rtx *);
rtx_insn *
gen_split_428 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_428 (aarch64-sve.md:965)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 984 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX)),
	120)),
		gen_rtx_SET (operand0,
	operand1))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:990 */
extern rtx_insn *gen_split_429 (rtx_insn *, rtx *);
rtx_insn *
gen_split_429 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_429 (aarch64-sve.md:990)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1010 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = CONSTM1_RTX (VNx16BImode);
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_SUBREG (VNx8BImode,
	gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX),
	0)),
	120)),
		gen_rtx_SET (operand0,
	operand1))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:990 */
extern rtx_insn *gen_split_430 (rtx_insn *, rtx *);
rtx_insn *
gen_split_430 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_430 (aarch64-sve.md:990)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1010 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = CONSTM1_RTX (VNx16BImode);
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_SUBREG (VNx4BImode,
	gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX),
	0)),
	120)),
		gen_rtx_SET (operand0,
	operand1))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:990 */
extern rtx_insn *gen_split_431 (rtx_insn *, rtx *);
rtx_insn *
gen_split_431 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_431 (aarch64-sve.md:990)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1010 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = CONSTM1_RTX (VNx16BImode);
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_SUBREG (VNx2BImode,
	gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX),
	0)),
	120)),
		gen_rtx_SET (operand0,
	operand1))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1018 */
extern rtx_insn *gen_split_432 (rtx_insn *, rtx *);
rtx_insn *
gen_split_432 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_432 (aarch64-sve.md:1018)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1036 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1043 */
extern rtx_insn *gen_split_433 (rtx_insn *, rtx *);
rtx_insn *
gen_split_433 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_433 (aarch64-sve.md:1043)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = CONSTM1_RTX (VNx16BImode);
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_SUBREG (VNx8BImode,
	gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX),
	0)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1043 */
extern rtx_insn *gen_split_434 (rtx_insn *, rtx *);
rtx_insn *
gen_split_434 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_434 (aarch64-sve.md:1043)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = CONSTM1_RTX (VNx16BImode);
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_SUBREG (VNx4BImode,
	gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX),
	0)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1043 */
extern rtx_insn *gen_split_435 (rtx_insn *, rtx *);
rtx_insn *
gen_split_435 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_435 (aarch64-sve.md:1043)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = CONSTM1_RTX (VNx16BImode);
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand2,
		operand3,
		const1_rtx,
		gen_rtx_SUBREG (VNx2BImode,
	gen_rtx_fmt_e (GET_CODE (operand1), GET_MODE (operand1),
		NULL_RTX),
	0)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx32qivnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx32qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx16hivnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx16hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx8sivnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx8sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx4divnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx4divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx16bfvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx16bfvnx8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx16hfvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx16hfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx8sfvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx8sfvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx4dfvnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx4dfvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx48qivnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx48qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx48QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx24hivnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx24hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx12sivnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx12sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx6divnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx6divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx24bfvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx24bfvnx8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx24hfvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx24hfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx12sfvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx12sfvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx6dfvnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx6dfvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx64qivnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx64qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx64QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx32hivnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx32hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx16sivnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx16sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx8divnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx8divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx32bfvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx32bfvnx8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32BFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx32hfvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx32hfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx16sfvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx16sfvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1254 */
rtx
gen_vec_load_lanesvnx8dfvnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_load_lanesvnx8dfvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1261 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	137)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_436 (rtx_insn *, rtx *);
rtx_insn *
gen_split_436 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_436 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_437 (rtx_insn *, rtx *);
rtx_insn *
gen_split_437 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_437 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_438 (rtx_insn *, rtx *);
rtx_insn *
gen_split_438 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_438 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_439 (rtx_insn *, rtx *);
rtx_insn *
gen_split_439 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_439 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_440 (rtx_insn *, rtx *);
rtx_insn *
gen_split_440 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_440 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_441 (rtx_insn *, rtx *);
rtx_insn *
gen_split_441 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_441 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_442 (rtx_insn *, rtx *);
rtx_insn *
gen_split_442 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_442 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_443 (rtx_insn *, rtx *);
rtx_insn *
gen_split_443 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_443 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_444 (rtx_insn *, rtx *);
rtx_insn *
gen_split_444 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_444 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_445 (rtx_insn *, rtx *);
rtx_insn *
gen_split_445 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_445 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_446 (rtx_insn *, rtx *);
rtx_insn *
gen_split_446 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_446 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_447 (rtx_insn *, rtx *);
rtx_insn *
gen_split_447 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_447 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_448 (rtx_insn *, rtx *);
rtx_insn *
gen_split_448 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_448 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_449 (rtx_insn *, rtx *);
rtx_insn *
gen_split_449 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_449 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_450 (rtx_insn *, rtx *);
rtx_insn *
gen_split_450 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_450 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_451 (rtx_insn *, rtx *);
rtx_insn *
gen_split_451 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_451 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_452 (rtx_insn *, rtx *);
rtx_insn *
gen_split_452 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_452 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_453 (rtx_insn *, rtx *);
rtx_insn *
gen_split_453 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_453 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_454 (rtx_insn *, rtx *);
rtx_insn *
gen_split_454 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_454 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_455 (rtx_insn *, rtx *);
rtx_insn *
gen_split_455 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_455 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_456 (rtx_insn *, rtx *);
rtx_insn *
gen_split_456 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_456 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_457 (rtx_insn *, rtx *);
rtx_insn *
gen_split_457 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_457 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_458 (rtx_insn *, rtx *);
rtx_insn *
gen_split_458 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_458 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_459 (rtx_insn *, rtx *);
rtx_insn *
gen_split_459 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_459 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_460 (rtx_insn *, rtx *);
rtx_insn *
gen_split_460 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_460 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_461 (rtx_insn *, rtx *);
rtx_insn *
gen_split_461 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_461 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_462 (rtx_insn *, rtx *);
rtx_insn *
gen_split_462 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_462 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_463 (rtx_insn *, rtx *);
rtx_insn *
gen_split_463 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_463 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_464 (rtx_insn *, rtx *);
rtx_insn *
gen_split_464 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_464 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_465 (rtx_insn *, rtx *);
rtx_insn *
gen_split_465 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_465 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_466 (rtx_insn *, rtx *);
rtx_insn *
gen_split_466 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_466 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_467 (rtx_insn *, rtx *);
rtx_insn *
gen_split_467 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_467 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_468 (rtx_insn *, rtx *);
rtx_insn *
gen_split_468 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_468 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_469 (rtx_insn *, rtx *);
rtx_insn *
gen_split_469 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_469 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_470 (rtx_insn *, rtx *);
rtx_insn *
gen_split_470 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_470 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_471 (rtx_insn *, rtx *);
rtx_insn *
gen_split_471 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_471 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_472 (rtx_insn *, rtx *);
rtx_insn *
gen_split_472 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_472 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_473 (rtx_insn *, rtx *);
rtx_insn *
gen_split_473 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_473 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_474 (rtx_insn *, rtx *);
rtx_insn *
gen_split_474 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_474 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	118))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1290 */
extern rtx_insn *gen_split_475 (rtx_insn *, rtx *);
rtx_insn *
gen_split_475 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_475 (aarch64-sve.md:1290)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1303 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	108))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_476 (rtx_insn *, rtx *);
rtx_insn *
gen_split_476 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_476 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_477 (rtx_insn *, rtx *);
rtx_insn *
gen_split_477 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_477 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_478 (rtx_insn *, rtx *);
rtx_insn *
gen_split_478 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_478 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_479 (rtx_insn *, rtx *);
rtx_insn *
gen_split_479 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_479 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_480 (rtx_insn *, rtx *);
rtx_insn *
gen_split_480 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_480 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_481 (rtx_insn *, rtx *);
rtx_insn *
gen_split_481 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_481 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_482 (rtx_insn *, rtx *);
rtx_insn *
gen_split_482 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_482 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_483 (rtx_insn *, rtx *);
rtx_insn *
gen_split_483 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_483 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_484 (rtx_insn *, rtx *);
rtx_insn *
gen_split_484 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_484 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_485 (rtx_insn *, rtx *);
rtx_insn *
gen_split_485 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_485 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_486 (rtx_insn *, rtx *);
rtx_insn *
gen_split_486 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_486 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_487 (rtx_insn *, rtx *);
rtx_insn *
gen_split_487 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_487 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_488 (rtx_insn *, rtx *);
rtx_insn *
gen_split_488 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_488 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_489 (rtx_insn *, rtx *);
rtx_insn *
gen_split_489 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_489 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_490 (rtx_insn *, rtx *);
rtx_insn *
gen_split_490 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_490 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_491 (rtx_insn *, rtx *);
rtx_insn *
gen_split_491 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_491 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_492 (rtx_insn *, rtx *);
rtx_insn *
gen_split_492 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_492 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_493 (rtx_insn *, rtx *);
rtx_insn *
gen_split_493 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_493 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_494 (rtx_insn *, rtx *);
rtx_insn *
gen_split_494 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_494 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_495 (rtx_insn *, rtx *);
rtx_insn *
gen_split_495 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_495 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_496 (rtx_insn *, rtx *);
rtx_insn *
gen_split_496 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_496 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_497 (rtx_insn *, rtx *);
rtx_insn *
gen_split_497 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_497 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_498 (rtx_insn *, rtx *);
rtx_insn *
gen_split_498 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_498 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_499 (rtx_insn *, rtx *);
rtx_insn *
gen_split_499 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_499 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_500 (rtx_insn *, rtx *);
rtx_insn *
gen_split_500 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_500 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_501 (rtx_insn *, rtx *);
rtx_insn *
gen_split_501 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_501 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_502 (rtx_insn *, rtx *);
rtx_insn *
gen_split_502 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_502 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_503 (rtx_insn *, rtx *);
rtx_insn *
gen_split_503 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_503 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_504 (rtx_insn *, rtx *);
rtx_insn *
gen_split_504 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_504 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_505 (rtx_insn *, rtx *);
rtx_insn *
gen_split_505 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_505 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_506 (rtx_insn *, rtx *);
rtx_insn *
gen_split_506 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_506 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_507 (rtx_insn *, rtx *);
rtx_insn *
gen_split_507 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_507 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_508 (rtx_insn *, rtx *);
rtx_insn *
gen_split_508 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_508 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_509 (rtx_insn *, rtx *);
rtx_insn *
gen_split_509 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_509 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_510 (rtx_insn *, rtx *);
rtx_insn *
gen_split_510 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_510 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_511 (rtx_insn *, rtx *);
rtx_insn *
gen_split_511 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_511 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_512 (rtx_insn *, rtx *);
rtx_insn *
gen_split_512 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_512 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_513 (rtx_insn *, rtx *);
rtx_insn *
gen_split_513 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_513 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_514 (rtx_insn *, rtx *);
rtx_insn *
gen_split_514 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_514 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	381))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1353 */
extern rtx_insn *gen_split_515 (rtx_insn *, rtx *);
rtx_insn *
gen_split_515 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_515 (aarch64-sve.md:1353)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1367 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		gen_rtx_REG (VNx16BImode,
	85)),
	382))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2qivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2qivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2hivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2hivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2hfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2hfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2bfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2bfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2sivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2sivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2sfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2sfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2divnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx2dfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx2dfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx4qivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx4qivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx4hivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx4hivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx4hfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx4hfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx4bfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx4bfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx4sivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx4sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1402 */
rtx
gen_gather_loadvnx4sfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"gather_loadvnx4sfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_516 (rtx_insn *, rtx *);
rtx_insn *
gen_split_516 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_516 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_517 (rtx_insn *, rtx *);
rtx_insn *
gen_split_517 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_517 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_518 (rtx_insn *, rtx *);
rtx_insn *
gen_split_518 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_518 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_519 (rtx_insn *, rtx *);
rtx_insn *
gen_split_519 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_519 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_520 (rtx_insn *, rtx *);
rtx_insn *
gen_split_520 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_520 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_521 (rtx_insn *, rtx *);
rtx_insn *
gen_split_521 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_521 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_522 (rtx_insn *, rtx *);
rtx_insn *
gen_split_522 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_522 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_523 (rtx_insn *, rtx *);
rtx_insn *
gen_split_523 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_523 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_524 (rtx_insn *, rtx *);
rtx_insn *
gen_split_524 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_524 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_525 (rtx_insn *, rtx *);
rtx_insn *
gen_split_525 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_525 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_526 (rtx_insn *, rtx *);
rtx_insn *
gen_split_526 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_526 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_527 (rtx_insn *, rtx *);
rtx_insn *
gen_split_527 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_527 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_528 (rtx_insn *, rtx *);
rtx_insn *
gen_split_528 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_528 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_529 (rtx_insn *, rtx *);
rtx_insn *
gen_split_529 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_529 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_530 (rtx_insn *, rtx *);
rtx_insn *
gen_split_530 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_530 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1461 */
extern rtx_insn *gen_split_531 (rtx_insn *, rtx *);
rtx_insn *
gen_split_531 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_531 (aarch64-sve.md:1461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_532 (rtx_insn *, rtx *);
rtx_insn *
gen_split_532 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_532 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_533 (rtx_insn *, rtx *);
rtx_insn *
gen_split_533 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_533 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_534 (rtx_insn *, rtx *);
rtx_insn *
gen_split_534 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_534 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_535 (rtx_insn *, rtx *);
rtx_insn *
gen_split_535 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_535 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_536 (rtx_insn *, rtx *);
rtx_insn *
gen_split_536 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_536 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_537 (rtx_insn *, rtx *);
rtx_insn *
gen_split_537 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_537 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_538 (rtx_insn *, rtx *);
rtx_insn *
gen_split_538 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_538 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1487 */
extern rtx_insn *gen_split_539 (rtx_insn *, rtx *);
rtx_insn *
gen_split_539 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_539 (aarch64-sve.md:1487)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1507 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
extern rtx_insn *gen_split_540 (rtx_insn *, rtx *);
rtx_insn *
gen_split_540 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_540 (aarch64-sve.md:1546)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1569 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
extern rtx_insn *gen_split_541 (rtx_insn *, rtx *);
rtx_insn *
gen_split_541 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_541 (aarch64-sve.md:1546)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1569 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
extern rtx_insn *gen_split_542 (rtx_insn *, rtx *);
rtx_insn *
gen_split_542 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_542 (aarch64-sve.md:1546)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1569 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
extern rtx_insn *gen_split_543 (rtx_insn *, rtx *);
rtx_insn *
gen_split_543 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_543 (aarch64-sve.md:1546)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1569 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
extern rtx_insn *gen_split_544 (rtx_insn *, rtx *);
rtx_insn *
gen_split_544 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_544 (aarch64-sve.md:1546)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1569 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1546 */
extern rtx_insn *gen_split_545 (rtx_insn *, rtx *);
rtx_insn *
gen_split_545 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_545 (aarch64-sve.md:1546)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1569 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_546 (rtx_insn *, rtx *);
rtx_insn *
gen_split_546 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_546 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_547 (rtx_insn *, rtx *);
rtx_insn *
gen_split_547 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_547 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_548 (rtx_insn *, rtx *);
rtx_insn *
gen_split_548 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_548 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_549 (rtx_insn *, rtx *);
rtx_insn *
gen_split_549 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_549 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_550 (rtx_insn *, rtx *);
rtx_insn *
gen_split_550 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_550 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_551 (rtx_insn *, rtx *);
rtx_insn *
gen_split_551 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_551 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_552 (rtx_insn *, rtx *);
rtx_insn *
gen_split_552 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_552 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_553 (rtx_insn *, rtx *);
rtx_insn *
gen_split_553 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_553 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_554 (rtx_insn *, rtx *);
rtx_insn *
gen_split_554 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_554 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_555 (rtx_insn *, rtx *);
rtx_insn *
gen_split_555 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_555 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_556 (rtx_insn *, rtx *);
rtx_insn *
gen_split_556 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_556 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1576 */
extern rtx_insn *gen_split_557 (rtx_insn *, rtx *);
rtx_insn *
gen_split_557 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_557 (aarch64-sve.md:1576)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1597 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_558 (rtx_insn *, rtx *);
rtx_insn *
gen_split_558 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_558 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_559 (rtx_insn *, rtx *);
rtx_insn *
gen_split_559 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_559 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_560 (rtx_insn *, rtx *);
rtx_insn *
gen_split_560 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_560 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_561 (rtx_insn *, rtx *);
rtx_insn *
gen_split_561 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_561 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_562 (rtx_insn *, rtx *);
rtx_insn *
gen_split_562 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_562 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_563 (rtx_insn *, rtx *);
rtx_insn *
gen_split_563 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_563 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_564 (rtx_insn *, rtx *);
rtx_insn *
gen_split_564 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_564 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_565 (rtx_insn *, rtx *);
rtx_insn *
gen_split_565 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_565 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_566 (rtx_insn *, rtx *);
rtx_insn *
gen_split_566 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_566 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_567 (rtx_insn *, rtx *);
rtx_insn *
gen_split_567 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_567 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_568 (rtx_insn *, rtx *);
rtx_insn *
gen_split_568 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_568 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_569 (rtx_insn *, rtx *);
rtx_insn *
gen_split_569 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_569 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_570 (rtx_insn *, rtx *);
rtx_insn *
gen_split_570 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_570 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_571 (rtx_insn *, rtx *);
rtx_insn *
gen_split_571 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_571 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_572 (rtx_insn *, rtx *);
rtx_insn *
gen_split_572 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_572 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_573 (rtx_insn *, rtx *);
rtx_insn *
gen_split_573 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_573 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_574 (rtx_insn *, rtx *);
rtx_insn *
gen_split_574 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_574 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_575 (rtx_insn *, rtx *);
rtx_insn *
gen_split_575 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_575 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_576 (rtx_insn *, rtx *);
rtx_insn *
gen_split_576 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_576 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_577 (rtx_insn *, rtx *);
rtx_insn *
gen_split_577 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_577 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_578 (rtx_insn *, rtx *);
rtx_insn *
gen_split_578 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_578 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_579 (rtx_insn *, rtx *);
rtx_insn *
gen_split_579 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_579 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_580 (rtx_insn *, rtx *);
rtx_insn *
gen_split_580 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_580 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1603 */
extern rtx_insn *gen_split_581 (rtx_insn *, rtx *);
rtx_insn *
gen_split_581 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_581 (aarch64-sve.md:1603)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1626 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand2)),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_582 (rtx_insn *, rtx *);
rtx_insn *
gen_split_582 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_582 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_583 (rtx_insn *, rtx *);
rtx_insn *
gen_split_583 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_583 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_584 (rtx_insn *, rtx *);
rtx_insn *
gen_split_584 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_584 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_585 (rtx_insn *, rtx *);
rtx_insn *
gen_split_585 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_585 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_586 (rtx_insn *, rtx *);
rtx_insn *
gen_split_586 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_586 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_587 (rtx_insn *, rtx *);
rtx_insn *
gen_split_587 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_587 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_588 (rtx_insn *, rtx *);
rtx_insn *
gen_split_588 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_588 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_589 (rtx_insn *, rtx *);
rtx_insn *
gen_split_589 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_589 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_590 (rtx_insn *, rtx *);
rtx_insn *
gen_split_590 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_590 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_591 (rtx_insn *, rtx *);
rtx_insn *
gen_split_591 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_591 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_592 (rtx_insn *, rtx *);
rtx_insn *
gen_split_592 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_592 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1634 */
extern rtx_insn *gen_split_593 (rtx_insn *, rtx *);
rtx_insn *
gen_split_593 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_593 (aarch64-sve.md:1634)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1658 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_594 (rtx_insn *, rtx *);
rtx_insn *
gen_split_594 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_594 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_595 (rtx_insn *, rtx *);
rtx_insn *
gen_split_595 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_595 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_596 (rtx_insn *, rtx *);
rtx_insn *
gen_split_596 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_596 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_597 (rtx_insn *, rtx *);
rtx_insn *
gen_split_597 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_597 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_598 (rtx_insn *, rtx *);
rtx_insn *
gen_split_598 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_598 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_599 (rtx_insn *, rtx *);
rtx_insn *
gen_split_599 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_599 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_600 (rtx_insn *, rtx *);
rtx_insn *
gen_split_600 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_600 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_601 (rtx_insn *, rtx *);
rtx_insn *
gen_split_601 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_601 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_602 (rtx_insn *, rtx *);
rtx_insn *
gen_split_602 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_602 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_603 (rtx_insn *, rtx *);
rtx_insn *
gen_split_603 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_603 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_604 (rtx_insn *, rtx *);
rtx_insn *
gen_split_604 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_604 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1666 */
extern rtx_insn *gen_split_605 (rtx_insn *, rtx *);
rtx_insn *
gen_split_605 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_605 (aarch64-sve.md:1666)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1687 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (6,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	113))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1745 */
extern rtx_insn *gen_split_606 (rtx_insn *, rtx *);
rtx_insn *
gen_split_606 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_606 (aarch64-sve.md:1745)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1766 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1745 */
extern rtx_insn *gen_split_607 (rtx_insn *, rtx *);
rtx_insn *
gen_split_607 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_607 (aarch64-sve.md:1745)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1766 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
extern rtx_insn *gen_split_608 (rtx_insn *, rtx *);
rtx_insn *
gen_split_608 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_608 (aarch64-sve.md:1805)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
extern rtx_insn *gen_split_609 (rtx_insn *, rtx *);
rtx_insn *
gen_split_609 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_609 (aarch64-sve.md:1805)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
extern rtx_insn *gen_split_610 (rtx_insn *, rtx *);
rtx_insn *
gen_split_610 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_610 (aarch64-sve.md:1805)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1805 */
extern rtx_insn *gen_split_611 (rtx_insn *, rtx *);
rtx_insn *
gen_split_611 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_611 (aarch64-sve.md:1805)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1829 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
extern rtx_insn *gen_split_612 (rtx_insn *, rtx *);
rtx_insn *
gen_split_612 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_612 (aarch64-sve.md:1836)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
extern rtx_insn *gen_split_613 (rtx_insn *, rtx *);
rtx_insn *
gen_split_613 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_613 (aarch64-sve.md:1836)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
extern rtx_insn *gen_split_614 (rtx_insn *, rtx *);
rtx_insn *
gen_split_614 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_614 (aarch64-sve.md:1836)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
extern rtx_insn *gen_split_615 (rtx_insn *, rtx *);
rtx_insn *
gen_split_615 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_615 (aarch64-sve.md:1836)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
extern rtx_insn *gen_split_616 (rtx_insn *, rtx *);
rtx_insn *
gen_split_616 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_616 (aarch64-sve.md:1836)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1836 */
extern rtx_insn *gen_split_617 (rtx_insn *, rtx *);
rtx_insn *
gen_split_617 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_617 (aarch64-sve.md:1836)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1858 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		operand2,
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1864 */
extern rtx_insn *gen_split_618 (rtx_insn *, rtx *);
rtx_insn *
gen_split_618 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_618 (aarch64-sve.md:1864)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1889 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1864 */
extern rtx_insn *gen_split_619 (rtx_insn *, rtx *);
rtx_insn *
gen_split_619 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_619 (aarch64-sve.md:1864)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1889 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1864 */
extern rtx_insn *gen_split_620 (rtx_insn *, rtx *);
rtx_insn *
gen_split_620 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_620 (aarch64-sve.md:1864)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1889 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1864 */
extern rtx_insn *gen_split_621 (rtx_insn *, rtx *);
rtx_insn *
gen_split_621 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_621 (aarch64-sve.md:1864)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1889 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1864 */
extern rtx_insn *gen_split_622 (rtx_insn *, rtx *);
rtx_insn *
gen_split_622 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_622 (aarch64-sve.md:1864)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1889 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1864 */
extern rtx_insn *gen_split_623 (rtx_insn *, rtx *);
rtx_insn *
gen_split_623 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_623 (aarch64-sve.md:1864)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1889 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1896 */
extern rtx_insn *gen_split_624 (rtx_insn *, rtx *);
rtx_insn *
gen_split_624 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_624 (aarch64-sve.md:1896)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1896 */
extern rtx_insn *gen_split_625 (rtx_insn *, rtx *);
rtx_insn *
gen_split_625 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_625 (aarch64-sve.md:1896)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1896 */
extern rtx_insn *gen_split_626 (rtx_insn *, rtx *);
rtx_insn *
gen_split_626 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_626 (aarch64-sve.md:1896)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1896 */
extern rtx_insn *gen_split_627 (rtx_insn *, rtx *);
rtx_insn *
gen_split_627 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_627 (aarch64-sve.md:1896)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1896 */
extern rtx_insn *gen_split_628 (rtx_insn *, rtx *);
rtx_insn *
gen_split_628 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_628 (aarch64-sve.md:1896)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:1896 */
extern rtx_insn *gen_split_629 (rtx_insn *, rtx *);
rtx_insn *
gen_split_629 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_629 (aarch64-sve.md:1896)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1918 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[7] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand7,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (7,
		operand5,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand6),
		operand3,
		operand4,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
		gen_rtx_REG (VNx16BImode,
	85)),
	114))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2031 */
extern rtx_insn *gen_split_630 (rtx_insn *, rtx *);
rtx_insn *
gen_split_630 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx operand9;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_630 (aarch64-sve.md:2031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[9] = copy_rtx (operands[0]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  operand9 = operands[9];
  (void) operand9;
  emit_insn (gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand9,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2031 */
extern rtx_insn *gen_split_631 (rtx_insn *, rtx *);
rtx_insn *
gen_split_631 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx operand9;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_631 (aarch64-sve.md:2031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[9] = copy_rtx (operands[0]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  operand9 = operands[9];
  (void) operand9;
  emit_insn (gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand9,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2031 */
extern rtx_insn *gen_split_632 (rtx_insn *, rtx *);
rtx_insn *
gen_split_632 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx operand9;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_632 (aarch64-sve.md:2031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[9] = copy_rtx (operands[0]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  operand9 = operands[9];
  (void) operand9;
  emit_insn (gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand9,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2031 */
extern rtx_insn *gen_split_633 (rtx_insn *, rtx *);
rtx_insn *
gen_split_633 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx operand8;
  rtx operand9;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_633 (aarch64-sve.md:2031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[9] = copy_rtx (operands[0]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  operand8 = operands[8];
  (void) operand8;
  operand9 = operands[9];
  (void) operand9;
  emit_insn (gen_rtx_PREFETCH (VOIDmode,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (7,
		operand0,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand9,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
		operand3,
		operand4,
		operand5,
		operand6),
	156),
	operand7,
	operand8));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx32qivnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx32qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx16hivnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx16hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx8sivnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx8sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx4divnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx4divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx16bfvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx16bfvnx8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx16hfvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx16hfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx8sfvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx8sfvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx4dfvnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx4dfvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx48qivnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx48qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx48QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx24hivnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx24hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx12sivnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx12sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx6divnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx6divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx24bfvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx24bfvnx8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx24hfvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx24hfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx24HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx12sfvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx12sfvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx12SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx6dfvnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx6dfvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx6DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx64qivnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx64qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx64QImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx32hivnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx32hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx16sivnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx16sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx8divnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx8divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DImode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx32bfvnx8bf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx32bfvnx8bf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32BFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx32hfvnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx32hfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx32HFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx16sfvnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx16sfvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16SFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2132 */
rtx
gen_vec_store_lanesvnx8dfvnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"vec_store_lanesvnx8dfvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2140 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8DFmode,
	gen_rtvec (3,
		operand2,
		operand1,
		copy_rtx (operand0)),
	138)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2qivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2qivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2hivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2hivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2hfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2hfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2bfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2bfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2sivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2sivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2sfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2sfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2divnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx2dfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx2dfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx4qivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx4qivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx4hivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx4hivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx4hfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx4hfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx4bfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx4bfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx4sivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx4sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2235 */
rtx
gen_scatter_storevnx4sfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"scatter_storevnx4sfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2246 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		operand1,
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_634 (rtx_insn *, rtx *);
rtx_insn *
gen_split_634 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_634 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_635 (rtx_insn *, rtx *);
rtx_insn *
gen_split_635 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_635 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_636 (rtx_insn *, rtx *);
rtx_insn *
gen_split_636 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_636 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_637 (rtx_insn *, rtx *);
rtx_insn *
gen_split_637 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_637 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_638 (rtx_insn *, rtx *);
rtx_insn *
gen_split_638 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_638 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_639 (rtx_insn *, rtx *);
rtx_insn *
gen_split_639 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_639 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_640 (rtx_insn *, rtx *);
rtx_insn *
gen_split_640 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_640 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_641 (rtx_insn *, rtx *);
rtx_insn *
gen_split_641 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_641 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_642 (rtx_insn *, rtx *);
rtx_insn *
gen_split_642 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_642 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_643 (rtx_insn *, rtx *);
rtx_insn *
gen_split_643 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_643 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_644 (rtx_insn *, rtx *);
rtx_insn *
gen_split_644 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_644 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_645 (rtx_insn *, rtx *);
rtx_insn *
gen_split_645 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_645 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_646 (rtx_insn *, rtx *);
rtx_insn *
gen_split_646 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_646 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_647 (rtx_insn *, rtx *);
rtx_insn *
gen_split_647 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_647 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_648 (rtx_insn *, rtx *);
rtx_insn *
gen_split_648 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_648 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2294 */
extern rtx_insn *gen_split_649 (rtx_insn *, rtx *);
rtx_insn *
gen_split_649 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_649 (aarch64-sve.md:2294)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_650 (rtx_insn *, rtx *);
rtx_insn *
gen_split_650 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_650 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_651 (rtx_insn *, rtx *);
rtx_insn *
gen_split_651 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_651 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_652 (rtx_insn *, rtx *);
rtx_insn *
gen_split_652 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_652 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_653 (rtx_insn *, rtx *);
rtx_insn *
gen_split_653 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_653 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_654 (rtx_insn *, rtx *);
rtx_insn *
gen_split_654 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_654 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_655 (rtx_insn *, rtx *);
rtx_insn *
gen_split_655 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_655 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_656 (rtx_insn *, rtx *);
rtx_insn *
gen_split_656 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_656 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2320 */
extern rtx_insn *gen_split_657 (rtx_insn *, rtx *);
rtx_insn *
gen_split_657 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_657 (aarch64-sve.md:2320)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2340 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		operand4),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2419 */
extern rtx_insn *gen_split_658 (rtx_insn *, rtx *);
rtx_insn *
gen_split_658 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_658 (aarch64-sve.md:2419)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx2QImode,
	operand4)),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2419 */
extern rtx_insn *gen_split_659 (rtx_insn *, rtx *);
rtx_insn *
gen_split_659 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_659 (aarch64-sve.md:2419)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx2HImode,
	operand4)),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2419 */
extern rtx_insn *gen_split_660 (rtx_insn *, rtx *);
rtx_insn *
gen_split_660 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_660 (aarch64-sve.md:2419)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[5]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode)),
	gen_rtx_UNSPEC (BLKmode,
	gen_rtvec (6,
		operand5,
		operand0,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand1))),
	118),
		operand2,
		operand3,
		gen_rtx_TRUNCATE (VNx2SImode,
	operand4)),
	116)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx16BImode);
	emit_insn (gen_sve_ld1rvnx16qi (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx16QImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx16QImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx8qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx8BImode);
	emit_insn (gen_sve_ld1rvnx8qi (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx8QImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8QImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx4qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
	emit_insn (gen_sve_ld1rvnx4qi (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx4QImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4QImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2qi (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2QImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2QImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx8BImode);
	emit_insn (gen_sve_ld1rvnx8hi (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx8HImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx4hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
	emit_insn (gen_sve_ld1rvnx4hi (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx4HImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4HImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2hi (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2HImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2HImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx8BImode);
	emit_insn (gen_sve_ld1rvnx8hf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx8HFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8HFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx4hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
	emit_insn (gen_sve_ld1rvnx4hf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx4HFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4HFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2hf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2HFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2HFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx8bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx8BImode);
	emit_insn (gen_sve_ld1rvnx8bf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx8BFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8BFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx4bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
	emit_insn (gen_sve_ld1rvnx4bf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx4BFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4BFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2bf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2bf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2BFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2BFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
	emit_insn (gen_sve_ld1rvnx4si (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx4SImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2si (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2SImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2SImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
	emit_insn (gen_sve_ld1rvnx4sf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx4SFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4SFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2sf (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2SFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2SFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2di (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2DImode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2489 */
rtx
gen_vec_duplicatevnx2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2496 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (MEM_P (operands[1]))
      {
	rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
	emit_insn (gen_sve_ld1rvnx2df (operands[0], ptrue, operands[1],
				       CONST0_RTX (VNx2DFmode)));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2DFmode,
	operand1)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_661 (rtx_insn *, rtx *);
rtx_insn *
gen_split_661 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_661 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx16BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx16qi (operands[0], gp, operands[1],
				   CONST0_RTX (VNx16QImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_662 (rtx_insn *, rtx *);
rtx_insn *
gen_split_662 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_662 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx8BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx8qi (operands[0], gp, operands[1],
				   CONST0_RTX (VNx8QImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_663 (rtx_insn *, rtx *);
rtx_insn *
gen_split_663 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_663 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx4BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx4qi (operands[0], gp, operands[1],
				   CONST0_RTX (VNx4QImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_664 (rtx_insn *, rtx *);
rtx_insn *
gen_split_664 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_664 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2qi (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2QImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_665 (rtx_insn *, rtx *);
rtx_insn *
gen_split_665 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_665 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx8BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx8hi (operands[0], gp, operands[1],
				   CONST0_RTX (VNx8HImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_666 (rtx_insn *, rtx *);
rtx_insn *
gen_split_666 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_666 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx4BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx4hi (operands[0], gp, operands[1],
				   CONST0_RTX (VNx4HImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_667 (rtx_insn *, rtx *);
rtx_insn *
gen_split_667 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_667 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2hi (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2HImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_668 (rtx_insn *, rtx *);
rtx_insn *
gen_split_668 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_668 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx8BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx8hf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx8HFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_669 (rtx_insn *, rtx *);
rtx_insn *
gen_split_669 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_669 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx4BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx4hf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx4HFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_670 (rtx_insn *, rtx *);
rtx_insn *
gen_split_670 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_670 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2hf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2HFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_671 (rtx_insn *, rtx *);
rtx_insn *
gen_split_671 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_671 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx8BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx8bf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx8BFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_672 (rtx_insn *, rtx *);
rtx_insn *
gen_split_672 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_672 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx4BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx4bf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx4BFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_673 (rtx_insn *, rtx *);
rtx_insn *
gen_split_673 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_673 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2bf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2BFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_674 (rtx_insn *, rtx *);
rtx_insn *
gen_split_674 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_674 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx4BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx4si (operands[0], gp, operands[1],
				   CONST0_RTX (VNx4SImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_675 (rtx_insn *, rtx *);
rtx_insn *
gen_split_675 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_675 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2si (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2SImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_676 (rtx_insn *, rtx *);
rtx_insn *
gen_split_676 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_676 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx4BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx4sf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx4SFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_677 (rtx_insn *, rtx *);
rtx_insn *
gen_split_677 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_677 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2sf (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2SFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_678 (rtx_insn *, rtx *);
rtx_insn *
gen_split_678 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_678 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2di (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2DImode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2511 */
extern rtx_insn *gen_split_679 (rtx_insn *, rtx *);
rtx_insn *
gen_split_679 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_679 (aarch64-sve.md:2511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2523 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (GET_CODE (operands[2]) == SCRATCH)
      operands[2] = gen_reg_rtx (VNx16BImode);
    emit_move_insn (operands[2], CONSTM1_RTX (VNx16BImode));
    rtx gp = gen_lowpart (VNx2BImode, operands[2]);
    emit_insn (gen_sve_ld1rvnx2df (operands[0], gp, operands[1],
				   CONST0_RTX (VNx2DFmode)));
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx16qiqi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx8hihi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx4sisi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx2didi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx8bfbf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx8hfhf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx4sfsf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2619 */
rtx
gen_vec_initvnx2dfdf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2623 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_sve_expand_vector_init (operands[0], operands[1]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2688 */
rtx
gen_vec_duplicatevnx16bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (DImode);
    rtx op1 = gen_lowpart (DImode, operands[1]);
    emit_insn (gen_ashldi3 (tmp, op1, gen_int_mode (63, DImode)));
    emit_insn (gen_while_ultdivnx16bi (operands[0], const0_rtx, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx16BImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2688 */
rtx
gen_vec_duplicatevnx8bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (DImode);
    rtx op1 = gen_lowpart (DImode, operands[1]);
    emit_insn (gen_ashldi3 (tmp, op1, gen_int_mode (63, DImode)));
    emit_insn (gen_while_ultdivnx8bi (operands[0], const0_rtx, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx8BImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2688 */
rtx
gen_vec_duplicatevnx4bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (DImode);
    rtx op1 = gen_lowpart (DImode, operands[1]);
    emit_insn (gen_ashldi3 (tmp, op1, gen_int_mode (63, DImode)));
    emit_insn (gen_while_ultdivnx4bi (operands[0], const0_rtx, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx4BImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2688 */
rtx
gen_vec_duplicatevnx2bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2692 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (DImode);
    rtx op1 = gen_lowpart (DImode, operands[1]);
    emit_insn (gen_ashldi3 (tmp, op1, gen_int_mode (63, DImode)));
    emit_insn (gen_while_ultdivnx2bi (operands[0], const0_rtx, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_DUPLICATE (VNx2BImode,
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx16qiqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx16QImode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx16BImode);
	emit_insn (gen_extract_last_vnx16qi (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (QImode, operands[2]);
	index = force_reg (QImode, index);
	rtx series = gen_reg_rtx (VNx16QImode);
	emit_insn (gen_vec_seriesvnx16qi (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx16QImode);
	rtx cmp = gen_rtx_EQ (VNx16QImode, series, zero);
	rtx sel = gen_reg_rtx (VNx16BImode);
	emit_insn (gen_vec_cmpvnx16qivnx16bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx16qi (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (QImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx8hihi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx8HImode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx8BImode);
	emit_insn (gen_extract_last_vnx8hi (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (HImode, operands[2]);
	index = force_reg (HImode, index);
	rtx series = gen_reg_rtx (VNx8HImode);
	emit_insn (gen_vec_seriesvnx8hi (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx8HImode);
	rtx cmp = gen_rtx_EQ (VNx8HImode, series, zero);
	rtx sel = gen_reg_rtx (VNx8BImode);
	emit_insn (gen_vec_cmpvnx8hivnx8bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx8hi (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx4sisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx4SImode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx4BImode);
	emit_insn (gen_extract_last_vnx4si (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (SImode, operands[2]);
	index = force_reg (SImode, index);
	rtx series = gen_reg_rtx (VNx4SImode);
	emit_insn (gen_vec_seriesvnx4si (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx4SImode);
	rtx cmp = gen_rtx_EQ (VNx4SImode, series, zero);
	rtx sel = gen_reg_rtx (VNx4BImode);
	emit_insn (gen_vec_cmpvnx4sivnx4bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx4si (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx2didi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx2DImode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx2BImode);
	emit_insn (gen_extract_last_vnx2di (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (DImode, operands[2]);
	index = force_reg (DImode, index);
	rtx series = gen_reg_rtx (VNx2DImode);
	emit_insn (gen_vec_seriesvnx2di (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx2DImode);
	rtx cmp = gen_rtx_EQ (VNx2DImode, series, zero);
	rtx sel = gen_reg_rtx (VNx2BImode);
	emit_insn (gen_vec_cmpvnx2divnx2bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx2di (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DImode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx8bfbf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx8BFmode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx8BImode);
	emit_insn (gen_extract_last_vnx8bf (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (HImode, operands[2]);
	index = force_reg (HImode, index);
	rtx series = gen_reg_rtx (VNx8HImode);
	emit_insn (gen_vec_seriesvnx8hi (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx8HImode);
	rtx cmp = gen_rtx_EQ (VNx8HImode, series, zero);
	rtx sel = gen_reg_rtx (VNx8BImode);
	emit_insn (gen_vec_cmpvnx8hivnx8bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx8bf (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (BFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx8hfhf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx8HFmode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx8BImode);
	emit_insn (gen_extract_last_vnx8hf (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (HImode, operands[2]);
	index = force_reg (HImode, index);
	rtx series = gen_reg_rtx (VNx8HImode);
	emit_insn (gen_vec_seriesvnx8hi (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx8HImode);
	rtx cmp = gen_rtx_EQ (VNx8HImode, series, zero);
	rtx sel = gen_reg_rtx (VNx8BImode);
	emit_insn (gen_vec_cmpvnx8hivnx8bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx8hf (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (HFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx4sfsf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx4SFmode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx4BImode);
	emit_insn (gen_extract_last_vnx4sf (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (SImode, operands[2]);
	index = force_reg (SImode, index);
	rtx series = gen_reg_rtx (VNx4SImode);
	emit_insn (gen_vec_seriesvnx4si (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx4SImode);
	rtx cmp = gen_rtx_EQ (VNx4SImode, series, zero);
	rtx sel = gen_reg_rtx (VNx4BImode);
	emit_insn (gen_vec_cmpvnx4sivnx4bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx4sf (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (SFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2716 */
rtx
gen_vec_extractvnx2dfdf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2722 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    poly_int64 val;
    if (poly_int_rtx_p (operands[2], &val)
	&& known_eq (val, GET_MODE_NUNITS (VNx2DFmode) - 1))
      {
	/* The last element can be extracted with a LASTB and a false
	   predicate.  */
	rtx sel = aarch64_pfalse_reg (VNx2BImode);
	emit_insn (gen_extract_last_vnx2df (operands[0], sel, operands[1]));
	DONE;
      }
    if (!CONST_INT_P (operands[2]))
      {
	/* Create an index with operand[2] as the base and -1 as the step.
	   It will then be zero for the element we care about.  */
	rtx index = gen_lowpart (DImode, operands[2]);
	index = force_reg (DImode, index);
	rtx series = gen_reg_rtx (VNx2DImode);
	emit_insn (gen_vec_seriesvnx2di (series, index, constm1_rtx));

	/* Get a predicate that is true for only that element.  */
	rtx zero = CONST0_RTX (VNx2DImode);
	rtx cmp = gen_rtx_EQ (VNx2DImode, series, zero);
	rtx sel = gen_reg_rtx (VNx2BImode);
	emit_insn (gen_vec_cmpvnx2divnx2bi (sel, cmp, series, zero));

	/* Select the element using LASTB.  */
	emit_insn (gen_extract_last_vnx2df (operands[0], sel, operands[1]));
	DONE;
      }
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_VEC_SELECT (DFmode,
	operand1,
	gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (1,
		operand2)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_680 (rtx_insn *, rtx *);
rtx_insn *
gen_split_680 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_680 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_681 (rtx_insn *, rtx *);
rtx_insn *
gen_split_681 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_681 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_682 (rtx_insn *, rtx *);
rtx_insn *
gen_split_682 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_682 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_683 (rtx_insn *, rtx *);
rtx_insn *
gen_split_683 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_683 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_684 (rtx_insn *, rtx *);
rtx_insn *
gen_split_684 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_684 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_685 (rtx_insn *, rtx *);
rtx_insn *
gen_split_685 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_685 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_686 (rtx_insn *, rtx *);
rtx_insn *
gen_split_686 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_686 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2758 */
extern rtx_insn *gen_split_687 (rtx_insn *, rtx *);
rtx_insn *
gen_split_687 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands ATTRIBUTE_UNUSED)
{
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_687 (aarch64-sve.md:2758)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2782 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_note (NOTE_INSN_DELETED);
    DONE;
  }
#undef DONE
#undef FAIL
  emit_insn (const0_rtx);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2879 */
rtx
gen_vec_extractvnx16biqi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2886 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (VNx16QImode);
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (tmp, operands[1],
					     CONST1_RTX (VNx16QImode),
					     CONST0_RTX (VNx16QImode)));
    emit_insn (gen_vec_extractvnx16qiqi (operands[0], tmp, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_REG (VNx16QImode,
	32));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2879 */
rtx
gen_vec_extractvnx8bihi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2886 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (VNx8HImode);
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (tmp, operands[1],
					     CONST1_RTX (VNx8HImode),
					     CONST0_RTX (VNx8HImode)));
    emit_insn (gen_vec_extractvnx8hihi (operands[0], tmp, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_REG (VNx8HImode,
	32));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2879 */
rtx
gen_vec_extractvnx4bisi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2886 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (VNx4SImode);
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (tmp, operands[1],
					     CONST1_RTX (VNx4SImode),
					     CONST0_RTX (VNx4SImode)));
    emit_insn (gen_vec_extractvnx4sisi (operands[0], tmp, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_REG (VNx4SImode,
	32));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2879 */
rtx
gen_vec_extractvnx2bidi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2886 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx tmp = gen_reg_rtx (VNx2DImode);
    emit_insn (gen_vcond_mask_vnx2divnx2bi (tmp, operands[1],
					     CONST1_RTX (VNx2DImode),
					     CONST0_RTX (VNx2DImode)));
    emit_insn (gen_vec_extractvnx2didi (operands[0], tmp, operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit_insn (gen_rtx_REG (VNx2DImode,
	32));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx16qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx16qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx16qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx16qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx16QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx8qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx8qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx8qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx8qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx8QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx4qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx4qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx4qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx4qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx4QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx2qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx2qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx2qi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx2qi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx2QImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx8hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx8hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx8hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx4hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx4hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx4hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx2hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx2hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx2hi2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx4si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx4si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx4si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx2si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx2si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx2si2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_absvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ABS (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_negvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NEG (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_one_cmplvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_NOT (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clrsbvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clrsbvnx2di2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLRSB (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_clzvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"clzvnx2di2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_CLZ (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_popcountvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"popcountvnx2di2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_POPCOUNT (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qabsvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_ABS (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2913 */
rtx
gen_qnegvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2921 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SS_NEG (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx16QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx8QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx4QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx2QImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx8HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx4HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx2HImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx4SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx2SImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_absvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ABS (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_negvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NEG (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_one_cmplvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_NOT (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clrsbvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLRSB (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_clzvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_CLZ (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_popcountvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_POPCOUNT (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qabsvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_ABS (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:2942 */
rtx
gen_cond_qnegvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_NEG (VNx2DImode,
	operand2),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx8qivnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx8qivnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx8HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx4qivnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx4qivnx4hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx4HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx2qivnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx2qivnx2hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx2HImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx4qivnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx4qivnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx4hivnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx4hivnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx2qivnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx2qivnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx2hivnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx2hivnx2si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx2SImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx2qivnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx2qivnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx2hivnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx2hivnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_extendvnx2sivnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3068 */
rtx
gen_zero_extendvnx2sivnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3076 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	operand1)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_688 (rtx_insn *, rtx *);
rtx_insn *
gen_split_688 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_688 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx8QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_689 (rtx_insn *, rtx *);
rtx_insn *
gen_split_689 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_689 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx4QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_690 (rtx_insn *, rtx *);
rtx_insn *
gen_split_690 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_690 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx2QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_691 (rtx_insn *, rtx *);
rtx_insn *
gen_split_691 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_691 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx4QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_692 (rtx_insn *, rtx *);
rtx_insn *
gen_split_692 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_692 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx4HImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_693 (rtx_insn *, rtx *);
rtx_insn *
gen_split_693 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_693 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx2QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_694 (rtx_insn *, rtx *);
rtx_insn *
gen_split_694 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_694 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx2HImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_695 (rtx_insn *, rtx *);
rtx_insn *
gen_split_695 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_695 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx2QImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_696 (rtx_insn *, rtx *);
rtx_insn *
gen_split_696 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_696 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx2HImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3187 */
extern rtx_insn *gen_split_697 (rtx_insn *, rtx *);
rtx_insn *
gen_split_697 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_697 (aarch64-sve.md:3187)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3195 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[1] = aarch64_replace_reg_mode (operands[1],
					    VNx2SImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  emit_insn (gen_rtx_SET (operand0,
	operand1));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3209 */
rtx
gen_aarch64_pred_cnotvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONST0_RTX (VNx16QImode);
    operands[5] = CONST1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx16BImode,
	operand3,
	operand4)),
	119),
		operand5,
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3209 */
rtx
gen_aarch64_pred_cnotvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONST0_RTX (VNx8HImode);
    operands[5] = CONST1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx8BImode,
	operand3,
	operand4)),
	119),
		operand5,
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3209 */
rtx
gen_aarch64_pred_cnotvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONST0_RTX (VNx4SImode);
    operands[5] = CONST1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx4BImode,
	operand3,
	operand4)),
	119),
		operand5,
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3209 */
rtx
gen_aarch64_pred_cnotvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONST0_RTX (VNx2DImode);
    operands[5] = CONST1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		operand2,
		gen_rtx_EQ (VNx2BImode,
	operand3,
	operand4)),
	119),
		operand5,
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3250 */
rtx
gen_cond_cnotvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
    operands[5] = CONST0_RTX (VNx16QImode);
    operands[6] = CONST1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand4,
		const1_rtx,
		gen_rtx_EQ (VNx16BImode,
	operand2,
	operand5)),
	119),
		operand6,
		copy_rtx (operand5)),
	283),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3250 */
rtx
gen_cond_cnotvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
    operands[5] = CONST0_RTX (VNx8HImode);
    operands[6] = CONST1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand4,
		const1_rtx,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand5)),
	119),
		operand6,
		copy_rtx (operand5)),
	283),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3250 */
rtx
gen_cond_cnotvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
    operands[5] = CONST0_RTX (VNx4SImode);
    operands[6] = CONST1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand4,
		const1_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand5)),
	119),
		operand6,
		copy_rtx (operand5)),
	283),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3250 */
rtx
gen_cond_cnotvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[7];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3268 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
    operands[5] = CONST0_RTX (VNx2DImode);
    operands[6] = CONST1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
    operand6 = operands[6];
    (void) operand6;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand4,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand5)),
	119),
		operand6,
		copy_rtx (operand5)),
	283),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_698 (rtx_insn *, rtx *);
rtx_insn *
gen_split_698 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_698 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx16BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_699 (rtx_insn *, rtx *);
rtx_insn *
gen_split_699 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_699 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_700 (rtx_insn *, rtx *);
rtx_insn *
gen_split_700 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_700 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_701 (rtx_insn *, rtx *);
rtx_insn *
gen_split_701 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_701 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_702 (rtx_insn *, rtx *);
rtx_insn *
gen_split_702 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_702 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_703 (rtx_insn *, rtx *);
rtx_insn *
gen_split_703 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_703 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_704 (rtx_insn *, rtx *);
rtx_insn *
gen_split_704 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_704 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_705 (rtx_insn *, rtx *);
rtx_insn *
gen_split_705 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_705 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_706 (rtx_insn *, rtx *);
rtx_insn *
gen_split_706 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_706 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3276 */
extern rtx_insn *gen_split_707 (rtx_insn *, rtx *);
rtx_insn *
gen_split_707 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_707 (aarch64-sve.md:3276)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_708 (rtx_insn *, rtx *);
rtx_insn *
gen_split_708 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_708 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx16BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_709 (rtx_insn *, rtx *);
rtx_insn *
gen_split_709 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_709 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_710 (rtx_insn *, rtx *);
rtx_insn *
gen_split_710 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_710 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_711 (rtx_insn *, rtx *);
rtx_insn *
gen_split_711 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_711 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_712 (rtx_insn *, rtx *);
rtx_insn *
gen_split_712 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_712 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_713 (rtx_insn *, rtx *);
rtx_insn *
gen_split_713 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_713 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_714 (rtx_insn *, rtx *);
rtx_insn *
gen_split_714 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_714 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_715 (rtx_insn *, rtx *);
rtx_insn *
gen_split_715 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_715 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_716 (rtx_insn *, rtx *);
rtx_insn *
gen_split_716 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_716 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3312 */
extern rtx_insn *gen_split_717 (rtx_insn *, rtx *);
rtx_insn *
gen_split_717 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_717 (aarch64-sve.md:3312)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3336 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand5,
		const1_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119),
		operand4,
		copy_rtx (operand3)),
	283),
		operand6),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_absvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	333)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_negvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	360)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_frecpxvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	363)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_roundvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"roundvnx8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	364)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_nearbyintvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"nearbyintvnx8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	365)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_floorvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"floorvnx8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_frintnvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_ceilvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"ceilvnx8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	368)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_rintvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rintvnx8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	369)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_btruncvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"btruncvnx8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	370)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_absvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	333)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_negvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	360)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_frecpxvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	363)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_roundvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"roundvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	364)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_nearbyintvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"nearbyintvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	365)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_floorvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"floorvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_frintnvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_ceilvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"ceilvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	368)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_rintvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rintvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	369)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_btruncvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"btruncvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	370)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_absvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	333)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_negvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	360)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_frecpxvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	363)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_roundvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"roundvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	364)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_nearbyintvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"nearbyintvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	365)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_floorvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"floorvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	366)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_frintnvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	367)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_ceilvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"ceilvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	368)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_rintvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rintvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	369)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3389 */
rtx
gen_btruncvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"btruncvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3397 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	370)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_absvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	333),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_negvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	360),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_frecpxvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	363),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_roundvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	364),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_nearbyintvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	365),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_floorvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	366),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_frintnvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	367),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_ceilvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	368),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_rintvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	369),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_btruncvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	370),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_sqrtvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	372),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_absvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	333),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_negvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	360),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_frecpxvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	363),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_roundvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	364),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_nearbyintvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	365),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_floorvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	366),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_frintnvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	367),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_ceilvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	368),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_rintvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	369),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_btruncvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	370),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_sqrtvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	372),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_absvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	333),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_negvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	360),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_frecpxvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	363),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_roundvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	364),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_nearbyintvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	365),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_floorvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	366),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_frintnvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	367),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_ceilvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	368),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_rintvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	369),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_btruncvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	370),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3418 */
rtx
gen_cond_sqrtvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	372),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_718 (rtx_insn *, rtx *);
rtx_insn *
gen_split_718 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_718 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	333),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_719 (rtx_insn *, rtx *);
rtx_insn *
gen_split_719 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_719 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	360),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_720 (rtx_insn *, rtx *);
rtx_insn *
gen_split_720 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_720 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	363),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_721 (rtx_insn *, rtx *);
rtx_insn *
gen_split_721 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_721 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	364),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_722 (rtx_insn *, rtx *);
rtx_insn *
gen_split_722 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_722 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	365),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_723 (rtx_insn *, rtx *);
rtx_insn *
gen_split_723 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_723 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	366),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_724 (rtx_insn *, rtx *);
rtx_insn *
gen_split_724 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_724 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	367),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_725 (rtx_insn *, rtx *);
rtx_insn *
gen_split_725 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_725 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	368),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_726 (rtx_insn *, rtx *);
rtx_insn *
gen_split_726 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_726 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	369),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_727 (rtx_insn *, rtx *);
rtx_insn *
gen_split_727 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_727 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	370),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_728 (rtx_insn *, rtx *);
rtx_insn *
gen_split_728 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_728 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	372),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_729 (rtx_insn *, rtx *);
rtx_insn *
gen_split_729 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_729 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	333),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_730 (rtx_insn *, rtx *);
rtx_insn *
gen_split_730 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_730 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	360),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_731 (rtx_insn *, rtx *);
rtx_insn *
gen_split_731 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_731 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	363),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_732 (rtx_insn *, rtx *);
rtx_insn *
gen_split_732 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_732 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	364),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_733 (rtx_insn *, rtx *);
rtx_insn *
gen_split_733 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_733 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	365),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_734 (rtx_insn *, rtx *);
rtx_insn *
gen_split_734 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_734 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	366),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_735 (rtx_insn *, rtx *);
rtx_insn *
gen_split_735 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_735 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	367),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_736 (rtx_insn *, rtx *);
rtx_insn *
gen_split_736 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_736 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	368),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_737 (rtx_insn *, rtx *);
rtx_insn *
gen_split_737 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_737 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	369),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_738 (rtx_insn *, rtx *);
rtx_insn *
gen_split_738 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_738 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	370),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_739 (rtx_insn *, rtx *);
rtx_insn *
gen_split_739 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_739 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	372),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_740 (rtx_insn *, rtx *);
rtx_insn *
gen_split_740 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_740 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	333),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_741 (rtx_insn *, rtx *);
rtx_insn *
gen_split_741 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_741 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	360),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_742 (rtx_insn *, rtx *);
rtx_insn *
gen_split_742 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_742 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	363),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_743 (rtx_insn *, rtx *);
rtx_insn *
gen_split_743 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_743 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	364),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_744 (rtx_insn *, rtx *);
rtx_insn *
gen_split_744 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_744 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	365),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_745 (rtx_insn *, rtx *);
rtx_insn *
gen_split_745 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_745 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	366),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_746 (rtx_insn *, rtx *);
rtx_insn *
gen_split_746 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_746 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	367),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_747 (rtx_insn *, rtx *);
rtx_insn *
gen_split_747 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_747 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	368),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_748 (rtx_insn *, rtx *);
rtx_insn *
gen_split_748 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_748 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	369),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_749 (rtx_insn *, rtx *);
rtx_insn *
gen_split_749 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_749 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	370),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3433 */
extern rtx_insn *gen_split_750 (rtx_insn *, rtx *);
rtx_insn *
gen_split_750 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_750 (aarch64-sve.md:3433)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3449 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand2),
	372),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_751 (rtx_insn *, rtx *);
rtx_insn *
gen_split_751 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_751 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	333),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_752 (rtx_insn *, rtx *);
rtx_insn *
gen_split_752 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_752 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	360),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_753 (rtx_insn *, rtx *);
rtx_insn *
gen_split_753 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_753 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	363),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_754 (rtx_insn *, rtx *);
rtx_insn *
gen_split_754 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_754 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	364),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_755 (rtx_insn *, rtx *);
rtx_insn *
gen_split_755 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_755 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	365),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_756 (rtx_insn *, rtx *);
rtx_insn *
gen_split_756 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_756 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	366),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_757 (rtx_insn *, rtx *);
rtx_insn *
gen_split_757 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_757 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	367),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_758 (rtx_insn *, rtx *);
rtx_insn *
gen_split_758 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_758 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	368),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_759 (rtx_insn *, rtx *);
rtx_insn *
gen_split_759 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_759 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	369),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_760 (rtx_insn *, rtx *);
rtx_insn *
gen_split_760 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_760 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	370),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_761 (rtx_insn *, rtx *);
rtx_insn *
gen_split_761 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_761 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	372),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_762 (rtx_insn *, rtx *);
rtx_insn *
gen_split_762 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_762 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	333),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_763 (rtx_insn *, rtx *);
rtx_insn *
gen_split_763 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_763 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	360),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_764 (rtx_insn *, rtx *);
rtx_insn *
gen_split_764 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_764 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	363),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_765 (rtx_insn *, rtx *);
rtx_insn *
gen_split_765 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_765 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	364),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_766 (rtx_insn *, rtx *);
rtx_insn *
gen_split_766 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_766 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	365),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_767 (rtx_insn *, rtx *);
rtx_insn *
gen_split_767 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_767 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	366),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_768 (rtx_insn *, rtx *);
rtx_insn *
gen_split_768 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_768 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	367),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_769 (rtx_insn *, rtx *);
rtx_insn *
gen_split_769 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_769 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	368),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_770 (rtx_insn *, rtx *);
rtx_insn *
gen_split_770 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_770 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	369),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_771 (rtx_insn *, rtx *);
rtx_insn *
gen_split_771 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_771 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	370),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_772 (rtx_insn *, rtx *);
rtx_insn *
gen_split_772 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_772 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	372),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_773 (rtx_insn *, rtx *);
rtx_insn *
gen_split_773 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_773 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	333),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_774 (rtx_insn *, rtx *);
rtx_insn *
gen_split_774 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_774 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	360),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_775 (rtx_insn *, rtx *);
rtx_insn *
gen_split_775 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_775 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	363),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_776 (rtx_insn *, rtx *);
rtx_insn *
gen_split_776 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_776 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	364),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_777 (rtx_insn *, rtx *);
rtx_insn *
gen_split_777 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_777 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	365),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_778 (rtx_insn *, rtx *);
rtx_insn *
gen_split_778 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_778 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	366),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_779 (rtx_insn *, rtx *);
rtx_insn *
gen_split_779 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_779 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	367),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_780 (rtx_insn *, rtx *);
rtx_insn *
gen_split_780 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_780 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	368),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_781 (rtx_insn *, rtx *);
rtx_insn *
gen_split_781 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_781 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	369),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_782 (rtx_insn *, rtx *);
rtx_insn *
gen_split_782 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_782 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	370),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3481 */
extern rtx_insn *gen_split_783 (rtx_insn *, rtx *);
rtx_insn *
gen_split_783 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_783 (aarch64-sve.md:3481)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3498 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	372),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3527 */
rtx
gen_sqrtvnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtvnx8hf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3535 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
  operands[2] = aarch64_ptrue_reg (VNx8BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	372)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3527 */
rtx
gen_sqrtvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3535 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
  operands[2] = aarch64_ptrue_reg (VNx4BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	372)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3527 */
rtx
gen_sqrtvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"sqrtvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3535 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (aarch64_emit_approx_sqrt (operands[0], operands[1], false))
    DONE;
  operands[2] = aarch64_ptrue_reg (VNx2BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	372)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3545 */
rtx
gen_rsqrtvnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rsqrtvnx4sf2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3551 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  aarch64_emit_approx_sqrt (operands[0], operands[1], true);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	103)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3545 */
rtx
gen_rsqrtvnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"rsqrtvnx2df2 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3551 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  aarch64_emit_approx_sqrt (operands[0], operands[1], true);
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	103)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3556 */
rtx
gen_aarch64_rsqrtevnx4sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3556 */
rtx
gen_aarch64_rsqrtevnx2df (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	104));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3564 */
rtx
gen_aarch64_rsqrtsvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3564 */
rtx
gen_aarch64_rsqrtsvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	105));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3581 */
rtx
gen_one_cmplvnx16bi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3587 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_NOT (VNx16BImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3581 */
rtx
gen_one_cmplvnx8bi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3587 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3581 */
rtx
gen_one_cmplvnx4bi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3587 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3581 */
rtx
gen_one_cmplvnx2bi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3587 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	operand1),
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_mulvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_MULT (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_smaxvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMAX (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_sminvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SMIN (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_umaxvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMAX (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3630 */
rtx
gen_uminvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3639 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UMIN (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_784 (rtx_insn *, rtx *);
rtx_insn *
gen_split_784 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_784 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_785 (rtx_insn *, rtx *);
rtx_insn *
gen_split_785 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_785 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_786 (rtx_insn *, rtx *);
rtx_insn *
gen_split_786 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_786 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_787 (rtx_insn *, rtx *);
rtx_insn *
gen_split_787 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_787 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_788 (rtx_insn *, rtx *);
rtx_insn *
gen_split_788 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_788 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_789 (rtx_insn *, rtx *);
rtx_insn *
gen_split_789 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_789 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_790 (rtx_insn *, rtx *);
rtx_insn *
gen_split_790 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_790 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_791 (rtx_insn *, rtx *);
rtx_insn *
gen_split_791 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_791 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_792 (rtx_insn *, rtx *);
rtx_insn *
gen_split_792 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_792 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_793 (rtx_insn *, rtx *);
rtx_insn *
gen_split_793 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_793 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_794 (rtx_insn *, rtx *);
rtx_insn *
gen_split_794 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_794 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_795 (rtx_insn *, rtx *);
rtx_insn *
gen_split_795 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_795 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_796 (rtx_insn *, rtx *);
rtx_insn *
gen_split_796 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_796 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_797 (rtx_insn *, rtx *);
rtx_insn *
gen_split_797 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_797 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_798 (rtx_insn *, rtx *);
rtx_insn *
gen_split_798 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_798 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_799 (rtx_insn *, rtx *);
rtx_insn *
gen_split_799 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_799 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_800 (rtx_insn *, rtx *);
rtx_insn *
gen_split_800 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_800 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_801 (rtx_insn *, rtx *);
rtx_insn *
gen_split_801 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_801 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_802 (rtx_insn *, rtx *);
rtx_insn *
gen_split_802 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_802 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_803 (rtx_insn *, rtx *);
rtx_insn *
gen_split_803 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_803 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_804 (rtx_insn *, rtx *);
rtx_insn *
gen_split_804 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_804 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_805 (rtx_insn *, rtx *);
rtx_insn *
gen_split_805 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_805 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_806 (rtx_insn *, rtx *);
rtx_insn *
gen_split_806 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_806 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_807 (rtx_insn *, rtx *);
rtx_insn *
gen_split_807 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_807 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_808 (rtx_insn *, rtx *);
rtx_insn *
gen_split_808 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_808 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_809 (rtx_insn *, rtx *);
rtx_insn *
gen_split_809 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_809 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_810 (rtx_insn *, rtx *);
rtx_insn *
gen_split_810 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_810 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_811 (rtx_insn *, rtx *);
rtx_insn *
gen_split_811 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_811 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_812 (rtx_insn *, rtx *);
rtx_insn *
gen_split_812 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_812 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_813 (rtx_insn *, rtx *);
rtx_insn *
gen_split_813 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_813 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_814 (rtx_insn *, rtx *);
rtx_insn *
gen_split_814 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_814 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_815 (rtx_insn *, rtx *);
rtx_insn *
gen_split_815 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_815 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_816 (rtx_insn *, rtx *);
rtx_insn *
gen_split_816 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_816 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_817 (rtx_insn *, rtx *);
rtx_insn *
gen_split_817 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_817 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_818 (rtx_insn *, rtx *);
rtx_insn *
gen_split_818 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_818 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_819 (rtx_insn *, rtx *);
rtx_insn *
gen_split_819 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_819 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_820 (rtx_insn *, rtx *);
rtx_insn *
gen_split_820 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_820 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_821 (rtx_insn *, rtx *);
rtx_insn *
gen_split_821 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_821 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_822 (rtx_insn *, rtx *);
rtx_insn *
gen_split_822 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_822 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_823 (rtx_insn *, rtx *);
rtx_insn *
gen_split_823 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_823 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_824 (rtx_insn *, rtx *);
rtx_insn *
gen_split_824 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_824 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_825 (rtx_insn *, rtx *);
rtx_insn *
gen_split_825 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_825 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_826 (rtx_insn *, rtx *);
rtx_insn *
gen_split_826 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_826 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_827 (rtx_insn *, rtx *);
rtx_insn *
gen_split_827 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_827 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_828 (rtx_insn *, rtx *);
rtx_insn *
gen_split_828 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_828 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_829 (rtx_insn *, rtx *);
rtx_insn *
gen_split_829 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_829 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_830 (rtx_insn *, rtx *);
rtx_insn *
gen_split_830 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_830 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_831 (rtx_insn *, rtx *);
rtx_insn *
gen_split_831 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_831 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SMIN (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_832 (rtx_insn *, rtx *);
rtx_insn *
gen_split_832 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_832 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3649 */
extern rtx_insn *gen_split_833 (rtx_insn *, rtx *);
rtx_insn *
gen_split_833 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_833 (aarch64-sve.md:3649)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3669 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UMIN (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_addvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_subvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_mulvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_smaxvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_umaxvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sminvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_uminvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashlvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ashrvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_lshrvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_andvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_iorvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_xorvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ssaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_usaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_sssubvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3689 */
rtx
gen_cond_ussubvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_834 (rtx_insn *, rtx *);
rtx_insn *
gen_split_834 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_834 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_835 (rtx_insn *, rtx *);
rtx_insn *
gen_split_835 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_835 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_836 (rtx_insn *, rtx *);
rtx_insn *
gen_split_836 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_836 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_837 (rtx_insn *, rtx *);
rtx_insn *
gen_split_837 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_837 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_838 (rtx_insn *, rtx *);
rtx_insn *
gen_split_838 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_838 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_839 (rtx_insn *, rtx *);
rtx_insn *
gen_split_839 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_839 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_840 (rtx_insn *, rtx *);
rtx_insn *
gen_split_840 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_840 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_841 (rtx_insn *, rtx *);
rtx_insn *
gen_split_841 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_841 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_842 (rtx_insn *, rtx *);
rtx_insn *
gen_split_842 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_842 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_843 (rtx_insn *, rtx *);
rtx_insn *
gen_split_843 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_843 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_844 (rtx_insn *, rtx *);
rtx_insn *
gen_split_844 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_844 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_845 (rtx_insn *, rtx *);
rtx_insn *
gen_split_845 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_845 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_846 (rtx_insn *, rtx *);
rtx_insn *
gen_split_846 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_846 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_847 (rtx_insn *, rtx *);
rtx_insn *
gen_split_847 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_847 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_848 (rtx_insn *, rtx *);
rtx_insn *
gen_split_848 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_848 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_849 (rtx_insn *, rtx *);
rtx_insn *
gen_split_849 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_849 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_850 (rtx_insn *, rtx *);
rtx_insn *
gen_split_850 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_850 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_851 (rtx_insn *, rtx *);
rtx_insn *
gen_split_851 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_851 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_852 (rtx_insn *, rtx *);
rtx_insn *
gen_split_852 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_852 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_853 (rtx_insn *, rtx *);
rtx_insn *
gen_split_853 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_853 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_854 (rtx_insn *, rtx *);
rtx_insn *
gen_split_854 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_854 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_855 (rtx_insn *, rtx *);
rtx_insn *
gen_split_855 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_855 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_856 (rtx_insn *, rtx *);
rtx_insn *
gen_split_856 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_856 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_857 (rtx_insn *, rtx *);
rtx_insn *
gen_split_857 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_857 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_858 (rtx_insn *, rtx *);
rtx_insn *
gen_split_858 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_858 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_859 (rtx_insn *, rtx *);
rtx_insn *
gen_split_859 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_859 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_860 (rtx_insn *, rtx *);
rtx_insn *
gen_split_860 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_860 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_861 (rtx_insn *, rtx *);
rtx_insn *
gen_split_861 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_861 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_862 (rtx_insn *, rtx *);
rtx_insn *
gen_split_862 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_862 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_863 (rtx_insn *, rtx *);
rtx_insn *
gen_split_863 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_863 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_864 (rtx_insn *, rtx *);
rtx_insn *
gen_split_864 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_864 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_865 (rtx_insn *, rtx *);
rtx_insn *
gen_split_865 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_865 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_866 (rtx_insn *, rtx *);
rtx_insn *
gen_split_866 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_866 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_867 (rtx_insn *, rtx *);
rtx_insn *
gen_split_867 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_867 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_868 (rtx_insn *, rtx *);
rtx_insn *
gen_split_868 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_868 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_869 (rtx_insn *, rtx *);
rtx_insn *
gen_split_869 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_869 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_870 (rtx_insn *, rtx *);
rtx_insn *
gen_split_870 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_870 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_871 (rtx_insn *, rtx *);
rtx_insn *
gen_split_871 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_871 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_872 (rtx_insn *, rtx *);
rtx_insn *
gen_split_872 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_872 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_873 (rtx_insn *, rtx *);
rtx_insn *
gen_split_873 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_873 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_874 (rtx_insn *, rtx *);
rtx_insn *
gen_split_874 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_874 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_875 (rtx_insn *, rtx *);
rtx_insn *
gen_split_875 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_875 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_876 (rtx_insn *, rtx *);
rtx_insn *
gen_split_876 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_876 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_877 (rtx_insn *, rtx *);
rtx_insn *
gen_split_877 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_877 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_878 (rtx_insn *, rtx *);
rtx_insn *
gen_split_878 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_878 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_879 (rtx_insn *, rtx *);
rtx_insn *
gen_split_879 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_879 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_880 (rtx_insn *, rtx *);
rtx_insn *
gen_split_880 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_880 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_881 (rtx_insn *, rtx *);
rtx_insn *
gen_split_881 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_881 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_882 (rtx_insn *, rtx *);
rtx_insn *
gen_split_882 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_882 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_883 (rtx_insn *, rtx *);
rtx_insn *
gen_split_883 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_883 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_884 (rtx_insn *, rtx *);
rtx_insn *
gen_split_884 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_884 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_885 (rtx_insn *, rtx *);
rtx_insn *
gen_split_885 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_885 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_886 (rtx_insn *, rtx *);
rtx_insn *
gen_split_886 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_886 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_887 (rtx_insn *, rtx *);
rtx_insn *
gen_split_887 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_887 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_888 (rtx_insn *, rtx *);
rtx_insn *
gen_split_888 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_888 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_889 (rtx_insn *, rtx *);
rtx_insn *
gen_split_889 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_889 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_890 (rtx_insn *, rtx *);
rtx_insn *
gen_split_890 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_890 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_891 (rtx_insn *, rtx *);
rtx_insn *
gen_split_891 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_891 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_892 (rtx_insn *, rtx *);
rtx_insn *
gen_split_892 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_892 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_893 (rtx_insn *, rtx *);
rtx_insn *
gen_split_893 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_893 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_894 (rtx_insn *, rtx *);
rtx_insn *
gen_split_894 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_894 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_895 (rtx_insn *, rtx *);
rtx_insn *
gen_split_895 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_895 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_896 (rtx_insn *, rtx *);
rtx_insn *
gen_split_896 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_896 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_897 (rtx_insn *, rtx *);
rtx_insn *
gen_split_897 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_897 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_898 (rtx_insn *, rtx *);
rtx_insn *
gen_split_898 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_898 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_899 (rtx_insn *, rtx *);
rtx_insn *
gen_split_899 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_899 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_900 (rtx_insn *, rtx *);
rtx_insn *
gen_split_900 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_900 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_901 (rtx_insn *, rtx *);
rtx_insn *
gen_split_901 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_901 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_902 (rtx_insn *, rtx *);
rtx_insn *
gen_split_902 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_902 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_903 (rtx_insn *, rtx *);
rtx_insn *
gen_split_903 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_903 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_904 (rtx_insn *, rtx *);
rtx_insn *
gen_split_904 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_904 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_905 (rtx_insn *, rtx *);
rtx_insn *
gen_split_905 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_905 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_906 (rtx_insn *, rtx *);
rtx_insn *
gen_split_906 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_906 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_907 (rtx_insn *, rtx *);
rtx_insn *
gen_split_907 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_907 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_908 (rtx_insn *, rtx *);
rtx_insn *
gen_split_908 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_908 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_909 (rtx_insn *, rtx *);
rtx_insn *
gen_split_909 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_909 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_910 (rtx_insn *, rtx *);
rtx_insn *
gen_split_910 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_910 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_911 (rtx_insn *, rtx *);
rtx_insn *
gen_split_911 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_911 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_912 (rtx_insn *, rtx *);
rtx_insn *
gen_split_912 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_912 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_913 (rtx_insn *, rtx *);
rtx_insn *
gen_split_913 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_913 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_914 (rtx_insn *, rtx *);
rtx_insn *
gen_split_914 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_914 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_915 (rtx_insn *, rtx *);
rtx_insn *
gen_split_915 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_915 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_916 (rtx_insn *, rtx *);
rtx_insn *
gen_split_916 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_916 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_917 (rtx_insn *, rtx *);
rtx_insn *
gen_split_917 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_917 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_918 (rtx_insn *, rtx *);
rtx_insn *
gen_split_918 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_918 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_919 (rtx_insn *, rtx *);
rtx_insn *
gen_split_919 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_919 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_920 (rtx_insn *, rtx *);
rtx_insn *
gen_split_920 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_920 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_921 (rtx_insn *, rtx *);
rtx_insn *
gen_split_921 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_921 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_922 (rtx_insn *, rtx *);
rtx_insn *
gen_split_922 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_922 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_923 (rtx_insn *, rtx *);
rtx_insn *
gen_split_923 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_923 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_924 (rtx_insn *, rtx *);
rtx_insn *
gen_split_924 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_924 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_925 (rtx_insn *, rtx *);
rtx_insn *
gen_split_925 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_925 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_926 (rtx_insn *, rtx *);
rtx_insn *
gen_split_926 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_926 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_927 (rtx_insn *, rtx *);
rtx_insn *
gen_split_927 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_927 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_928 (rtx_insn *, rtx *);
rtx_insn *
gen_split_928 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_928 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_929 (rtx_insn *, rtx *);
rtx_insn *
gen_split_929 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_929 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_930 (rtx_insn *, rtx *);
rtx_insn *
gen_split_930 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_930 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_931 (rtx_insn *, rtx *);
rtx_insn *
gen_split_931 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_931 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_932 (rtx_insn *, rtx *);
rtx_insn *
gen_split_932 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_932 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_933 (rtx_insn *, rtx *);
rtx_insn *
gen_split_933 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_933 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_934 (rtx_insn *, rtx *);
rtx_insn *
gen_split_934 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_934 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_935 (rtx_insn *, rtx *);
rtx_insn *
gen_split_935 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_935 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_936 (rtx_insn *, rtx *);
rtx_insn *
gen_split_936 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_936 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_937 (rtx_insn *, rtx *);
rtx_insn *
gen_split_937 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_937 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_938 (rtx_insn *, rtx *);
rtx_insn *
gen_split_938 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_938 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_939 (rtx_insn *, rtx *);
rtx_insn *
gen_split_939 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_939 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_940 (rtx_insn *, rtx *);
rtx_insn *
gen_split_940 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_940 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_941 (rtx_insn *, rtx *);
rtx_insn *
gen_split_941 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_941 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_942 (rtx_insn *, rtx *);
rtx_insn *
gen_split_942 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_942 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_943 (rtx_insn *, rtx *);
rtx_insn *
gen_split_943 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_943 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_944 (rtx_insn *, rtx *);
rtx_insn *
gen_split_944 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_944 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_945 (rtx_insn *, rtx *);
rtx_insn *
gen_split_945 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_945 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_946 (rtx_insn *, rtx *);
rtx_insn *
gen_split_946 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_946 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_947 (rtx_insn *, rtx *);
rtx_insn *
gen_split_947 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_947 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_948 (rtx_insn *, rtx *);
rtx_insn *
gen_split_948 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_948 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_949 (rtx_insn *, rtx *);
rtx_insn *
gen_split_949 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_949 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_950 (rtx_insn *, rtx *);
rtx_insn *
gen_split_950 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_950 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_951 (rtx_insn *, rtx *);
rtx_insn *
gen_split_951 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_951 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_952 (rtx_insn *, rtx *);
rtx_insn *
gen_split_952 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_952 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_953 (rtx_insn *, rtx *);
rtx_insn *
gen_split_953 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_953 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_954 (rtx_insn *, rtx *);
rtx_insn *
gen_split_954 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_954 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_955 (rtx_insn *, rtx *);
rtx_insn *
gen_split_955 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_955 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_956 (rtx_insn *, rtx *);
rtx_insn *
gen_split_956 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_956 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_957 (rtx_insn *, rtx *);
rtx_insn *
gen_split_957 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_957 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_958 (rtx_insn *, rtx *);
rtx_insn *
gen_split_958 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_958 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_959 (rtx_insn *, rtx *);
rtx_insn *
gen_split_959 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_959 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_960 (rtx_insn *, rtx *);
rtx_insn *
gen_split_960 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_960 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_961 (rtx_insn *, rtx *);
rtx_insn *
gen_split_961 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_961 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_962 (rtx_insn *, rtx *);
rtx_insn *
gen_split_962 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_962 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_963 (rtx_insn *, rtx *);
rtx_insn *
gen_split_963 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_963 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_964 (rtx_insn *, rtx *);
rtx_insn *
gen_split_964 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_964 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_965 (rtx_insn *, rtx *);
rtx_insn *
gen_split_965 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_965 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_966 (rtx_insn *, rtx *);
rtx_insn *
gen_split_966 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_966 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_967 (rtx_insn *, rtx *);
rtx_insn *
gen_split_967 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_967 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_968 (rtx_insn *, rtx *);
rtx_insn *
gen_split_968 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_968 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_969 (rtx_insn *, rtx *);
rtx_insn *
gen_split_969 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_969 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_970 (rtx_insn *, rtx *);
rtx_insn *
gen_split_970 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_970 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_971 (rtx_insn *, rtx *);
rtx_insn *
gen_split_971 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_971 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_972 (rtx_insn *, rtx *);
rtx_insn *
gen_split_972 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_972 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_973 (rtx_insn *, rtx *);
rtx_insn *
gen_split_973 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_973 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_974 (rtx_insn *, rtx *);
rtx_insn *
gen_split_974 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_974 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_975 (rtx_insn *, rtx *);
rtx_insn *
gen_split_975 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_975 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_976 (rtx_insn *, rtx *);
rtx_insn *
gen_split_976 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_976 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_977 (rtx_insn *, rtx *);
rtx_insn *
gen_split_977 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_977 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_978 (rtx_insn *, rtx *);
rtx_insn *
gen_split_978 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_978 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_979 (rtx_insn *, rtx *);
rtx_insn *
gen_split_979 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_979 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_980 (rtx_insn *, rtx *);
rtx_insn *
gen_split_980 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_980 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_981 (rtx_insn *, rtx *);
rtx_insn *
gen_split_981 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_981 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_982 (rtx_insn *, rtx *);
rtx_insn *
gen_split_982 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_982 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_983 (rtx_insn *, rtx *);
rtx_insn *
gen_split_983 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_983 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_984 (rtx_insn *, rtx *);
rtx_insn *
gen_split_984 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_984 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_985 (rtx_insn *, rtx *);
rtx_insn *
gen_split_985 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_985 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_986 (rtx_insn *, rtx *);
rtx_insn *
gen_split_986 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_986 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_987 (rtx_insn *, rtx *);
rtx_insn *
gen_split_987 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_987 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_988 (rtx_insn *, rtx *);
rtx_insn *
gen_split_988 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_988 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_989 (rtx_insn *, rtx *);
rtx_insn *
gen_split_989 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_989 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_990 (rtx_insn *, rtx *);
rtx_insn *
gen_split_990 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_990 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_991 (rtx_insn *, rtx *);
rtx_insn *
gen_split_991 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_991 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_992 (rtx_insn *, rtx *);
rtx_insn *
gen_split_992 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_992 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SMIN (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_993 (rtx_insn *, rtx *);
rtx_insn *
gen_split_993 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_993 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UMIN (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_994 (rtx_insn *, rtx *);
rtx_insn *
gen_split_994 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_994 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_995 (rtx_insn *, rtx *);
rtx_insn *
gen_split_995 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_995 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_996 (rtx_insn *, rtx *);
rtx_insn *
gen_split_996 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_996 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_997 (rtx_insn *, rtx *);
rtx_insn *
gen_split_997 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_997 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_998 (rtx_insn *, rtx *);
rtx_insn *
gen_split_998 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_998 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_IOR (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_999 (rtx_insn *, rtx *);
rtx_insn *
gen_split_999 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_999 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_XOR (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_1000 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1000 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1000 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_PLUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_1001 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1001 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1001 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_PLUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_1002 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1002 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1002 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_SS_MINUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3736 */
extern rtx_insn *gen_split_1003 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1003 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1003 (aarch64-sve.md:3736)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3757 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_US_MINUS (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3842 */
extern rtx_insn *gen_split_1004 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1004 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1004 (aarch64-sve.md:3842)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3856 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118)),
	282)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3887 */
rtx
gen_aarch64_adrvnx4si_shift (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3898 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx4SImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3887 */
rtx
gen_aarch64_adrvnx2di_shift (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3898 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx2DImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3903 */
extern rtx_insn *gen_split_1005 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1005 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1005 (aarch64-sve.md:3903)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx2QImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3903 */
extern rtx_insn *gen_split_1006 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1006 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1006 (aarch64-sve.md:3903)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx2HImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3903 */
extern rtx_insn *gen_split_1007 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1007 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1007 (aarch64-sve.md:3903)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx2SImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3903 */
extern rtx_insn *gen_split_1008 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1008 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1008 (aarch64-sve.md:3903)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx2DImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3903 */
extern rtx_insn *gen_split_1009 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1009 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1009 (aarch64-sve.md:3903)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx4QImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3903 */
extern rtx_insn *gen_split_1010 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1010 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1010 (aarch64-sve.md:3903)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx4HImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3903 */
extern rtx_insn *gen_split_1011 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1011 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1011 (aarch64-sve.md:3903)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3916 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx4SImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3922 */
extern rtx_insn *gen_split_1012 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1012 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1012 (aarch64-sve.md:3922)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3940 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFT (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_TRUNCATE (VNx2SImode,
	operand2))),
	118),
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3946 */
extern rtx_insn *gen_split_1013 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1013 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1013 (aarch64-sve.md:3946)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3961 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_ASHIFT (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	operand2,
	operand4),
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx16qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx16BImode);
    emit_insn (gen_aarch64_pred_sabdvnx16qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx16QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx16qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx16BImode);
    emit_insn (gen_aarch64_pred_uabdvnx16qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx16QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx8qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx8BImode);
    emit_insn (gen_aarch64_pred_sabdvnx8qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx8QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx8qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx8BImode);
    emit_insn (gen_aarch64_pred_uabdvnx8qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx8QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx4qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx4BImode);
    emit_insn (gen_aarch64_pred_sabdvnx4qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx4QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx4qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx4BImode);
    emit_insn (gen_aarch64_pred_uabdvnx4qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx4QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx2qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_sabdvnx2qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx2QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx2qi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_uabdvnx2qi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx2QImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx8hi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx8BImode);
    emit_insn (gen_aarch64_pred_sabdvnx8hi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx8HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx8hi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx8BImode);
    emit_insn (gen_aarch64_pred_uabdvnx8hi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx8HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx4hi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx4BImode);
    emit_insn (gen_aarch64_pred_sabdvnx4hi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx4HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx4hi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx4BImode);
    emit_insn (gen_aarch64_pred_uabdvnx4hi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx4HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx2hi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_sabdvnx2hi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx2HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx2hi_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_uabdvnx2hi (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx2HImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx4si_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx4BImode);
    emit_insn (gen_aarch64_pred_sabdvnx4si (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx4SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx4si_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx4BImode);
    emit_insn (gen_aarch64_pred_uabdvnx4si (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx4SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx2si_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_sabdvnx2si (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx2SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx2si_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_uabdvnx2si (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx2SImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_sabdvnx2di_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_sabdvnx2di (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_SMAX (VNx2DImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:3975 */
rtx
gen_uabdvnx2di_3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 3981 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    emit_insn (gen_aarch64_pred_uabdvnx2di (operands[0], pred, operands[1],
					       operands[2]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UMAX (VNx2DImode,
	operand1,
	operand2));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_sabdvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_uabdvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_sabdvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_uabdvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_sabdvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_uabdvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_sabdvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_SMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4012 */
rtx
gen_aarch64_cond_uabdvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4032 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		gen_rtx_UMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1014 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1014 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1014 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1015 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1015 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1015 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1016 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1016 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1016 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx8QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1017 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1017 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1017 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx8QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1018 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1018 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1018 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx4QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1019 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1019 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1019 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx4QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1020 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1020 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1020 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1021 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1021 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1021 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1022 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1022 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1022 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1023 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1023 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1023 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1024 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1024 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1024 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx4HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1025 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1025 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1025 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx4HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1026 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1026 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1026 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1027 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1027 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1027 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1028 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1028 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1028 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1029 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1029 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1029 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1030 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1030 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1030 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1031 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1031 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1031 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1032 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1032 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1032 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4038 */
extern rtx_insn *gen_split_1033 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1033 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1033 (aarch64-sve.md:4038)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4062 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1034 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1034 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1034 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1035 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1035 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1035 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1036 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1036 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1036 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx8QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1037 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1037 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1037 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx8QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1038 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1038 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1038 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx4QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1039 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1039 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1039 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx4QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1040 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1040 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1040 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1041 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1041 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1041 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1042 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1042 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1042 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1043 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1043 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1043 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1044 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1044 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1044 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx4HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1045 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1045 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1045 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx4HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1046 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1046 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1046 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1047 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1047 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1047 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1048 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1048 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1048 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1049 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1049 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1049 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1050 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1050 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1050 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1051 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1051 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1051 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1052 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1052 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1052 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4069 */
extern rtx_insn *gen_split_1053 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1053 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1053 (aarch64-sve.md:4069)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4093 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1054 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1054 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1054 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx16BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx16QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1055 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1055 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1055 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx16BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx16QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1056 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1056 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1056 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx8BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx8QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx8QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1057 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1057 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1057 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx8BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx8QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx8QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx8QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1058 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1058 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1058 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx4BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx4QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx4QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1059 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1059 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1059 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx4BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx4QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx4QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx4QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1060 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1060 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1060 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx2QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1061 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1061 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1061 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2QImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx2QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx2QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1062 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1062 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1062 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx8BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx8HImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1063 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1063 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1063 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx8BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx8HImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1064 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1064 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1064 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx4BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx4HImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx4HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1065 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1065 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1065 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx4BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx4HImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx4HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx4HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1066 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1066 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1066 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2HImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx2HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1067 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1067 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1067 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2HImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx2HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx2HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1068 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1068 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1068 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx4BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx4SImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1069 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1069 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1069 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx4BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx4SImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1070 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1070 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1070 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2SImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx2SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1071 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1071 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1071 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2SImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx2SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx2SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1072 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1072 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1072 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2DImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_SMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4100 */
extern rtx_insn *gen_split_1073 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1073 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1073 (aarch64-sve.md:4100)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4129 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (!CONSTANT_P (operands[5]) || !CONSTANT_P (operands[6]))
      operands[5] = operands[6] = CONSTM1_RTX (VNx2BImode);
    else if (reload_completed
	     && register_operand (operands[4], VNx2DImode)
	     && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand6,
		gen_rtx_UMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx16qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx16qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx8qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx8qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx4qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx4qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx2qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx2qi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx8hi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx8hi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx4hi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx4hi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx2hi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx2hi3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx4si3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx4si3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx2si3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx2si3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_smulvnx2di3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	304)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4194 */
rtx
gen_umulvnx2di3_highpart (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	305)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_smulhvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_umulhvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_smulhvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_umulhvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_smulhvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_umulhvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_smulhvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	304),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4227 */
rtx
gen_cond_umulhvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4238 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	305),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4290 */
rtx
gen_divvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_DIV (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4290 */
rtx
gen_udivvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UDIV (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4290 */
rtx
gen_divvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_DIV (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4290 */
rtx
gen_udivvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4299 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UDIV (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4322 */
rtx
gen_cond_divvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_DIV (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4322 */
rtx
gen_cond_udivvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UDIV (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4322 */
rtx
gen_cond_divvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_DIV (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4322 */
rtx
gen_cond_udivvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UDIV (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4369 */
extern rtx_insn *gen_split_1074 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1074 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1074 (aarch64-sve.md:4369)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4390 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_DIV (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4369 */
extern rtx_insn *gen_split_1075 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1075 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1075 (aarch64-sve.md:4369)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4390 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UDIV (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4369 */
extern rtx_insn *gen_split_1076 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1076 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1076 (aarch64-sve.md:4369)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4390 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_DIV (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4369 */
extern rtx_insn *gen_split_1077 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1077 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1077 (aarch64-sve.md:4369)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4390 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UDIV (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx16QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx8QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx4QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx8HImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx4HImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2HImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx4SImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2SImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4431 */
rtx
gen_aarch64_bicvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4440 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2DImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1078 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1078 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1078 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx16QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1079 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1079 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1079 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx8QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1080 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1080 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1080 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx4QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1081 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1081 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1081 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2QImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1082 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1082 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1082 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx8HImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1083 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1083 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1083 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx4HImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1084 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1084 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1084 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2HImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1085 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1085 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1085 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx4SImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1086 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1086 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1086 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2SImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4446 */
extern rtx_insn *gen_split_1087 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1087 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1087 (aarch64-sve.md:4446)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4458 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_NOT (VNx2DImode,
	operand2)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4464 */
rtx
gen_cond_bicvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	operand3),
	operand2),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4464 */
rtx
gen_cond_bicvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	operand3),
	operand2),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4464 */
rtx
gen_cond_bicvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	operand3),
	operand2),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4464 */
rtx
gen_cond_bicvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	operand3),
	operand2),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1088 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1088 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1088 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1089 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1089 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1089 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx8QImode,
	gen_rtx_NOT (VNx8QImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1090 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1090 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1090 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4QImode,
	gen_rtx_NOT (VNx4QImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1091 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1091 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1091 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2QImode,
	gen_rtx_NOT (VNx2QImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1092 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1092 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1092 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1093 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1093 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1093 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4HImode,
	gen_rtx_NOT (VNx4HImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1094 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1094 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1094 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2HImode,
	gen_rtx_NOT (VNx2HImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1095 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1095 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1095 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1096 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1096 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1096 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2SImode,
	gen_rtx_NOT (VNx2SImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4495 */
extern rtx_insn *gen_split_1097 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1097 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1097 (aarch64-sve.md:4495)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4514 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	operand3),
	operand2),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx16QImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx16QImode))
	  amount = force_reg (VNx16QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx16QImode, amount);
      }
    emit_insn (gen_vashlvnx16qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx16QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx16QImode))
	  amount = force_reg (VNx16QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx16QImode, amount);
      }
    emit_insn (gen_vashrvnx16qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx16QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx16QImode))
	  amount = force_reg (VNx16QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx16QImode, amount);
      }
    emit_insn (gen_vlshrvnx16qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx16QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx8QImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx8QImode))
	  amount = force_reg (VNx8QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx8QImode, amount);
      }
    emit_insn (gen_vashlvnx8qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx8QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx8QImode))
	  amount = force_reg (VNx8QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx8QImode, amount);
      }
    emit_insn (gen_vashrvnx8qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx8QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx8QImode))
	  amount = force_reg (VNx8QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx8QImode, amount);
      }
    emit_insn (gen_vlshrvnx8qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx8QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4QImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx4QImode))
	  amount = force_reg (VNx4QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4QImode, amount);
      }
    emit_insn (gen_vashlvnx4qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx4QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx4QImode))
	  amount = force_reg (VNx4QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4QImode, amount);
      }
    emit_insn (gen_vashrvnx4qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx4QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx4QImode))
	  amount = force_reg (VNx4QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4QImode, amount);
      }
    emit_insn (gen_vlshrvnx4qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx4QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2QImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx2QImode))
	  amount = force_reg (VNx2QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2QImode, amount);
      }
    emit_insn (gen_vashlvnx2qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2QImode))
	  amount = force_reg (VNx2QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2QImode, amount);
      }
    emit_insn (gen_vashrvnx2qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2QImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2QImode))
	  amount = force_reg (VNx2QImode, amount);
      }
    else
      {
	amount = convert_to_mode (QImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2QImode, amount);
      }
    emit_insn (gen_vlshrvnx2qi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2QImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx8HImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx8HImode))
	  amount = force_reg (VNx8HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx8HImode, amount);
      }
    emit_insn (gen_vashlvnx8hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx8HImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx8HImode))
	  amount = force_reg (VNx8HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx8HImode, amount);
      }
    emit_insn (gen_vashrvnx8hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx8HImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx8HImode))
	  amount = force_reg (VNx8HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx8HImode, amount);
      }
    emit_insn (gen_vlshrvnx8hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx8HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4HImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx4HImode))
	  amount = force_reg (VNx4HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4HImode, amount);
      }
    emit_insn (gen_vashlvnx4hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4HImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx4HImode))
	  amount = force_reg (VNx4HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4HImode, amount);
      }
    emit_insn (gen_vashrvnx4hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4HImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx4HImode))
	  amount = force_reg (VNx4HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4HImode, amount);
      }
    emit_insn (gen_vlshrvnx4hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx4HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2HImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx2HImode))
	  amount = force_reg (VNx2HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2HImode, amount);
      }
    emit_insn (gen_vashlvnx2hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2HImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2HImode))
	  amount = force_reg (VNx2HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2HImode, amount);
      }
    emit_insn (gen_vashrvnx2hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2HImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2HImode))
	  amount = force_reg (VNx2HImode, amount);
      }
    else
      {
	amount = convert_to_mode (HImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2HImode, amount);
      }
    emit_insn (gen_vlshrvnx2hi3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2HImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4SImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx4SImode))
	  amount = force_reg (VNx4SImode, amount);
      }
    else
      {
	amount = convert_to_mode (SImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4SImode, amount);
      }
    emit_insn (gen_vashlvnx4si3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4SImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx4SImode))
	  amount = force_reg (VNx4SImode, amount);
      }
    else
      {
	amount = convert_to_mode (SImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4SImode, amount);
      }
    emit_insn (gen_vashrvnx4si3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx4SImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx4SImode))
	  amount = force_reg (VNx4SImode, amount);
      }
    else
      {
	amount = convert_to_mode (SImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx4SImode, amount);
      }
    emit_insn (gen_vlshrvnx4si3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx4SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2SImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx2SImode))
	  amount = force_reg (VNx2SImode, amount);
      }
    else
      {
	amount = convert_to_mode (SImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2SImode, amount);
      }
    emit_insn (gen_vashlvnx2si3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2SImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2SImode))
	  amount = force_reg (VNx2SImode, amount);
      }
    else
      {
	amount = convert_to_mode (SImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2SImode, amount);
      }
    emit_insn (gen_vashrvnx2si3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2SImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2SImode))
	  amount = force_reg (VNx2SImode, amount);
      }
    else
      {
	amount = convert_to_mode (SImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2SImode, amount);
      }
    emit_insn (gen_vlshrvnx2si3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2SImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashlvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2DImode, operands[2]);
	if (!aarch64_sve_lshift_operand (operands[2], VNx2DImode))
	  amount = force_reg (VNx2DImode, amount);
      }
    else
      {
	amount = convert_to_mode (DImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2DImode, amount);
      }
    emit_insn (gen_vashlvnx2di3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_ashrvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2DImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2DImode))
	  amount = force_reg (VNx2DImode, amount);
      }
    else
      {
	amount = convert_to_mode (DImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2DImode, amount);
      }
    emit_insn (gen_vashrvnx2di3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4536 */
rtx
gen_lshrvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4542 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx amount;
    if (CONST_INT_P (operands[2]))
      {
	amount = gen_const_vec_duplicate (VNx2DImode, operands[2]);
	if (!aarch64_sve_rshift_operand (operands[2], VNx2DImode))
	  amount = force_reg (VNx2DImode, amount);
      }
    else
      {
	amount = convert_to_mode (DImode, operands[2], 0);
	amount = expand_vector_broadcast (VNx2DImode, amount);
      }
    emit_insn (gen_vlshrvnx2di3 (operands[0], operands[1], amount));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2DImode,
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx16QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx8QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx4QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx2QImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx8HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx4HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx2HImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx4SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx2SImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashlvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFT (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vashrvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_ASHIFTRT (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4561 */
rtx
gen_vlshrvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4570 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_LSHIFTRT (VNx2DImode,
	operand1,
	operand2)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1098 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1098 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1098 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1099 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1099 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1099 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1100 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1100 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1100 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx16QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1101 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1101 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1101 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1102 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1102 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1102 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1103 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1103 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1103 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx8QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1104 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1104 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1104 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1105 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1105 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1105 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1106 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1106 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1106 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx4QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1107 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1107 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1107 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1108 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1108 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1108 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1109 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1109 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1109 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2QImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1110 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1110 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1110 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1111 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1111 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1111 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1112 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1112 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1112 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx8HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1113 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1113 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1113 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1114 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1114 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1114 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1115 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1115 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1115 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx4HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1116 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1116 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1116 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1117 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1117 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1117 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1118 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1118 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1118 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2HImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1119 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1119 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1119 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1120 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1120 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1120 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1121 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1121 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1121 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx4SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1122 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1122 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1122 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1123 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1123 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1123 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1124 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1124 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1124 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2SImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1125 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1125 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1125 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFT (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1126 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1126 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1126 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ASHIFTRT (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4579 */
extern rtx_insn *gen_split_1127 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1127 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1127 (aarch64-sve.md:4579)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4596 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_LSHIFTRT (VNx2DImode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1128 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1128 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1128 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1129 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1129 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1129 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1130 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1130 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1130 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx16QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1131 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1131 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1131 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1132 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1132 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1132 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1133 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1133 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1133 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx8QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1134 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1134 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1134 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1135 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1135 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1135 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1136 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1136 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1136 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1137 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1137 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1137 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1138 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1138 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1138 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1139 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1139 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1139 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2QImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1140 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1140 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1140 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1141 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1141 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1141 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1142 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1142 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1142 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx8HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1143 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1143 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1143 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1144 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1144 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1144 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1145 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1145 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1145 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1146 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1146 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1146 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1147 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1147 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1147 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1148 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1148 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1148 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2HImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1149 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1149 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1149 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1150 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1150 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1150 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1151 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1151 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1151 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx4SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1152 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1152 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1152 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1153 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1153 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1153 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1154 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1154 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1154 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2SImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1155 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1155 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1155 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1156 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1156 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1156 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_ASHIFTRT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4630 */
extern rtx_insn *gen_split_1157 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1157 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1157 (aarch64-sve.md:4630)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_LSHIFTRT (VNx2DImode,
	operand2,
	operand3),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_lslvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	378),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_asrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	379),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_lsrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	380),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_lslvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	378),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_asrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	379),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_lsrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	380),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_lslvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	378),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_asrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	379),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4667 */
rtx
gen_cond_lsrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	380),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx16qi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx8qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx8qi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx4qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx4qi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx2qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx2qi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx8hi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx4hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx4hi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx2hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx2hi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx4si3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx2si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx2si3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4726 */
rtx
gen_sdiv_pow2vnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"sdiv_pow2vnx2di3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4736 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	393)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_asrdvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_sqshluvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_srshrvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4758 */
rtx
gen_cond_urshrvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4772 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1158 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1158 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1158 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1159 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1159 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1159 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1160 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1160 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1160 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1161 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1161 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1161 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1162 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1162 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1162 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1163 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1163 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1163 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1164 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1164 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1164 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1165 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1165 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1165 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1166 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1166 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1166 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1167 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1167 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1167 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1168 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1168 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1168 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1169 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1169 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1169 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1170 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1170 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1170 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1171 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1171 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1171 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1172 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1172 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1172 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1173 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1173 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1173 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1174 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1174 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1174 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1175 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1175 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1175 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1176 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1176 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1176 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1177 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1177 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1177 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1178 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1178 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1178 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1179 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1179 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1179 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1180 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1180 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1180 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1181 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1181 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1181 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1182 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1182 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1182 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1183 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1183 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1183 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1184 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1184 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1184 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1185 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1185 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1185 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1186 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1186 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1186 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1187 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1187 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1187 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1188 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1188 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1188 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1189 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1189 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1189 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1190 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1190 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1190 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1191 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1191 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1191 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1192 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1192 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1192 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1193 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1193 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1193 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1194 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1194 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1194 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1195 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1195 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1195 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1196 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1196 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1196 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4778 */
extern rtx_insn *gen_split_1197 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1197 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1197 (aarch64-sve.md:4778)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4796 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1198 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1198 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1198 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1199 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1199 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1199 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1200 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1200 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1200 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1201 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1201 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1201 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1202 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1202 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1202 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1203 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1203 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1203 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1204 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1204 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1204 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1205 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1205 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1205 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1206 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1206 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1206 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1207 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1207 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1207 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1208 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1208 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1208 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1209 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1209 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1209 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1210 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1210 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1210 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1211 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1211 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1211 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1212 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1212 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1212 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1213 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1213 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1213 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1214 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1214 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1214 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1215 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1215 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1215 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1216 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1216 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1216 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1217 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1217 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1217 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1218 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1218 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1218 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1219 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1219 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1219 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1220 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1220 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1220 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1221 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1221 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1221 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1222 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1222 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1222 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1223 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1223 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1223 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1224 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1224 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1224 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1225 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1225 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1225 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1226 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1226 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1226 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1227 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1227 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1227 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1228 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1228 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1228 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1229 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1229 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1229 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1230 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1230 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1230 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1231 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1231 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1231 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1232 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1232 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1232 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1233 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1233 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1233 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1234 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1234 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1234 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	393)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1235 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1235 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1235 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	204)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1236 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1236 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1236 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	202)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4802 */
extern rtx_insn *gen_split_1237 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1237 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1237 (aarch64-sve.md:4802)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4823 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	203)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4871 */
rtx
gen_cond_fscalevnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4871 */
rtx
gen_cond_fscalevnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4871 */
rtx
gen_cond_fscalevnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4888 */
extern rtx_insn *gen_split_1238 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1238 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1238 (aarch64-sve.md:4888)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4905 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	371),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4888 */
extern rtx_insn *gen_split_1239 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1239 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1239 (aarch64-sve.md:4888)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4905 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	371),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4888 */
extern rtx_insn *gen_split_1240 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1240 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1240 (aarch64-sve.md:4888)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4905 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	371),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4933 */
extern rtx_insn *gen_split_1241 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1241 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1241 (aarch64-sve.md:4933)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4952 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4933 */
extern rtx_insn *gen_split_1242 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1242 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1242 (aarch64-sve.md:4933)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4952 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4933 */
extern rtx_insn *gen_split_1243 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1243 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1243 (aarch64-sve.md:4933)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4952 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4969 */
extern rtx_insn *gen_split_1244 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1244 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1244 (aarch64-sve.md:4969)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4969 */
extern rtx_insn *gen_split_1245 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1245 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1245 (aarch64-sve.md:4969)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:4969 */
extern rtx_insn *gen_split_1246 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1246 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1246 (aarch64-sve.md:4969)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 4990 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	371),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_addvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	334)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_fmax_nanvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	352)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_smaxvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	353)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_fmin_nanvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	354)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_sminvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	355)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_mulvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	358)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_mulxvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	359)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_subvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	373)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_addvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	334)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_fmax_nanvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	352)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_smaxvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	353)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_fmin_nanvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	354)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_sminvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	355)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_mulvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	358)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_mulxvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	359)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_subvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	373)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_addvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	334)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_fmax_nanvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	352)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_smaxvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	353)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_fmin_nanvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	354)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_sminvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	355)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_mulvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	358)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_mulxvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	359)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5050 */
rtx
gen_subvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5059 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	373)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_addvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_divvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_fmax_nanvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_smaxvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_fmin_nanvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_sminvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_mulvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_mulxvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_subvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_addvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_divvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_fmax_nanvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_smaxvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_fmin_nanvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_sminvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_mulvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_mulxvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_subvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_addvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_divvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_fmax_nanvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_smaxvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_fmin_nanvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_sminvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_mulvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_mulxvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5082 */
rtx
gen_cond_subvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1247 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1247 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1247 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1248 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1248 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1248 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	351),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1249 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1249 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1249 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1250 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1250 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1250 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1251 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1251 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1251 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1252 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1252 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1252 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1253 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1253 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1253 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1254 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1254 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1254 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	359),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1255 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1255 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1255 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1256 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1256 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1256 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1257 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1257 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1257 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	351),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1258 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1258 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1258 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1259 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1259 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1259 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1260 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1260 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1260 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1261 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1261 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1261 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1262 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1262 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1262 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1263 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1263 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1263 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	359),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1264 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1264 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1264 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1265 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1265 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1265 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1266 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1266 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1266 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	351),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1267 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1267 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1267 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1268 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1268 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1268 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1269 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1269 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1269 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1270 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1270 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1270 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1271 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1271 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1271 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1272 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1272 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1272 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	359),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5098 */
extern rtx_insn *gen_split_1273 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1273 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1273 (aarch64-sve.md:5098)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5115 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1274 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1274 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1274 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1275 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1275 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1275 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1276 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1276 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1276 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1277 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1277 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1277 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1278 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1278 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1278 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1279 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1279 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1279 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1280 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1280 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1280 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1281 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1281 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1281 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1282 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1282 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1282 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1283 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1283 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1283 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1284 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1284 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1284 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1285 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1285 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1285 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1286 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1286 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1286 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1287 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1287 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1287 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5141 */
extern rtx_insn *gen_split_1288 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1288 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1288 (aarch64-sve.md:5141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5158 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1289 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1289 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1289 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1290 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1290 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1290 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	351),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1291 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1291 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1291 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1292 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1292 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1292 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1293 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1293 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1293 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1294 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1294 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1294 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1295 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1295 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1295 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1296 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1296 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1296 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	359),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1297 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1297 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1297 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1298 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1298 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1298 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1299 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1299 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1299 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	351),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1300 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1300 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1300 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1301 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1301 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1301 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1302 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1302 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1302 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1303 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1303 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1303 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1304 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1304 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1304 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1305 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1305 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1305 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	359),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1306 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1306 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1306 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1307 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1307 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1307 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1308 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1308 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1308 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	351),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1309 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1309 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1309 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	352),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1310 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1310 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1310 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	353),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1311 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1311 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1311 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	354),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1312 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1312 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1312 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	355),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1313 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1313 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1313 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	358),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1314 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1314 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1314 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	359),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5184 */
extern rtx_insn *gen_split_1315 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1315 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1315 (aarch64-sve.md:5184)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5201 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1316 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1316 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1316 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1317 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1317 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1317 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1318 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1318 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1318 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1319 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1319 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1319 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1320 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1320 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1320 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1321 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1321 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1321 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1322 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1322 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1322 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1323 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1323 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1323 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1324 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1324 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1324 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1325 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1325 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1325 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1326 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1326 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1326 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1327 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1327 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1327 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1328 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1328 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1328 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1329 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1329 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1329 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1330 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1330 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1330 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1331 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1331 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1331 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1332 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1332 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1332 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1333 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1333 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1333 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1334 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1334 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1334 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1335 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1335 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1335 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1336 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1336 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1336 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1337 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1337 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1337 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1338 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1338 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1338 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1339 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1339 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1339 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1340 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1340 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1340 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1341 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1341 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1341 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5227 */
extern rtx_insn *gen_split_1342 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1342 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1342 (aarch64-sve.md:5227)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5249 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1343 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1343 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1343 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1344 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1344 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1344 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1345 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1345 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1345 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1346 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1346 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1346 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1347 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1347 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1347 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1348 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1348 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1348 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1349 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1349 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1349 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1350 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1350 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1350 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1351 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1351 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1351 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1352 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1352 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1352 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1353 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1353 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1353 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1354 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1354 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1354 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1355 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1355 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1355 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1356 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1356 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1356 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1357 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1357 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1357 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1358 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1358 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1358 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1359 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1359 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1359 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1360 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1360 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1360 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1361 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1361 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1361 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1362 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1362 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1362 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	351),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1363 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1363 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1363 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1364 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1364 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1364 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1365 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1365 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1365 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1366 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1366 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1366 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1367 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1367 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1367 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1368 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1368 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1368 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	359),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5266 */
extern rtx_insn *gen_split_1369 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1369 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1369 (aarch64-sve.md:5266)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5290 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1370 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1370 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1370 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1371 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1371 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1371 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1372 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1372 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1372 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1373 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1373 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1373 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1374 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1374 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1374 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1375 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1375 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1375 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1376 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1376 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1376 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1377 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1377 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1377 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1378 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1378 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1378 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1379 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1379 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1379 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1380 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1380 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1380 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1381 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1381 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1381 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1382 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1382 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1382 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1383 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1383 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1383 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5299 */
extern rtx_insn *gen_split_1384 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1384 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1384 (aarch64-sve.md:5299)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5317 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1385 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1385 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1385 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1386 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1386 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1386 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1387 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1387 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1387 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1388 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1388 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1388 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1389 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1389 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1389 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1390 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1390 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1390 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1391 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1391 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1391 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1392 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1392 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1392 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1393 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1393 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1393 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1394 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1394 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1394 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1395 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1395 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1395 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	352),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1396 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1396 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1396 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1397 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1397 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1397 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	354),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1398 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1398 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1398 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5334 */
extern rtx_insn *gen_split_1399 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1399 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1399 (aarch64-sve.md:5334)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5354 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	358),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5371 */
extern rtx_insn *gen_split_1400 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1400 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1400 (aarch64-sve.md:5371)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5371 */
extern rtx_insn *gen_split_1401 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1401 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1401 (aarch64-sve.md:5371)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5371 */
extern rtx_insn *gen_split_1402 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1402 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1402 (aarch64-sve.md:5371)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5394 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5400 */
extern rtx_insn *gen_split_1403 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1403 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1403 (aarch64-sve.md:5400)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5419 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5400 */
extern rtx_insn *gen_split_1404 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1404 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1404 (aarch64-sve.md:5400)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5419 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5400 */
extern rtx_insn *gen_split_1405 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1405 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1405 (aarch64-sve.md:5400)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5419 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	334),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5448 */
extern rtx_insn *gen_split_1406 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1406 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1406 (aarch64-sve.md:5448)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5469 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5448 */
extern rtx_insn *gen_split_1407 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1407 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1407 (aarch64-sve.md:5448)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5469 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5448 */
extern rtx_insn *gen_split_1408 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1408 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1408 (aarch64-sve.md:5448)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5469 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5486 */
extern rtx_insn *gen_split_1409 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1409 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1409 (aarch64-sve.md:5486)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5509 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5486 */
extern rtx_insn *gen_split_1410 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1410 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1410 (aarch64-sve.md:5486)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5509 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5486 */
extern rtx_insn *gen_split_1411 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1411 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1411 (aarch64-sve.md:5486)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5509 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	334),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5543 */
rtx
gen_cond_cadd90vnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5543 */
rtx
gen_cond_cadd270vnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5543 */
rtx
gen_cond_cadd90vnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5543 */
rtx
gen_cond_cadd270vnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5543 */
rtx
gen_cond_cadd90vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5543 */
rtx
gen_cond_cadd270vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5559 */
rtx
gen_cadd90vnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cadd90vnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5568 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[3] = aarch64_ptrue_reg (VNx8BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	335)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5559 */
rtx
gen_cadd270vnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cadd270vnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5568 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[3] = aarch64_ptrue_reg (VNx8BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	336)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5559 */
rtx
gen_cadd90vnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cadd90vnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5568 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[3] = aarch64_ptrue_reg (VNx4BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	335)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5559 */
rtx
gen_cadd270vnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cadd270vnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5568 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[3] = aarch64_ptrue_reg (VNx4BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	336)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5559 */
rtx
gen_cadd90vnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cadd90vnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5568 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[3] = aarch64_ptrue_reg (VNx2BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	335)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5559 */
rtx
gen_cadd270vnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cadd270vnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5568 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[3] = aarch64_ptrue_reg (VNx2BImode);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	336)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5573 */
extern rtx_insn *gen_split_1412 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1412 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1412 (aarch64-sve.md:5573)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5590 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	335),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5573 */
extern rtx_insn *gen_split_1413 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1413 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1413 (aarch64-sve.md:5573)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5590 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	336),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5573 */
extern rtx_insn *gen_split_1414 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1414 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1414 (aarch64-sve.md:5573)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5590 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	335),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5573 */
extern rtx_insn *gen_split_1415 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1415 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1415 (aarch64-sve.md:5573)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5590 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	336),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5573 */
extern rtx_insn *gen_split_1416 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1416 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1416 (aarch64-sve.md:5573)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5590 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	335),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5573 */
extern rtx_insn *gen_split_1417 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1417 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1417 (aarch64-sve.md:5573)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5590 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	336),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5616 */
extern rtx_insn *gen_split_1418 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1418 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1418 (aarch64-sve.md:5616)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5616 */
extern rtx_insn *gen_split_1419 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1419 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1419 (aarch64-sve.md:5616)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5616 */
extern rtx_insn *gen_split_1420 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1420 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1420 (aarch64-sve.md:5616)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5616 */
extern rtx_insn *gen_split_1421 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1421 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1421 (aarch64-sve.md:5616)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5616 */
extern rtx_insn *gen_split_1422 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1422 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1422 (aarch64-sve.md:5616)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5616 */
extern rtx_insn *gen_split_1423 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1423 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1423 (aarch64-sve.md:5616)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5635 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5652 */
extern rtx_insn *gen_split_1424 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1424 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1424 (aarch64-sve.md:5652)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5652 */
extern rtx_insn *gen_split_1425 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1425 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1425 (aarch64-sve.md:5652)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5652 */
extern rtx_insn *gen_split_1426 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1426 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1426 (aarch64-sve.md:5652)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5652 */
extern rtx_insn *gen_split_1427 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1427 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1427 (aarch64-sve.md:5652)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5652 */
extern rtx_insn *gen_split_1428 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1428 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1428 (aarch64-sve.md:5652)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	335),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5652 */
extern rtx_insn *gen_split_1429 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1429 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1429 (aarch64-sve.md:5652)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[2],
					     operands[4], operands[1]));
    operands[4] = operands[2] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	336),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5690 */
extern rtx_insn *gen_split_1430 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1430 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1430 (aarch64-sve.md:5690)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5712 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5690 */
extern rtx_insn *gen_split_1431 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1431 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1431 (aarch64-sve.md:5690)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5712 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5690 */
extern rtx_insn *gen_split_1432 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1432 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1432 (aarch64-sve.md:5690)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5712 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5718 */
extern rtx_insn *gen_split_1433 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1433 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1433 (aarch64-sve.md:5718)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5735 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5718 */
extern rtx_insn *gen_split_1434 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1434 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1434 (aarch64-sve.md:5718)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5735 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5718 */
extern rtx_insn *gen_split_1435 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1435 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1435 (aarch64-sve.md:5718)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5735 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	373),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5762 */
extern rtx_insn *gen_split_1436 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1436 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1436 (aarch64-sve.md:5762)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5780 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[3],
						 operands[4], operands[1]));
	operands[4] = operands[3] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5762 */
extern rtx_insn *gen_split_1437 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1437 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1437 (aarch64-sve.md:5762)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5780 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[3],
						 operands[4], operands[1]));
	operands[4] = operands[3] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5762 */
extern rtx_insn *gen_split_1438 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1438 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1438 (aarch64-sve.md:5762)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5780 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[3],
						 operands[4], operands[1]));
	operands[4] = operands[3] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5]))
      operands[5] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5797 */
extern rtx_insn *gen_split_1439 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1439 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1439 (aarch64-sve.md:5797)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5817 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[3],
                                             operands[4], operands[1]));
    operands[4] = operands[3] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5797 */
extern rtx_insn *gen_split_1440 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1440 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1440 (aarch64-sve.md:5797)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5817 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[3],
                                             operands[4], operands[1]));
    operands[4] = operands[3] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5797 */
extern rtx_insn *gen_split_1441 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1441 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1441 (aarch64-sve.md:5797)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5817 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[3],
                                             operands[4], operands[1]));
    operands[4] = operands[3] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5834 */
rtx
gen_aarch64_pred_abdvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	373)),
	333));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5834 */
rtx
gen_aarch64_pred_abdvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	373)),
	333));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5834 */
rtx
gen_aarch64_pred_abdvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand2,
		operand3),
	373)),
	333));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5850 */
extern rtx_insn *gen_split_1442 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1442 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1442 (aarch64-sve.md:5850)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5867 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5850 */
extern rtx_insn *gen_split_1443 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1443 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1443 (aarch64-sve.md:5850)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5867 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5850 */
extern rtx_insn *gen_split_1444 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1444 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1444 (aarch64-sve.md:5850)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5867 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5892 */
rtx
gen_aarch64_cond_abdvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5909 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		copy_rtx (operand1),
		const1_rtx,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5892 */
rtx
gen_aarch64_cond_abdvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5909 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		copy_rtx (operand1),
		const1_rtx,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5892 */
rtx
gen_aarch64_cond_abdvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5909 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (rtx_equal_p (operands[3], operands[4]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		copy_rtx (operand1),
		const1_rtx,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5916 */
extern rtx_insn *gen_split_1445 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1445 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1445 (aarch64-sve.md:5916)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5916 */
extern rtx_insn *gen_split_1446 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1446 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1446 (aarch64-sve.md:5916)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5916 */
extern rtx_insn *gen_split_1447 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1447 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1447 (aarch64-sve.md:5916)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5938 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5970 */
extern rtx_insn *gen_split_1448 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1448 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1448 (aarch64-sve.md:5970)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5992 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5970 */
extern rtx_insn *gen_split_1449 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1449 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1449 (aarch64-sve.md:5970)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5992 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:5970 */
extern rtx_insn *gen_split_1450 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1450 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1450 (aarch64-sve.md:5970)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 5992 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand5,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6024 */
extern rtx_insn *gen_split_1451 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1451 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1451 (aarch64-sve.md:6024)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
	&& register_operand (operands[4], VNx8HFmode)
	&& !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[3],
						 operands[4], operands[1]));
	operands[4] = operands[3] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5])
	     || !rtx_equal_p (operands[1], operands[6]))
      {
	operands[5] = copy_rtx (operands[1]);
	operands[6] = copy_rtx (operands[1]);
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand6,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6024 */
extern rtx_insn *gen_split_1452 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1452 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1452 (aarch64-sve.md:6024)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
	&& register_operand (operands[4], VNx4SFmode)
	&& !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[3],
						 operands[4], operands[1]));
	operands[4] = operands[3] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5])
	     || !rtx_equal_p (operands[1], operands[6]))
      {
	operands[5] = copy_rtx (operands[1]);
	operands[6] = copy_rtx (operands[1]);
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand6,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6024 */
extern rtx_insn *gen_split_1453 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1453 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1453 (aarch64-sve.md:6024)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
	&& register_operand (operands[4], VNx2DFmode)
	&& !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[3],
						 operands[4], operands[1]));
	operands[4] = operands[3] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[5])
	     || !rtx_equal_p (operands[1], operands[6]))
      {
	operands[5] = copy_rtx (operands[1]);
	operands[6] = copy_rtx (operands[1]);
      }
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand6,
		const0_rtx,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6071 */
extern rtx_insn *gen_split_1454 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1454 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1454 (aarch64-sve.md:6071)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6099 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[3],
					     operands[4], operands[1]));
    operands[4] = operands[3] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand5,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		operand6,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6071 */
extern rtx_insn *gen_split_1455 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1455 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1455 (aarch64-sve.md:6071)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6099 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[3],
					     operands[4], operands[1]));
    operands[4] = operands[3] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand5,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		operand6,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6071 */
extern rtx_insn *gen_split_1456 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1456 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1456 (aarch64-sve.md:6071)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6099 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[3],
					     operands[4], operands[1]));
    operands[4] = operands[3] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand5,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		copy_rtx (operand1),
		operand6,
		operand2,
		operand3),
	373)),
	333),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6115 */
extern rtx_insn *gen_split_1457 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1457 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1457 (aarch64-sve.md:6115)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6136 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx8HFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6115 */
extern rtx_insn *gen_split_1458 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1458 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1458 (aarch64-sve.md:6115)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6136 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx4SFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6115 */
extern rtx_insn *gen_split_1459 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1459 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1459 (aarch64-sve.md:6115)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6136 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"

#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MULT (VNx2DFmode,
	operand2,
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6162 */
rtx
gen_divvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
      DONE;

    operands[1] = force_reg (VNx8HFmode, operands[1]);
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	351)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6162 */
rtx
gen_divvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
      DONE;

    operands[1] = force_reg (VNx4SFmode, operands[1]);
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	351)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6162 */
rtx
gen_divvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6171 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_emit_approx_div (operands[0], operands[1], operands[2]))
      DONE;

    operands[1] = force_reg (VNx2DFmode, operands[1]);
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	351)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6180 */
rtx
gen_aarch64_frecpevnx8hf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6180 */
rtx
gen_aarch64_frecpevnx4sf (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6180 */
rtx
gen_aarch64_frecpevnx2df (rtx operand0,
	rtx operand1)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (1,
		operand1),
	23));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6188 */
rtx
gen_aarch64_frecpsvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6188 */
rtx
gen_aarch64_frecpsvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6188 */
rtx
gen_aarch64_frecpsvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	24));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6225 */
rtx
gen_copysignvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignvnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx sign = gen_reg_rtx (VNx8HImode);
    rtx mant = gen_reg_rtx (VNx8HImode);
    rtx int_res = gen_reg_rtx (VNx8HImode);
    int bits = GET_MODE_UNIT_BITSIZE (VNx8HFmode) - 1;

    rtx arg1 = lowpart_subreg (VNx8HImode, operands[1], VNx8HFmode);
    rtx arg2 = lowpart_subreg (VNx8HImode, operands[2], VNx8HFmode);

    emit_insn (gen_andvnx8hi3
	       (sign, arg2,
		aarch64_simd_gen_const_vector_dup (VNx8HImode,
						   HOST_WIDE_INT_M1U
						   << bits)));
    emit_insn (gen_andvnx8hi3
	       (mant, arg1,
		aarch64_simd_gen_const_vector_dup (VNx8HImode,
						   ~(HOST_WIDE_INT_M1U
						     << bits))));
    emit_insn (gen_iorvnx8hi3 (int_res, sign, mant));
    emit_move_insn (operands[0], gen_lowpart (VNx8HFmode, int_res));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6225 */
rtx
gen_copysignvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignvnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx sign = gen_reg_rtx (VNx4SImode);
    rtx mant = gen_reg_rtx (VNx4SImode);
    rtx int_res = gen_reg_rtx (VNx4SImode);
    int bits = GET_MODE_UNIT_BITSIZE (VNx4SFmode) - 1;

    rtx arg1 = lowpart_subreg (VNx4SImode, operands[1], VNx4SFmode);
    rtx arg2 = lowpart_subreg (VNx4SImode, operands[2], VNx4SFmode);

    emit_insn (gen_andvnx4si3
	       (sign, arg2,
		aarch64_simd_gen_const_vector_dup (VNx4SImode,
						   HOST_WIDE_INT_M1U
						   << bits)));
    emit_insn (gen_andvnx4si3
	       (mant, arg1,
		aarch64_simd_gen_const_vector_dup (VNx4SImode,
						   ~(HOST_WIDE_INT_M1U
						     << bits))));
    emit_insn (gen_iorvnx4si3 (int_res, sign, mant));
    emit_move_insn (operands[0], gen_lowpart (VNx4SFmode, int_res));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6225 */
rtx
gen_copysignvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"copysignvnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6230 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx sign = gen_reg_rtx (VNx2DImode);
    rtx mant = gen_reg_rtx (VNx2DImode);
    rtx int_res = gen_reg_rtx (VNx2DImode);
    int bits = GET_MODE_UNIT_BITSIZE (VNx2DFmode) - 1;

    rtx arg1 = lowpart_subreg (VNx2DImode, operands[1], VNx2DFmode);
    rtx arg2 = lowpart_subreg (VNx2DImode, operands[2], VNx2DFmode);

    emit_insn (gen_andvnx2di3
	       (sign, arg2,
		aarch64_simd_gen_const_vector_dup (VNx2DImode,
						   HOST_WIDE_INT_M1U
						   << bits)));
    emit_insn (gen_andvnx2di3
	       (mant, arg1,
		aarch64_simd_gen_const_vector_dup (VNx2DImode,
						   ~(HOST_WIDE_INT_M1U
						     << bits))));
    emit_insn (gen_iorvnx2di3 (int_res, sign, mant));
    emit_move_insn (operands[0], gen_lowpart (VNx2DFmode, int_res));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6255 */
rtx
gen_xorsignvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignvnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6260 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx sign = gen_reg_rtx (VNx8HImode);
    rtx int_res = gen_reg_rtx (VNx8HImode);
    int bits = GET_MODE_UNIT_BITSIZE (VNx8HFmode) - 1;

    rtx arg1 = lowpart_subreg (VNx8HImode, operands[1], VNx8HFmode);
    rtx arg2 = lowpart_subreg (VNx8HImode, operands[2], VNx8HFmode);

    emit_insn (gen_andvnx8hi3
	       (sign, arg2,
		aarch64_simd_gen_const_vector_dup (VNx8HImode,
						   HOST_WIDE_INT_M1U
						   << bits)));
    emit_insn (gen_xorvnx8hi3 (int_res, arg1, sign));
    emit_move_insn (operands[0], gen_lowpart (VNx8HFmode, int_res));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6255 */
rtx
gen_xorsignvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignvnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6260 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx sign = gen_reg_rtx (VNx4SImode);
    rtx int_res = gen_reg_rtx (VNx4SImode);
    int bits = GET_MODE_UNIT_BITSIZE (VNx4SFmode) - 1;

    rtx arg1 = lowpart_subreg (VNx4SImode, operands[1], VNx4SFmode);
    rtx arg2 = lowpart_subreg (VNx4SImode, operands[2], VNx4SFmode);

    emit_insn (gen_andvnx4si3
	       (sign, arg2,
		aarch64_simd_gen_const_vector_dup (VNx4SImode,
						   HOST_WIDE_INT_M1U
						   << bits)));
    emit_insn (gen_xorvnx4si3 (int_res, arg1, sign));
    emit_move_insn (operands[0], gen_lowpart (VNx4SFmode, int_res));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6255 */
rtx
gen_xorsignvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"xorsignvnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6260 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx sign = gen_reg_rtx (VNx2DImode);
    rtx int_res = gen_reg_rtx (VNx2DImode);
    int bits = GET_MODE_UNIT_BITSIZE (VNx2DFmode) - 1;

    rtx arg1 = lowpart_subreg (VNx2DImode, operands[1], VNx2DFmode);
    rtx arg2 = lowpart_subreg (VNx2DImode, operands[2], VNx2DFmode);

    emit_insn (gen_andvnx2di3
	       (sign, arg2,
		aarch64_simd_gen_const_vector_dup (VNx2DImode,
						   HOST_WIDE_INT_M1U
						   << bits)));
    emit_insn (gen_xorvnx2di3 (int_res, arg1, sign));
    emit_move_insn (operands[0], gen_lowpart (VNx2DFmode, int_res));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6291 */
rtx
gen_fmaxvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fmaxvnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6300 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	353)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6291 */
rtx
gen_fminvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fminvnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6300 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	355)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6291 */
rtx
gen_fmaxvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fmaxvnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6300 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	353)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6291 */
rtx
gen_fminvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fminvnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6300 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	355)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6291 */
rtx
gen_fmaxvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fmaxvnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6300 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	353)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6291 */
rtx
gen_fminvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fminvnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6300 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand3,
		const0_rtx,
		operand1,
		operand2),
	355)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6307 */
rtx
gen_cond_fmaxvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6307 */
rtx
gen_cond_fminvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (4,
		operand1,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6307 */
rtx
gen_cond_fmaxvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6307 */
rtx
gen_cond_fminvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (4,
		operand1,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6307 */
rtx
gen_cond_fmaxvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const0_rtx,
		operand2,
		operand3),
	353),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6307 */
rtx
gen_cond_fminvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (4,
		operand1,
		const0_rtx,
		operand2,
		operand3),
	355),
		operand4),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_iorvnx16bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_IOR (VNx16BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_xorvnx16bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx16BImode,
	gen_rtx_XOR (VNx16BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_iorvnx8bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_IOR (VNx8BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_xorvnx8bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_XOR (VNx8BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_iorvnx4bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_IOR (VNx4BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_xorvnx4bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_XOR (VNx4BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_iorvnx2bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_IOR (VNx2BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6367 */
rtx
gen_xorvnx2bi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6375 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_XOR (VNx2BImode,
	operand1,
	operand2),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx16qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx16qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx16QImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx8qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx8qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8QImode,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx8QImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx4qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx4qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4QImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx4QImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx2qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx2qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2QImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2QImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx8hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx8hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx8HImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx4hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx4hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4HImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx4HImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx2hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx2hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2HImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2HImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx4si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx4si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx4SImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx2si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx2si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2SImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2SImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6571 */
rtx
gen_fmavnx2di4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx2di4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6582 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, PLUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2DImode,
	operand1,
	operand2)),
	118),
	operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx16QImode,
	gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8QImode,
	gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4QImode,
	gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2QImode,
	gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8HImode,
	gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4HImode,
	gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2HImode,
	gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4SImode,
	gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2SImode,
	gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6609 */
rtx
gen_cond_fmavnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6621 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, PLUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2DImode,
	gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1460 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1460 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1460 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx16QImode,
	gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1461 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1461 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1461 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8QImode,
	gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1462 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1462 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1462 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4QImode,
	gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1463 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1463 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1463 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2QImode,
	gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1464 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1464 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1464 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx8HImode,
	gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1465 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1465 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1465 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4HImode,
	gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1466 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1466 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1466 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2HImode,
	gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1467 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1467 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1467 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx4SImode,
	gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1468 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1468 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1468 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2SImode,
	gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6670 */
extern rtx_insn *gen_split_1469 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1469 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1469 (aarch64-sve.md:6670)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6695 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_PLUS (VNx2DImode,
	gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3),
	operand4),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx16qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx16qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx16QImode,
	operand3,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx16QImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx8qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx8qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8QImode,
	operand3,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx8QImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx4qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx4qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4QImode,
	operand3,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx4QImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx2qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx2qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2QImode,
	operand3,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2QImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx8hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx8hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand3,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx8HImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx4hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx4hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4HImode,
	operand3,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx4HImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx2hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx2hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2HImode,
	operand3,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2HImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx4si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx4si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand3,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx4SImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx2si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx2si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2SImode,
	operand3,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2SImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6712 */
rtx
gen_fnmavnx2di4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx2di4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_int_fma (operands, MINUS))
      DONE;
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand3,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_MULT (VNx2DImode,
	operand1,
	operand2)),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	operand4,
	gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	operand4,
	gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	operand4,
	gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	operand4,
	gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	operand4,
	gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	operand4,
	gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	operand4,
	gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	operand4,
	gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	operand4,
	gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6750 */
rtx
gen_cond_fnmavnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6762 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (aarch64_prepare_sve_cond_int_fma (operands, MINUS))
      DONE;
    /* Swap the multiplication operands if the fallback value is the
       second of the two.  */
    if (rtx_equal_p (operands[3], operands[5]))
      std::swap (operands[2], operands[3]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	operand4,
	gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1470 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1470 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1470 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx16QImode,
	operand4,
	gen_rtx_MULT (VNx16QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1471 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1471 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1471 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8qivnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8QImode,
	operand4,
	gen_rtx_MULT (VNx8QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1472 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1472 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1472 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4qivnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4QImode,
	operand4,
	gen_rtx_MULT (VNx4QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1473 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1473 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1473 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2qivnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2QImode,
	operand4,
	gen_rtx_MULT (VNx2QImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1474 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1474 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1474 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx8HImode,
	operand4,
	gen_rtx_MULT (VNx8HImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1475 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1475 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1475 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4hivnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4HImode,
	operand4,
	gen_rtx_MULT (VNx4HImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1476 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1476 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1476 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2hivnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2HImode,
	operand4,
	gen_rtx_MULT (VNx2HImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1477 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1477 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1477 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx4SImode,
	operand4,
	gen_rtx_MULT (VNx4SImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1478 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1478 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1478 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2sivnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2SImode,
	operand4,
	gen_rtx_MULT (VNx2SImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6812 */
extern rtx_insn *gen_split_1479 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1479 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1479 (aarch64-sve.md:6812)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6837 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_MINUS (VNx2DImode,
	operand4,
	gen_rtx_MULT (VNx2DImode,
	operand2,
	operand3)),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6938 */
rtx
gen_ssadvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6944 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ones = force_reg (VNx16QImode, CONST1_RTX (VNx16QImode));
    rtx diff = gen_reg_rtx (VNx16QImode);
    emit_insn (gen_sabdvnx16qi_3 (diff, operands[1], operands[2]));
    emit_insn (gen_udot_prodvnx16qi (operands[0], diff, ones, operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	67));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6938 */
rtx
gen_usadvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6944 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ones = force_reg (VNx16QImode, CONST1_RTX (VNx16QImode));
    rtx diff = gen_reg_rtx (VNx16QImode);
    emit_insn (gen_uabdvnx16qi_3 (diff, operands[1], operands[2]));
    emit_insn (gen_udot_prodvnx16qi (operands[0], diff, ones, operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	91));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6938 */
rtx
gen_ssadvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6944 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ones = force_reg (VNx8HImode, CONST1_RTX (VNx8HImode));
    rtx diff = gen_reg_rtx (VNx8HImode);
    emit_insn (gen_sabdvnx8hi_3 (diff, operands[1], operands[2]));
    emit_insn (gen_udot_prodvnx8hi (operands[0], diff, ones, operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	67));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6938 */
rtx
gen_usadvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 6944 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ones = force_reg (VNx8HImode, CONST1_RTX (VNx8HImode));
    rtx diff = gen_reg_rtx (VNx8HImode);
    emit_insn (gen_uabdvnx8hi_3 (diff, operands[1], operands[2]));
    emit_insn (gen_udot_prodvnx8hi (operands[0], diff, ones, operands[3]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_USE (VOIDmode,
	operand0));
  emit_insn (gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		gen_rtx_USE (VOIDmode,
	operand1),
		gen_rtx_USE (VOIDmode,
	operand2)),
	91));
  emit_insn (gen_rtx_USE (VOIDmode,
	operand3));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fmavnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	356)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fnmavnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	357)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fnmsvnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmsvnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	361)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fmsvnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmsvnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	362)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fmavnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	356)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fnmavnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	357)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fnmsvnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmsvnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	361)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fmsvnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmsvnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	362)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fmavnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmavnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	356)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fnmavnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmavnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	357)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fnmsvnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fnmsvnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	361)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:6992 */
rtx
gen_fmsvnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"fmsvnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7002 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		const0_rtx,
		operand1,
		operand2,
		operand3),
	362)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fmavnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fnmavnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fnmsvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmsvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fmsvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmsvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fmavnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fnmavnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fnmsvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmsvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fmsvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmsvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fmavnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmavnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fnmavnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmavnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fnmsvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fnmsvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7026 */
rtx
gen_cond_fmsvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"cond_fmsvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7040 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  /* Swap the multiplication operands if the fallback value is the
     second of the two.  */
  if (rtx_equal_p (operands[3], operands[5]))
    std::swap (operands[2], operands[3]);
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1480 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1480 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1480 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1481 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1481 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1481 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1482 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1482 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1482 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1483 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1483 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1483 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1484 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1484 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1484 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1485 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1485 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1485 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1486 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1486 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1486 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1487 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1487 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1487 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1488 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1488 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1488 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1489 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1489 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1489 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1490 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1490 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1490 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7049 */
extern rtx_insn *gen_split_1491 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1491 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1491 (aarch64-sve.md:7049)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7067 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1492 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1492 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1492 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1493 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1493 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1493 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1494 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1494 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1494 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1495 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1495 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1495 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1496 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1496 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1496 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1497 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1497 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1497 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1498 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1498 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1498 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1499 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1499 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1499 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1500 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1500 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1500 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1501 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1501 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1501 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1502 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1502 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1502 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7095 */
extern rtx_insn *gen_split_1503 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1503 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1503 (aarch64-sve.md:7095)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7113 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1504 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1504 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1504 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1505 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1505 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1505 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1506 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1506 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1506 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1507 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1507 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1507 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1508 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1508 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1508 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1509 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1509 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1509 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1510 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1510 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1510 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1511 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1511 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1511 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1512 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1512 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1512 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1513 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1513 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1513 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1514 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1514 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1514 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7141 */
extern rtx_insn *gen_split_1515 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1515 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1515 (aarch64-sve.md:7141)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7166 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1516 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1516 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1516 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1517 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1517 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1517 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1518 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1518 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1518 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1519 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1519 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1519 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1520 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1520 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1520 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1521 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1521 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1521 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1522 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1522 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1522 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1523 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1523 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1523 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1524 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1524 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1524 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	356),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1525 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1525 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1525 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	357),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1526 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1526 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1526 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	361),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7183 */
extern rtx_insn *gen_split_1527 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1527 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1527 (aarch64-sve.md:7183)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7210 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	362),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmlavnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlavnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx8BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx8HFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx8hf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx8hf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	385)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmlsvnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsvnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx8BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx8HFmode);
  emit_insn
    (gen_aarch64_pred_fcmla180vnx8hf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx8hf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	387)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmla_conjvnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjvnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx8BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx8HFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx8hf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx8hf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	391)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmls_conjvnx8hf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjvnx8hf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx8BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx8HFmode);
  emit_insn
    (gen_aarch64_pred_fcmla180vnx8hf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx8hf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	392)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmlavnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlavnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx4BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx4SFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx4sf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx4sf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	385)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmlsvnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsvnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx4BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx4SFmode);
  emit_insn
    (gen_aarch64_pred_fcmla180vnx4sf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx4sf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	387)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmla_conjvnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjvnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx4BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx4SFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx4sf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx4sf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	391)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmls_conjvnx4sf4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjvnx4sf4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx4BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx4SFmode);
  emit_insn
    (gen_aarch64_pred_fcmla180vnx4sf (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx4sf (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	392)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmlavnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlavnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx2BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx2DFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx2df (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx2df (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	385)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmlsvnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsvnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx2BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx2DFmode);
  emit_insn
    (gen_aarch64_pred_fcmla180vnx2df (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx2df (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	387)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmla_conjvnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjvnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx2BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx2DFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx2df (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx2df (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	391)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7265 */
rtx
gen_cmls_conjvnx2df4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjvnx2df4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7275 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  operands[4] = aarch64_ptrue_reg (VNx2BImode);
  operands[5] = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx tmp = gen_reg_rtx (VNx2DFmode);
  emit_insn
    (gen_aarch64_pred_fcmla180vnx2df (tmp, operands[4],
					     operands[2], operands[1],
					     operands[3], operands[5]));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx2df (operands[0], operands[4],
					     operands[2], operands[1],
					     tmp, operands[5]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand4,
		operand5,
		operand1,
		operand2,
		operand3),
	392)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7294 */
rtx
gen_cmulvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulvnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7301 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  rtx pred_reg = aarch64_ptrue_reg (VNx8BImode);
  rtx gp_mode = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx accum = force_reg (VNx8HFmode, CONST0_RTX (VNx8HFmode));
  rtx tmp = gen_reg_rtx (VNx8HFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx8hf (tmp, pred_reg,
					     operands[2], operands[1],
					     accum, gp_mode));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx8hf (operands[0], pred_reg,
					     operands[2], operands[1],
					     tmp, gp_mode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7294 */
rtx
gen_cmul_conjvnx8hf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjvnx8hf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7301 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  rtx pred_reg = aarch64_ptrue_reg (VNx8BImode);
  rtx gp_mode = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx accum = force_reg (VNx8HFmode, CONST0_RTX (VNx8HFmode));
  rtx tmp = gen_reg_rtx (VNx8HFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx8hf (tmp, pred_reg,
					     operands[2], operands[1],
					     accum, gp_mode));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx8hf (operands[0], pred_reg,
					     operands[2], operands[1],
					     tmp, gp_mode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7294 */
rtx
gen_cmulvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulvnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7301 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  rtx pred_reg = aarch64_ptrue_reg (VNx4BImode);
  rtx gp_mode = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx accum = force_reg (VNx4SFmode, CONST0_RTX (VNx4SFmode));
  rtx tmp = gen_reg_rtx (VNx4SFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx4sf (tmp, pred_reg,
					     operands[2], operands[1],
					     accum, gp_mode));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx4sf (operands[0], pred_reg,
					     operands[2], operands[1],
					     tmp, gp_mode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7294 */
rtx
gen_cmul_conjvnx4sf3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjvnx4sf3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7301 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  rtx pred_reg = aarch64_ptrue_reg (VNx4BImode);
  rtx gp_mode = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx accum = force_reg (VNx4SFmode, CONST0_RTX (VNx4SFmode));
  rtx tmp = gen_reg_rtx (VNx4SFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx4sf (tmp, pred_reg,
					     operands[2], operands[1],
					     accum, gp_mode));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx4sf (operands[0], pred_reg,
					     operands[2], operands[1],
					     tmp, gp_mode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7294 */
rtx
gen_cmulvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulvnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7301 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  rtx pred_reg = aarch64_ptrue_reg (VNx2BImode);
  rtx gp_mode = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx accum = force_reg (VNx2DFmode, CONST0_RTX (VNx2DFmode));
  rtx tmp = gen_reg_rtx (VNx2DFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx2df (tmp, pred_reg,
					     operands[2], operands[1],
					     accum, gp_mode));
  emit_insn
    (gen_aarch64_pred_fcmla90vnx2df (operands[0], pred_reg,
					     operands[2], operands[1],
					     tmp, gp_mode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	389)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7294 */
rtx
gen_cmul_conjvnx2df3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjvnx2df3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7301 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  rtx pred_reg = aarch64_ptrue_reg (VNx2BImode);
  rtx gp_mode = gen_int_mode (SVE_RELAXED_GP, SImode);
  rtx accum = force_reg (VNx2DFmode, CONST0_RTX (VNx2DFmode));
  rtx tmp = gen_reg_rtx (VNx2DFmode);
  emit_insn
    (gen_aarch64_pred_fcmlavnx2df (tmp, pred_reg,
					     operands[2], operands[1],
					     accum, gp_mode));
  emit_insn
    (gen_aarch64_pred_fcmla270vnx2df (operands[0], pred_reg,
					     operands[2], operands[1],
					     tmp, gp_mode));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (2,
		operand1,
		operand2),
	390)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmlavnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla90vnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla180vnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla270vnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmlavnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla90vnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla180vnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla270vnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmlavnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla90vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla180vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7318 */
rtx
gen_cond_fcmla270vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand1,
		const1_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1528 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1528 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1528 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	340),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1529 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1529 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1529 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	341),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1530 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1530 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1530 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	342),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1531 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1531 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1531 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	343),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1532 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1532 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1532 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	340),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1533 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1533 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1533 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	341),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1534 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1534 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1534 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	342),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1535 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1535 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1535 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	343),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1536 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1536 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1536 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	340),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1537 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1537 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1537 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	341),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1538 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1538 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1538 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	342),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7335 */
extern rtx_insn *gen_split_1539 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1539 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1539 (aarch64-sve.md:7335)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand5,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	343),
		copy_rtx (operand4)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1540 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1540 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1540 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1541 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1541 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1541 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1542 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1542 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1542 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1543 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1543 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1543 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx8HFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1544 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1544 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1544 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1545 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1545 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1545 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1546 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1546 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1546 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1547 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1547 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1547 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx4SFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1548 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1548 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1548 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1549 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1549 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1549 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1550 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1550 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1550 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7380 */
extern rtx_insn *gen_split_1551 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1551 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1551 (aarch64-sve.md:7380)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7400 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (reload_completed
        && register_operand (operands[5], VNx2DFmode)
        && !rtx_equal_p (operands[0], operands[5]))
      {
	emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
						 operands[5], operands[1]));
	operands[5] = operands[4] = operands[0];
      }
    else if (!rtx_equal_p (operands[1], operands[6]))
      operands[6] = copy_rtx (operands[1]);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		operand6,
		const0_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1552 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1552 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1552 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1553 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1553 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1553 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1554 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1554 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1554 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1555 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1555 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1555 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx8hfvnx8bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1556 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1556 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1556 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1557 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1557 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1557 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1558 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1558 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1558 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1559 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1559 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1559 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx4sfvnx4bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1560 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1560 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1560 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	340),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1561 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1561 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1561 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	341),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1562 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1562 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1562 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	342),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7417 */
extern rtx_insn *gen_split_1563 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1563 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1563 (aarch64-sve.md:7417)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7439 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_vcond_mask_vnx2dfvnx2bi (operands[0], operands[4],
					     operands[5], operands[1]));
    operands[5] = operands[4] = operands[0];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (5,
		copy_rtx (operand1),
		const1_rtx,
		operand2,
		operand3,
		operand4),
	343),
		operand5),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx16qivnx16bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx16qivnx16bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx16QImode))
      operands[2] = force_reg (VNx16QImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx8qivnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx8qivnx8bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx8QImode))
      operands[2] = force_reg (VNx8QImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8QImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx4qivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx4qivnx4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx4QImode))
      operands[2] = force_reg (VNx4QImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2qivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2qivnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2QImode))
      operands[2] = force_reg (VNx2QImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx8hivnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx8hivnx8bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx8HImode))
      operands[2] = force_reg (VNx8HImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx4hivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx4hivnx4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx4HImode))
      operands[2] = force_reg (VNx4HImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2hivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2hivnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2HImode))
      operands[2] = force_reg (VNx2HImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx8hfvnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx8hfvnx8bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx8HFmode))
      operands[2] = force_reg (VNx8HFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx4hfvnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx4hfvnx4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx4HFmode))
      operands[2] = force_reg (VNx4HFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4HFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2hfvnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2hfvnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2HFmode))
      operands[2] = force_reg (VNx2HFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2HFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx8bfvnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx8bfvnx8bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx8BFmode))
      operands[2] = force_reg (VNx8BFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx4bfvnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx4bfvnx4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx4BFmode))
      operands[2] = force_reg (VNx4BFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2bfvnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2bfvnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2BFmode))
      operands[2] = force_reg (VNx2BFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx4sivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx4sivnx4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx4SImode))
      operands[2] = force_reg (VNx4SImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2sivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2sivnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2SImode))
      operands[2] = force_reg (VNx2SImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx4sfvnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx4sfvnx4bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx4SFmode))
      operands[2] = force_reg (VNx4SFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2sfvnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2sfvnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2SFmode))
      operands[2] = force_reg (VNx2SFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2SFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2divnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2divnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2DImode))
      operands[2] = force_reg (VNx2DImode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7564 */
rtx
gen_vcond_mask_vnx2dfvnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"vcond_mask_vnx2dfvnx2bi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7572 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    if (register_operand (operands[1], VNx2DFmode))
      operands[2] = force_reg (VNx2DFmode, operands[2]);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx16qivnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx16qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx16QImode, VNx16QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx16QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8qivnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8qivnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8QImode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8hivnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8hivnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HImode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8hfvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8hfvnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HFmode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8bfvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8bfvnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8BFmode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4qivnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4qivnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4QImode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4hivnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4hivnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HImode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4hfvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4hfvnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HFmode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4bfvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4bfvnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4BFmode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4sivnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sivnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SImode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4sfvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sfvnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SFmode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2qivnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2qivnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hivnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hivnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2bfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2bfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sivnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sivnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2divnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2divnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2dfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2dfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8qivnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8qivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8QImode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8hivnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HImode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8hfvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8hfvnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HFmode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx8bfvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8bfvnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8BFmode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4qivnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4qivnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4QImode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4hivnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4hivnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HImode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4hfvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4hfvnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HFmode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4bfvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4bfvnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4BFmode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4sivnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sivnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SImode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4sfvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sfvnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SFmode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2qivnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2qivnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hivnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hivnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2bfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2bfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sivnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sivnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2divnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2divnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2dfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2dfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4qivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4qivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4QImode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4hivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4hivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HImode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4hfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4hfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HFmode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4bfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4bfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4BFmode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4sivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SImode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx4sfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SFmode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2qivnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2qivnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hivnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hivnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2bfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2bfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sivnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sivnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2divnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2divnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2dfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2dfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2qivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2qivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2hfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2hfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2bfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2bfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2sfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2sfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2divnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7647 */
rtx
gen_vcondvnx2dfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2dfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7656 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx16qivnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx16qivnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx16QImode, VNx16QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx16QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8qivnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8qivnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8QImode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8hivnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8hivnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HImode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8hfvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8hfvnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HFmode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8bfvnx8qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8bfvnx8qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8BFmode, VNx8QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4qivnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4qivnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4QImode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4hivnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4hivnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HImode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4hfvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4hfvnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HFmode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4bfvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4bfvnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4BFmode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4sivnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4sivnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SImode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4sfvnx4qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4sfvnx4qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SFmode, VNx4QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2qivnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2qivnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hivnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hivnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2bfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2bfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sivnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sivnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2divnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2divnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2dfvnx2qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2dfvnx2qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2QImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8qivnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8qivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8QImode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8hivnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8hivnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HImode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8hfvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8hfvnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HFmode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx8bfvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx8bfvnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8BFmode, VNx8HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4qivnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4qivnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4QImode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4hivnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4hivnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HImode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4hfvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4hfvnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HFmode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4bfvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4bfvnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4BFmode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4sivnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4sivnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SImode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4sfvnx4hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4sfvnx4hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SFmode, VNx4HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2qivnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2qivnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hivnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hivnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2bfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2bfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sivnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sivnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2divnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2divnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2dfvnx2hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2dfvnx2hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2HImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4qivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4qivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4QImode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4hivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4hivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HImode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4hfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4hfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4HFmode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4bfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4bfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4BFmode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4sivnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4sivnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SImode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx4sfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx4sfvnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SFmode, VNx4SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2qivnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2qivnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hivnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hivnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2bfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2bfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sivnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sivnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2divnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2divnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2dfvnx2si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2dfvnx2si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2SImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2qivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2qivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2QImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2QImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2hfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2hfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2HFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2bfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2bfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2BFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sivnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sivnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2sfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2sfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2SFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2divnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2divnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7664 */
rtx
gen_vconduvnx2dfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vconduvnx2dfvnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7673 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2DImode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7681 */
rtx
gen_vcondvnx8hivnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8hivnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7690 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HImode, VNx8HFmode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7681 */
rtx
gen_vcondvnx4sivnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sivnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7690 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SImode, VNx4SFmode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7681 */
rtx
gen_vcondvnx2divnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2divnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7690 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DImode, VNx2DFmode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DImode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7681 */
rtx
gen_vcondvnx8bfvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8bfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7690 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8BFmode, VNx8HFmode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8BFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7681 */
rtx
gen_vcondvnx8hfvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx8hfvnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7690 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx8HFmode, VNx8HFmode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx8HFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7681 */
rtx
gen_vcondvnx4sfvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx4sfvnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7690 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx4SFmode, VNx4SFmode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx4SFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7681 */
rtx
gen_vcondvnx2dfvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4,
	rtx operand5)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
    operands[5] = operand5;
#define FAIL _Pragma ("GCC error \"vcondvnx2dfvnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7690 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vcond (VNx2DFmode, VNx2DFmode, operands);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IF_THEN_ELSE (VNx2DFmode,
	gen_rtx_fmt_ee (GET_CODE (operand3), VOIDmode,
		operand4,
		operand5),
	operand1,
	operand2)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx16qivnx16bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx16BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx8qivnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx8BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx4qivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx4BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx2qivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx8hivnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx8BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx4hivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx4BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx2hivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx4sivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx4BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx2sivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7715 */
rtx
gen_vec_cmpvnx2divnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx16qivnx16bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx16BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx8qivnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx8BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx4qivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx4BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx2qivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx8hivnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx8BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx4hivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx4BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx2hivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx4sivnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx4BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx2sivnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7733 */
rtx
gen_vec_cmpuvnx2divnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7741 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_int (operands[0], GET_CODE (operands[1]),
				    operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1564 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1564 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1564 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1565 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1565 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1565 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1566 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1566 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1566 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1567 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1567 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1567 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1568 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1568 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1568 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1569 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1569 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1569 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1570 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1570 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1570 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1571 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1571 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1571 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1572 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1572 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1572 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1573 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1573 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1573 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx16BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1574 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1574 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1574 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1575 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1575 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1575 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1576 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1576 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1576 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1577 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1577 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1577 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1578 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1578 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1578 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1579 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1579 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1579 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1580 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1580 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1580 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1581 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1581 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1581 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1582 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1582 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1582 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1583 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1583 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1583 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1584 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1584 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1584 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1585 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1585 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1585 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1586 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1586 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1586 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1587 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1587 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1587 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1588 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1588 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1588 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1589 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1589 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1589 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1590 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1590 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1590 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1591 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1591 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1591 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1592 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1592 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1592 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1593 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1593 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1593 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1594 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1594 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1594 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1595 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1595 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1595 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1596 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1596 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1596 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1597 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1597 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1597 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1598 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1598 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1598 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1599 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1599 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1599 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1600 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1600 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1600 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1601 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1601 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1601 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1602 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1602 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1602 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1603 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1603 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1603 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1604 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1604 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1604 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1605 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1605 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1605 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1606 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1606 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1606 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1607 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1607 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1607 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1608 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1608 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1608 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1609 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1609 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1609 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1610 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1610 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1610 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1611 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1611 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1611 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1612 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1612 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1612 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1613 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1613 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1613 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx8BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1614 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1614 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1614 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1615 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1615 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1615 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1616 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1616 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1616 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1617 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1617 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1617 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1618 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1618 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1618 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1619 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1619 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1619 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1620 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1620 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1620 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1621 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1621 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1621 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1622 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1622 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1622 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1623 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1623 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1623 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1624 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1624 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1624 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1625 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1625 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1625 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1626 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1626 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1626 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1627 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1627 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1627 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1628 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1628 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1628 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1629 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1629 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1629 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1630 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1630 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1630 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1631 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1631 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1631 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1632 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1632 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1632 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1633 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1633 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1633 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1634 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1634 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1634 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1635 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1635 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1635 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1636 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1636 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1636 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1637 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1637 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1637 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1638 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1638 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1638 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1639 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1639 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1639 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1640 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1640 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1640 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1641 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1641 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1641 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1642 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1642 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1642 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1643 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1643 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1643 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx4BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1644 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1644 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1644 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1645 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1645 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1645 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1646 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1646 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1646 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1647 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1647 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1647 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1648 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1648 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1648 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1649 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1649 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1649 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1650 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1650 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1650 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1651 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1651 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1651 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1652 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1652 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1652 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1653 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1653 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1653 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1654 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1654 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1654 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1655 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1655 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1655 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1656 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1656 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1656 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_EQ (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1657 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1657 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1657 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_NE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1658 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1658 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1658 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GE (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1659 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1659 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1659 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GT (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1660 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1660 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1660 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1661 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1661 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1661 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_LEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1662 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1662 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1662 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GEU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7791 */
extern rtx_insn *gen_split_1663 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1663 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1663 (aarch64-sve.md:7791)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7819 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_GTU (VNx2BImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1664 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1664 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1664 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1665 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1665 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1665 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1666 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1666 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1666 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1667 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1667 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1667 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1668 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1668 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1668 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1669 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1669 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1669 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1670 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1670 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1670 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1671 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1671 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1671 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1672 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1672 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1672 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1673 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1673 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1673 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx16BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1674 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1674 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1674 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1675 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1675 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1675 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1676 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1676 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1676 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1677 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1677 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1677 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1678 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1678 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1678 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1679 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1679 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1679 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1680 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1680 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1680 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1681 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1681 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1681 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1682 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1682 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1682 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1683 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1683 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1683 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1684 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1684 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1684 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1685 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1685 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1685 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1686 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1686 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1686 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1687 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1687 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1687 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1688 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1688 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1688 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1689 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1689 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1689 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1690 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1690 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1690 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1691 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1691 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1691 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1692 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1692 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1692 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1693 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1693 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1693 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1694 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1694 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1694 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1695 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1695 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1695 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1696 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1696 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1696 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1697 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1697 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1697 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1698 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1698 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1698 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1699 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1699 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1699 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1700 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1700 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1700 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1701 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1701 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1701 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1702 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1702 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1702 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1703 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1703 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1703 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1704 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1704 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1704 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1705 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1705 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1705 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1706 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1706 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1706 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1707 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1707 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1707 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1708 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1708 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1708 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1709 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1709 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1709 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1710 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1710 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1710 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1711 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1711 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1711 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1712 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1712 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1712 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1713 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1713 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1713 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1714 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1714 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1714 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1715 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1715 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1715 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1716 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1716 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1716 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1717 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1717 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1717 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1718 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1718 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1718 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1719 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1719 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1719 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1720 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1720 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1720 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1721 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1721 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1721 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1722 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1722 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1722 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1723 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1723 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1723 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1724 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1724 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1724 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1725 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1725 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1725 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1726 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1726 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1726 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1727 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1727 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1727 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1728 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1728 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1728 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1729 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1729 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1729 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1730 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1730 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1730 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1731 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1731 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1731 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1732 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1732 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1732 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1733 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1733 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1733 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1734 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1734 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1734 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1735 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1735 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1735 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1736 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1736 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1736 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1737 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1737 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1737 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1738 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1738 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1738 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1739 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1739 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1739 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1740 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1740 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1740 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1741 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1741 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1741 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1742 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1742 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1742 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1743 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1743 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1743 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1744 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1744 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1744 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1745 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1745 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1745 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1746 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1746 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1746 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1747 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1747 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1747 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1748 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1748 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1748 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1749 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1749 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1749 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1750 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1750 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1750 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1751 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1751 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1751 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1752 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1752 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1752 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1753 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1753 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1753 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1754 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1754 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1754 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1755 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1755 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1755 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1756 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1756 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1756 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1757 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1757 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1757 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1758 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1758 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1758 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1759 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1759 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1759 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1760 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1760 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1760 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1761 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1761 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1761 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1762 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1762 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1762 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7827 */
extern rtx_insn *gen_split_1763 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1763 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1763 (aarch64-sve.md:7827)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 7848 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1764 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1764 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1764 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1765 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1765 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1765 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1766 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1766 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1766 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1767 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1767 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1767 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1768 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1768 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1768 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1769 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1769 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1769 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1770 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1770 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1770 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1771 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1771 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1771 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1772 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1772 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1772 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1773 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1773 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1773 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx16BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1774 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1774 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1774 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1775 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1775 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1775 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1776 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1776 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1776 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1777 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1777 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1777 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1778 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1778 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1778 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1779 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1779 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1779 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1780 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1780 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1780 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1781 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1781 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1781 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1782 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1782 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1782 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1783 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1783 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1783 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1784 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1784 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1784 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1785 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1785 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1785 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1786 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1786 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1786 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1787 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1787 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1787 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1788 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1788 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1788 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1789 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1789 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1789 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1790 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1790 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1790 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1791 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1791 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1791 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1792 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1792 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1792 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1793 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1793 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1793 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1794 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1794 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1794 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1795 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1795 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1795 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1796 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1796 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1796 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1797 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1797 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1797 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1798 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1798 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1798 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1799 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1799 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1799 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1800 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1800 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1800 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1801 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1801 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1801 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1802 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1802 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1802 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1803 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1803 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1803 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1804 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1804 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1804 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1805 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1805 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1805 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1806 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1806 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1806 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1807 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1807 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1807 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1808 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1808 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1808 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1809 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1809 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1809 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1810 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1810 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1810 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1811 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1811 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1811 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1812 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1812 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1812 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1813 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1813 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1813 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx8BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1814 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1814 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1814 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1815 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1815 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1815 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1816 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1816 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1816 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1817 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1817 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1817 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1818 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1818 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1818 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1819 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1819 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1819 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1820 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1820 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1820 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1821 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1821 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1821 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1822 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1822 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1822 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1823 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1823 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1823 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1824 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1824 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1824 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1825 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1825 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1825 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1826 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1826 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1826 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1827 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1827 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1827 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1828 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1828 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1828 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1829 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1829 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1829 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1830 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1830 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1830 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1831 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1831 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1831 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1832 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1832 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1832 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1833 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1833 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1833 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1834 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1834 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1834 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1835 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1835 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1835 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1836 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1836 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1836 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1837 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1837 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1837 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1838 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1838 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1838 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1839 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1839 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1839 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1840 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1840 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1840 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1841 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1841 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1841 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1842 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1842 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1842 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1843 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1843 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1843 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx4BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1844 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1844 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1844 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1845 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1845 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1845 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1846 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1846 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1846 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1847 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1847 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1847 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1848 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1848 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1848 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1849 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1849 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1849 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1850 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1850 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1850 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1851 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1851 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1851 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1852 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1852 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1852 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1853 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1853 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1853 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1854 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1854 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1854 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1855 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1855 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1855 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1856 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1856 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1856 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_EQ (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1857 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1857 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1857 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_NE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1858 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1858 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1858 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GE (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1859 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1859 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1859 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GT (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1860 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1860 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1860 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1861 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1861 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1861 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_LEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1862 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1862 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1862 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GEU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7858 */
extern rtx_insn *gen_split_1863 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1863 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1863 (aarch64-sve.md:7858)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand1,
		const0_rtx,
		gen_rtx_GTU (VNx2BImode,
	operand2,
	operand3)),
	119)),
		gen_hard_reg_clobber (CC_NZCmode, 66))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1864 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1864 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1864 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1865 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1865 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1865 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1866 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1866 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1866 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1867 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1867 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1867 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1868 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1868 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1868 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1869 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1869 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1869 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1870 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1870 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1870 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1871 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1871 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1871 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1872 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1872 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1872 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1873 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1873 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1873 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1874 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1874 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1874 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1875 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1875 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1875 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1876 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1876 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1876 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1877 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1877 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1877 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1878 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1878 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1878 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1879 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1879 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1879 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1880 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1880 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1880 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1881 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1881 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1881 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1882 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1882 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1882 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1883 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1883 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1883 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1884 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1884 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1884 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1885 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1885 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1885 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1886 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1886 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1886 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1887 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1887 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1887 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1888 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1888 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1888 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1889 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1889 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1889 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1890 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1890 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1890 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1891 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1891 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1891 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1892 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1892 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1892 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1893 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1893 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1893 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1894 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1894 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1894 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1895 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1895 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1895 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1896 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1896 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1896 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1897 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1897 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1897 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1898 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1898 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1898 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1899 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1899 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1899 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1900 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1900 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1900 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1901 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1901 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1901 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1902 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1902 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1902 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1903 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1903 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1903 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1904 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1904 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1904 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1905 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1905 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1905 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1906 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1906 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1906 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1907 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1907 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1907 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1908 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1908 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1908 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1909 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1909 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1909 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1910 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1910 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1910 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1911 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1911 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1911 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1912 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1912 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1912 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1913 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1913 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1913 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1914 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1914 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1914 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1915 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1915 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1915 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1916 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1916 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1916 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1917 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1917 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1917 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1918 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1918 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1918 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1919 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1919 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1919 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1920 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1920 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1920 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1921 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1921 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1921 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1922 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1922 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1922 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1923 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1923 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1923 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1924 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1924 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1924 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1925 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1925 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1925 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1926 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1926 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1926 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1927 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1927 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1927 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1928 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1928 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1928 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1929 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1929 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1929 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1930 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1930 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1930 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1931 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1931 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1931 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1932 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1932 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1932 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1933 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1933 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1933 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1934 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1934 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1934 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	131)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1935 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1935 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1935 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	132)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1936 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1936 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1936 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	133)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1937 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1937 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1937 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	134)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1938 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1938 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1938 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	127)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1939 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1939 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1939 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	128)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1940 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1940 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1940 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	129)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1941 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1941 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1941 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	130)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1942 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1942 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1942 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	135)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:7986 */
extern rtx_insn *gen_split_1943 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1943 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1943 (aarch64-sve.md:7986)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		copy_rtx (operand1),
		copy_rtx (operand2)),
	136)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1944 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1944 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1944 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1945 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1945 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1945 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1946 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1946 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1946 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1947 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1947 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1947 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1948 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1948 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1948 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1949 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1949 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1949 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1950 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1950 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1950 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1951 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1951 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1951 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1952 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1952 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1952 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1953 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1953 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1953 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1954 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1954 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1954 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1955 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1955 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1955 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1956 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1956 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1956 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1957 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1957 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1957 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1958 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1958 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1958 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1959 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1959 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1959 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1960 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1960 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1960 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1961 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1961 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1961 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1962 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1962 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1962 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1963 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1963 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1963 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1964 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1964 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1964 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1965 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1965 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1965 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1966 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1966 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1966 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1967 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1967 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1967 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1968 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1968 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1968 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1969 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1969 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1969 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1970 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1970 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1970 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1971 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1971 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1971 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1972 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1972 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1972 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1973 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1973 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1973 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1974 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1974 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1974 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1975 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1975 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1975 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1976 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1976 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1976 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1977 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1977 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1977 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1978 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1978 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1978 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1979 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1979 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1979 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1980 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1980 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1980 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1981 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1981 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1981 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1982 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1982 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1982 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1983 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1983 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1983 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1984 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1984 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1984 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1985 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1985 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1985 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1986 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1986 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1986 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1987 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1987 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1987 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1988 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1988 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1988 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1989 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1989 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1989 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1990 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1990 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1990 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1991 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1991 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1991 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1992 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1992 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1992 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1993 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1993 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1993 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1994 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1994 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1994 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1995 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1995 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1995 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1996 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1996 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1996 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1997 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1997 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1997 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1998 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1998 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1998 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_1999 (rtx_insn *, rtx *);
rtx_insn *
gen_split_1999 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_1999 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2000 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2000 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2000 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2001 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2001 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2001 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2002 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2002 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2002 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2003 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2003 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2003 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2004 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2004 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2004 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2005 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2005 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2005 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2006 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2006 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2006 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2007 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2007 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2007 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2008 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2008 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2008 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2009 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2009 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2009 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2010 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2010 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2010 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2011 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2011 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2011 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2012 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2012 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2012 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2013 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2013 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2013 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2014 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2014 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2014 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	131)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2015 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2015 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2015 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	132)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2016 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2016 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2016 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	133)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2017 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2017 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2017 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	134)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2018 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2018 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2018 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	127)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2019 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2019 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2019 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	128)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2020 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2020 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2020 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	129)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2021 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2021 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2021 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	130)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2022 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2022 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2022 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	135)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8013 */
extern rtx_insn *gen_split_2023 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2023 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2023 (aarch64-sve.md:8013)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8030 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand3,
		operand4,
		const1_rtx,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (2,
		operand1,
		operand2),
	136)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8052 */
rtx
gen_vec_cmpvnx8hfvnx8bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_float (operands[0], GET_CODE (operands[1]),
				      operands[2], operands[3], false);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx8BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8052 */
rtx
gen_vec_cmpvnx4sfvnx4bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_float (operands[0], GET_CODE (operands[1]),
				      operands[2], operands[3], false);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx4BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8052 */
rtx
gen_vec_cmpvnx2dfvnx2bi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8058 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_cmp_float (operands[0], GET_CODE (operands[1]),
				      operands[2], operands[3], false);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_fmt_ee (GET_CODE (operand1), VNx2BImode,
		operand2,
		operand3)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2024 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2024 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2024 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	337)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2025 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2025 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2025 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	338)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2026 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2026 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2026 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	339)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2027 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2027 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2027 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2028 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2028 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2028 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	345)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2029 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2029 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2029 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	346)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2030 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2030 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2030 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	337)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2031 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2031 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2031 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	338)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2032 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2032 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2032 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	339)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2033 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2033 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2033 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2034 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2034 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2034 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	345)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2035 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2035 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2035 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	346)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2036 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2036 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2036 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	337)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2037 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2037 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2037 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	338)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2038 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2038 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2038 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	339)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2039 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2039 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2039 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2040 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2040 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2040 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	345)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8101 */
extern rtx_insn *gen_split_2041 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2041 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2041 (aarch64-sve.md:8101)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	346)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8124 */
extern rtx_insn *gen_split_2042 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2042 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2042 (aarch64-sve.md:8124)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	347)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8124 */
extern rtx_insn *gen_split_2043 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2043 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2043 (aarch64-sve.md:8124)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	347)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8124 */
extern rtx_insn *gen_split_2044 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2044 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2044 (aarch64-sve.md:8124)\n");
  start_sequence ();
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	347)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2045 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2045 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2045 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	337)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2046 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2046 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2046 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	338)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2047 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2047 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2047 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	339)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2048 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2048 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2048 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	344)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2049 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2049 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2049 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	345)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2050 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2050 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2050 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	346)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2051 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2051 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2051 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	337)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2052 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2052 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2052 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	338)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2053 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2053 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2053 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	339)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2054 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2054 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2054 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	344)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2055 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2055 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2055 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	345)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2056 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2056 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2056 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	346)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2057 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2057 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2057 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	337)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2058 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2058 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2058 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	338)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2059 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2059 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2059 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	339)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2060 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2060 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2060 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	344)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2061 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2061 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2061 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	345)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8149 */
extern rtx_insn *gen_split_2062 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2062 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2062 (aarch64-sve.md:8149)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8178 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	346)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2063 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2063 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2063 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	337)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx8BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2064 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2064 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2064 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	338)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx8BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2065 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2065 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2065 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	339)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx8BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2066 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2066 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2066 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	344)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx8BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2067 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2067 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2067 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	345)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx8BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2068 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2068 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2068 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	346)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx8BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2069 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2069 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2069 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	337)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx4BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2070 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2070 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2070 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	338)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx4BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2071 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2071 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2071 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	339)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx4BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2072 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2072 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2072 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	344)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx4BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2073 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2073 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2073 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	345)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx4BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2074 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2074 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2074 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	346)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx4BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2075 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2075 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2075 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	337)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx2BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2076 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2076 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2076 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	338)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx2BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2077 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2077 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2077 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	339)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx2BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2078 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2078 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2078 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	344)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx2BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2079 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2079 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2079 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	345)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx2BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8186 */
extern rtx_insn *gen_split_2080 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2080 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2080 (aarch64-sve.md:8186)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8219 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	346)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx2BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8225 */
extern rtx_insn *gen_split_2081 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2081 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2081 (aarch64-sve.md:8225)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8254 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	347)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8225 */
extern rtx_insn *gen_split_2082 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2082 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2082 (aarch64-sve.md:8225)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8254 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	347)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8225 */
extern rtx_insn *gen_split_2083 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2083 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2083 (aarch64-sve.md:8225)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8254 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand4,
		const0_rtx,
		operand2,
		operand3),
	347)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	copy_rtx (operand4))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8261 */
extern rtx_insn *gen_split_2084 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2084 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2084 (aarch64-sve.md:8261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8294 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx8BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	347)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_AND (VNx8BImode,
	gen_rtx_NOT (VNx8BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx8BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8261 */
extern rtx_insn *gen_split_2085 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2085 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2085 (aarch64-sve.md:8261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8294 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx4BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	347)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_AND (VNx4BImode,
	gen_rtx_NOT (VNx4BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx4BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8261 */
extern rtx_insn *gen_split_2086 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2086 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2086 (aarch64-sve.md:8261)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8294 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
  if (can_create_pseudo_p ())
    operands[5] = gen_reg_rtx (VNx2BImode);
}
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		const1_rtx,
		operand2,
		operand3),
	347)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_AND (VNx2BImode,
	gen_rtx_NOT (VNx2BImode,
	copy_rtx (operand5)),
	gen_rtx_NOT (VNx2BImode,
	operand4)),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facgevnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	338));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facgtvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	339));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_faclevnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	344));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facltvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	345));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facgevnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	338));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facgtvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	339));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_faclevnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	344));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facltvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	345));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facgevnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	338));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facgtvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	339));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_faclevnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	344));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8311 */
rtx
gen_aarch64_pred_facltvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand3),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		operand2,
		operand4),
	333)),
	345));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2087 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2087 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2087 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	338)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2088 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2088 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2088 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	339)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2089 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2089 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2089 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2090 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2090 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2090 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	345)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2091 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2091 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2091 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	338)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2092 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2092 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2092 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	339)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2093 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2093 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2093 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2094 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2094 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2094 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	345)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2095 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2095 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2095 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	338)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2096 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2096 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2096 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	339)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2097 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2097 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2097 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	344)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8330 */
extern rtx_insn *gen_split_2098 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2098 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2098 (aarch64-sve.md:8330)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8350 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[5] = copy_rtx (operands[1]);
    operands[6] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (4,
		operand1,
		operand4,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand5,
		const0_rtx,
		operand2),
	333),
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand6,
		const0_rtx,
		operand3),
	333)),
	345)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8404 */
rtx
gen_cbranchvnx16bi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ptrue = force_reg (VNx16BImode, aarch64_ptrue_all (1));
    rtx cast_ptrue = gen_lowpart (VNx16BImode, ptrue);
    rtx ptrue_flag = gen_int_mode (SVE_KNOWN_PTRUE, SImode);
    rtx pred;
    if (operands[2] == CONST0_RTX (VNx16BImode))
      pred = operands[1];
    else
      {
	pred = gen_reg_rtx (VNx16BImode);
	emit_insn (gen_aarch64_pred_xorvnx16bi_z (pred, cast_ptrue, operands[1],
						 operands[2]));
      }
    emit_insn (gen_aarch64_ptestvnx16bi (ptrue, cast_ptrue, ptrue_flag, pred));
    operands[1] = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
    operands[2] = const0_rtx;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8404 */
rtx
gen_cbranchvnx8bi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ptrue = force_reg (VNx16BImode, aarch64_ptrue_all (2));
    rtx cast_ptrue = gen_lowpart (VNx8BImode, ptrue);
    rtx ptrue_flag = gen_int_mode (SVE_KNOWN_PTRUE, SImode);
    rtx pred;
    if (operands[2] == CONST0_RTX (VNx8BImode))
      pred = operands[1];
    else
      {
	pred = gen_reg_rtx (VNx8BImode);
	emit_insn (gen_aarch64_pred_xorvnx8bi_z (pred, cast_ptrue, operands[1],
						 operands[2]));
      }
    emit_insn (gen_aarch64_ptestvnx8bi (ptrue, cast_ptrue, ptrue_flag, pred));
    operands[1] = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
    operands[2] = const0_rtx;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8404 */
rtx
gen_cbranchvnx4bi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ptrue = force_reg (VNx16BImode, aarch64_ptrue_all (4));
    rtx cast_ptrue = gen_lowpart (VNx4BImode, ptrue);
    rtx ptrue_flag = gen_int_mode (SVE_KNOWN_PTRUE, SImode);
    rtx pred;
    if (operands[2] == CONST0_RTX (VNx4BImode))
      pred = operands[1];
    else
      {
	pred = gen_reg_rtx (VNx4BImode);
	emit_insn (gen_aarch64_pred_xorvnx4bi_z (pred, cast_ptrue, operands[1],
						 operands[2]));
      }
    emit_insn (gen_aarch64_ptestvnx4bi (ptrue, cast_ptrue, ptrue_flag, pred));
    operands[1] = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
    operands[2] = const0_rtx;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8404 */
rtx
gen_cbranchvnx2bi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8413 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx ptrue = force_reg (VNx16BImode, aarch64_ptrue_all (8));
    rtx cast_ptrue = gen_lowpart (VNx2BImode, ptrue);
    rtx ptrue_flag = gen_int_mode (SVE_KNOWN_PTRUE, SImode);
    rtx pred;
    if (operands[2] == CONST0_RTX (VNx2BImode))
      pred = operands[1];
    else
      {
	pred = gen_reg_rtx (VNx2BImode);
	emit_insn (gen_aarch64_pred_xorvnx2bi_z (pred, cast_ptrue, operands[1],
						 operands[2]));
      }
    emit_insn (gen_aarch64_ptestvnx2bi (ptrue, cast_ptrue, ptrue_flag, pred));
    operands[1] = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
    operands[2] = const0_rtx;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_jump_insn (gen_rtx_SET (pc_rtx,
	gen_rtx_IF_THEN_ELSE (VOIDmode,
	gen_rtx_fmt_ee (GET_CODE (operand0), VOIDmode,
		operand1,
		operand2),
	gen_rtx_LABEL_REF (VOIDmode,
	operand3),
	pc_rtx)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8500 */
rtx
gen_reduc_plus_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_vnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8504 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx16BImode);
    rtx tmp = QImode == DImode ? operands[0] : gen_reg_rtx (DImode);
    emit_insn (gen_aarch64_pred_reduc_uadd_vnx16qi (tmp, pred, operands[1]));
    if (tmp != operands[0])
      emit_move_insn (operands[0], gen_lowpart (QImode, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8500 */
rtx
gen_reduc_plus_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_vnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8504 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx8BImode);
    rtx tmp = HImode == DImode ? operands[0] : gen_reg_rtx (DImode);
    emit_insn (gen_aarch64_pred_reduc_uadd_vnx8hi (tmp, pred, operands[1]));
    if (tmp != operands[0])
      emit_move_insn (operands[0], gen_lowpart (HImode, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8500 */
rtx
gen_reduc_plus_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_vnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8504 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx4BImode);
    rtx tmp = SImode == DImode ? operands[0] : gen_reg_rtx (DImode);
    emit_insn (gen_aarch64_pred_reduc_uadd_vnx4si (tmp, pred, operands[1]));
    if (tmp != operands[0])
      emit_move_insn (operands[0], gen_lowpart (SImode, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8500 */
rtx
gen_reduc_plus_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_vnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8504 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    rtx pred = aarch64_ptrue_reg (VNx2BImode);
    rtx tmp = DImode == DImode ? operands[0] : gen_reg_rtx (DImode);
    emit_insn (gen_aarch64_pred_reduc_uadd_vnx2di (tmp, pred, operands[1]));
    if (tmp != operands[0])
      emit_move_insn (operands[0], gen_lowpart (DImode, tmp));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit (operand1, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_and_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_and_scal_vnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	294)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_ior_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_ior_scal_vnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	295)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smax_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	177)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smin_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	178)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umax_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	179)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umin_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	180)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_xor_scal_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_xor_scal_vnx16qi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (QImode,
	gen_rtvec (2,
		operand2,
		operand1),
	296)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_and_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_and_scal_vnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	294)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_ior_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_ior_scal_vnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	295)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smax_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	177)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smin_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	178)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umax_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	179)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umin_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	180)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_xor_scal_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_xor_scal_vnx8hi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HImode,
	gen_rtvec (2,
		operand2,
		operand1),
	296)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_and_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_and_scal_vnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	294)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_ior_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_ior_scal_vnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	295)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smax_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	177)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smin_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	178)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umax_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	179)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umin_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	180)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_xor_scal_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_xor_scal_vnx4si cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (2,
		operand2,
		operand1),
	296)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_and_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_and_scal_vnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	294)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_ior_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_ior_scal_vnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	295)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smax_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	177)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_smin_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	178)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umax_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	179)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_umin_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	180)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8525 */
rtx
gen_reduc_xor_scal_vnx2di (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_xor_scal_vnx2di cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8531 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DImode,
	gen_rtvec (2,
		operand2,
		operand1),
	296)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_plus_scal_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_vnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	173)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smax_nan_scal_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	169)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smax_scal_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	168)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smin_nan_scal_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	172)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smin_scal_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	171)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_plus_scal_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_vnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	173)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smax_nan_scal_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	169)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smax_scal_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	168)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smin_nan_scal_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	172)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smin_scal_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	171)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_plus_scal_vnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_plus_scal_vnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	173)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smax_nan_scal_vnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	169)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smax_scal_vnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	168)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smin_nan_scal_vnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	172)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8558 */
rtx
gen_reduc_smin_scal_vnx2df (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (2,
		operand2,
		operand1),
	171)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8569 */
rtx
gen_reduc_fmax_scal_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_vnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_reduc_smax_scal_vnx8hf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8569 */
rtx
gen_reduc_fmin_scal_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_vnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_reduc_smin_scal_vnx8hf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (HFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8569 */
rtx
gen_reduc_fmax_scal_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_vnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_reduc_smax_scal_vnx4sf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8569 */
rtx
gen_reduc_fmin_scal_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_vnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_reduc_smin_scal_vnx4sf (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (SFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8569 */
rtx
gen_reduc_fmax_scal_vnx2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmax_scal_vnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_reduc_smax_scal_vnx2df (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	168));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8569 */
rtx
gen_reduc_fmin_scal_vnx2df (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL _Pragma ("GCC error \"reduc_fmin_scal_vnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8574 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn (gen_reduc_smin_scal_vnx2df (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (DFmode,
	gen_rtvec (1,
		operand1),
	171));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8598 */
rtx
gen_fold_left_plus_vnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fold_left_plus_vnx8hf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (HFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	142)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8598 */
rtx
gen_fold_left_plus_vnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fold_left_plus_vnx4sf cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (SFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	142)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8598 */
rtx
gen_fold_left_plus_vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"fold_left_plus_vnx2df cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8605 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (DFmode,
	gen_rtvec (3,
		operand3,
		operand1,
		operand2),
	142)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8632 */
rtx
gen_vec_permvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8638 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    aarch64_expand_sve_vec_perm (operands[0], operands[1],
				 operands[2], operands[3]);
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit (operand0, true);
  emit (operand1, true);
  emit (operand2, true);
  emit (operand3, false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacks_hi_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_sunpkhi_vnx16qi
		: gen_aarch64_sve_sunpklo_vnx16qi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	122));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacku_hi_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_uunpkhi_vnx16qi
		: gen_aarch64_sve_uunpklo_vnx16qi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacks_lo_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_sunpkhi_vnx16qi
		: gen_aarch64_sve_sunpklo_vnx16qi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	124));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacku_lo_vnx16qi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_uunpkhi_vnx16qi
		: gen_aarch64_sve_uunpklo_vnx16qi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacks_hi_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_sunpkhi_vnx8hi
		: gen_aarch64_sve_sunpklo_vnx8hi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	122));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacku_hi_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_uunpkhi_vnx8hi
		: gen_aarch64_sve_uunpklo_vnx8hi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacks_lo_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_sunpkhi_vnx8hi
		: gen_aarch64_sve_sunpklo_vnx8hi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	124));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacku_lo_vnx8hi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_uunpkhi_vnx8hi
		: gen_aarch64_sve_uunpklo_vnx8hi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacks_hi_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_sunpkhi_vnx4si
		: gen_aarch64_sve_sunpklo_vnx4si)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	122));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacku_hi_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_uunpkhi_vnx4si
		: gen_aarch64_sve_uunpklo_vnx4si)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacks_lo_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_sunpkhi_vnx4si
		: gen_aarch64_sve_sunpklo_vnx4si)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	124));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8892 */
rtx
gen_vec_unpacku_lo_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8897 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_uunpkhi_vnx4si
		: gen_aarch64_sve_uunpklo_vnx4si)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8925 */
rtx
gen_fix_truncvnx8hfvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	349)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8925 */
rtx
gen_fixuns_truncvnx8hfvnx8hi2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	350)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8925 */
rtx
gen_fix_truncvnx4sfvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	349)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8925 */
rtx
gen_fixuns_truncvnx4sfvnx4si2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	350)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8925 */
rtx
gen_fix_truncvnx2dfvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	349)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8925 */
rtx
gen_fixuns_truncvnx2dfvnx2di2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 8933 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	350)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fix_trunc_nontruncvnx8hfvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	349),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fixuns_trunc_nontruncvnx8hfvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	350),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fix_trunc_nontruncvnx8hfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	349),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fixuns_trunc_nontruncvnx8hfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	350),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fix_trunc_nontruncvnx4sfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	349),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fixuns_trunc_nontruncvnx4sfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	350),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fix_trunc_nontruncvnx8hfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	349),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fixuns_trunc_nontruncvnx8hfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	350),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fix_trunc_nontruncvnx4sfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	349),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fixuns_trunc_nontruncvnx4sfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	350),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fix_trunc_nontruncvnx2dfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	349),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8970 */
rtx
gen_cond_fixuns_trunc_nontruncvnx2dfvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	350),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2099 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2099 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2099 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	349),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2100 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2100 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2100 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	350),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2101 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2101 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2101 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	349),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2102 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2102 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2102 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	350),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2103 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2103 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2103 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	349),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2104 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2104 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2104 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	350),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2105 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2105 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2105 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	349),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2106 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2106 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2106 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	350),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2107 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2107 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2107 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	349),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2108 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2108 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2108 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	350),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2109 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2109 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2109 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	349),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:8989 */
extern rtx_insn *gen_split_2110 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2110 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2110 (aarch64-sve.md:8989)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9006 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	350),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9032 */
rtx
gen_cond_fix_trunc_truncvnx2dfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	349),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9032 */
rtx
gen_cond_fixuns_trunc_truncvnx2dfvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	350),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9072 */
rtx
gen_vec_pack_sfix_trunc_vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9088 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
    operands[4] = gen_reg_rtx (VNx4SImode);
    operands[5] = gen_reg_rtx (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand1),
	349)));
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		copy_rtx (operand3),
		const0_rtx,
		operand2),
	349)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		copy_rtx (operand5)),
	233)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9072 */
rtx
gen_vec_pack_ufix_trunc_vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9088 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
    operands[4] = gen_reg_rtx (VNx4SImode);
    operands[5] = gen_reg_rtx (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand1),
	350)));
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		copy_rtx (operand3),
		const0_rtx,
		operand2),
	350)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		copy_rtx (operand5)),
	233)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9111 */
rtx
gen_floatvnx8hivnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	374)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9111 */
rtx
gen_floatunsvnx8hivnx8hf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	375)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9111 */
rtx
gen_floatvnx4sivnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	374)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9111 */
rtx
gen_floatunsvnx4sivnx4sf2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	375)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9111 */
rtx
gen_floatvnx2divnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	374)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9111 */
rtx
gen_floatunsvnx2divnx2df2 (rtx operand0,
	rtx operand1)
{
  rtx operand2;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9119 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[2] = aarch64_ptrue_reg (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand2,
		const0_rtx,
		operand1),
	375)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_float_nonextendvnx8hivnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	374),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_floatuns_nonextendvnx8hivnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	375),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_float_nonextendvnx4sivnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	374),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_floatuns_nonextendvnx4sivnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	375),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_float_nonextendvnx4sivnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	374),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_floatuns_nonextendvnx4sivnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	375),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_float_nonextendvnx2divnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	374),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_floatuns_nonextendvnx2divnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	375),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_float_nonextendvnx2divnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	374),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_floatuns_nonextendvnx2divnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	375),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_float_nonextendvnx2divnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	374),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9157 */
rtx
gen_cond_floatuns_nonextendvnx2divnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	375),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2111 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2111 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2111 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	374),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2112 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2112 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2112 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	375),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2113 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2113 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2113 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	374),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2114 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2114 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2114 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	375),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2115 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2115 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2115 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	374),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2116 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2116 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2116 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	375),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2117 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2117 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2117 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	374),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2118 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2118 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2118 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	375),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2119 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2119 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2119 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	374),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2120 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2120 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2120 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	375),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2121 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2121 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2121 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	374),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9176 */
extern rtx_insn *gen_split_2122 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2122 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2122 (aarch64-sve.md:9176)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9193 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	375),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9219 */
rtx
gen_cond_float_extendvnx4sivnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	374),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9219 */
rtx
gen_cond_floatuns_extendvnx4sivnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	375),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9267 */
rtx
gen_vec_unpacks_float_lo_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx4SImode);
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx4si
		: gen_aarch64_sve_zip1vnx4si)
	       (temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_float_extendvnx4sivnx2df
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_FLOAT (VNx2DFmode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	125)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9267 */
rtx
gen_vec_unpacks_float_hi_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx4SImode);
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx4si
		: gen_aarch64_sve_zip1vnx4si)
	       (temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_float_extendvnx4sivnx2df
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_FLOAT (VNx2DFmode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	123)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9267 */
rtx
gen_vec_unpacku_float_lo_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx4SImode);
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx4si
		: gen_aarch64_sve_zip1vnx4si)
	       (temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_floatuns_extendvnx4sivnx2df
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSIGNED_FLOAT (VNx2DFmode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	125)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9267 */
rtx
gen_vec_unpacku_float_hi_vnx4si (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx4SImode);
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx4si
		: gen_aarch64_sve_zip1vnx4si)
	       (temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_floatuns_extendvnx4sivnx2df
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSIGNED_FLOAT (VNx2DFmode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (1,
		operand1),
	123)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9300 */
rtx
gen_vec_pack_trunc_vnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);
    operands[4] = gen_reg_rtx (VNx8HFmode);
    operands[5] = gen_reg_rtx (VNx8HFmode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand1),
	348)));
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		copy_rtx (operand3),
		const0_rtx,
		operand2),
	348)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (2,
		copy_rtx (operand4),
		copy_rtx (operand5)),
	233)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9300 */
rtx
gen_vec_pack_trunc_vnx2df (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9316 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = aarch64_ptrue_reg (VNx2BImode);
    operands[4] = gen_reg_rtx (VNx4SFmode);
    operands[5] = gen_reg_rtx (VNx4SFmode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand4,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand3,
		const0_rtx,
		operand1),
	348)));
  emit_insn (gen_rtx_SET (operand5,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		copy_rtx (operand3),
		const0_rtx,
		operand2),
	348)));
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (2,
		copy_rtx (operand4),
		copy_rtx (operand5)),
	233)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9339 */
rtx
gen_cond_fcvt_truncvnx4sfvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	348),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9339 */
rtx
gen_cond_fcvt_truncvnx2dfvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	348),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9339 */
rtx
gen_cond_fcvt_truncvnx2dfvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	348),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9396 */
rtx
gen_cond_fcvt_truncvnx4sfvnx8bf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8BFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	348),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9456 */
rtx
gen_vec_unpacks_lo_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9462 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx8HFmode);
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx8hf
		: gen_aarch64_sve_zip1vnx8hf)
		(temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_fcvt_nontruncvnx8hfvnx4sf
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9456 */
rtx
gen_vec_unpacks_hi_vnx8hf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9462 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx8HFmode);
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx8hf
		: gen_aarch64_sve_zip1vnx8hf)
		(temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx4BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_fcvt_nontruncvnx8hfvnx4sf
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8HFmode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9456 */
rtx
gen_vec_unpacks_lo_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9462 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx4SFmode);
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx4sf
		: gen_aarch64_sve_zip1vnx4sf)
		(temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_fcvt_nontruncvnx4sfvnx2df
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9456 */
rtx
gen_vec_unpacks_hi_vnx4sf (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9462 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    /* Use ZIP to do the unpack, since we don't care about the upper halves
       and since it has the nice property of not needing any subregs.
       If using UUNPK* turns out to be preferable, we could model it as
       a ZIP whose first operand is zero.  */
    rtx temp = gen_reg_rtx (VNx4SFmode);
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_zip2vnx4sf
		: gen_aarch64_sve_zip1vnx4sf)
		(temp, operands[1], operands[1]));
    rtx ptrue = aarch64_ptrue_reg (VNx2BImode);
    rtx strictness = gen_int_mode (SVE_RELAXED_GP, SImode);
    emit_insn (gen_aarch64_sve_fcvt_nontruncvnx4sfvnx2df
	       (operands[0], ptrue, temp, strictness));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9496 */
rtx
gen_cond_fcvt_nontruncvnx8hfvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	348),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9496 */
rtx
gen_cond_fcvt_nontruncvnx8hfvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	348),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9496 */
rtx
gen_cond_fcvt_nontruncvnx4sfvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	348),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacks_hi_vnx16bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx16bi
		: gen_aarch64_sve_punpklo_vnx16bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (1,
		operand1),
	122));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacku_hi_vnx16bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx16bi
		: gen_aarch64_sve_punpklo_vnx16bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacks_lo_vnx16bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx16bi
		: gen_aarch64_sve_punpklo_vnx16bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (1,
		operand1),
	124));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacku_lo_vnx16bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx16bi
		: gen_aarch64_sve_punpklo_vnx16bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacks_hi_vnx8bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx8bi
		: gen_aarch64_sve_punpklo_vnx8bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (1,
		operand1),
	122));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacku_hi_vnx8bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx8bi
		: gen_aarch64_sve_punpklo_vnx8bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacks_lo_vnx8bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx8bi
		: gen_aarch64_sve_punpklo_vnx8bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (1,
		operand1),
	124));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacku_lo_vnx8bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx8bi
		: gen_aarch64_sve_punpklo_vnx8bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacks_hi_vnx4bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx4bi
		: gen_aarch64_sve_punpklo_vnx4bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (1,
		operand1),
	122));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacku_hi_vnx4bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((!BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx4bi
		: gen_aarch64_sve_punpklo_vnx4bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (1,
		operand1),
	123));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacks_lo_vnx4bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx4bi
		: gen_aarch64_sve_punpklo_vnx4bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (1,
		operand1),
	124));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9559 */
rtx
gen_vec_unpacku_lo_vnx4bi (rtx operand0,
	rtx operand1)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[2];
    operands[0] = operand0;
    operands[1] = operand1;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9564 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    emit_insn ((BYTES_BIG_ENDIAN
		? gen_aarch64_sve_punpkhi_vnx4bi
		: gen_aarch64_sve_punpklo_vnx4bi)
	       (operands[0], operands[1]));
    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (1,
		operand1),
	125));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9742 */
extern rtx_insn *gen_split_2123 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2123 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2123 (aarch64-sve.md:9742)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	289)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	289)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9742 */
extern rtx_insn *gen_split_2124 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2124 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2124 (aarch64-sve.md:9742)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	290)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9742 */
extern rtx_insn *gen_split_2125 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2125 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2125 (aarch64-sve.md:9742)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	290)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9742 */
extern rtx_insn *gen_split_2126 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2126 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2126 (aarch64-sve.md:9742)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		copy_rtx (operand4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	290)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9742 */
extern rtx_insn *gen_split_2127 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2127 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2127 (aarch64-sve.md:9742)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9765 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		copy_rtx (operand4),
		copy_rtx (operand5),
		copy_rtx (operand6)),
	290)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9772 */
extern rtx_insn *gen_split_2128 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2128 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2128 (aarch64-sve.md:9772)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9790 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	289)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9772 */
extern rtx_insn *gen_split_2129 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2129 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2129 (aarch64-sve.md:9772)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9790 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9772 */
extern rtx_insn *gen_split_2130 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2130 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2130 (aarch64-sve.md:9772)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9790 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9772 */
extern rtx_insn *gen_split_2131 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2131 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2131 (aarch64-sve.md:9772)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9790 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx4BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9772 */
extern rtx_insn *gen_split_2132 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2132 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2132 (aarch64-sve.md:9772)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 9790 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = operands[2];
    operands[5] = operands[3];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_UNSPEC (VNx2BImode,
	gen_rtvec (3,
		operand4,
		operand5,
		operand6),
	290)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9945 */
rtx
gen_aarch64_sve_incvnx8hi_pat (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9945 */
rtx
gen_aarch64_sve_sqincvnx8hi_pat (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:9945 */
rtx
gen_aarch64_sve_uqincvnx8hi_pat (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154))),
	operand1));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10095 */
rtx
gen_aarch64_sve_decvnx8hi_pat (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10095 */
rtx
gen_aarch64_sve_sqdecvnx8hi_pat (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10095 */
rtx
gen_aarch64_sve_uqdecvnx8hi_pat (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  return gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand2,
		operand3,
		operand4),
	154)))));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_incdivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_sqincdivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_uqincdivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_incdivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_sqincdivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_uqincdivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_incdivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_sqincdivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_uqincdivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_incdivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_sqincdivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10158 */
rtx
gen_aarch64_sve_uqincdivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10168 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2133 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2133 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2133 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2134 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2134 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2134 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2135 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2135 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2135 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2136 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2136 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2136 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2137 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2137 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2137 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2138 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2138 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2138 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2139 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2139 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2139 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2140 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2140 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2140 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2141 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2141 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2141 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2142 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2142 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2142 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2143 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2143 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2143 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10173 */
extern rtx_insn *gen_split_2144 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2144 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2144 (aarch64-sve.md:10173)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10193 */
extern rtx_insn *gen_split_2145 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2145 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2145 (aarch64-sve.md:10193)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10193 */
extern rtx_insn *gen_split_2146 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2146 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2146 (aarch64-sve.md:10193)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10193 */
extern rtx_insn *gen_split_2147 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2147 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2147 (aarch64-sve.md:10193)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10193 */
extern rtx_insn *gen_split_2148 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2148 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2148 (aarch64-sve.md:10193)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10204 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_sqincsivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_uqincsivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_sqincsivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_uqincsivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_sqincsivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_uqincsivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_sqincsivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10213 */
rtx
gen_aarch64_sve_uqincsivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10223 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2149 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2149 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2149 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2150 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2150 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2150 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2151 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2151 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2151 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2152 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2152 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2152 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2153 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2153 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2153 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2154 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2154 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2154 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2155 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2155 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2155 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10228 */
extern rtx_insn *gen_split_2156 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2156 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2156 (aarch64-sve.md:10228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_PLUS (SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291),
	operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10261 */
rtx
gen_aarch64_sve_incvnx2di_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10261 */
rtx
gen_aarch64_sve_sqincvnx2di_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10261 */
rtx
gen_aarch64_sve_uqincvnx2di_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10273 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10278 */
extern rtx_insn *gen_split_2157 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2157 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2157 (aarch64-sve.md:10278)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10294 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10278 */
extern rtx_insn *gen_split_2158 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2158 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2158 (aarch64-sve.md:10278)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10294 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10278 */
extern rtx_insn *gen_split_2159 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2159 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2159 (aarch64-sve.md:10278)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10294 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx2DImode,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10302 */
rtx
gen_aarch64_sve_incvnx4si_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10302 */
rtx
gen_aarch64_sve_sqincvnx4si_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10302 */
rtx
gen_aarch64_sve_uqincvnx4si_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10313 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10318 */
extern rtx_insn *gen_split_2160 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2160 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2160 (aarch64-sve.md:10318)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10333 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10318 */
extern rtx_insn *gen_split_2161 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2161 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2161 (aarch64-sve.md:10318)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10333 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10318 */
extern rtx_insn *gen_split_2162 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2162 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2162 (aarch64-sve.md:10318)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10333 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx4SImode,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10341 */
rtx
gen_aarch64_sve_incvnx8hi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10341 */
rtx
gen_aarch64_sve_sqincvnx8hi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10341 */
rtx
gen_aarch64_sve_uqincvnx8hi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10353 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10358 */
extern rtx_insn *gen_split_2163 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2163 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2163 (aarch64-sve.md:10358)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10374 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_fmt_e (GET_CODE (operand3), GET_MODE (operand3),
		NULL_RTX)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10358 */
extern rtx_insn *gen_split_2164 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2164 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2164 (aarch64-sve.md:10358)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10374 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_fmt_e (GET_CODE (operand3), GET_MODE (operand3),
		NULL_RTX)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10358 */
extern rtx_insn *gen_split_2165 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2165 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2165 (aarch64-sve.md:10358)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10374 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_PLUS (VNx8HImode,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_fmt_e (GET_CODE (operand3), GET_MODE (operand3),
		NULL_RTX)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_decdivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_sqdecdivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_uqdecdivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_decdivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_sqdecdivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_uqdecdivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_decdivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_sqdecdivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_uqdecdivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_decdivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_sqdecdivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10391 */
rtx
gen_aarch64_sve_uqdecdivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10401 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2166 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2166 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2166 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2167 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2167 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2167 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2168 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2168 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2168 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2169 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2169 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2169 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2170 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2170 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2170 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2171 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2171 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2171 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2172 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2172 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2172 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2173 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2173 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2173 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2174 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2174 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2174 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2175 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2175 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2175 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2176 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2176 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2176 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10406 */
extern rtx_insn *gen_split_2177 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2177 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2177 (aarch64-sve.md:10406)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10418 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (DImode,
	operand1,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10426 */
extern rtx_insn *gen_split_2178 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2178 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2178 (aarch64-sve.md:10426)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10437 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10426 */
extern rtx_insn *gen_split_2179 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2179 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2179 (aarch64-sve.md:10426)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10437 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10426 */
extern rtx_insn *gen_split_2180 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2180 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2180 (aarch64-sve.md:10426)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10437 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10426 */
extern rtx_insn *gen_split_2181 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2181 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2181 (aarch64-sve.md:10426)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10437 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_sqdecsivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_uqdecsivnx16bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_sqdecsivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_uqdecsivnx8bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_sqdecsivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_uqdecsivnx4bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_sqdecsivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10446 */
rtx
gen_aarch64_sve_uqdecsivnx2bi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10456 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2182 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2182 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2182 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2183 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2183 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2183 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2184 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2184 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2184 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2185 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2185 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2185 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2186 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2186 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2186 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2187 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2187 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2187 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2188 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2188 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2188 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SIGN_EXTEND (DImode,
	gen_rtx_SS_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10461 */
extern rtx_insn *gen_split_2189 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2189 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2189 (aarch64-sve.md:10461)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10478 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_US_MINUS (SImode,
	operand1,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10494 */
rtx
gen_aarch64_sve_decvnx2di_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10506 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10494 */
rtx
gen_aarch64_sve_sqdecvnx2di_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10506 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10494 */
rtx
gen_aarch64_sve_uqdecvnx2di_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10506 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10511 */
extern rtx_insn *gen_split_2190 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2190 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2190 (aarch64-sve.md:10511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10527 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10511 */
extern rtx_insn *gen_split_2191 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2191 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2191 (aarch64-sve.md:10511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10527 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10511 */
extern rtx_insn *gen_split_2192 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2192 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2192 (aarch64-sve.md:10511)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10527 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx2DImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx2DImode,
	gen_rtx_ZERO_EXTEND (DImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10535 */
rtx
gen_aarch64_sve_decvnx4si_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10546 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10535 */
rtx
gen_aarch64_sve_sqdecvnx4si_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10546 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10535 */
rtx
gen_aarch64_sve_uqdecvnx4si_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10546 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10551 */
extern rtx_insn *gen_split_2193 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2193 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2193 (aarch64-sve.md:10551)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10566 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10551 */
extern rtx_insn *gen_split_2194 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2194 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2194 (aarch64-sve.md:10551)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10566 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10551 */
extern rtx_insn *gen_split_2195 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2195 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2195 (aarch64-sve.md:10551)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10566 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx4SImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx4SImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10574 */
rtx
gen_aarch64_sve_decvnx8hi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10574 */
rtx
gen_aarch64_sve_sqdecvnx8hi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10574 */
rtx
gen_aarch64_sve_uqdecvnx8hi_cntp (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10586 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_TRUNCATE (HImode,
	gen_rtx_UNSPEC (SImode,
	gen_rtvec (3,
		operand3,
		const1_rtx,
		operand2),
	291))))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10591 */
extern rtx_insn *gen_split_2196 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2196 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2196 (aarch64-sve.md:10591)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10607 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_fmt_e (GET_CODE (operand3), GET_MODE (operand3),
		NULL_RTX)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10591 */
extern rtx_insn *gen_split_2197 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2197 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2197 (aarch64-sve.md:10591)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10607 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_SS_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_fmt_e (GET_CODE (operand3), GET_MODE (operand3),
		NULL_RTX)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md:10591 */
extern rtx_insn *gen_split_2198 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2198 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2198 (aarch64-sve.md:10591)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 10607 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_US_MINUS (VNx8HImode,
	operand1,
	gen_rtx_VEC_DUPLICATE (VNx8HImode,
	gen_rtx_fmt_e (GET_CODE (operand3), GET_MODE (operand3),
		NULL_RTX)))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2199 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2199 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2199 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2200 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2200 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2200 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2201 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2201 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2201 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2202 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2202 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2202 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2QImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2203 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2203 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2203 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2204 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2204 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2204 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2205 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2205 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2205 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2206 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2206 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2206 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2HImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2207 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2207 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2207 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SIGN_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:119 */
extern rtx_insn *gen_split_2208 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2208 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2208 (aarch64-sve2.md:119)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 137 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ZERO_EXTEND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2SImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		gen_rtx_MEM (BLKmode,
	gen_rtx_SCRATCH (VOIDmode))),
	115))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_smulhsvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);

    rtx prod_b = gen_reg_rtx (VNx8HImode);
    rtx prod_t = gen_reg_rtx (VNx8HImode);
    emit_insn (gen_aarch64_sve_smullbvnx8hi (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_smulltvnx8hi (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx16QImode) - 1);
    emit_insn (gen_aarch64_sve_shrnbvnx8hi (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_shrntvnx8hi (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	460)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_umulhsvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);

    rtx prod_b = gen_reg_rtx (VNx8HImode);
    rtx prod_t = gen_reg_rtx (VNx8HImode);
    emit_insn (gen_aarch64_sve_umullbvnx8hi (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_umulltvnx8hi (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx16QImode) - 1);
    emit_insn (gen_aarch64_sve_shrnbvnx8hi (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_shrntvnx8hi (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	505)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_smulhrsvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);

    rtx prod_b = gen_reg_rtx (VNx8HImode);
    rtx prod_t = gen_reg_rtx (VNx8HImode);
    emit_insn (gen_aarch64_sve_smullbvnx8hi (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_smulltvnx8hi (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx16QImode) - 1);
    emit_insn (gen_aarch64_sve_rshrnbvnx8hi (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_rshrntvnx8hi (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	459)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_umulhrsvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx16BImode);

    rtx prod_b = gen_reg_rtx (VNx8HImode);
    rtx prod_t = gen_reg_rtx (VNx8HImode);
    emit_insn (gen_aarch64_sve_umullbvnx8hi (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_umulltvnx8hi (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx16QImode) - 1);
    emit_insn (gen_aarch64_sve_rshrnbvnx8hi (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_rshrntvnx8hi (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	504)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_smulhsvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);

    rtx prod_b = gen_reg_rtx (VNx4SImode);
    rtx prod_t = gen_reg_rtx (VNx4SImode);
    emit_insn (gen_aarch64_sve_smullbvnx4si (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_smulltvnx4si (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx8HImode) - 1);
    emit_insn (gen_aarch64_sve_shrnbvnx4si (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_shrntvnx4si (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	460)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_umulhsvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);

    rtx prod_b = gen_reg_rtx (VNx4SImode);
    rtx prod_t = gen_reg_rtx (VNx4SImode);
    emit_insn (gen_aarch64_sve_umullbvnx4si (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_umulltvnx4si (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx8HImode) - 1);
    emit_insn (gen_aarch64_sve_shrnbvnx4si (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_shrntvnx4si (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	505)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_smulhrsvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);

    rtx prod_b = gen_reg_rtx (VNx4SImode);
    rtx prod_t = gen_reg_rtx (VNx4SImode);
    emit_insn (gen_aarch64_sve_smullbvnx4si (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_smulltvnx4si (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx8HImode) - 1);
    emit_insn (gen_aarch64_sve_rshrnbvnx4si (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_rshrntvnx4si (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	459)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_umulhrsvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx8BImode);

    rtx prod_b = gen_reg_rtx (VNx4SImode);
    rtx prod_t = gen_reg_rtx (VNx4SImode);
    emit_insn (gen_aarch64_sve_umullbvnx4si (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_umulltvnx4si (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx8HImode) - 1);
    emit_insn (gen_aarch64_sve_rshrnbvnx4si (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_rshrntvnx4si (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	504)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_smulhsvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);

    rtx prod_b = gen_reg_rtx (VNx2DImode);
    rtx prod_t = gen_reg_rtx (VNx2DImode);
    emit_insn (gen_aarch64_sve_smullbvnx2di (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_smulltvnx2di (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx4SImode) - 1);
    emit_insn (gen_aarch64_sve_shrnbvnx2di (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_shrntvnx2di (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	460)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_umulhsvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);

    rtx prod_b = gen_reg_rtx (VNx2DImode);
    rtx prod_t = gen_reg_rtx (VNx2DImode);
    emit_insn (gen_aarch64_sve_umullbvnx2di (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_umulltvnx2di (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx4SImode) - 1);
    emit_insn (gen_aarch64_sve_shrnbvnx2di (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_shrntvnx2di (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	505)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_smulhrsvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);

    rtx prod_b = gen_reg_rtx (VNx2DImode);
    rtx prod_t = gen_reg_rtx (VNx2DImode);
    emit_insn (gen_aarch64_sve_smullbvnx2di (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_smulltvnx2di (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx4SImode) - 1);
    emit_insn (gen_aarch64_sve_rshrnbvnx2di (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_rshrntvnx2di (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	459)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:215 */
rtx
gen_umulhrsvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 225 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = aarch64_ptrue_reg (VNx4BImode);

    rtx prod_b = gen_reg_rtx (VNx2DImode);
    rtx prod_t = gen_reg_rtx (VNx2DImode);
    emit_insn (gen_aarch64_sve_umullbvnx2di (prod_b, operands[1],
						 operands[2]));
    emit_insn (gen_aarch64_sve_umulltvnx2di (prod_t, operands[1],
						 operands[2]));

    rtx shift = GEN_INT (GET_MODE_UNIT_BITSIZE (VNx4SImode) - 1);
    emit_insn (gen_aarch64_sve_rshrnbvnx2di (operands[0], prod_b, shift));
    emit_insn (gen_aarch64_sve_rshrntvnx2di (operands[0], operands[0],
						prod_t, shift));

    DONE;
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	504)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_avgvnx16qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx16BImode, CONSTM1_RTX (VNx16BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_uavgvnx16qi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx16BImode, CONSTM1_RTX (VNx16BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_avgvnx8hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx8BImode, CONSTM1_RTX (VNx8BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_uavgvnx8hi3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx8BImode, CONSTM1_RTX (VNx8BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_avgvnx4si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx4BImode, CONSTM1_RTX (VNx4BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_uavgvnx4si3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx4BImode, CONSTM1_RTX (VNx4BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_avgvnx2di3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx2BImode, CONSTM1_RTX (VNx2BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	181)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:269 */
rtx
gen_uavgvnx2di3_floor (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 279 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx2BImode, CONSTM1_RTX (VNx2BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	182)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_avgvnx16qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx16BImode, CONSTM1_RTX (VNx16BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_uavgvnx16qi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx16BImode, CONSTM1_RTX (VNx16BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_avgvnx8hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx8BImode, CONSTM1_RTX (VNx8BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_uavgvnx8hi3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx8BImode, CONSTM1_RTX (VNx8BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_avgvnx4si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx4BImode, CONSTM1_RTX (VNx4BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_uavgvnx4si3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx4BImode, CONSTM1_RTX (VNx4BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_avgvnx2di3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx2BImode, CONSTM1_RTX (VNx2BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	183)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:285 */
rtx
gen_uavgvnx2di3_ceil (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx operand3;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 295 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = force_reg (VNx2BImode, CONSTM1_RTX (VNx2BImode));
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	184)),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shsubvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_sqrshlvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srhaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srshlvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_suqaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhsubvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uqrshlvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urhaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urshlvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_usqaddvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16QImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shsubvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_sqrshlvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srhaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srshlvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_suqaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhsubvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uqrshlvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urhaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urshlvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_usqaddvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8HImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shsubvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_sqrshlvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srhaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srshlvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_suqaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhsubvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uqrshlvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urhaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urshlvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_usqaddvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_shsubvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_sqrshlvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srhaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_srshlvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_suqaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uhsubvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_uqrshlvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urhaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_urshlvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:348 */
rtx
gen_cond_usqaddvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 362 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2DImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2209 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2209 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2209 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2210 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2210 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2210 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2211 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2211 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2211 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2212 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2212 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2212 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2213 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2213 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2213 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2214 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2214 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2214 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2215 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2215 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2215 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2216 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2216 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2216 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2217 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2217 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2217 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2218 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2218 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2218 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2219 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2219 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2219 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2220 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2220 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2220 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2221 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2221 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2221 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2222 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2222 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2222 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2223 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2223 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2223 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2224 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2224 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2224 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2225 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2225 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2225 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2226 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2226 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2226 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2227 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2227 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2227 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2228 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2228 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2228 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2229 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2229 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2229 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2230 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2230 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2230 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2231 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2231 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2231 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2232 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2232 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2232 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2233 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2233 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2233 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2234 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2234 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2234 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2235 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2235 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2235 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2236 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2236 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2236 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2237 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2237 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2237 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2238 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2238 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2238 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2239 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2239 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2239 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2240 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2240 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2240 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2241 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2241 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2241 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2242 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2242 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2242 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2243 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2243 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2243 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2244 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2244 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2244 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2245 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2245 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2245 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2246 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2246 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2246 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2247 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2247 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2247 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2248 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2248 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2248 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2249 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2249 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2249 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2250 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2250 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2250 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2251 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2251 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2251 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2252 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2252 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2252 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2253 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2253 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2253 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2254 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2254 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2254 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2255 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2255 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2255 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:368 */
extern rtx_insn *gen_split_2256 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2256 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2256 (aarch64-sve2.md:368)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 386 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2257 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2257 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2257 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2258 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2258 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2258 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2259 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2259 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2259 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2260 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2260 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2260 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2261 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2261 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2261 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2262 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2262 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2262 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2263 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2263 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2263 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2264 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2264 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2264 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2265 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2265 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2265 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2266 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2266 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2266 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2267 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2267 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2267 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2268 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2268 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2268 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2269 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2269 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2269 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2270 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2270 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2270 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2271 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2271 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2271 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2272 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2272 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2272 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2273 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2273 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2273 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2274 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2274 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2274 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2275 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2275 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2275 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2276 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2276 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2276 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2277 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2277 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2277 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2278 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2278 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2278 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2279 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2279 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2279 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2280 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2280 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2280 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2281 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2281 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2281 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2282 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2282 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2282 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2283 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2283 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2283 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2284 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2284 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2284 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2285 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2285 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2285 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2286 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2286 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2286 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2287 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2287 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2287 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2288 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2288 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2288 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2289 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2289 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2289 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2290 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2290 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2290 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2291 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2291 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2291 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2292 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2292 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2292 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2293 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2293 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2293 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2294 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2294 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2294 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2295 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2295 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2295 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:393 */
extern rtx_insn *gen_split_2296 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2296 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2296 (aarch64-sve2.md:393)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 411 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2297 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2297 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2297 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2298 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2298 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2298 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2299 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2299 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2299 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2300 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2300 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2300 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2301 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2301 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2301 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2302 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2302 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2302 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2303 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2303 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2303 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2304 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2304 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2304 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2305 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2305 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2305 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2306 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2306 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2306 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2307 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2307 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2307 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2308 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2308 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2308 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2309 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2309 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2309 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2310 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2310 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2310 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2311 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2311 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2311 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2312 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2312 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2312 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2313 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2313 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2313 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2314 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2314 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2314 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2315 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2315 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2315 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2316 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2316 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2316 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2317 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2317 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2317 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2318 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2318 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2318 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2319 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2319 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2319 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2320 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2320 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2320 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2321 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2321 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2321 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2322 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2322 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2322 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2323 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2323 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2323 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2324 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2324 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2324 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2325 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2325 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2325 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2326 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2326 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2326 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2327 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2327 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2327 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	181)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2328 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2328 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2328 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	185)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2329 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2329 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2329 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	217)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2330 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2330 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2330 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	183)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2331 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2331 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2331 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	215)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2332 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2332 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2332 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	182)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2333 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2333 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2333 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	186)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2334 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2334 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2334 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	218)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2335 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2335 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2335 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	184)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:418 */
extern rtx_insn *gen_split_2336 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2336 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2336 (aarch64-sve2.md:418)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 441 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	216)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2337 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2337 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2337 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2338 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2338 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2338 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2339 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2339 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2339 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2340 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2340 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2340 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2341 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2341 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2341 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2342 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2342 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2342 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2343 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2343 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2343 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	196)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:462 */
extern rtx_insn *gen_split_2344 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2344 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2344 (aarch64-sve2.md:462)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 480 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	195)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_sqshlvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_uqshlvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_sqshlvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_uqshlvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_sqshlvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_uqshlvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_sqshlvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:548 */
rtx
gen_cond_uqshlvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx operand5;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[6];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 562 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
    operand5 = operands[5];
    (void) operand5;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2345 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2345 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2345 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2346 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2346 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2346 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2347 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2347 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2347 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2348 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2348 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2348 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2349 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2349 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2349 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2350 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2350 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2350 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2351 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2351 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2351 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:568 */
extern rtx_insn *gen_split_2352 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2352 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2352 (aarch64-sve2.md:568)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 588 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2353 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2353 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2353 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2354 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2354 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2354 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2355 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2355 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2355 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2356 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2356 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2356 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2357 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2357 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2357 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2358 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2358 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2358 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2359 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2359 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2359 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:595 */
extern rtx_insn *gen_split_2360 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2360 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2360 (aarch64-sve2.md:595)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 613 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		copy_rtx (operand3)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2361 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2361 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2361 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2362 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2362 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2362 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx16QImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx16qivnx16bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx16BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2363 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2363 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2363 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2364 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2364 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2364 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx8HImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx8hivnx8bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx8BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2365 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2365 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2365 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2366 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2366 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2366 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx4SImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx4sivnx4bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx4BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2367 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2367 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2367 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	205)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:620 */
extern rtx_insn *gen_split_2368 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2368 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2368 (aarch64-sve2.md:620)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 647 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    if (reload_completed
        && register_operand (operands[4], VNx2DImode)
        && !rtx_equal_p (operands[0], operands[4]))
      {
	emit_insn (gen_vcond_mask_vnx2divnx2bi (operands[0], operands[2],
						 operands[4], operands[1]));
	operands[4] = operands[2] = operands[0];
      }
    else if (!CONSTANT_P (operands[5]))
      operands[5] = CONSTM1_RTX (VNx2BImode);
    else
      FAIL;
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand5,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	206)),
	118),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:789 */
rtx
gen_aarch64_sve2_bcaxvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 801 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:789 */
rtx
gen_aarch64_sve2_bcaxvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 801 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:789 */
rtx
gen_aarch64_sve2_bcaxvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 801 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:789 */
rtx
gen_aarch64_sve2_bcaxvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 801 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:806 */
extern rtx_insn *gen_split_2369 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2369 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2369 (aarch64-sve2.md:806)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:806 */
extern rtx_insn *gen_split_2370 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2370 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2370 (aarch64-sve2.md:806)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:806 */
extern rtx_insn *gen_split_2371 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2371 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2371 (aarch64-sve2.md:806)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:806 */
extern rtx_insn *gen_split_2372 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2372 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2372 (aarch64-sve2.md:806)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 822 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	operand3)),
	118),
	operand2),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:846 */
extern rtx_insn *gen_split_2373 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2373 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2373 (aarch64-sve2.md:846)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	operand1),
	gen_rtx_NOT (VNx16QImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:846 */
extern rtx_insn *gen_split_2374 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2374 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2374 (aarch64-sve2.md:846)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	operand1),
	gen_rtx_NOT (VNx8HImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:846 */
extern rtx_insn *gen_split_2375 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2375 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2375 (aarch64-sve2.md:846)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	operand1),
	gen_rtx_NOT (VNx4SImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:846 */
extern rtx_insn *gen_split_2376 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2376 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2376 (aarch64-sve2.md:846)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 861 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	operand1),
	gen_rtx_NOT (VNx2DImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:868 */
extern rtx_insn *gen_split_2377 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2377 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2377 (aarch64-sve2.md:868)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_IOR (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	operand1),
	gen_rtx_NOT (VNx16QImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:868 */
extern rtx_insn *gen_split_2378 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2378 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2378 (aarch64-sve2.md:868)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_IOR (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	operand1),
	gen_rtx_NOT (VNx8HImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:868 */
extern rtx_insn *gen_split_2379 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2379 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2379 (aarch64-sve2.md:868)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_IOR (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	operand1),
	gen_rtx_NOT (VNx4SImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:868 */
extern rtx_insn *gen_split_2380 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2380 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2380 (aarch64-sve2.md:868)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[3] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand3,
		gen_rtx_IOR (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	operand1),
	gen_rtx_NOT (VNx2DImode,
	operand2))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:891 */
rtx
gen_aarch64_sve2_bslvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2),
	operand3),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:891 */
rtx
gen_aarch64_sve2_bslvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2),
	operand3),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:891 */
rtx
gen_aarch64_sve2_bslvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2),
	operand3),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:891 */
rtx
gen_aarch64_sve2_bslvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2),
	operand3),
	operand2));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:921 */
rtx
gen_aarch64_sve2_nbslvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 935 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:921 */
rtx
gen_aarch64_sve2_nbslvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 935 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:921 */
rtx
gen_aarch64_sve2_nbslvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 935 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:921 */
rtx
gen_aarch64_sve2_nbslvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 935 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2381 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2381 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2381 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand1)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2382 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2382 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2382 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2383 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2383 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2383 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand1)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2384 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2384 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2384 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2385 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2385 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2385 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand1)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2386 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2386 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2386 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2387 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2387 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2387 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand1)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:940 */
extern rtx_insn *gen_split_2388 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2388 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2388 (aarch64-sve2.md:940)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 958 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2),
	operand3),
	copy_rtx (operand2)))),
	118)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:966 */
rtx
gen_aarch64_sve2_bsl1nvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 980 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:966 */
rtx
gen_aarch64_sve2_bsl1nvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 980 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:966 */
rtx
gen_aarch64_sve2_bsl1nvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 980 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:966 */
rtx
gen_aarch64_sve2_bsl1nvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 980 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2389 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2389 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2389 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2390 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2390 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2390 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx16QImode,
	gen_rtx_XOR (VNx16QImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2391 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2391 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2391 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2392 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2392 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2392 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx8HImode,
	gen_rtx_XOR (VNx8HImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2393 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2393 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2393 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2394 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2394 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2394 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx4SImode,
	gen_rtx_XOR (VNx4SImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2395 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2395 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2395 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand1))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:985 */
extern rtx_insn *gen_split_2396 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2396 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2396 (aarch64-sve2.md:985)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1003 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_XOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_NOT (VNx2DImode,
	gen_rtx_XOR (VNx2DImode,
	operand1,
	operand2))),
	118),
	operand3),
	copy_rtx (operand2))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1011 */
rtx
gen_aarch64_sve2_bsl2nvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1026 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	operand1,
	operand3),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	operand2),
	gen_rtx_NOT (VNx16QImode,
	copy_rtx (operand3)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1011 */
rtx
gen_aarch64_sve2_bsl2nvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1026 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	operand1,
	operand3),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	operand2),
	gen_rtx_NOT (VNx8HImode,
	copy_rtx (operand3)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1011 */
rtx
gen_aarch64_sve2_bsl2nvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1026 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	operand1,
	operand3),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	operand2),
	gen_rtx_NOT (VNx4SImode,
	copy_rtx (operand3)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1011 */
rtx
gen_aarch64_sve2_bsl2nvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1026 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	operand1,
	operand3),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	operand2),
	gen_rtx_NOT (VNx2DImode,
	copy_rtx (operand3)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2397 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2397 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2397 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	operand3),
	gen_rtx_NOT (VNx16QImode,
	copy_rtx (operand1)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2398 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2398 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2398 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	operand3),
	gen_rtx_NOT (VNx16QImode,
	copy_rtx (operand2)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2399 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2399 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2399 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	operand3),
	gen_rtx_NOT (VNx8HImode,
	copy_rtx (operand1)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2400 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2400 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2400 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	operand3),
	gen_rtx_NOT (VNx8HImode,
	copy_rtx (operand2)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2401 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2401 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2401 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	operand3),
	gen_rtx_NOT (VNx4SImode,
	copy_rtx (operand1)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2402 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2402 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2402 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	operand3),
	gen_rtx_NOT (VNx4SImode,
	copy_rtx (operand2)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2403 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2403 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2403 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	operand3),
	gen_rtx_NOT (VNx2DImode,
	copy_rtx (operand1)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1031 */
extern rtx_insn *gen_split_2404 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2404 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2404 (aarch64-sve2.md:1031)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1050 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	operand3),
	gen_rtx_NOT (VNx2DImode,
	copy_rtx (operand2)))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2405 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2405 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2405 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	copy_rtx (operand1)),
	gen_rtx_NOT (VNx16QImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2406 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2406 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2406 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx16QImode,
	gen_rtx_AND (VNx16QImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx16QImode,
	gen_rtx_NOT (VNx16QImode,
	copy_rtx (operand2)),
	gen_rtx_NOT (VNx16QImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2407 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2407 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2407 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	copy_rtx (operand1)),
	gen_rtx_NOT (VNx8HImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2408 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2408 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2408 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx8HImode,
	gen_rtx_AND (VNx8HImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx8HImode,
	gen_rtx_NOT (VNx8HImode,
	copy_rtx (operand2)),
	gen_rtx_NOT (VNx8HImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2409 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2409 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2409 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	copy_rtx (operand1)),
	gen_rtx_NOT (VNx4SImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2410 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2410 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2410 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx4SImode,
	gen_rtx_AND (VNx4SImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx4SImode,
	gen_rtx_NOT (VNx4SImode,
	copy_rtx (operand2)),
	gen_rtx_NOT (VNx4SImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2411 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2411 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2411 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	copy_rtx (operand1)),
	gen_rtx_NOT (VNx2DImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1058 */
extern rtx_insn *gen_split_2412 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2412 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2412 (aarch64-sve2.md:1058)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1077 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_IOR (VNx2DImode,
	gen_rtx_AND (VNx2DImode,
	operand1,
	operand2),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_AND (VNx2DImode,
	gen_rtx_NOT (VNx2DImode,
	copy_rtx (operand2)),
	gen_rtx_NOT (VNx2DImode,
	operand3))),
	118))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_asrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx16QImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_lsrvnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx16QImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_asrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx8HImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_lsrvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx8HImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_asrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx4SImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_lsrvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx4SImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_asrvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx2DImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1094 */
rtx
gen_aarch64_sve_add_lsrvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1105 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx2DImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2413 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2413 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2413 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx16QImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2414 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2414 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2414 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx16QImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2415 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2415 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2415 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx8HImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2416 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2416 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2416 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx8HImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2417 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2417 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2417 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx4SImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2418 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2418 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2418 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx4SImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2419 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2419 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2419 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_ASHIFTRT (VNx2DImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1112 */
extern rtx_insn *gen_split_2420 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2420 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2420 (aarch64-sve2.md:1112)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1127 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_LSHIFTRT (VNx2DImode,
	operand2,
	operand3)),
	118),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_sabavnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_SMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_uabavnx16qi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx16BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	gen_rtx_MINUS (VNx16QImode,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx16QImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_UMIN (VNx16QImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_sabavnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_SMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_uabavnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	gen_rtx_MINUS (VNx8HImode,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx8HImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_UMIN (VNx8HImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_sabavnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_SMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_uabavnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	gen_rtx_MINUS (VNx4SImode,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx4SImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_UMIN (VNx4SImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_sabavnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_SMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_SMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1178 */
rtx
gen_aarch64_sve2_uabavnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1196 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	gen_rtx_MINUS (VNx2DImode,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UMAX (VNx2DImode,
	operand2,
	operand3)),
	118),
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		copy_rtx (operand4),
		gen_rtx_UMIN (VNx2DImode,
	copy_rtx (operand2),
	copy_rtx (operand3))),
	118)),
	operand1)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1711 */
rtx
gen_cond_sadalpvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	71),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1711 */
rtx
gen_cond_uadalpvnx8hi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	95),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1711 */
rtx
gen_cond_sadalpvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	71),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1711 */
rtx
gen_cond_uadalpvnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	95),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1711 */
rtx
gen_cond_sadalpvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	71),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1711 */
rtx
gen_cond_uadalpvnx2di (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1723 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Only target code is aware of these operations, so we don't need
     to handle the fully-general case.  */
  gcc_assert (rtx_equal_p (operands[2], operands[4])
	      || CONSTANT_P (operands[4]));
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		copy_rtx (operand1),
		operand2,
		operand3),
	95),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1732 */
extern rtx_insn *gen_split_2421 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2421 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2421 (aarch64-sve2.md:1732)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand4,
		operand2,
		operand3),
	71),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1732 */
extern rtx_insn *gen_split_2422 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2422 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2422 (aarch64-sve2.md:1732)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand4,
		operand2,
		operand3),
	95),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1732 */
extern rtx_insn *gen_split_2423 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2423 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2423 (aarch64-sve2.md:1732)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand4,
		operand2,
		operand3),
	71),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1732 */
extern rtx_insn *gen_split_2424 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2424 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2424 (aarch64-sve2.md:1732)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand4,
		operand2,
		operand3),
	95),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1732 */
extern rtx_insn *gen_split_2425 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2425 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2425 (aarch64-sve2.md:1732)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		operand2,
		operand3),
	71),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1732 */
extern rtx_insn *gen_split_2426 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2426 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2426 (aarch64-sve2.md:1732)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1748 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		operand2,
		operand3),
	95),
		copy_rtx (operand2)),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1755 */
extern rtx_insn *gen_split_2427 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2427 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2427 (aarch64-sve2.md:1755)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand5,
		operand2,
		operand3),
	71),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1755 */
extern rtx_insn *gen_split_2428 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2428 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2428 (aarch64-sve2.md:1755)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx8BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand5,
		operand2,
		operand3),
	95),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1755 */
extern rtx_insn *gen_split_2429 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2429 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2429 (aarch64-sve2.md:1755)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand5,
		operand2,
		operand3),
	71),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1755 */
extern rtx_insn *gen_split_2430 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2430 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2430 (aarch64-sve2.md:1755)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand5,
		operand2,
		operand3),
	95),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1755 */
extern rtx_insn *gen_split_2431 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2431 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2431 (aarch64-sve2.md:1755)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand5,
		operand2,
		operand3),
	71),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1755 */
extern rtx_insn *gen_split_2432 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2432 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2432 (aarch64-sve2.md:1755)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1771 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[5] = CONSTM1_RTX (VNx2BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand5,
		operand2,
		operand3),
	95),
		operand4),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd90vnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd270vnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd90vnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd270vnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd90vnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd270vnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd90vnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	402));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1803 */
rtx
gen_cadd270vnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	401));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlavnx16qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlavnx16qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx16QImode);
  emit_insn (gen_aarch64_sve_cmlavnx16qi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx16qi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	operand1,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	407))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmla_conjvnx16qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjvnx16qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx16QImode);
  emit_insn (gen_aarch64_sve_cmlavnx16qi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx16qi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	operand1,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	411))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlsvnx16qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsvnx16qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx16QImode);
  emit_insn (gen_aarch64_sve_cmla180vnx16qi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx16qi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	operand1,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	408))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmls_conjvnx16qi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjvnx16qi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx16QImode);
  emit_insn (gen_aarch64_sve_cmla180vnx16qi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx16qi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx16QImode,
	operand1,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand2,
		operand3),
	412))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlavnx8hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlavnx8hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx8HImode);
  emit_insn (gen_aarch64_sve_cmlavnx8hi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx8hi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	407))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmla_conjvnx8hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjvnx8hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx8HImode);
  emit_insn (gen_aarch64_sve_cmlavnx8hi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx8hi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	411))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlsvnx8hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsvnx8hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx8HImode);
  emit_insn (gen_aarch64_sve_cmla180vnx8hi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx8hi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	408))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmls_conjvnx8hi4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjvnx8hi4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx8HImode);
  emit_insn (gen_aarch64_sve_cmla180vnx8hi (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx8hi (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx8HImode,
	operand1,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand2,
		operand3),
	412))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlavnx4si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlavnx4si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx4SImode);
  emit_insn (gen_aarch64_sve_cmlavnx4si (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx4si (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	407))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmla_conjvnx4si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjvnx4si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx4SImode);
  emit_insn (gen_aarch64_sve_cmlavnx4si (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx4si (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	411))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlsvnx4si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsvnx4si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx4SImode);
  emit_insn (gen_aarch64_sve_cmla180vnx4si (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx4si (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	408))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmls_conjvnx4si4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjvnx4si4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx4SImode);
  emit_insn (gen_aarch64_sve_cmla180vnx4si (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx4si (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx4SImode,
	operand1,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand2,
		operand3),
	412))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlavnx2di4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlavnx2di4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx2DImode);
  emit_insn (gen_aarch64_sve_cmlavnx2di (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx2di (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	407))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmla_conjvnx2di4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmla_conjvnx2di4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx2DImode);
  emit_insn (gen_aarch64_sve_cmlavnx2di (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx2di (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	411))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmlsvnx2di4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmlsvnx2di4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx2DImode);
  emit_insn (gen_aarch64_sve_cmla180vnx2di (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla270vnx2di (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	408))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1855 */
rtx
gen_cmls_conjvnx2di4 (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[4];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL _Pragma ("GCC error \"cmls_conjvnx2di4 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1863 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx tmp = gen_reg_rtx (VNx2DImode);
  emit_insn (gen_aarch64_sve_cmla180vnx2di (tmp, operands[1],
						   operands[3], operands[2]));
  emit_insn (gen_aarch64_sve_cmla90vnx2di (operands[0], tmp,
						   operands[3], operands[2]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_PLUS (VNx2DImode,
	operand1,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand2,
		operand3),
	412))));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmulvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulvnx16qi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx16QImode, CONST0_RTX (VNx16QImode));
  rtx tmp = gen_reg_rtx (VNx16QImode);
  emit_insn (gen_aarch64_sve_cmlavnx16qi (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla90vnx16qi (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	413)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmul_conjvnx16qi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjvnx16qi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx16QImode, CONST0_RTX (VNx16QImode));
  rtx tmp = gen_reg_rtx (VNx16QImode);
  emit_insn (gen_aarch64_sve_cmlavnx16qi (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla270vnx16qi (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16QImode,
	gen_rtvec (2,
		operand1,
		operand2),
	414)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmulvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulvnx8hi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx8HImode, CONST0_RTX (VNx8HImode));
  rtx tmp = gen_reg_rtx (VNx8HImode);
  emit_insn (gen_aarch64_sve_cmlavnx8hi (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla90vnx8hi (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	413)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmul_conjvnx8hi3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjvnx8hi3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx8HImode, CONST0_RTX (VNx8HImode));
  rtx tmp = gen_reg_rtx (VNx8HImode);
  emit_insn (gen_aarch64_sve_cmlavnx8hi (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla270vnx8hi (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (2,
		operand1,
		operand2),
	414)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmulvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulvnx4si3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx4SImode, CONST0_RTX (VNx4SImode));
  rtx tmp = gen_reg_rtx (VNx4SImode);
  emit_insn (gen_aarch64_sve_cmlavnx4si (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla90vnx4si (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	413)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmul_conjvnx4si3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjvnx4si3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx4SImode, CONST0_RTX (VNx4SImode));
  rtx tmp = gen_reg_rtx (VNx4SImode);
  emit_insn (gen_aarch64_sve_cmlavnx4si (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla270vnx4si (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand1,
		operand2),
	414)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmulvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmulvnx2di3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx2DImode, CONST0_RTX (VNx2DImode));
  rtx tmp = gen_reg_rtx (VNx2DImode);
  emit_insn (gen_aarch64_sve_cmlavnx2di (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla90vnx2di (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	413)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1876 */
rtx
gen_cmul_conjvnx2di3 (rtx operand0,
	rtx operand1,
	rtx operand2)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[3];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
#define FAIL _Pragma ("GCC error \"cmul_conjvnx2di3 cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1883 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  rtx accum = force_reg (VNx2DImode, CONST0_RTX (VNx2DImode));
  rtx tmp = gen_reg_rtx (VNx2DImode);
  emit_insn (gen_aarch64_sve_cmlavnx2di (tmp, accum,
						   operands[2], operands[1]));
  emit_insn (gen_aarch64_sve_cmla270vnx2di (operands[0], tmp,
						   operands[2], operands[1]));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (2,
		operand1,
		operand2),
	414)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1955 */
rtx
gen_cond_fcvtltvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	415),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1955 */
rtx
gen_cond_fcvtltvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	415),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1970 */
extern rtx_insn *gen_split_2433 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2433 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2433 (aarch64-sve2.md:1970)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1984 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	415),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:1970 */
extern rtx_insn *gen_split_2434 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2434 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2434 (aarch64-sve2.md:1970)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 1984 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	415),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2047 */
rtx
gen_cond_fcvtxvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	417),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2061 */
extern rtx_insn *gen_split_2435 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2435 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2435 (aarch64-sve2.md:2061)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2078 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SFmode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	417),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2149 */
rtx
gen_cond_urecpevnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2162 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	22)),
	118),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2149 */
rtx
gen_cond_ursqrtevnx4si (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  rtx operand4;
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2162 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4SImode);
  }
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	104)),
	118),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2167 */
extern rtx_insn *gen_split_2436 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2436 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2436 (aarch64-sve2.md:2167)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	22)),
	118),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2167 */
extern rtx_insn *gen_split_2437 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2437 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2437 (aarch64-sve2.md:2167)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2185 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = CONSTM1_RTX (VNx4BImode);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (2,
		operand4,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (1,
		operand2),
	104)),
	118),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2214 */
rtx
gen_cond_flogbvnx8hf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	419),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2214 */
rtx
gen_cond_flogbvnx4sf (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	419),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2214 */
rtx
gen_cond_flogbvnx2df (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3)
{
  return gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		const1_rtx,
		operand2),
	419),
		operand3),
	283));
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2228 */
extern rtx_insn *gen_split_2438 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2438 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2438 (aarch64-sve2.md:2228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx8HImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	419),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2228 */
extern rtx_insn *gen_split_2439 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2439 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2439 (aarch64-sve2.md:2228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx4SImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	419),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2228 */
extern rtx_insn *gen_split_2440 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2440 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2440 (aarch64-sve2.md:2228)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2245 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[4] = copy_rtx (operands[1]);
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  emit_insn (gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand1,
		gen_rtx_UNSPEC (VNx2DImode,
	gen_rtvec (3,
		operand4,
		const0_rtx,
		operand2),
	419),
		operand3),
	283)));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2383 */
rtx
gen_check_raw_ptrssi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"check_raw_ptrssi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2392 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Use the widest predicate mode we can.  */
  unsigned int align = INTVAL (operands[4]);
  if (align > 8)
    align = 8;
  machine_mode pred_mode = aarch64_sve_pred_mode (align).require ();

  /* Emit a WHILERW or WHILEWR, setting the condition codes based on
     the result.  */
  emit_insn (gen_while_ptest
	     (UNSPEC_WHILERW, SImode, pred_mode,
	      gen_rtx_SCRATCH (pred_mode), operands[1], operands[2],
	      CONSTM1_RTX (VNx16BImode), CONSTM1_RTX (pred_mode)));

  /* Set operand 0 to true if the last bit of the predicate result is set,
     i.e. if all elements are free of dependencies.  */
  rtx cc_reg = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
  rtx cmp = gen_rtx_LTU (SImode, cc_reg, const0_rtx);
  emit_insn (gen_aarch64_cstoresi (operands[0], cmp, cc_reg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	135));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2383 */
rtx
gen_check_war_ptrssi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"check_war_ptrssi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2392 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Use the widest predicate mode we can.  */
  unsigned int align = INTVAL (operands[4]);
  if (align > 8)
    align = 8;
  machine_mode pred_mode = aarch64_sve_pred_mode (align).require ();

  /* Emit a WHILERW or WHILEWR, setting the condition codes based on
     the result.  */
  emit_insn (gen_while_ptest
	     (UNSPEC_WHILEWR, SImode, pred_mode,
	      gen_rtx_SCRATCH (pred_mode), operands[1], operands[2],
	      CONSTM1_RTX (VNx16BImode), CONSTM1_RTX (pred_mode)));

  /* Set operand 0 to true if the last bit of the predicate result is set,
     i.e. if all elements are free of dependencies.  */
  rtx cc_reg = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
  rtx cmp = gen_rtx_LTU (SImode, cc_reg, const0_rtx);
  emit_insn (gen_aarch64_cstoresi (operands[0], cmp, cc_reg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	136));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2383 */
rtx
gen_check_raw_ptrsdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"check_raw_ptrsdi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2392 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Use the widest predicate mode we can.  */
  unsigned int align = INTVAL (operands[4]);
  if (align > 8)
    align = 8;
  machine_mode pred_mode = aarch64_sve_pred_mode (align).require ();

  /* Emit a WHILERW or WHILEWR, setting the condition codes based on
     the result.  */
  emit_insn (gen_while_ptest
	     (UNSPEC_WHILERW, DImode, pred_mode,
	      gen_rtx_SCRATCH (pred_mode), operands[1], operands[2],
	      CONSTM1_RTX (VNx16BImode), CONSTM1_RTX (pred_mode)));

  /* Set operand 0 to true if the last bit of the predicate result is set,
     i.e. if all elements are free of dependencies.  */
  rtx cc_reg = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
  rtx cmp = gen_rtx_LTU (DImode, cc_reg, const0_rtx);
  emit_insn (gen_aarch64_cstoredi (operands[0], cmp, cc_reg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	135));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2383 */
rtx
gen_check_war_ptrsdi (rtx operand0,
	rtx operand1,
	rtx operand2,
	rtx operand3,
	rtx operand4)
{
  rtx_insn *_val = 0;
  start_sequence ();
  {
    rtx operands[5];
    operands[0] = operand0;
    operands[1] = operand1;
    operands[2] = operand2;
    operands[3] = operand3;
    operands[4] = operand4;
#define FAIL _Pragma ("GCC error \"check_war_ptrsdi cannot FAIL\"") (void)0
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2392 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
  /* Use the widest predicate mode we can.  */
  unsigned int align = INTVAL (operands[4]);
  if (align > 8)
    align = 8;
  machine_mode pred_mode = aarch64_sve_pred_mode (align).require ();

  /* Emit a WHILERW or WHILEWR, setting the condition codes based on
     the result.  */
  emit_insn (gen_while_ptest
	     (UNSPEC_WHILEWR, DImode, pred_mode,
	      gen_rtx_SCRATCH (pred_mode), operands[1], operands[2],
	      CONSTM1_RTX (VNx16BImode), CONSTM1_RTX (pred_mode)));

  /* Set operand 0 to true if the last bit of the predicate result is set,
     i.e. if all elements are free of dependencies.  */
  rtx cc_reg = gen_rtx_REG (CC_NZCmode, CC_REGNUM);
  rtx cmp = gen_rtx_LTU (DImode, cc_reg, const0_rtx);
  emit_insn (gen_aarch64_cstoredi (operands[0], cmp, cc_reg));
  DONE;
}
#undef DONE
#undef FAIL
    operand0 = operands[0];
    (void) operand0;
    operand1 = operands[1];
    (void) operand1;
    operand2 = operands[2];
    (void) operand2;
    operand3 = operands[3];
    (void) operand3;
    operand4 = operands[4];
    (void) operand4;
  }
  emit (operand0, true);
  emit_insn (gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (4,
		operand1,
		operand2,
		operand3,
		operand4),
	136));
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2469 */
extern rtx_insn *gen_split_2441 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2441 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2441 (aarch64-sve2.md:2469)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2497 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	433)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	433)),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2469 */
extern rtx_insn *gen_split_2442 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2442 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2442 (aarch64-sve2.md:2469)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2497 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	434)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	434)),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2469 */
extern rtx_insn *gen_split_2443 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2443 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2443 (aarch64-sve2.md:2469)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2497 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	433)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	433)),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2469 */
extern rtx_insn *gen_split_2444 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2444 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2444 (aarch64-sve2.md:2469)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2497 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	434)),
	119)),
	120)),
		gen_rtx_SET (operand0,
	gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		copy_rtx (operand6),
		copy_rtx (operand7),
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		copy_rtx (operand2),
		copy_rtx (operand3)),
	434)),
	119)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2504 */
extern rtx_insn *gen_split_2445 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2445 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2445 (aarch64-sve2.md:2504)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	433)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2504 */
extern rtx_insn *gen_split_2446 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2446 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2446 (aarch64-sve2.md:2504)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx16BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	434)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2504 */
extern rtx_insn *gen_split_2447 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2447 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2447 (aarch64-sve2.md:2504)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	433)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}

/* ../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md:2504 */
extern rtx_insn *gen_split_2448 (rtx_insn *, rtx *);
rtx_insn *
gen_split_2448 (rtx_insn *curr_insn ATTRIBUTE_UNUSED, rtx *operands)
{
  rtx operand0;
  rtx operand1;
  rtx operand2;
  rtx operand3;
  rtx operand4;
  rtx operand5;
  rtx operand6;
  rtx operand7;
  rtx_insn *_val = NULL;
  if (dump_file)
    fprintf (dump_file, "Splitting with gen_split_2448 (aarch64-sve2.md:2504)\n");
  start_sequence ();
#define FAIL return (end_sequence (), _val)
#define DONE return (_val = get_insns (), end_sequence (), _val)
#line 2524 "../../../../../../../work-shared/gcc-12.2.0-r0/gcc-12.2.0/gcc/config/aarch64/aarch64-sve2.md"
{
    operands[6] = copy_rtx (operands[4]);
    operands[7] = operands[5];
  }
#undef DONE
#undef FAIL
  operand0 = operands[0];
  (void) operand0;
  operand1 = operands[1];
  (void) operand1;
  operand2 = operands[2];
  (void) operand2;
  operand3 = operands[3];
  (void) operand3;
  operand4 = operands[4];
  (void) operand4;
  operand5 = operands[5];
  (void) operand5;
  operand6 = operands[6];
  (void) operand6;
  operand7 = operands[7];
  (void) operand7;
  emit (gen_rtx_PARALLEL (VOIDmode,
	gen_rtvec (2,
		gen_rtx_SET (gen_rtx_REG (CC_NZCmode,
	66),
	gen_rtx_UNSPEC (CC_NZCmode,
	gen_rtvec (4,
		operand1,
		operand4,
		operand5,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (3,
		operand6,
		operand7,
		gen_rtx_UNSPEC (VNx8BImode,
	gen_rtvec (2,
		operand2,
		operand3),
	434)),
	119)),
	120)),
		gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode)))), false);
  _val = get_insns ();
  end_sequence ();
  return _val;
}



void
add_clobbers (rtx pattern ATTRIBUTE_UNUSED, int insn_code_number)
{
  switch (insn_code_number)
    {
    case 8974:
    case 8429:
    case 8426:
    case 8423:
    case 8422:
    case 8421:
    case 8420:
    case 8419:
    case 8418:
    case 8405:
    case 8404:
    case 8403:
    case 8402:
    case 8401:
    case 8400:
    case 8345:
    case 8344:
    case 8343:
    case 8342:
    case 8341:
    case 8340:
    case 8339:
    case 8338:
    case 8337:
    case 8336:
    case 8335:
    case 8334:
    case 8333:
    case 8332:
    case 8331:
    case 8330:
    case 8329:
    case 8328:
    case 8327:
    case 8326:
    case 7915:
    case 7914:
    case 7913:
    case 7912:
    case 7911:
    case 7910:
    case 7909:
    case 7908:
    case 7907:
    case 7906:
    case 7905:
    case 7904:
    case 7903:
    case 7902:
    case 7901:
    case 7900:
    case 7899:
    case 7898:
    case 7897:
    case 7896:
    case 7885:
    case 7884:
    case 7883:
    case 7882:
    case 7881:
    case 7880:
    case 7879:
    case 7878:
    case 7877:
    case 7876:
    case 7855:
    case 7854:
    case 7853:
    case 7852:
    case 7851:
    case 7850:
    case 7849:
    case 7848:
    case 7847:
    case 7846:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx2BImode));
      break;

    case 8973:
    case 8428:
    case 8425:
    case 8417:
    case 8416:
    case 8415:
    case 8414:
    case 8413:
    case 8412:
    case 8399:
    case 8398:
    case 8397:
    case 8396:
    case 8395:
    case 8394:
    case 8325:
    case 8324:
    case 8323:
    case 8322:
    case 8321:
    case 8320:
    case 8319:
    case 8318:
    case 8317:
    case 8316:
    case 8315:
    case 8314:
    case 8313:
    case 8312:
    case 8311:
    case 8310:
    case 8309:
    case 8308:
    case 8307:
    case 8306:
    case 8105:
    case 8104:
    case 8103:
    case 8102:
    case 8101:
    case 8100:
    case 8099:
    case 8098:
    case 8097:
    case 8096:
    case 7895:
    case 7894:
    case 7893:
    case 7892:
    case 7891:
    case 7890:
    case 7889:
    case 7888:
    case 7887:
    case 7886:
    case 7875:
    case 7874:
    case 7873:
    case 7872:
    case 7871:
    case 7870:
    case 7869:
    case 7868:
    case 7867:
    case 7866:
    case 7845:
    case 7844:
    case 7843:
    case 7842:
    case 7841:
    case 7840:
    case 7839:
    case 7838:
    case 7837:
    case 7836:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx4BImode));
      break;

    case 9956:
    case 9955:
    case 8972:
    case 8427:
    case 8424:
    case 8411:
    case 8410:
    case 8409:
    case 8408:
    case 8407:
    case 8406:
    case 8393:
    case 8392:
    case 8391:
    case 8390:
    case 8389:
    case 8388:
    case 8305:
    case 8304:
    case 8303:
    case 8302:
    case 8301:
    case 8300:
    case 8299:
    case 8298:
    case 8297:
    case 8296:
    case 8295:
    case 8294:
    case 8293:
    case 8292:
    case 8291:
    case 8290:
    case 8289:
    case 8288:
    case 8287:
    case 8286:
    case 8095:
    case 8094:
    case 8093:
    case 8092:
    case 8091:
    case 8090:
    case 8089:
    case 8088:
    case 8087:
    case 8086:
    case 7865:
    case 7864:
    case 7863:
    case 7862:
    case 7861:
    case 7860:
    case 7859:
    case 7858:
    case 7857:
    case 7856:
    case 7835:
    case 7834:
    case 7833:
    case 7832:
    case 7831:
    case 7830:
    case 7829:
    case 7828:
    case 7827:
    case 7826:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx8BImode));
      break;

    case 9948:
    case 9947:
    case 9946:
    case 9945:
    case 8964:
    case 8963:
    case 8962:
    case 8961:
    case 8960:
    case 8185:
    case 8184:
    case 8183:
    case 8182:
    case 8181:
    case 8180:
    case 8179:
    case 8178:
    case 8177:
    case 8176:
    case 8175:
    case 8174:
    case 8173:
    case 8172:
    case 8171:
    case 8170:
    case 8169:
    case 8168:
    case 8167:
    case 8166:
    case 8165:
    case 8164:
    case 8163:
    case 8162:
    case 8161:
    case 8160:
    case 8159:
    case 8158:
    case 8157:
    case 8156:
    case 8155:
    case 8154:
    case 8153:
    case 8152:
    case 8151:
    case 8150:
    case 8149:
    case 8148:
    case 8147:
    case 8146:
    case 8145:
    case 8144:
    case 8143:
    case 8142:
    case 8141:
    case 8140:
    case 8139:
    case 8138:
    case 8137:
    case 8136:
    case 8135:
    case 8134:
    case 8133:
    case 8132:
    case 8131:
    case 8130:
    case 8129:
    case 8128:
    case 8127:
    case 8126:
    case 8125:
    case 8124:
    case 8123:
    case 8122:
    case 8121:
    case 8120:
    case 8119:
    case 8118:
    case 8117:
    case 8116:
    case 8115:
    case 8114:
    case 8113:
    case 8112:
    case 8111:
    case 8110:
    case 8109:
    case 8108:
    case 8107:
    case 8106:
    case 8045:
    case 8044:
    case 8043:
    case 8042:
    case 8041:
    case 8040:
    case 8039:
    case 8038:
    case 8037:
    case 8036:
    case 8035:
    case 8034:
    case 8033:
    case 8032:
    case 8031:
    case 8030:
    case 8029:
    case 8028:
    case 8027:
    case 8026:
    case 8025:
    case 8024:
    case 8023:
    case 8022:
    case 8021:
    case 8020:
    case 8019:
    case 8018:
    case 8017:
    case 8016:
    case 8015:
    case 8014:
    case 8013:
    case 8012:
    case 8011:
    case 8010:
    case 8009:
    case 8008:
    case 8007:
    case 8006:
    case 8005:
    case 8004:
    case 8003:
    case 8002:
    case 8001:
    case 8000:
    case 7999:
    case 7998:
    case 7997:
    case 7996:
    case 7995:
    case 7994:
    case 7993:
    case 7992:
    case 7991:
    case 7990:
    case 7989:
    case 7988:
    case 7987:
    case 7986:
    case 7985:
    case 7984:
    case 7983:
    case 7982:
    case 7981:
    case 7980:
    case 7979:
    case 7978:
    case 7977:
    case 7976:
    case 7975:
    case 7974:
    case 7973:
    case 7972:
    case 7971:
    case 7970:
    case 7969:
    case 7968:
    case 7967:
    case 7966:
    case 7965:
    case 7964:
    case 7963:
    case 7962:
    case 7961:
    case 7960:
    case 7959:
    case 7958:
    case 7957:
    case 7956:
    case 7955:
    case 7954:
    case 7953:
    case 7952:
    case 7951:
    case 7950:
    case 7949:
    case 7948:
    case 7947:
    case 7946:
    case 7945:
    case 7944:
    case 7943:
    case 7942:
    case 7941:
    case 7940:
    case 7939:
    case 7938:
    case 7937:
    case 7936:
    case 7935:
    case 7934:
    case 7933:
    case 7932:
    case 7931:
    case 7930:
    case 7929:
    case 7928:
    case 7927:
    case 7926:
    case 7925:
    case 7924:
    case 7923:
    case 7922:
    case 7921:
    case 7920:
    case 7919:
    case 7918:
    case 7917:
    case 7916:
    case 7715:
    case 7714:
    case 7713:
    case 7712:
    case 7711:
    case 7710:
    case 7709:
    case 7708:
    case 7707:
    case 7706:
    case 7705:
    case 7704:
    case 7703:
    case 7702:
    case 7701:
    case 7700:
    case 7699:
    case 7698:
    case 7697:
    case 7696:
    case 7695:
    case 7694:
    case 7693:
    case 7692:
    case 7691:
    case 7690:
    case 7689:
    case 7688:
    case 7687:
    case 7686:
    case 7685:
    case 7684:
    case 7683:
    case 7682:
    case 7681:
    case 7680:
    case 7679:
    case 7678:
    case 7677:
    case 7676:
    case 7675:
    case 7674:
    case 7673:
    case 7672:
    case 7671:
    case 7670:
    case 7669:
    case 7668:
    case 7667:
    case 7666:
    case 7665:
    case 7664:
    case 7663:
    case 7662:
    case 7661:
    case 7660:
    case 7659:
    case 7658:
    case 7657:
    case 7656:
    case 7655:
    case 7654:
    case 7653:
    case 7652:
    case 7651:
    case 7650:
    case 7649:
    case 7648:
    case 7647:
    case 7646:
    case 7645:
    case 7644:
    case 7643:
    case 7642:
    case 7641:
    case 7640:
    case 7639:
    case 7638:
    case 7637:
    case 7636:
    case 7635:
    case 7634:
    case 7633:
    case 7632:
    case 7631:
    case 7630:
    case 7629:
    case 7628:
    case 7627:
    case 7626:
    case 7625:
    case 7624:
    case 7623:
    case 7622:
    case 7621:
    case 7620:
    case 7619:
    case 7618:
    case 7617:
    case 7616:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CC_NZCmode, 66);
      break;

    case 9954:
    case 9953:
    case 8971:
    case 8970:
    case 8959:
    case 8958:
    case 8957:
    case 8950:
    case 8949:
    case 8285:
    case 8284:
    case 8283:
    case 8282:
    case 8281:
    case 8280:
    case 8279:
    case 8278:
    case 8277:
    case 8276:
    case 8275:
    case 8274:
    case 8273:
    case 8272:
    case 8271:
    case 8270:
    case 8269:
    case 8268:
    case 8267:
    case 8266:
    case 8085:
    case 8084:
    case 8083:
    case 8082:
    case 8081:
    case 8080:
    case 8079:
    case 8078:
    case 8077:
    case 8076:
    case 7825:
    case 7824:
    case 7823:
    case 7822:
    case 7821:
    case 7820:
    case 7819:
    case 7818:
    case 7817:
    case 7816:
    case 7313:
    case 7312:
    case 7311:
    case 7310:
    case 7309:
    case 7308:
    case 7307:
    case 7306:
    case 7289:
    case 7288:
    case 7287:
    case 7286:
    case 7285:
    case 7284:
    case 7283:
    case 7282:
    case 7265:
    case 7264:
    case 7263:
    case 7262:
    case 7261:
    case 7260:
    case 7259:
    case 7258:
    case 7257:
    case 7256:
    case 7255:
    case 7254:
    case 5087:
    case 5086:
    case 5085:
    case 5084:
    case 5083:
    case 5082:
    case 5081:
    case 5080:
    case 5079:
    case 5078:
    case 5077:
    case 5076:
    case 5075:
    case 5074:
    case 5073:
    case 5072:
    case 5071:
    case 5070:
    case 5069:
    case 4642:
    case 4641:
    case 4635:
    case 4634:
    case 4633:
    case 4632:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (VNx16BImode));
      break;

    case 4425:
    case 4405:
    case 4404:
    case 4403:
    case 4402:
    case 4401:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4424:
    case 4400:
    case 4399:
    case 4398:
    case 4397:
    case 4396:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4423:
    case 4395:
    case 4394:
    case 4393:
    case 4392:
    case 4391:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4422:
    case 4390:
    case 4389:
    case 4388:
    case 4387:
    case 4386:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode));
      XVECEXP (pattern, 0, 4) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4381:
    case 4380:
    case 4379:
    case 4378:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      break;

    case 4377:
    case 4376:
    case 4375:
    case 4374:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4373:
    case 4372:
    case 4371:
    case 4370:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode));
      break;

    case 4369:
    case 4368:
    case 4367:
    case 4366:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode));
      break;

    case 4385:
    case 4365:
    case 4364:
    case 4363:
    case 4362:
    case 4361:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4384:
    case 4360:
    case 4359:
    case 4358:
    case 4357:
    case 4356:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4383:
    case 4355:
    case 4354:
    case 4353:
    case 4352:
    case 4351:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (HImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4382:
    case 4350:
    case 4349:
    case 4348:
    case 4347:
    case 4346:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (QImode));
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4449:
    case 4448:
    case 4447:
    case 4446:
    case 4445:
    case 4444:
    case 4443:
    case 4442:
    case 4441:
    case 4440:
    case 4439:
    case 4438:
    case 4437:
    case 4436:
    case 4435:
    case 4434:
    case 4433:
    case 4432:
    case 4431:
    case 4430:
    case 4429:
    case 4428:
    case 4427:
    case 4426:
    case 4341:
    case 4340:
    case 4339:
    case 4338:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (CCmode, 66);
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 4332:
    case 4331:
    case 4330:
    case 4329:
    case 4328:
      XVECEXP (pattern, 0, 3) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 1074:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (DImode));
      break;

    case 1073:
      XVECEXP (pattern, 0, 1) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      XVECEXP (pattern, 0, 2) = gen_rtx_CLOBBER (VOIDmode,
	gen_rtx_SCRATCH (SImode));
      break;

    case 1035:
    case 1034:
      XVECEXP (pattern, 0, 3) = gen_hard_reg_clobber (DImode, 30);
      break;

    case 1053:
    case 1052:
    case 47:
    case 46:
      XVECEXP (pattern, 0, 2) = gen_hard_reg_clobber (DImode, 30);
      break;

    case 3432:
    case 3413:
    case 3412:
    case 3411:
    case 3410:
    case 3376:
    case 3375:
    case 3374:
    case 3373:
    case 3372:
    case 1055:
    case 497:
    case 496:
    case 495:
    case 494:
    case 493:
    case 492:
    case 491:
    case 490:
    case 449:
    case 448:
    case 447:
    case 446:
    case 45:
    case 44:
    case 43:
    case 42:
    case 41:
    case 40:
    case 39:
    case 38:
    case 37:
    case 36:
    case 35:
    case 34:
      XVECEXP (pattern, 0, 1) = gen_hard_reg_clobber (CCmode, 66);
      break;

    default:
      gcc_unreachable ();
    }
}


int
added_clobbers_hard_reg_p (int insn_code_number)
{
  switch (insn_code_number)
    {
    case 8974:
    case 8429:
    case 8426:
    case 8423:
    case 8422:
    case 8421:
    case 8420:
    case 8419:
    case 8418:
    case 8405:
    case 8404:
    case 8403:
    case 8402:
    case 8401:
    case 8400:
    case 8345:
    case 8344:
    case 8343:
    case 8342:
    case 8341:
    case 8340:
    case 8339:
    case 8338:
    case 8337:
    case 8336:
    case 8335:
    case 8334:
    case 8333:
    case 8332:
    case 8331:
    case 8330:
    case 8329:
    case 8328:
    case 8327:
    case 8326:
    case 7915:
    case 7914:
    case 7913:
    case 7912:
    case 7911:
    case 7910:
    case 7909:
    case 7908:
    case 7907:
    case 7906:
    case 7905:
    case 7904:
    case 7903:
    case 7902:
    case 7901:
    case 7900:
    case 7899:
    case 7898:
    case 7897:
    case 7896:
    case 7885:
    case 7884:
    case 7883:
    case 7882:
    case 7881:
    case 7880:
    case 7879:
    case 7878:
    case 7877:
    case 7876:
    case 7855:
    case 7854:
    case 7853:
    case 7852:
    case 7851:
    case 7850:
    case 7849:
    case 7848:
    case 7847:
    case 7846:
    case 8973:
    case 8428:
    case 8425:
    case 8417:
    case 8416:
    case 8415:
    case 8414:
    case 8413:
    case 8412:
    case 8399:
    case 8398:
    case 8397:
    case 8396:
    case 8395:
    case 8394:
    case 8325:
    case 8324:
    case 8323:
    case 8322:
    case 8321:
    case 8320:
    case 8319:
    case 8318:
    case 8317:
    case 8316:
    case 8315:
    case 8314:
    case 8313:
    case 8312:
    case 8311:
    case 8310:
    case 8309:
    case 8308:
    case 8307:
    case 8306:
    case 8105:
    case 8104:
    case 8103:
    case 8102:
    case 8101:
    case 8100:
    case 8099:
    case 8098:
    case 8097:
    case 8096:
    case 7895:
    case 7894:
    case 7893:
    case 7892:
    case 7891:
    case 7890:
    case 7889:
    case 7888:
    case 7887:
    case 7886:
    case 7875:
    case 7874:
    case 7873:
    case 7872:
    case 7871:
    case 7870:
    case 7869:
    case 7868:
    case 7867:
    case 7866:
    case 7845:
    case 7844:
    case 7843:
    case 7842:
    case 7841:
    case 7840:
    case 7839:
    case 7838:
    case 7837:
    case 7836:
    case 9956:
    case 9955:
    case 8972:
    case 8427:
    case 8424:
    case 8411:
    case 8410:
    case 8409:
    case 8408:
    case 8407:
    case 8406:
    case 8393:
    case 8392:
    case 8391:
    case 8390:
    case 8389:
    case 8388:
    case 8305:
    case 8304:
    case 8303:
    case 8302:
    case 8301:
    case 8300:
    case 8299:
    case 8298:
    case 8297:
    case 8296:
    case 8295:
    case 8294:
    case 8293:
    case 8292:
    case 8291:
    case 8290:
    case 8289:
    case 8288:
    case 8287:
    case 8286:
    case 8095:
    case 8094:
    case 8093:
    case 8092:
    case 8091:
    case 8090:
    case 8089:
    case 8088:
    case 8087:
    case 8086:
    case 7865:
    case 7864:
    case 7863:
    case 7862:
    case 7861:
    case 7860:
    case 7859:
    case 7858:
    case 7857:
    case 7856:
    case 7835:
    case 7834:
    case 7833:
    case 7832:
    case 7831:
    case 7830:
    case 7829:
    case 7828:
    case 7827:
    case 7826:
    case 9954:
    case 9953:
    case 8971:
    case 8970:
    case 8959:
    case 8958:
    case 8957:
    case 8950:
    case 8949:
    case 8285:
    case 8284:
    case 8283:
    case 8282:
    case 8281:
    case 8280:
    case 8279:
    case 8278:
    case 8277:
    case 8276:
    case 8275:
    case 8274:
    case 8273:
    case 8272:
    case 8271:
    case 8270:
    case 8269:
    case 8268:
    case 8267:
    case 8266:
    case 8085:
    case 8084:
    case 8083:
    case 8082:
    case 8081:
    case 8080:
    case 8079:
    case 8078:
    case 8077:
    case 8076:
    case 7825:
    case 7824:
    case 7823:
    case 7822:
    case 7821:
    case 7820:
    case 7819:
    case 7818:
    case 7817:
    case 7816:
    case 7313:
    case 7312:
    case 7311:
    case 7310:
    case 7309:
    case 7308:
    case 7307:
    case 7306:
    case 7289:
    case 7288:
    case 7287:
    case 7286:
    case 7285:
    case 7284:
    case 7283:
    case 7282:
    case 7265:
    case 7264:
    case 7263:
    case 7262:
    case 7261:
    case 7260:
    case 7259:
    case 7258:
    case 7257:
    case 7256:
    case 7255:
    case 7254:
    case 5087:
    case 5086:
    case 5085:
    case 5084:
    case 5083:
    case 5082:
    case 5081:
    case 5080:
    case 5079:
    case 5078:
    case 5077:
    case 5076:
    case 5075:
    case 5074:
    case 5073:
    case 5072:
    case 5071:
    case 5070:
    case 5069:
    case 4642:
    case 4641:
    case 4635:
    case 4634:
    case 4633:
    case 4632:
    case 4381:
    case 4380:
    case 4379:
    case 4378:
    case 4377:
    case 4376:
    case 4375:
    case 4374:
    case 4373:
    case 4372:
    case 4371:
    case 4370:
    case 4369:
    case 4368:
    case 4367:
    case 4366:
    case 4332:
    case 4331:
    case 4330:
    case 4329:
    case 4328:
    case 1074:
    case 1073:
      return 0;

    case 9948:
    case 9947:
    case 9946:
    case 9945:
    case 8964:
    case 8963:
    case 8962:
    case 8961:
    case 8960:
    case 8185:
    case 8184:
    case 8183:
    case 8182:
    case 8181:
    case 8180:
    case 8179:
    case 8178:
    case 8177:
    case 8176:
    case 8175:
    case 8174:
    case 8173:
    case 8172:
    case 8171:
    case 8170:
    case 8169:
    case 8168:
    case 8167:
    case 8166:
    case 8165:
    case 8164:
    case 8163:
    case 8162:
    case 8161:
    case 8160:
    case 8159:
    case 8158:
    case 8157:
    case 8156:
    case 8155:
    case 8154:
    case 8153:
    case 8152:
    case 8151:
    case 8150:
    case 8149:
    case 8148:
    case 8147:
    case 8146:
    case 8145:
    case 8144:
    case 8143:
    case 8142:
    case 8141:
    case 8140:
    case 8139:
    case 8138:
    case 8137:
    case 8136:
    case 8135:
    case 8134:
    case 8133:
    case 8132:
    case 8131:
    case 8130:
    case 8129:
    case 8128:
    case 8127:
    case 8126:
    case 8125:
    case 8124:
    case 8123:
    case 8122:
    case 8121:
    case 8120:
    case 8119:
    case 8118:
    case 8117:
    case 8116:
    case 8115:
    case 8114:
    case 8113:
    case 8112:
    case 8111:
    case 8110:
    case 8109:
    case 8108:
    case 8107:
    case 8106:
    case 8045:
    case 8044:
    case 8043:
    case 8042:
    case 8041:
    case 8040:
    case 8039:
    case 8038:
    case 8037:
    case 8036:
    case 8035:
    case 8034:
    case 8033:
    case 8032:
    case 8031:
    case 8030:
    case 8029:
    case 8028:
    case 8027:
    case 8026:
    case 8025:
    case 8024:
    case 8023:
    case 8022:
    case 8021:
    case 8020:
    case 8019:
    case 8018:
    case 8017:
    case 8016:
    case 8015:
    case 8014:
    case 8013:
    case 8012:
    case 8011:
    case 8010:
    case 8009:
    case 8008:
    case 8007:
    case 8006:
    case 8005:
    case 8004:
    case 8003:
    case 8002:
    case 8001:
    case 8000:
    case 7999:
    case 7998:
    case 7997:
    case 7996:
    case 7995:
    case 7994:
    case 7993:
    case 7992:
    case 7991:
    case 7990:
    case 7989:
    case 7988:
    case 7987:
    case 7986:
    case 7985:
    case 7984:
    case 7983:
    case 7982:
    case 7981:
    case 7980:
    case 7979:
    case 7978:
    case 7977:
    case 7976:
    case 7975:
    case 7974:
    case 7973:
    case 7972:
    case 7971:
    case 7970:
    case 7969:
    case 7968:
    case 7967:
    case 7966:
    case 7965:
    case 7964:
    case 7963:
    case 7962:
    case 7961:
    case 7960:
    case 7959:
    case 7958:
    case 7957:
    case 7956:
    case 7955:
    case 7954:
    case 7953:
    case 7952:
    case 7951:
    case 7950:
    case 7949:
    case 7948:
    case 7947:
    case 7946:
    case 7945:
    case 7944:
    case 7943:
    case 7942:
    case 7941:
    case 7940:
    case 7939:
    case 7938:
    case 7937:
    case 7936:
    case 7935:
    case 7934:
    case 7933:
    case 7932:
    case 7931:
    case 7930:
    case 7929:
    case 7928:
    case 7927:
    case 7926:
    case 7925:
    case 7924:
    case 7923:
    case 7922:
    case 7921:
    case 7920:
    case 7919:
    case 7918:
    case 7917:
    case 7916:
    case 7715:
    case 7714:
    case 7713:
    case 7712:
    case 7711:
    case 7710:
    case 7709:
    case 7708:
    case 7707:
    case 7706:
    case 7705:
    case 7704:
    case 7703:
    case 7702:
    case 7701:
    case 7700:
    case 7699:
    case 7698:
    case 7697:
    case 7696:
    case 7695:
    case 7694:
    case 7693:
    case 7692:
    case 7691:
    case 7690:
    case 7689:
    case 7688:
    case 7687:
    case 7686:
    case 7685:
    case 7684:
    case 7683:
    case 7682:
    case 7681:
    case 7680:
    case 7679:
    case 7678:
    case 7677:
    case 7676:
    case 7675:
    case 7674:
    case 7673:
    case 7672:
    case 7671:
    case 7670:
    case 7669:
    case 7668:
    case 7667:
    case 7666:
    case 7665:
    case 7664:
    case 7663:
    case 7662:
    case 7661:
    case 7660:
    case 7659:
    case 7658:
    case 7657:
    case 7656:
    case 7655:
    case 7654:
    case 7653:
    case 7652:
    case 7651:
    case 7650:
    case 7649:
    case 7648:
    case 7647:
    case 7646:
    case 7645:
    case 7644:
    case 7643:
    case 7642:
    case 7641:
    case 7640:
    case 7639:
    case 7638:
    case 7637:
    case 7636:
    case 7635:
    case 7634:
    case 7633:
    case 7632:
    case 7631:
    case 7630:
    case 7629:
    case 7628:
    case 7627:
    case 7626:
    case 7625:
    case 7624:
    case 7623:
    case 7622:
    case 7621:
    case 7620:
    case 7619:
    case 7618:
    case 7617:
    case 7616:
    case 4425:
    case 4405:
    case 4404:
    case 4403:
    case 4402:
    case 4401:
    case 4424:
    case 4400:
    case 4399:
    case 4398:
    case 4397:
    case 4396:
    case 4423:
    case 4395:
    case 4394:
    case 4393:
    case 4392:
    case 4391:
    case 4422:
    case 4390:
    case 4389:
    case 4388:
    case 4387:
    case 4386:
    case 4385:
    case 4365:
    case 4364:
    case 4363:
    case 4362:
    case 4361:
    case 4384:
    case 4360:
    case 4359:
    case 4358:
    case 4357:
    case 4356:
    case 4383:
    case 4355:
    case 4354:
    case 4353:
    case 4352:
    case 4351:
    case 4382:
    case 4350:
    case 4349:
    case 4348:
    case 4347:
    case 4346:
    case 4449:
    case 4448:
    case 4447:
    case 4446:
    case 4445:
    case 4444:
    case 4443:
    case 4442:
    case 4441:
    case 4440:
    case 4439:
    case 4438:
    case 4437:
    case 4436:
    case 4435:
    case 4434:
    case 4433:
    case 4432:
    case 4431:
    case 4430:
    case 4429:
    case 4428:
    case 4427:
    case 4426:
    case 4341:
    case 4340:
    case 4339:
    case 4338:
    case 1035:
    case 1034:
    case 1053:
    case 1052:
    case 47:
    case 46:
    case 3432:
    case 3413:
    case 3412:
    case 3411:
    case 3410:
    case 3376:
    case 3375:
    case 3374:
    case 3373:
    case 3372:
    case 1055:
    case 497:
    case 496:
    case 495:
    case 494:
    case 493:
    case 492:
    case 491:
    case 490:
    case 449:
    case 448:
    case 447:
    case 446:
    case 45:
    case 44:
    case 43:
    case 42:
    case 41:
    case 40:
    case 39:
    case 38:
    case 37:
    case 36:
    case 35:
    case 34:
      return 1;

    default:
      gcc_unreachable ();
    }
}

insn_code
maybe_code_for_ccmp (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_CCmode
      && arg1 == E_SImode)
    return CODE_FOR_ccmpccsi;
  if (arg0 == E_CCmode
      && arg1 == E_DImode)
    return CODE_FOR_ccmpccdi;
  if (arg0 == E_CCFPmode
      && arg1 == E_SFmode)
    return CODE_FOR_ccmpccfpsf;
  if (arg0 == E_CCFPmode
      && arg1 == E_DFmode)
    return CODE_FOR_ccmpccfpdf;
  if (arg0 == E_CCFPEmode
      && arg1 == E_SFmode)
    return CODE_FOR_ccmpccfpesf;
  if (arg0 == E_CCFPEmode
      && arg1 == E_DFmode)
    return CODE_FOR_ccmpccfpedf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_ccmp (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5)
{
  insn_code code = maybe_code_for_ccmp (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 6);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_ccmp_rev (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_CCmode
      && arg1 == E_SImode)
    return CODE_FOR_ccmpccsi_rev;
  if (arg0 == E_CCmode
      && arg1 == E_DImode)
    return CODE_FOR_ccmpccdi_rev;
  if (arg0 == E_CCFPmode
      && arg1 == E_SFmode)
    return CODE_FOR_ccmpccfpsf_rev;
  if (arg0 == E_CCFPmode
      && arg1 == E_DFmode)
    return CODE_FOR_ccmpccfpdf_rev;
  if (arg0 == E_CCFPEmode
      && arg1 == E_SFmode)
    return CODE_FOR_ccmpccfpesf_rev;
  if (arg0 == E_CCFPEmode
      && arg1 == E_DFmode)
    return CODE_FOR_ccmpccfpedf_rev;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_ccmp_rev (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5)
{
  insn_code code = maybe_code_for_ccmp_rev (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 6);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_rbit (machine_mode arg0)
{
  if (arg0 == E_SImode)
    return CODE_FOR_aarch64_rbitsi;
  if (arg0 == E_DImode)
    return CODE_FOR_aarch64_rbitdi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_rbit (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_rbit (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_rev16 (machine_mode arg0)
{
  if (arg0 == E_SImode)
    return CODE_FOR_aarch64_rev16si;
  if (arg0 == E_DImode)
    return CODE_FOR_aarch64_rev16di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_rev16 (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_rev16 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_reload_movcp (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_SFmode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpsfsi;
  if (arg0 == E_DFmode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpdfsi;
  if (arg0 == E_TFmode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcptfsi;
  if (arg0 == E_SFmode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpsfdi;
  if (arg0 == E_DFmode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpdfdi;
  if (arg0 == E_TFmode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcptfdi;
  if (arg0 == E_V8QImode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv8qisi;
  if (arg0 == E_V8QImode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv8qidi;
  if (arg0 == E_V16QImode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv16qisi;
  if (arg0 == E_V16QImode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv16qidi;
  if (arg0 == E_V4HImode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv4hisi;
  if (arg0 == E_V4HImode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv4hidi;
  if (arg0 == E_V8HImode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv8hisi;
  if (arg0 == E_V8HImode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv8hidi;
  if (arg0 == E_V2SImode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv2sisi;
  if (arg0 == E_V2SImode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv2sidi;
  if (arg0 == E_V4SImode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv4sisi;
  if (arg0 == E_V4SImode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv4sidi;
  if (arg0 == E_V2DImode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv2disi;
  if (arg0 == E_V2DImode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv2didi;
  if (arg0 == E_V2SFmode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv2sfsi;
  if (arg0 == E_V2SFmode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv2sfdi;
  if (arg0 == E_V4SFmode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv4sfsi;
  if (arg0 == E_V4SFmode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv4sfdi;
  if (arg0 == E_V2DFmode
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_reload_movcpv2dfsi;
  if (arg0 == E_V2DFmode
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_reload_movcpv2dfdi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_reload_movcp (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_reload_movcp (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_reload_mov (machine_mode arg0)
{
  if (arg0 == E_TImode)
    return CODE_FOR_aarch64_reload_movti;
  if (arg0 == E_TFmode)
    return CODE_FOR_aarch64_reload_movtf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_reload_mov (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_reload_mov (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_movdi_low (machine_mode arg0)
{
  if (arg0 == E_TImode)
    return CODE_FOR_aarch64_movdi_tilow;
  if (arg0 == E_TFmode)
    return CODE_FOR_aarch64_movdi_tflow;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_movdi_low (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_movdi_low (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_movdi_high (machine_mode arg0)
{
  if (arg0 == E_TImode)
    return CODE_FOR_aarch64_movdi_tihigh;
  if (arg0 == E_TFmode)
    return CODE_FOR_aarch64_movdi_tfhigh;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_movdi_high (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_movdi_high (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_movhigh_di (machine_mode arg0)
{
  if (arg0 == E_TImode)
    return CODE_FOR_aarch64_movtihigh_di;
  if (arg0 == E_TFmode)
    return CODE_FOR_aarch64_movtfhigh_di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_movhigh_di (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_movhigh_di (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_movlow_di (machine_mode arg0)
{
  if (arg0 == E_TImode)
    return CODE_FOR_aarch64_movtilow_di;
  if (arg0 == E_TFmode)
    return CODE_FOR_aarch64_movtflow_di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_movlow_di (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_movlow_di (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_ldr_got_tiny (machine_mode arg0)
{
  if (arg0 == E_SImode)
    return CODE_FOR_ldr_got_tiny_si;
  if (arg0 == E_DImode)
    return CODE_FOR_ldr_got_tiny_di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_ldr_got_tiny (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_ldr_got_tiny (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_probe_sve_stack_clash (machine_mode arg0)
{
  if (arg0 == E_SImode)
    return CODE_FOR_probe_sve_stack_clash_si;
  if (arg0 == E_DImode)
    return CODE_FOR_probe_sve_stack_clash_di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_probe_sve_stack_clash (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_probe_sve_stack_clash (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_set (int arg0, machine_mode arg1)
{
  if (arg0 == 4
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_set_fpsrsi;
  if (arg0 == 2
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_set_fpcrsi;
  if (arg0 == 4
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_set_fpsrdi;
  if (arg0 == 2
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_set_fpcrdi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_set (int arg0, machine_mode arg1, rtx x0)
{
  insn_code code = maybe_code_for_aarch64_set (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 1);
      return GEN_FCN (code) (x0);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_get (int arg0, machine_mode arg1)
{
  if (arg0 == 3
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_get_fpsrsi;
  if (arg0 == 1
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_get_fpcrsi;
  if (arg0 == 3
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_get_fpsrdi;
  if (arg0 == 1
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_get_fpcrdi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_get (int arg0, machine_mode arg1, rtx x0)
{
  insn_code code = maybe_code_for_aarch64_get (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 1);
      return GEN_FCN (code) (x0);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_despeculate_copy (machine_mode arg0)
{
  if (arg0 == E_QImode)
    return CODE_FOR_despeculate_copyqi;
  if (arg0 == E_HImode)
    return CODE_FOR_despeculate_copyhi;
  if (arg0 == E_SImode)
    return CODE_FOR_despeculate_copysi;
  if (arg0 == E_DImode)
    return CODE_FOR_despeculate_copydi;
  if (arg0 == E_TImode)
    return CODE_FOR_despeculate_copyti;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_despeculate_copy (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_despeculate_copy (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_split_simd_mov (machine_mode arg0)
{
  if (arg0 == E_V16QImode)
    return CODE_FOR_aarch64_split_simd_movv16qi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_aarch64_split_simd_movv8hi;
  if (arg0 == E_V4SImode)
    return CODE_FOR_aarch64_split_simd_movv4si;
  if (arg0 == E_V2DImode)
    return CODE_FOR_aarch64_split_simd_movv2di;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_aarch64_split_simd_movv8hf;
  if (arg0 == E_V8BFmode)
    return CODE_FOR_aarch64_split_simd_movv8bf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_aarch64_split_simd_movv4sf;
  if (arg0 == E_V2DFmode)
    return CODE_FOR_aarch64_split_simd_movv2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_split_simd_mov (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_split_simd_mov (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_rsqrte (machine_mode arg0)
{
  if (arg0 == E_V4HFmode)
    return CODE_FOR_aarch64_rsqrtev4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_aarch64_rsqrtev8hf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_aarch64_rsqrtev2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_aarch64_rsqrtev4sf;
  if (arg0 == E_V2DFmode)
    return CODE_FOR_aarch64_rsqrtev2df;
  if (arg0 == E_HFmode)
    return CODE_FOR_aarch64_rsqrtehf;
  if (arg0 == E_SFmode)
    return CODE_FOR_aarch64_rsqrtesf;
  if (arg0 == E_DFmode)
    return CODE_FOR_aarch64_rsqrtedf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_rsqrtevnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_rsqrtevnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_rsqrte (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_rsqrte (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_rsqrts (machine_mode arg0)
{
  if (arg0 == E_V4HFmode)
    return CODE_FOR_aarch64_rsqrtsv4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_aarch64_rsqrtsv8hf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_aarch64_rsqrtsv2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_aarch64_rsqrtsv4sf;
  if (arg0 == E_V2DFmode)
    return CODE_FOR_aarch64_rsqrtsv2df;
  if (arg0 == E_HFmode)
    return CODE_FOR_aarch64_rsqrtshf;
  if (arg0 == E_SFmode)
    return CODE_FOR_aarch64_rsqrtssf;
  if (arg0 == E_DFmode)
    return CODE_FOR_aarch64_rsqrtsdf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_rsqrtsvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_rsqrtsvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_rsqrts (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_rsqrts (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_simd_vec_copy_lane (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev8qi;
  if (arg0 == E_V16QImode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev16qi;
  if (arg0 == E_V4HImode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev4hi;
  if (arg0 == E_V8HImode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev8hi;
  if (arg0 == E_V2SImode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev2si;
  if (arg0 == E_V4SImode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev4si;
  if (arg0 == E_V2DImode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev2di;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev8hf;
  if (arg0 == E_V4BFmode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev4bf;
  if (arg0 == E_V8BFmode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev8bf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev4sf;
  if (arg0 == E_V2DFmode)
    return CODE_FOR_aarch64_simd_vec_copy_lanev2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_simd_vec_copy_lane (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_simd_vec_copy_lane (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_vec_concat (machine_mode arg0)
{
  if (arg0 == E_V8QImode)
    return CODE_FOR_aarch64_vec_concatv8qi;
  if (arg0 == E_V4HImode)
    return CODE_FOR_aarch64_vec_concatv4hi;
  if (arg0 == E_V4BFmode)
    return CODE_FOR_aarch64_vec_concatv4bf;
  if (arg0 == E_V4HFmode)
    return CODE_FOR_aarch64_vec_concatv4hf;
  if (arg0 == E_V2SImode)
    return CODE_FOR_aarch64_vec_concatv2si;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_aarch64_vec_concatv2sf;
  if (arg0 == E_SImode)
    return CODE_FOR_aarch64_vec_concatsi;
  if (arg0 == E_SFmode)
    return CODE_FOR_aarch64_vec_concatsf;
  if (arg0 == E_DImode)
    return CODE_FOR_aarch64_vec_concatdi;
  if (arg0 == E_DFmode)
    return CODE_FOR_aarch64_vec_concatdf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_vec_concat (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_vec_concat (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_frecpe (machine_mode arg0)
{
  if (arg0 == E_V4HFmode)
    return CODE_FOR_aarch64_frecpev4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_aarch64_frecpev8hf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_aarch64_frecpev2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_aarch64_frecpev4sf;
  if (arg0 == E_V2DFmode)
    return CODE_FOR_aarch64_frecpev2df;
  if (arg0 == E_HFmode)
    return CODE_FOR_aarch64_frecpehf;
  if (arg0 == E_SFmode)
    return CODE_FOR_aarch64_frecpesf;
  if (arg0 == E_DFmode)
    return CODE_FOR_aarch64_frecpedf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_frecpevnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_frecpevnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_frecpevnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_frecpe (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_frecpe (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_frecps (machine_mode arg0)
{
  if (arg0 == E_V4HFmode)
    return CODE_FOR_aarch64_frecpsv4hf;
  if (arg0 == E_V8HFmode)
    return CODE_FOR_aarch64_frecpsv8hf;
  if (arg0 == E_V2SFmode)
    return CODE_FOR_aarch64_frecpsv2sf;
  if (arg0 == E_V4SFmode)
    return CODE_FOR_aarch64_frecpsv4sf;
  if (arg0 == E_V2DFmode)
    return CODE_FOR_aarch64_frecpsv2df;
  if (arg0 == E_HFmode)
    return CODE_FOR_aarch64_frecpshf;
  if (arg0 == E_SFmode)
    return CODE_FOR_aarch64_frecpssf;
  if (arg0 == E_DFmode)
    return CODE_FOR_aarch64_frecpsdf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_frecpsvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_frecpsvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_frecpsvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_frecps (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_frecps (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_atomic_compare_and_swap (machine_mode arg0)
{
  if (arg0 == E_QImode)
    return CODE_FOR_atomic_compare_and_swapqi;
  if (arg0 == E_HImode)
    return CODE_FOR_atomic_compare_and_swaphi;
  if (arg0 == E_SImode)
    return CODE_FOR_atomic_compare_and_swapsi;
  if (arg0 == E_DImode)
    return CODE_FOR_atomic_compare_and_swapdi;
  if (arg0 == E_TImode)
    return CODE_FOR_atomic_compare_and_swapti;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_atomic_compare_and_swap (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5, rtx x6, rtx x7)
{
  insn_code code = maybe_code_for_atomic_compare_and_swap (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 8);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5, x6, x7);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_compare_and_swap (machine_mode arg0)
{
  if (arg0 == E_QImode)
    return CODE_FOR_aarch64_compare_and_swapqi;
  if (arg0 == E_HImode)
    return CODE_FOR_aarch64_compare_and_swaphi;
  if (arg0 == E_SImode)
    return CODE_FOR_aarch64_compare_and_swapsi;
  if (arg0 == E_DImode)
    return CODE_FOR_aarch64_compare_and_swapdi;
  if (arg0 == E_TImode)
    return CODE_FOR_aarch64_compare_and_swapti;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_compare_and_swap (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5, rtx x6)
{
  insn_code code = maybe_code_for_aarch64_compare_and_swap (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 7);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5, x6);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_compare_and_swap_lse (machine_mode arg0)
{
  if (arg0 == E_QImode)
    return CODE_FOR_aarch64_compare_and_swapqi_lse;
  if (arg0 == E_HImode)
    return CODE_FOR_aarch64_compare_and_swaphi_lse;
  if (arg0 == E_SImode)
    return CODE_FOR_aarch64_compare_and_swapsi_lse;
  if (arg0 == E_DImode)
    return CODE_FOR_aarch64_compare_and_swapdi_lse;
  if (arg0 == E_TImode)
    return CODE_FOR_aarch64_compare_and_swapti_lse;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_compare_and_swap_lse (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_compare_and_swap_lse (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_load_exclusive (machine_mode arg0)
{
  if (arg0 == E_QImode)
    return CODE_FOR_aarch64_load_exclusiveqi;
  if (arg0 == E_HImode)
    return CODE_FOR_aarch64_load_exclusivehi;
  if (arg0 == E_SImode)
    return CODE_FOR_aarch64_load_exclusivesi;
  if (arg0 == E_DImode)
    return CODE_FOR_aarch64_load_exclusivedi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_load_exclusive (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_load_exclusive (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_store_exclusive (machine_mode arg0)
{
  if (arg0 == E_QImode)
    return CODE_FOR_aarch64_store_exclusiveqi;
  if (arg0 == E_HImode)
    return CODE_FOR_aarch64_store_exclusivehi;
  if (arg0 == E_SImode)
    return CODE_FOR_aarch64_store_exclusivesi;
  if (arg0 == E_DImode)
    return CODE_FOR_aarch64_store_exclusivedi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_store_exclusive (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_store_exclusive (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_mov (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_movvnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_movvnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_movvnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_movvnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_movvnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_movvnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_movvnx2hi;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_movvnx8hf;
  if (arg0 == E_VNx4HFmode)
    return CODE_FOR_aarch64_pred_movvnx4hf;
  if (arg0 == E_VNx2HFmode)
    return CODE_FOR_aarch64_pred_movvnx2hf;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_pred_movvnx8bf;
  if (arg0 == E_VNx4BFmode)
    return CODE_FOR_aarch64_pred_movvnx4bf;
  if (arg0 == E_VNx2BFmode)
    return CODE_FOR_aarch64_pred_movvnx2bf;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_movvnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_movvnx2si;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_movvnx4sf;
  if (arg0 == E_VNx2SFmode)
    return CODE_FOR_aarch64_pred_movvnx2sf;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_movvnx2di;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_movvnx2df;
  if (arg0 == E_VNx32QImode)
    return CODE_FOR_aarch64_pred_movvnx32qi;
  if (arg0 == E_VNx16HImode)
    return CODE_FOR_aarch64_pred_movvnx16hi;
  if (arg0 == E_VNx8SImode)
    return CODE_FOR_aarch64_pred_movvnx8si;
  if (arg0 == E_VNx4DImode)
    return CODE_FOR_aarch64_pred_movvnx4di;
  if (arg0 == E_VNx16BFmode)
    return CODE_FOR_aarch64_pred_movvnx16bf;
  if (arg0 == E_VNx16HFmode)
    return CODE_FOR_aarch64_pred_movvnx16hf;
  if (arg0 == E_VNx8SFmode)
    return CODE_FOR_aarch64_pred_movvnx8sf;
  if (arg0 == E_VNx4DFmode)
    return CODE_FOR_aarch64_pred_movvnx4df;
  if (arg0 == E_VNx48QImode)
    return CODE_FOR_aarch64_pred_movvnx48qi;
  if (arg0 == E_VNx24HImode)
    return CODE_FOR_aarch64_pred_movvnx24hi;
  if (arg0 == E_VNx12SImode)
    return CODE_FOR_aarch64_pred_movvnx12si;
  if (arg0 == E_VNx6DImode)
    return CODE_FOR_aarch64_pred_movvnx6di;
  if (arg0 == E_VNx24BFmode)
    return CODE_FOR_aarch64_pred_movvnx24bf;
  if (arg0 == E_VNx24HFmode)
    return CODE_FOR_aarch64_pred_movvnx24hf;
  if (arg0 == E_VNx12SFmode)
    return CODE_FOR_aarch64_pred_movvnx12sf;
  if (arg0 == E_VNx6DFmode)
    return CODE_FOR_aarch64_pred_movvnx6df;
  if (arg0 == E_VNx64QImode)
    return CODE_FOR_aarch64_pred_movvnx64qi;
  if (arg0 == E_VNx32HImode)
    return CODE_FOR_aarch64_pred_movvnx32hi;
  if (arg0 == E_VNx16SImode)
    return CODE_FOR_aarch64_pred_movvnx16si;
  if (arg0 == E_VNx8DImode)
    return CODE_FOR_aarch64_pred_movvnx8di;
  if (arg0 == E_VNx32BFmode)
    return CODE_FOR_aarch64_pred_movvnx32bf;
  if (arg0 == E_VNx32HFmode)
    return CODE_FOR_aarch64_pred_movvnx32hf;
  if (arg0 == E_VNx16SFmode)
    return CODE_FOR_aarch64_pred_movvnx16sf;
  if (arg0 == E_VNx8DFmode)
    return CODE_FOR_aarch64_pred_movvnx8df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_mov (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_pred_mov (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_reinterpret (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2hi;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx8hf;
  if (arg0 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx4hf;
  if (arg0 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2hf;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx8bf;
  if (arg0 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx4bf;
  if (arg0 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2bf;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2si;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx4sf;
  if (arg0 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2sf;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2di;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_reinterpretvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_reinterpret (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_sve_reinterpret (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_load (int arg0, rtx_code arg1, machine_mode arg2, machine_mode arg3)
{
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_extendvnx8hivnx8qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_extendvnx8hivnx8qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx8hivnx8qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx8hivnx8qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_extendvnx8hivnx4qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_extendvnx8hivnx4qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx8hivnx4qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx8hivnx4qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_extendvnx8hivnx2qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_extendvnx8hivnx2qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx8hivnx2qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx8hivnx2qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_extendvnx8hivnx4hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_extendvnx8hivnx4hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx8hivnx4hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx8hivnx4hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_extendvnx8hivnx2hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_extendvnx8hivnx2hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx8hivnx2hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx8hivnx2hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_extendvnx8hivnx2si;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_extendvnx8hivnx2si;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx8hivnx2si;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_zero_extendvnx8hivnx2si;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_extendvnx4hivnx8qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_extendvnx4hivnx8qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4hivnx8qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4hivnx8qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_extendvnx4hivnx4qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_extendvnx4hivnx4qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4hivnx4qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4hivnx4qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_extendvnx4hivnx2qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_extendvnx4hivnx2qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4hivnx2qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4hivnx2qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_extendvnx4hivnx4hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_extendvnx4hivnx4hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4hivnx4hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4hivnx4hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_extendvnx4hivnx2hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_extendvnx4hivnx2hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4hivnx2hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4hivnx2hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_extendvnx4hivnx2si;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_extendvnx4hivnx2si;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4hivnx2si;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4hivnx2si;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2hivnx8qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_extendvnx2hivnx8qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2hivnx8qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2hivnx8qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2hivnx4qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_extendvnx2hivnx4qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2hivnx4qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2hivnx4qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2hivnx2qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_extendvnx2hivnx2qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2hivnx2qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2hivnx2qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_extendvnx2hivnx4hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_extendvnx2hivnx4hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2hivnx4hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2hivnx4hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_extendvnx2hivnx2hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_extendvnx2hivnx2hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2hivnx2hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2hivnx2hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_extendvnx2hivnx2si;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_extendvnx2hivnx2si;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2hivnx2si;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2hivnx2si;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_extendvnx4sivnx8qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_extendvnx4sivnx8qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4sivnx8qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4sivnx8qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_extendvnx4sivnx4qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_extendvnx4sivnx4qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4sivnx4qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4sivnx4qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_extendvnx4sivnx2qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_extendvnx4sivnx2qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4sivnx2qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4sivnx2qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_extendvnx4sivnx4hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_extendvnx4sivnx4hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4sivnx4hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4sivnx4hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_extendvnx4sivnx2hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_extendvnx4sivnx2hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4sivnx2hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4sivnx2hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_extendvnx4sivnx2si;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_extendvnx4sivnx2si;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx4sivnx2si;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_zero_extendvnx4sivnx2si;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2sivnx8qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_extendvnx2sivnx8qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2sivnx8qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2sivnx8qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2sivnx4qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_extendvnx2sivnx4qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2sivnx4qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2sivnx4qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2sivnx2qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_extendvnx2sivnx2qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2sivnx2qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2sivnx2qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_extendvnx2sivnx4hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_extendvnx2sivnx4hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2sivnx4hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2sivnx4hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_extendvnx2sivnx2hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_extendvnx2sivnx2hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2sivnx2hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2sivnx2hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_extendvnx2sivnx2si;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_extendvnx2sivnx2si;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2sivnx2si;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2sivnx2si;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2divnx8qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_extendvnx2divnx8qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2divnx8qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2divnx8qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2divnx4qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_extendvnx2divnx4qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2divnx4qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2divnx4qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_extendvnx2divnx2qi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_extendvnx2divnx2qi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2divnx2qi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2divnx2qi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_extendvnx2divnx4hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_extendvnx2divnx4hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2divnx4hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2divnx4hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_extendvnx2divnx2hi;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_extendvnx2divnx2hi;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2divnx2hi;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2divnx2hi;
  if (arg0 == 118
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_extendvnx2divnx2si;
  if (arg0 == 108
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_extendvnx2divnx2si;
  if (arg0 == 118
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_x_zero_extendvnx2divnx2si;
  if (arg0 == 108
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_load_zero_extendvnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_load (int arg0, rtx_code arg1, machine_mode arg2, machine_mode arg3, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_load (arg0, arg1, arg2, arg3);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_ldf1 (int arg0, machine_mode arg1)
{
  if (arg0 == 381
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_ldff1vnx16qi;
  if (arg0 == 382
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_ldnf1vnx16qi;
  if (arg0 == 381
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_ldff1vnx8hi;
  if (arg0 == 382
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_ldnf1vnx8hi;
  if (arg0 == 381
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_ldff1vnx4si;
  if (arg0 == 382
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_ldnf1vnx4si;
  if (arg0 == 381
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_ldff1vnx2di;
  if (arg0 == 382
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_ldnf1vnx2di;
  if (arg0 == 381
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_ldff1vnx8bf;
  if (arg0 == 382
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_ldnf1vnx8bf;
  if (arg0 == 381
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_ldff1vnx8hf;
  if (arg0 == 382
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_ldnf1vnx8hf;
  if (arg0 == 381
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_ldff1vnx4sf;
  if (arg0 == 382
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_ldnf1vnx4sf;
  if (arg0 == 381
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_ldff1vnx2df;
  if (arg0 == 382
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_ldnf1vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_ldf1 (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_ldf1 (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_ldf1 (int arg0, rtx_code arg1, machine_mode arg2, machine_mode arg3)
{
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx8hivnx8qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx8hivnx8qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx8hivnx8qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx8hivnx8qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx8hivnx4qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx8hivnx4qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx8hivnx4qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx8hivnx4qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx8hivnx2qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx8hivnx2qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx8hivnx2qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx8hivnx2qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx8hivnx4hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx8hivnx4hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx8hivnx4hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx8hivnx4hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx8hivnx2hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx8hivnx2hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx8hivnx2hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx8hivnx2hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_extendvnx8hivnx2si;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx8hivnx2si;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx8hivnx2si;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx8HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx8hivnx2si;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4hivnx8qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4hivnx8qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4hivnx8qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4hivnx8qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4hivnx4qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4hivnx4qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4hivnx4qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4hivnx4qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4hivnx2qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4hivnx2qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4hivnx2qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4hivnx2qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4hivnx4hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4hivnx4hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4hivnx4hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4hivnx4hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4hivnx2hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4hivnx2hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4hivnx2hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4hivnx2hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4hivnx2si;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4hivnx2si;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4hivnx2si;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4hivnx2si;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2hivnx8qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2hivnx8qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2hivnx8qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2hivnx8qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2hivnx4qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2hivnx4qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2hivnx4qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2hivnx4qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2hivnx2qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2hivnx2qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2hivnx2qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2hivnx2qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2hivnx4hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2hivnx4hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2hivnx4hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2hivnx4hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2hivnx2hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2hivnx2hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2hivnx2hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2hivnx2hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2hivnx2si;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2hivnx2si;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2hivnx2si;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2HImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2hivnx2si;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4sivnx8qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4sivnx8qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4sivnx8qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4sivnx8qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4sivnx4qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4sivnx4qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4sivnx4qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4sivnx4qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4sivnx2qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4sivnx2qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4sivnx2qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4sivnx2qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4sivnx4hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4sivnx4hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4sivnx4hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4sivnx4hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4sivnx2hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4sivnx2hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4sivnx2hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4sivnx2hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_extendvnx4sivnx2si;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx4sivnx2si;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx4sivnx2si;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx4SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx4sivnx2si;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2sivnx8qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2sivnx8qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2sivnx8qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2sivnx8qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2sivnx4qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2sivnx4qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2sivnx4qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2sivnx4qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2sivnx2qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2sivnx2qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2sivnx2qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2sivnx2qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2sivnx4hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2sivnx4hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2sivnx4hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2sivnx4hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2sivnx2hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2sivnx2hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2sivnx2hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2sivnx2hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2sivnx2si;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2sivnx2si;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2sivnx2si;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2SImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2sivnx2si;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2divnx8qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2divnx8qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2divnx8qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx8QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2divnx8qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2divnx4qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2divnx4qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2divnx4qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2divnx4qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2divnx2qi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2divnx2qi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2divnx2qi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2divnx2qi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2divnx4hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2divnx4hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2divnx4hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2divnx4hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2divnx2hi;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2divnx2hi;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2divnx2hi;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2divnx2hi;
  if (arg0 == 381
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_extendvnx2divnx2si;
  if (arg0 == 382
      && arg1 == SIGN_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_extendvnx2divnx2si;
  if (arg0 == 381
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_zero_extendvnx2divnx2si;
  if (arg0 == 382
      && arg1 == ZERO_EXTEND
      && arg2 == E_VNx2DImode
      && arg3 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldnf1_zero_extendvnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_ldf1 (int arg0, rtx_code arg1, machine_mode arg2, machine_mode arg3, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_ldf1 (arg0, arg1, arg2, arg3);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_ldnt1 (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_ldnt1vnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_ldnt1vnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_ldnt1vnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_ldnt1vnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_ldnt1vnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_ldnt1vnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_ldnt1vnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_ldnt1vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_ldnt1 (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_ldnt1 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_gather_load (rtx_code arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4HImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_load_extendvnx4hivnx4qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4HImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx4hivnx4qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4HImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_load_extendvnx4hivnx4hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4HImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx4hivnx4hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_load_extendvnx4sivnx4qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx4sivnx4qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_load_extendvnx4sivnx4hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx4sivnx4hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2HImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2hivnx2qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2HImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2hivnx2qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2HImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2hivnx2hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2HImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2hivnx2hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2HImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2hivnx2si;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2HImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2hivnx2si;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2SImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2sivnx2qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2SImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2sivnx2qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2SImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2sivnx2hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2SImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2sivnx2hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2SImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2sivnx2si;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2SImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2sivnx2si;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2divnx2qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2divnx2qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2divnx2hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2divnx2hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_load_extendvnx2divnx2si;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_load_zero_extendvnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_gather_load (rtx_code arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5, rtx x6)
{
  insn_code code = maybe_code_for_aarch64_gather_load (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 7);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5, x6);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_ldff1_gather (machine_mode arg0)
{
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_ldff1_gathervnx4si;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_ldff1_gathervnx4sf;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_ldff1_gathervnx2di;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_ldff1_gathervnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_ldff1_gather (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5)
{
  insn_code code = maybe_code_for_aarch64_ldff1_gather (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 6);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_ldff1_gather (rtx_code arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_gather_extendvnx4sivnx4qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_ldff1_gather_zero_extendvnx4sivnx4qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_gather_extendvnx4sivnx4hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_ldff1_gather_zero_extendvnx4sivnx4hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_gather_extendvnx2divnx2qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_ldff1_gather_zero_extendvnx2divnx2qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_gather_extendvnx2divnx2hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_ldff1_gather_zero_extendvnx2divnx2hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_gather_extendvnx2divnx2si;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_ldff1_gather_zero_extendvnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_ldff1_gather (rtx_code arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5, rtx x6)
{
  insn_code code = maybe_code_for_aarch64_ldff1_gather (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 7);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5, x6);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_prefetch (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_prefetchvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_prefetchvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_prefetchvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_prefetchvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_prefetch (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_prefetch (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_gather_prefetch (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx16QImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx16qivnx4si;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx8hivnx4si;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx4sivnx4si;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx2divnx4si;
  if (arg0 == E_VNx16QImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx16qivnx2di;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx8hivnx2di;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx4sivnx2di;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_gather_prefetchvnx2divnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_gather_prefetch (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5, rtx x6, rtx x7, rtx x8)
{
  insn_code code = maybe_code_for_aarch64_sve_gather_prefetch (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 9);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5, x6, x7, x8);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_store_trunc (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx8QImode
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_store_truncvnx8qivnx8hi;
  if (arg0 == E_VNx4QImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_store_truncvnx4qivnx4si;
  if (arg0 == E_VNx4HImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_store_truncvnx4hivnx4si;
  if (arg0 == E_VNx2QImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_store_truncvnx2qivnx2di;
  if (arg0 == E_VNx2HImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_store_truncvnx2hivnx2di;
  if (arg0 == E_VNx2SImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_store_truncvnx2sivnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_store_trunc (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_store_trunc (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_stnt1 (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_stnt1vnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_stnt1vnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_stnt1vnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_stnt1vnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_stnt1vnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_stnt1vnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_stnt1vnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_stnt1vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_stnt1 (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_stnt1 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_scatter_store_trunc (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx4QImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_scatter_store_truncvnx4qivnx4si;
  if (arg0 == E_VNx4HImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_scatter_store_truncvnx4hivnx4si;
  if (arg0 == E_VNx2QImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_scatter_store_truncvnx2qivnx2di;
  if (arg0 == E_VNx2HImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_scatter_store_truncvnx2hivnx2di;
  if (arg0 == E_VNx2SImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_scatter_store_truncvnx2sivnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_scatter_store_trunc (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5)
{
  insn_code code = maybe_code_for_aarch64_scatter_store_trunc (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 6);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_vec_duplicate_vq_le (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx16qi_le;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx8hi_le;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx4si_le;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx2di_le;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx8bf_le;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx8hf_le;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx4sf_le;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx2df_le;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_vec_duplicate_vq_le (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_vec_duplicate_vq_le (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_vec_duplicate_vq_be (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx16qi_be;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx8hi_be;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx4si_be;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx2di_be;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx8bf_be;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx8hf_be;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx4sf_be;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_vec_duplicate_vqvnx2df_be;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_vec_duplicate_vq_be (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_vec_duplicate_vq_be (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_ld1rq (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_ld1rqvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ld1rqvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ld1rqvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ld1rqvnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_ld1rqvnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_ld1rqvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_ld1rqvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_ld1rqvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_ld1rq (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_ld1rq (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_ld1ro (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_ld1rovnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ld1rovnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ld1rovnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ld1rovnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_ld1rovnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_ld1rovnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_ld1rovnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_ld1rovnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_ld1ro (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_ld1ro (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_extract (int arg0, machine_mode arg1)
{
  if (arg0 == 376
      && arg1 == E_VNx16QImode)
    return CODE_FOR_extract_after_last_vnx16qi;
  if (arg0 == 377
      && arg1 == E_VNx16QImode)
    return CODE_FOR_extract_last_vnx16qi;
  if (arg0 == 376
      && arg1 == E_VNx8HImode)
    return CODE_FOR_extract_after_last_vnx8hi;
  if (arg0 == 377
      && arg1 == E_VNx8HImode)
    return CODE_FOR_extract_last_vnx8hi;
  if (arg0 == 376
      && arg1 == E_VNx4SImode)
    return CODE_FOR_extract_after_last_vnx4si;
  if (arg0 == 377
      && arg1 == E_VNx4SImode)
    return CODE_FOR_extract_last_vnx4si;
  if (arg0 == 376
      && arg1 == E_VNx2DImode)
    return CODE_FOR_extract_after_last_vnx2di;
  if (arg0 == 377
      && arg1 == E_VNx2DImode)
    return CODE_FOR_extract_last_vnx2di;
  if (arg0 == 376
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_extract_after_last_vnx8bf;
  if (arg0 == 377
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_extract_last_vnx8bf;
  if (arg0 == 376
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_extract_after_last_vnx8hf;
  if (arg0 == 377
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_extract_last_vnx8hf;
  if (arg0 == 376
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_extract_after_last_vnx4sf;
  if (arg0 == 377
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_extract_last_vnx4sf;
  if (arg0 == 376
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_extract_after_last_vnx2df;
  if (arg0 == 377
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_extract_last_vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_extract (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_extract (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == ABS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_absvnx16qi;
  if (arg0 == NEG
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_negvnx16qi;
  if (arg0 == NOT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx16qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_clrsbvnx16qi;
  if (arg0 == CLZ
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_clzvnx16qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_popcountvnx16qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_qabsvnx16qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_qnegvnx16qi;
  if (arg0 == ABS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_absvnx8qi;
  if (arg0 == NEG
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_negvnx8qi;
  if (arg0 == NOT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx8qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_clrsbvnx8qi;
  if (arg0 == CLZ
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_clzvnx8qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_popcountvnx8qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_qabsvnx8qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_qnegvnx8qi;
  if (arg0 == ABS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_absvnx4qi;
  if (arg0 == NEG
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_negvnx4qi;
  if (arg0 == NOT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx4qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_clrsbvnx4qi;
  if (arg0 == CLZ
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_clzvnx4qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_popcountvnx4qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_qabsvnx4qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_qnegvnx4qi;
  if (arg0 == ABS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_absvnx2qi;
  if (arg0 == NEG
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_negvnx2qi;
  if (arg0 == NOT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx2qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_clrsbvnx2qi;
  if (arg0 == CLZ
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_clzvnx2qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_popcountvnx2qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_qabsvnx2qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_qnegvnx2qi;
  if (arg0 == ABS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_absvnx8hi;
  if (arg0 == NEG
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_negvnx8hi;
  if (arg0 == NOT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx8hi;
  if (arg0 == CLRSB
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_clrsbvnx8hi;
  if (arg0 == CLZ
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_clzvnx8hi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_popcountvnx8hi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_qabsvnx8hi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_qnegvnx8hi;
  if (arg0 == ABS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_absvnx4hi;
  if (arg0 == NEG
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_negvnx4hi;
  if (arg0 == NOT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx4hi;
  if (arg0 == CLRSB
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_clrsbvnx4hi;
  if (arg0 == CLZ
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_clzvnx4hi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_popcountvnx4hi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_qabsvnx4hi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_qnegvnx4hi;
  if (arg0 == ABS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_absvnx2hi;
  if (arg0 == NEG
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_negvnx2hi;
  if (arg0 == NOT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx2hi;
  if (arg0 == CLRSB
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_clrsbvnx2hi;
  if (arg0 == CLZ
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_clzvnx2hi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_popcountvnx2hi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_qabsvnx2hi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_qnegvnx2hi;
  if (arg0 == ABS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_absvnx4si;
  if (arg0 == NEG
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_negvnx4si;
  if (arg0 == NOT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx4si;
  if (arg0 == CLRSB
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_clrsbvnx4si;
  if (arg0 == CLZ
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_clzvnx4si;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_popcountvnx4si;
  if (arg0 == SS_ABS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_qabsvnx4si;
  if (arg0 == SS_NEG
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_qnegvnx4si;
  if (arg0 == ABS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_absvnx2si;
  if (arg0 == NEG
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_negvnx2si;
  if (arg0 == NOT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx2si;
  if (arg0 == CLRSB
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_clrsbvnx2si;
  if (arg0 == CLZ
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_clzvnx2si;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_popcountvnx2si;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_qabsvnx2si;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_qnegvnx2si;
  if (arg0 == ABS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_absvnx2di;
  if (arg0 == NEG
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_negvnx2di;
  if (arg0 == NOT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_one_cmplvnx2di;
  if (arg0 == CLRSB
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_clrsbvnx2di;
  if (arg0 == CLZ
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_clzvnx2di;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_popcountvnx2di;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_qabsvnx2di;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_qnegvnx2di;
  if (arg0 == MULT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_mulvnx16qi;
  if (arg0 == SMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_smaxvnx16qi;
  if (arg0 == SMIN
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_sminvnx16qi;
  if (arg0 == UMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_umaxvnx16qi;
  if (arg0 == UMIN
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_uminvnx16qi;
  if (arg0 == MULT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_mulvnx8qi;
  if (arg0 == SMAX
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_smaxvnx8qi;
  if (arg0 == SMIN
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_sminvnx8qi;
  if (arg0 == UMAX
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_umaxvnx8qi;
  if (arg0 == UMIN
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_uminvnx8qi;
  if (arg0 == MULT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_mulvnx4qi;
  if (arg0 == SMAX
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_smaxvnx4qi;
  if (arg0 == SMIN
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_sminvnx4qi;
  if (arg0 == UMAX
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_umaxvnx4qi;
  if (arg0 == UMIN
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_uminvnx4qi;
  if (arg0 == MULT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_mulvnx2qi;
  if (arg0 == SMAX
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_smaxvnx2qi;
  if (arg0 == SMIN
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_sminvnx2qi;
  if (arg0 == UMAX
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_umaxvnx2qi;
  if (arg0 == UMIN
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_uminvnx2qi;
  if (arg0 == MULT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_mulvnx8hi;
  if (arg0 == SMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_smaxvnx8hi;
  if (arg0 == SMIN
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_sminvnx8hi;
  if (arg0 == UMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_umaxvnx8hi;
  if (arg0 == UMIN
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_uminvnx8hi;
  if (arg0 == MULT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_mulvnx4hi;
  if (arg0 == SMAX
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_smaxvnx4hi;
  if (arg0 == SMIN
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_sminvnx4hi;
  if (arg0 == UMAX
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_umaxvnx4hi;
  if (arg0 == UMIN
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_uminvnx4hi;
  if (arg0 == MULT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_mulvnx2hi;
  if (arg0 == SMAX
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_smaxvnx2hi;
  if (arg0 == SMIN
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_sminvnx2hi;
  if (arg0 == UMAX
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_umaxvnx2hi;
  if (arg0 == UMIN
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_uminvnx2hi;
  if (arg0 == MULT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_mulvnx4si;
  if (arg0 == SMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_smaxvnx4si;
  if (arg0 == SMIN
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_sminvnx4si;
  if (arg0 == UMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_umaxvnx4si;
  if (arg0 == UMIN
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_uminvnx4si;
  if (arg0 == MULT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_mulvnx2si;
  if (arg0 == SMAX
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_smaxvnx2si;
  if (arg0 == SMIN
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_sminvnx2si;
  if (arg0 == UMAX
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_umaxvnx2si;
  if (arg0 == UMIN
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_uminvnx2si;
  if (arg0 == MULT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_mulvnx2di;
  if (arg0 == SMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_smaxvnx2di;
  if (arg0 == SMIN
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_sminvnx2di;
  if (arg0 == UMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_umaxvnx2di;
  if (arg0 == UMIN
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_uminvnx2di;
  if (arg0 == DIV
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_divvnx4si;
  if (arg0 == UDIV
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_udivvnx4si;
  if (arg0 == DIV
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_divvnx2di;
  if (arg0 == UDIV
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_udivvnx2di;
  if (arg0 == ASHIFT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_ashlvnx16qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_ashrvnx16qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_lshrvnx16qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_ashlvnx8qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_ashrvnx8qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_lshrvnx8qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_ashlvnx4qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_ashrvnx4qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_lshrvnx4qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_ashlvnx2qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_ashrvnx2qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_lshrvnx2qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_ashlvnx8hi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_ashrvnx8hi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_lshrvnx8hi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_ashlvnx4hi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_ashrvnx4hi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_lshrvnx4hi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_ashlvnx2hi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_ashrvnx2hi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_lshrvnx2hi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_ashlvnx4si;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_ashrvnx4si;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_lshrvnx4si;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_ashlvnx2si;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_ashrvnx2si;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_lshrvnx2si;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_ashlvnx2di;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_ashrvnx2di;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_lshrvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_pred (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_aarch64_pred (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_pred (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == ABS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_absvnx16qi;
  if (arg0 == NEG
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_negvnx16qi;
  if (arg0 == NOT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_one_cmplvnx16qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_clrsbvnx16qi;
  if (arg0 == CLZ
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_clzvnx16qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_popcountvnx16qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_qabsvnx16qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_qnegvnx16qi;
  if (arg0 == ABS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_absvnx8qi;
  if (arg0 == NEG
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_negvnx8qi;
  if (arg0 == NOT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_one_cmplvnx8qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_clrsbvnx8qi;
  if (arg0 == CLZ
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_clzvnx8qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_popcountvnx8qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_qabsvnx8qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_qnegvnx8qi;
  if (arg0 == ABS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_absvnx4qi;
  if (arg0 == NEG
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_negvnx4qi;
  if (arg0 == NOT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_one_cmplvnx4qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_clrsbvnx4qi;
  if (arg0 == CLZ
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_clzvnx4qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_popcountvnx4qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_qabsvnx4qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_qnegvnx4qi;
  if (arg0 == ABS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_absvnx2qi;
  if (arg0 == NEG
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_negvnx2qi;
  if (arg0 == NOT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_one_cmplvnx2qi;
  if (arg0 == CLRSB
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_clrsbvnx2qi;
  if (arg0 == CLZ
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_clzvnx2qi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_popcountvnx2qi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_qabsvnx2qi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_qnegvnx2qi;
  if (arg0 == ABS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_absvnx8hi;
  if (arg0 == NEG
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_negvnx8hi;
  if (arg0 == NOT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_one_cmplvnx8hi;
  if (arg0 == CLRSB
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_clrsbvnx8hi;
  if (arg0 == CLZ
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_clzvnx8hi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_popcountvnx8hi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_qabsvnx8hi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_qnegvnx8hi;
  if (arg0 == ABS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_absvnx4hi;
  if (arg0 == NEG
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_negvnx4hi;
  if (arg0 == NOT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_one_cmplvnx4hi;
  if (arg0 == CLRSB
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_clrsbvnx4hi;
  if (arg0 == CLZ
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_clzvnx4hi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_popcountvnx4hi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_qabsvnx4hi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_qnegvnx4hi;
  if (arg0 == ABS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_absvnx2hi;
  if (arg0 == NEG
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_negvnx2hi;
  if (arg0 == NOT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_one_cmplvnx2hi;
  if (arg0 == CLRSB
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_clrsbvnx2hi;
  if (arg0 == CLZ
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_clzvnx2hi;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_popcountvnx2hi;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_qabsvnx2hi;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_qnegvnx2hi;
  if (arg0 == ABS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_absvnx4si;
  if (arg0 == NEG
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_negvnx4si;
  if (arg0 == NOT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_one_cmplvnx4si;
  if (arg0 == CLRSB
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_clrsbvnx4si;
  if (arg0 == CLZ
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_clzvnx4si;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_popcountvnx4si;
  if (arg0 == SS_ABS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_qabsvnx4si;
  if (arg0 == SS_NEG
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_qnegvnx4si;
  if (arg0 == ABS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_absvnx2si;
  if (arg0 == NEG
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_negvnx2si;
  if (arg0 == NOT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_one_cmplvnx2si;
  if (arg0 == CLRSB
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_clrsbvnx2si;
  if (arg0 == CLZ
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_clzvnx2si;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_popcountvnx2si;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_qabsvnx2si;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_qnegvnx2si;
  if (arg0 == ABS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_absvnx2di;
  if (arg0 == NEG
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_negvnx2di;
  if (arg0 == NOT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_one_cmplvnx2di;
  if (arg0 == CLRSB
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_clrsbvnx2di;
  if (arg0 == CLZ
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_clzvnx2di;
  if (arg0 == POPCOUNT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_popcountvnx2di;
  if (arg0 == SS_ABS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_qabsvnx2di;
  if (arg0 == SS_NEG
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_qnegvnx2di;
  if (arg0 == PLUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_addvnx16qi;
  if (arg0 == MINUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_subvnx16qi;
  if (arg0 == MULT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_mulvnx16qi;
  if (arg0 == SMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_smaxvnx16qi;
  if (arg0 == UMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_umaxvnx16qi;
  if (arg0 == SMIN
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_sminvnx16qi;
  if (arg0 == UMIN
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_uminvnx16qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_ashlvnx16qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_ashrvnx16qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_lshrvnx16qi;
  if (arg0 == AND
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_andvnx16qi;
  if (arg0 == IOR
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_iorvnx16qi;
  if (arg0 == XOR
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_xorvnx16qi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_ssaddvnx16qi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_usaddvnx16qi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_sssubvnx16qi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_ussubvnx16qi;
  if (arg0 == PLUS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_addvnx8qi;
  if (arg0 == MINUS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_subvnx8qi;
  if (arg0 == MULT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_mulvnx8qi;
  if (arg0 == SMAX
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_smaxvnx8qi;
  if (arg0 == UMAX
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_umaxvnx8qi;
  if (arg0 == SMIN
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_sminvnx8qi;
  if (arg0 == UMIN
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_uminvnx8qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_ashlvnx8qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_ashrvnx8qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_lshrvnx8qi;
  if (arg0 == AND
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_andvnx8qi;
  if (arg0 == IOR
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_iorvnx8qi;
  if (arg0 == XOR
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_xorvnx8qi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_ssaddvnx8qi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_usaddvnx8qi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_sssubvnx8qi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_ussubvnx8qi;
  if (arg0 == PLUS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_addvnx4qi;
  if (arg0 == MINUS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_subvnx4qi;
  if (arg0 == MULT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_mulvnx4qi;
  if (arg0 == SMAX
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_smaxvnx4qi;
  if (arg0 == UMAX
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_umaxvnx4qi;
  if (arg0 == SMIN
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_sminvnx4qi;
  if (arg0 == UMIN
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_uminvnx4qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_ashlvnx4qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_ashrvnx4qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_lshrvnx4qi;
  if (arg0 == AND
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_andvnx4qi;
  if (arg0 == IOR
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_iorvnx4qi;
  if (arg0 == XOR
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_xorvnx4qi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_ssaddvnx4qi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_usaddvnx4qi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_sssubvnx4qi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_ussubvnx4qi;
  if (arg0 == PLUS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_addvnx2qi;
  if (arg0 == MINUS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_subvnx2qi;
  if (arg0 == MULT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_mulvnx2qi;
  if (arg0 == SMAX
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_smaxvnx2qi;
  if (arg0 == UMAX
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_umaxvnx2qi;
  if (arg0 == SMIN
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_sminvnx2qi;
  if (arg0 == UMIN
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_uminvnx2qi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_ashlvnx2qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_ashrvnx2qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_lshrvnx2qi;
  if (arg0 == AND
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_andvnx2qi;
  if (arg0 == IOR
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_iorvnx2qi;
  if (arg0 == XOR
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_xorvnx2qi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_ssaddvnx2qi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_usaddvnx2qi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_sssubvnx2qi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_ussubvnx2qi;
  if (arg0 == PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_addvnx8hi;
  if (arg0 == MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_subvnx8hi;
  if (arg0 == MULT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_mulvnx8hi;
  if (arg0 == SMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_smaxvnx8hi;
  if (arg0 == UMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_umaxvnx8hi;
  if (arg0 == SMIN
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_sminvnx8hi;
  if (arg0 == UMIN
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_uminvnx8hi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_ashlvnx8hi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_ashrvnx8hi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_lshrvnx8hi;
  if (arg0 == AND
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_andvnx8hi;
  if (arg0 == IOR
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_iorvnx8hi;
  if (arg0 == XOR
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_xorvnx8hi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_ssaddvnx8hi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_usaddvnx8hi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_sssubvnx8hi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_ussubvnx8hi;
  if (arg0 == PLUS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_addvnx4hi;
  if (arg0 == MINUS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_subvnx4hi;
  if (arg0 == MULT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_mulvnx4hi;
  if (arg0 == SMAX
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_smaxvnx4hi;
  if (arg0 == UMAX
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_umaxvnx4hi;
  if (arg0 == SMIN
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_sminvnx4hi;
  if (arg0 == UMIN
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_uminvnx4hi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_ashlvnx4hi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_ashrvnx4hi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_lshrvnx4hi;
  if (arg0 == AND
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_andvnx4hi;
  if (arg0 == IOR
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_iorvnx4hi;
  if (arg0 == XOR
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_xorvnx4hi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_ssaddvnx4hi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_usaddvnx4hi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_sssubvnx4hi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_ussubvnx4hi;
  if (arg0 == PLUS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_addvnx2hi;
  if (arg0 == MINUS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_subvnx2hi;
  if (arg0 == MULT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_mulvnx2hi;
  if (arg0 == SMAX
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_smaxvnx2hi;
  if (arg0 == UMAX
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_umaxvnx2hi;
  if (arg0 == SMIN
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_sminvnx2hi;
  if (arg0 == UMIN
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_uminvnx2hi;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_ashlvnx2hi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_ashrvnx2hi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_lshrvnx2hi;
  if (arg0 == AND
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_andvnx2hi;
  if (arg0 == IOR
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_iorvnx2hi;
  if (arg0 == XOR
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_xorvnx2hi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_ssaddvnx2hi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_usaddvnx2hi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_sssubvnx2hi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_ussubvnx2hi;
  if (arg0 == PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_addvnx4si;
  if (arg0 == MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_subvnx4si;
  if (arg0 == MULT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_mulvnx4si;
  if (arg0 == SMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_smaxvnx4si;
  if (arg0 == UMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_umaxvnx4si;
  if (arg0 == SMIN
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_sminvnx4si;
  if (arg0 == UMIN
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_uminvnx4si;
  if (arg0 == ASHIFT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_ashlvnx4si;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_ashrvnx4si;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_lshrvnx4si;
  if (arg0 == AND
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_andvnx4si;
  if (arg0 == IOR
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_iorvnx4si;
  if (arg0 == XOR
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_xorvnx4si;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_ssaddvnx4si;
  if (arg0 == US_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_usaddvnx4si;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_sssubvnx4si;
  if (arg0 == US_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_ussubvnx4si;
  if (arg0 == PLUS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_addvnx2si;
  if (arg0 == MINUS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_subvnx2si;
  if (arg0 == MULT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_mulvnx2si;
  if (arg0 == SMAX
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_smaxvnx2si;
  if (arg0 == UMAX
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_umaxvnx2si;
  if (arg0 == SMIN
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_sminvnx2si;
  if (arg0 == UMIN
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_uminvnx2si;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_ashlvnx2si;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_ashrvnx2si;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_lshrvnx2si;
  if (arg0 == AND
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_andvnx2si;
  if (arg0 == IOR
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_iorvnx2si;
  if (arg0 == XOR
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_xorvnx2si;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_ssaddvnx2si;
  if (arg0 == US_PLUS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_usaddvnx2si;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_sssubvnx2si;
  if (arg0 == US_MINUS
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_ussubvnx2si;
  if (arg0 == PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_addvnx2di;
  if (arg0 == MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_subvnx2di;
  if (arg0 == MULT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_mulvnx2di;
  if (arg0 == SMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_smaxvnx2di;
  if (arg0 == UMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_umaxvnx2di;
  if (arg0 == SMIN
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_sminvnx2di;
  if (arg0 == UMIN
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_uminvnx2di;
  if (arg0 == ASHIFT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_ashlvnx2di;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_ashrvnx2di;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_lshrvnx2di;
  if (arg0 == AND
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_andvnx2di;
  if (arg0 == IOR
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_iorvnx2di;
  if (arg0 == XOR
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_xorvnx2di;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_ssaddvnx2di;
  if (arg0 == US_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_usaddvnx2di;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_sssubvnx2di;
  if (arg0 == US_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_ussubvnx2di;
  if (arg0 == DIV
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_divvnx4si;
  if (arg0 == UDIV
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_udivvnx4si;
  if (arg0 == DIV
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_divvnx2di;
  if (arg0 == UDIV
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_udivvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_cond (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_cond (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_cond (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred (int arg0, machine_mode arg1)
{
  if (arg0 == 66
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_rbitvnx16qi;
  if (arg0 == 300
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_revbvnx16qi;
  if (arg0 == 301
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_revhvnx16qi;
  if (arg0 == 302
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_revwvnx16qi;
  if (arg0 == 66
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_rbitvnx8hi;
  if (arg0 == 300
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_revbvnx8hi;
  if (arg0 == 301
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_revhvnx8hi;
  if (arg0 == 302
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_revwvnx8hi;
  if (arg0 == 66
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_rbitvnx4si;
  if (arg0 == 300
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_revbvnx4si;
  if (arg0 == 301
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_revhvnx4si;
  if (arg0 == 302
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_revwvnx4si;
  if (arg0 == 66
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_rbitvnx2di;
  if (arg0 == 300
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_revbvnx2di;
  if (arg0 == 301
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_revhvnx2di;
  if (arg0 == 302
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_revwvnx2di;
  if (arg0 == 333
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_absvnx8hf;
  if (arg0 == 360
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_negvnx8hf;
  if (arg0 == 363
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_frecpxvnx8hf;
  if (arg0 == 364
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_roundvnx8hf;
  if (arg0 == 365
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_nearbyintvnx8hf;
  if (arg0 == 366
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_floorvnx8hf;
  if (arg0 == 367
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_frintnvnx8hf;
  if (arg0 == 368
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_ceilvnx8hf;
  if (arg0 == 369
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_rintvnx8hf;
  if (arg0 == 370
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_btruncvnx8hf;
  if (arg0 == 372
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_sqrtvnx8hf;
  if (arg0 == 333
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_absvnx4sf;
  if (arg0 == 360
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_negvnx4sf;
  if (arg0 == 363
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_frecpxvnx4sf;
  if (arg0 == 364
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_roundvnx4sf;
  if (arg0 == 365
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_nearbyintvnx4sf;
  if (arg0 == 366
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_floorvnx4sf;
  if (arg0 == 367
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_frintnvnx4sf;
  if (arg0 == 368
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_ceilvnx4sf;
  if (arg0 == 369
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_rintvnx4sf;
  if (arg0 == 370
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_btruncvnx4sf;
  if (arg0 == 372
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_sqrtvnx4sf;
  if (arg0 == 333
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_absvnx2df;
  if (arg0 == 360
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_negvnx2df;
  if (arg0 == 363
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_frecpxvnx2df;
  if (arg0 == 364
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_roundvnx2df;
  if (arg0 == 365
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_nearbyintvnx2df;
  if (arg0 == 366
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_floorvnx2df;
  if (arg0 == 367
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_frintnvnx2df;
  if (arg0 == 368
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_ceilvnx2df;
  if (arg0 == 369
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_rintvnx2df;
  if (arg0 == 370
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_btruncvnx2df;
  if (arg0 == 372
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_sqrtvnx2df;
  if (arg0 == 304
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_smulhvnx16qi;
  if (arg0 == 305
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_umulhvnx16qi;
  if (arg0 == 304
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_smulhvnx8qi;
  if (arg0 == 305
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_umulhvnx8qi;
  if (arg0 == 304
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_smulhvnx4qi;
  if (arg0 == 305
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_umulhvnx4qi;
  if (arg0 == 304
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_smulhvnx2qi;
  if (arg0 == 305
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_umulhvnx2qi;
  if (arg0 == 304
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_smulhvnx8hi;
  if (arg0 == 305
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_umulhvnx8hi;
  if (arg0 == 304
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_smulhvnx4hi;
  if (arg0 == 305
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_umulhvnx4hi;
  if (arg0 == 304
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_smulhvnx2hi;
  if (arg0 == 305
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_umulhvnx2hi;
  if (arg0 == 304
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_smulhvnx4si;
  if (arg0 == 305
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_umulhvnx4si;
  if (arg0 == 304
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_smulhvnx2si;
  if (arg0 == 305
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_umulhvnx2si;
  if (arg0 == 304
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_smulhvnx2di;
  if (arg0 == 305
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_umulhvnx2di;
  if (arg0 == 371
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fscalevnx8hf;
  if (arg0 == 371
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fscalevnx4sf;
  if (arg0 == 371
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fscalevnx2df;
  if (arg0 == 351
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_divvnx8hf;
  if (arg0 == 359
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_mulxvnx8hf;
  if (arg0 == 351
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_divvnx4sf;
  if (arg0 == 359
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_mulxvnx4sf;
  if (arg0 == 351
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_divvnx2df;
  if (arg0 == 359
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_mulxvnx2df;
  if (arg0 == 334
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_addvnx8hf;
  if (arg0 == 334
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_addvnx4sf;
  if (arg0 == 334
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_addvnx2df;
  if (arg0 == 335
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_cadd90vnx8hf;
  if (arg0 == 336
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_cadd270vnx8hf;
  if (arg0 == 335
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_cadd90vnx4sf;
  if (arg0 == 336
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_cadd270vnx4sf;
  if (arg0 == 335
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_cadd90vnx2df;
  if (arg0 == 336
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_cadd270vnx2df;
  if (arg0 == 373
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_subvnx8hf;
  if (arg0 == 373
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_subvnx4sf;
  if (arg0 == 373
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_subvnx2df;
  if (arg0 == 358
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_mulvnx8hf;
  if (arg0 == 358
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_mulvnx4sf;
  if (arg0 == 358
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_mulvnx2df;
  if (arg0 == 352
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fmax_nanvnx8hf;
  if (arg0 == 353
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_smaxvnx8hf;
  if (arg0 == 354
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fmin_nanvnx8hf;
  if (arg0 == 355
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_sminvnx8hf;
  if (arg0 == 352
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fmax_nanvnx4sf;
  if (arg0 == 353
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_smaxvnx4sf;
  if (arg0 == 354
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fmin_nanvnx4sf;
  if (arg0 == 355
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_sminvnx4sf;
  if (arg0 == 352
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fmax_nanvnx2df;
  if (arg0 == 353
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_smaxvnx2df;
  if (arg0 == 354
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fmin_nanvnx2df;
  if (arg0 == 355
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_sminvnx2df;
  if (arg0 == 356
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fmavnx8hf;
  if (arg0 == 357
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fnmavnx8hf;
  if (arg0 == 361
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fnmsvnx8hf;
  if (arg0 == 362
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fmsvnx8hf;
  if (arg0 == 356
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fmavnx4sf;
  if (arg0 == 357
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fnmavnx4sf;
  if (arg0 == 361
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fnmsvnx4sf;
  if (arg0 == 362
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fmsvnx4sf;
  if (arg0 == 356
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fmavnx2df;
  if (arg0 == 357
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fnmavnx2df;
  if (arg0 == 361
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fnmsvnx2df;
  if (arg0 == 362
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fmsvnx2df;
  if (arg0 == 340
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmlavnx8hf;
  if (arg0 == 341
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmla90vnx8hf;
  if (arg0 == 342
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmla180vnx8hf;
  if (arg0 == 343
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmla270vnx8hf;
  if (arg0 == 340
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmlavnx4sf;
  if (arg0 == 341
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmla90vnx4sf;
  if (arg0 == 342
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmla180vnx4sf;
  if (arg0 == 343
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmla270vnx4sf;
  if (arg0 == 340
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmlavnx2df;
  if (arg0 == 341
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmla90vnx2df;
  if (arg0 == 342
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmla180vnx2df;
  if (arg0 == 343
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmla270vnx2df;
  if (arg0 == 181
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_shaddvnx16qi;
  if (arg0 == 185
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_shsubvnx16qi;
  if (arg0 == 217
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_sqrshlvnx16qi;
  if (arg0 == 183
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_srhaddvnx16qi;
  if (arg0 == 215
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_srshlvnx16qi;
  if (arg0 == 182
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_uhaddvnx16qi;
  if (arg0 == 186
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_uhsubvnx16qi;
  if (arg0 == 218
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_uqrshlvnx16qi;
  if (arg0 == 184
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_urhaddvnx16qi;
  if (arg0 == 216
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_urshlvnx16qi;
  if (arg0 == 181
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_shaddvnx8hi;
  if (arg0 == 185
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_shsubvnx8hi;
  if (arg0 == 217
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_sqrshlvnx8hi;
  if (arg0 == 183
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_srhaddvnx8hi;
  if (arg0 == 215
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_srshlvnx8hi;
  if (arg0 == 182
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_uhaddvnx8hi;
  if (arg0 == 186
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_uhsubvnx8hi;
  if (arg0 == 218
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_uqrshlvnx8hi;
  if (arg0 == 184
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_urhaddvnx8hi;
  if (arg0 == 216
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_urshlvnx8hi;
  if (arg0 == 181
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_shaddvnx4si;
  if (arg0 == 185
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_shsubvnx4si;
  if (arg0 == 217
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_sqrshlvnx4si;
  if (arg0 == 183
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_srhaddvnx4si;
  if (arg0 == 215
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_srshlvnx4si;
  if (arg0 == 182
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_uhaddvnx4si;
  if (arg0 == 186
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_uhsubvnx4si;
  if (arg0 == 218
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_uqrshlvnx4si;
  if (arg0 == 184
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_urhaddvnx4si;
  if (arg0 == 216
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_urshlvnx4si;
  if (arg0 == 181
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_shaddvnx2di;
  if (arg0 == 185
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_shsubvnx2di;
  if (arg0 == 217
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_sqrshlvnx2di;
  if (arg0 == 183
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_srhaddvnx2di;
  if (arg0 == 215
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_srshlvnx2di;
  if (arg0 == 182
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_uhaddvnx2di;
  if (arg0 == 186
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_uhsubvnx2di;
  if (arg0 == 218
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_uqrshlvnx2di;
  if (arg0 == 184
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_urhaddvnx2di;
  if (arg0 == 216
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_urshlvnx2di;
  if (arg0 == 205
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_sqshlvnx16qi;
  if (arg0 == 206
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_uqshlvnx16qi;
  if (arg0 == 205
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_sqshlvnx8hi;
  if (arg0 == 206
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_uqshlvnx8hi;
  if (arg0 == 205
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_sqshlvnx4si;
  if (arg0 == 206
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_uqshlvnx4si;
  if (arg0 == 205
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_sqshlvnx2di;
  if (arg0 == 206
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_uqshlvnx2di;
  if (arg0 == 225
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_addpvnx16qi;
  if (arg0 == 457
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_smaxpvnx16qi;
  if (arg0 == 458
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_sminpvnx16qi;
  if (arg0 == 502
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_umaxpvnx16qi;
  if (arg0 == 503
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_uminpvnx16qi;
  if (arg0 == 225
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_addpvnx8hi;
  if (arg0 == 457
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_smaxpvnx8hi;
  if (arg0 == 458
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_sminpvnx8hi;
  if (arg0 == 502
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_umaxpvnx8hi;
  if (arg0 == 503
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_uminpvnx8hi;
  if (arg0 == 225
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_addpvnx4si;
  if (arg0 == 457
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_smaxpvnx4si;
  if (arg0 == 458
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_sminpvnx4si;
  if (arg0 == 502
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_umaxpvnx4si;
  if (arg0 == 503
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_uminpvnx4si;
  if (arg0 == 225
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_addpvnx2di;
  if (arg0 == 457
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_smaxpvnx2di;
  if (arg0 == 458
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_sminpvnx2di;
  if (arg0 == 502
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_umaxpvnx2di;
  if (arg0 == 503
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_uminpvnx2di;
  if (arg0 == 422
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_faddpvnx8hf;
  if (arg0 == 424
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fmaxpvnx8hf;
  if (arg0 == 423
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fmaxnmpvnx8hf;
  if (arg0 == 426
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fminpvnx8hf;
  if (arg0 == 425
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fminnmpvnx8hf;
  if (arg0 == 422
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_faddpvnx4sf;
  if (arg0 == 424
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fmaxpvnx4sf;
  if (arg0 == 423
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fmaxnmpvnx4sf;
  if (arg0 == 426
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fminpvnx4sf;
  if (arg0 == 425
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fminnmpvnx4sf;
  if (arg0 == 422
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_faddpvnx2df;
  if (arg0 == 424
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fmaxpvnx2df;
  if (arg0 == 423
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fmaxnmpvnx2df;
  if (arg0 == 426
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fminpvnx2df;
  if (arg0 == 425
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fminnmpvnx2df;
  if (arg0 == 415
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcvtltvnx4sf;
  if (arg0 == 415
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcvtltvnx2df;
  if (arg0 == 417
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcvtxvnx4sf;
  if (arg0 == 22
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_urecpevnx4si;
  if (arg0 == 104
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_ursqrtevnx4si;
  if (arg0 == 419
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_flogbvnx8hf;
  if (arg0 == 419
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_flogbvnx4sf;
  if (arg0 == 419
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_flogbvnx2df;
  if (arg0 == 433
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_matchvnx16qi;
  if (arg0 == 434
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_nmatchvnx16qi;
  if (arg0 == 433
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_matchvnx8hi;
  if (arg0 == 434
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_nmatchvnx8hi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_pred (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_aarch64_pred (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_pred (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_aarch64_pred (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_aarch64_pred (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5)
{
  insn_code code = maybe_code_for_aarch64_pred (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 6);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_revbhw (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx16QImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx16qivnx8bi;
  if (arg0 == E_VNx8QImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8qivnx8bi;
  if (arg0 == E_VNx4QImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4qivnx8bi;
  if (arg0 == E_VNx2QImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2qivnx8bi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8hivnx8bi;
  if (arg0 == E_VNx4HImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4hivnx8bi;
  if (arg0 == E_VNx2HImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2hivnx8bi;
  if (arg0 == E_VNx8HFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8hfvnx8bi;
  if (arg0 == E_VNx4HFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4hfvnx8bi;
  if (arg0 == E_VNx2HFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2hfvnx8bi;
  if (arg0 == E_VNx8BFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8bfvnx8bi;
  if (arg0 == E_VNx4BFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4bfvnx8bi;
  if (arg0 == E_VNx2BFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2bfvnx8bi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4sivnx8bi;
  if (arg0 == E_VNx2SImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2sivnx8bi;
  if (arg0 == E_VNx4SFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4sfvnx8bi;
  if (arg0 == E_VNx2SFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2sfvnx8bi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2divnx8bi;
  if (arg0 == E_VNx2DFmode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2dfvnx8bi;
  if (arg0 == E_VNx16QImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx16qivnx4bi;
  if (arg0 == E_VNx8QImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8qivnx4bi;
  if (arg0 == E_VNx4QImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4qivnx4bi;
  if (arg0 == E_VNx2QImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2qivnx4bi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8hivnx4bi;
  if (arg0 == E_VNx4HImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4hivnx4bi;
  if (arg0 == E_VNx2HImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2hivnx4bi;
  if (arg0 == E_VNx8HFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8hfvnx4bi;
  if (arg0 == E_VNx4HFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4hfvnx4bi;
  if (arg0 == E_VNx2HFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2hfvnx4bi;
  if (arg0 == E_VNx8BFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8bfvnx4bi;
  if (arg0 == E_VNx4BFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4bfvnx4bi;
  if (arg0 == E_VNx2BFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2bfvnx4bi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4sivnx4bi;
  if (arg0 == E_VNx2SImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2sivnx4bi;
  if (arg0 == E_VNx4SFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4sfvnx4bi;
  if (arg0 == E_VNx2SFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2sfvnx4bi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2divnx4bi;
  if (arg0 == E_VNx2DFmode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2dfvnx4bi;
  if (arg0 == E_VNx16QImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx16qivnx2bi;
  if (arg0 == E_VNx8QImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8qivnx2bi;
  if (arg0 == E_VNx4QImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4qivnx2bi;
  if (arg0 == E_VNx2QImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2qivnx2bi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8hivnx2bi;
  if (arg0 == E_VNx4HImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4hivnx2bi;
  if (arg0 == E_VNx2HImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2hivnx2bi;
  if (arg0 == E_VNx8HFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8hfvnx2bi;
  if (arg0 == E_VNx4HFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4hfvnx2bi;
  if (arg0 == E_VNx2HFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2hfvnx2bi;
  if (arg0 == E_VNx8BFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx8bfvnx2bi;
  if (arg0 == E_VNx4BFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4bfvnx2bi;
  if (arg0 == E_VNx2BFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2bfvnx2bi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4sivnx2bi;
  if (arg0 == E_VNx2SImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2sivnx2bi;
  if (arg0 == E_VNx4SFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx4sfvnx2bi;
  if (arg0 == E_VNx2SFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2sfvnx2bi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2divnx2bi;
  if (arg0 == E_VNx2DFmode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revbhw_vnx2dfvnx2bi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_revbhw (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_revbhw (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond (int arg0, machine_mode arg1)
{
  if (arg0 == 66
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_rbitvnx16qi;
  if (arg0 == 300
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_revbvnx16qi;
  if (arg0 == 301
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_revhvnx16qi;
  if (arg0 == 302
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_revwvnx16qi;
  if (arg0 == 66
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_rbitvnx8hi;
  if (arg0 == 300
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_revbvnx8hi;
  if (arg0 == 301
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_revhvnx8hi;
  if (arg0 == 302
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_revwvnx8hi;
  if (arg0 == 66
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_rbitvnx4si;
  if (arg0 == 300
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_revbvnx4si;
  if (arg0 == 301
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_revhvnx4si;
  if (arg0 == 302
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_revwvnx4si;
  if (arg0 == 66
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_rbitvnx2di;
  if (arg0 == 300
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_revbvnx2di;
  if (arg0 == 301
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_revhvnx2di;
  if (arg0 == 302
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_revwvnx2di;
  if (arg0 == 333
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_absvnx8hf;
  if (arg0 == 360
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_negvnx8hf;
  if (arg0 == 363
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_frecpxvnx8hf;
  if (arg0 == 364
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_roundvnx8hf;
  if (arg0 == 365
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_nearbyintvnx8hf;
  if (arg0 == 366
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_floorvnx8hf;
  if (arg0 == 367
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_frintnvnx8hf;
  if (arg0 == 368
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_ceilvnx8hf;
  if (arg0 == 369
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_rintvnx8hf;
  if (arg0 == 370
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_btruncvnx8hf;
  if (arg0 == 372
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_sqrtvnx8hf;
  if (arg0 == 333
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_absvnx4sf;
  if (arg0 == 360
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_negvnx4sf;
  if (arg0 == 363
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_frecpxvnx4sf;
  if (arg0 == 364
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_roundvnx4sf;
  if (arg0 == 365
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_nearbyintvnx4sf;
  if (arg0 == 366
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_floorvnx4sf;
  if (arg0 == 367
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_frintnvnx4sf;
  if (arg0 == 368
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_ceilvnx4sf;
  if (arg0 == 369
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_rintvnx4sf;
  if (arg0 == 370
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_btruncvnx4sf;
  if (arg0 == 372
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_sqrtvnx4sf;
  if (arg0 == 333
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_absvnx2df;
  if (arg0 == 360
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_negvnx2df;
  if (arg0 == 363
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_frecpxvnx2df;
  if (arg0 == 364
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_roundvnx2df;
  if (arg0 == 365
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_nearbyintvnx2df;
  if (arg0 == 366
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_floorvnx2df;
  if (arg0 == 367
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_frintnvnx2df;
  if (arg0 == 368
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_ceilvnx2df;
  if (arg0 == 369
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_rintvnx2df;
  if (arg0 == 370
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_btruncvnx2df;
  if (arg0 == 372
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_sqrtvnx2df;
  if (arg0 == 304
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_smulhvnx16qi;
  if (arg0 == 305
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_umulhvnx16qi;
  if (arg0 == 304
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_smulhvnx8hi;
  if (arg0 == 305
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_umulhvnx8hi;
  if (arg0 == 304
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_smulhvnx4si;
  if (arg0 == 305
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_umulhvnx4si;
  if (arg0 == 304
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_smulhvnx2di;
  if (arg0 == 305
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_umulhvnx2di;
  if (arg0 == 378
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_lslvnx16qi;
  if (arg0 == 379
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_asrvnx16qi;
  if (arg0 == 380
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_lsrvnx16qi;
  if (arg0 == 378
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_lslvnx8hi;
  if (arg0 == 379
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_asrvnx8hi;
  if (arg0 == 380
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_lsrvnx8hi;
  if (arg0 == 378
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_lslvnx4si;
  if (arg0 == 379
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_asrvnx4si;
  if (arg0 == 380
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_lsrvnx4si;
  if (arg0 == 393
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_asrdvnx16qi;
  if (arg0 == 204
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_sqshluvnx16qi;
  if (arg0 == 202
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_srshrvnx16qi;
  if (arg0 == 203
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_urshrvnx16qi;
  if (arg0 == 393
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_asrdvnx8qi;
  if (arg0 == 204
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_sqshluvnx8qi;
  if (arg0 == 202
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_srshrvnx8qi;
  if (arg0 == 203
      && arg1 == E_VNx8QImode)
    return CODE_FOR_cond_urshrvnx8qi;
  if (arg0 == 393
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_asrdvnx4qi;
  if (arg0 == 204
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_sqshluvnx4qi;
  if (arg0 == 202
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_srshrvnx4qi;
  if (arg0 == 203
      && arg1 == E_VNx4QImode)
    return CODE_FOR_cond_urshrvnx4qi;
  if (arg0 == 393
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_asrdvnx2qi;
  if (arg0 == 204
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_sqshluvnx2qi;
  if (arg0 == 202
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_srshrvnx2qi;
  if (arg0 == 203
      && arg1 == E_VNx2QImode)
    return CODE_FOR_cond_urshrvnx2qi;
  if (arg0 == 393
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_asrdvnx8hi;
  if (arg0 == 204
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_sqshluvnx8hi;
  if (arg0 == 202
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_srshrvnx8hi;
  if (arg0 == 203
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_urshrvnx8hi;
  if (arg0 == 393
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_asrdvnx4hi;
  if (arg0 == 204
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_sqshluvnx4hi;
  if (arg0 == 202
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_srshrvnx4hi;
  if (arg0 == 203
      && arg1 == E_VNx4HImode)
    return CODE_FOR_cond_urshrvnx4hi;
  if (arg0 == 393
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_asrdvnx2hi;
  if (arg0 == 204
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_sqshluvnx2hi;
  if (arg0 == 202
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_srshrvnx2hi;
  if (arg0 == 203
      && arg1 == E_VNx2HImode)
    return CODE_FOR_cond_urshrvnx2hi;
  if (arg0 == 393
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_asrdvnx4si;
  if (arg0 == 204
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_sqshluvnx4si;
  if (arg0 == 202
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_srshrvnx4si;
  if (arg0 == 203
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_urshrvnx4si;
  if (arg0 == 393
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_asrdvnx2si;
  if (arg0 == 204
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_sqshluvnx2si;
  if (arg0 == 202
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_srshrvnx2si;
  if (arg0 == 203
      && arg1 == E_VNx2SImode)
    return CODE_FOR_cond_urshrvnx2si;
  if (arg0 == 393
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_asrdvnx2di;
  if (arg0 == 204
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_sqshluvnx2di;
  if (arg0 == 202
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_srshrvnx2di;
  if (arg0 == 203
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_urshrvnx2di;
  if (arg0 == 371
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fscalevnx8hf;
  if (arg0 == 371
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fscalevnx4sf;
  if (arg0 == 371
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fscalevnx2df;
  if (arg0 == 334
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_addvnx8hf;
  if (arg0 == 351
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_divvnx8hf;
  if (arg0 == 352
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fmax_nanvnx8hf;
  if (arg0 == 353
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_smaxvnx8hf;
  if (arg0 == 354
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fmin_nanvnx8hf;
  if (arg0 == 355
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_sminvnx8hf;
  if (arg0 == 358
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_mulvnx8hf;
  if (arg0 == 359
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_mulxvnx8hf;
  if (arg0 == 373
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_subvnx8hf;
  if (arg0 == 334
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_addvnx4sf;
  if (arg0 == 351
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_divvnx4sf;
  if (arg0 == 352
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fmax_nanvnx4sf;
  if (arg0 == 353
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_smaxvnx4sf;
  if (arg0 == 354
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fmin_nanvnx4sf;
  if (arg0 == 355
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_sminvnx4sf;
  if (arg0 == 358
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_mulvnx4sf;
  if (arg0 == 359
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_mulxvnx4sf;
  if (arg0 == 373
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_subvnx4sf;
  if (arg0 == 334
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_addvnx2df;
  if (arg0 == 351
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_divvnx2df;
  if (arg0 == 352
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fmax_nanvnx2df;
  if (arg0 == 353
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_smaxvnx2df;
  if (arg0 == 354
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fmin_nanvnx2df;
  if (arg0 == 355
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_sminvnx2df;
  if (arg0 == 358
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_mulvnx2df;
  if (arg0 == 359
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_mulxvnx2df;
  if (arg0 == 373
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_subvnx2df;
  if (arg0 == 335
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_cadd90vnx8hf;
  if (arg0 == 336
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_cadd270vnx8hf;
  if (arg0 == 335
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_cadd90vnx4sf;
  if (arg0 == 336
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_cadd270vnx4sf;
  if (arg0 == 335
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_cadd90vnx2df;
  if (arg0 == 336
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_cadd270vnx2df;
  if (arg0 == 356
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fmavnx8hf;
  if (arg0 == 357
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fnmavnx8hf;
  if (arg0 == 361
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fnmsvnx8hf;
  if (arg0 == 362
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fmsvnx8hf;
  if (arg0 == 356
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fmavnx4sf;
  if (arg0 == 357
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fnmavnx4sf;
  if (arg0 == 361
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fnmsvnx4sf;
  if (arg0 == 362
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fmsvnx4sf;
  if (arg0 == 356
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fmavnx2df;
  if (arg0 == 357
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fnmavnx2df;
  if (arg0 == 361
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fnmsvnx2df;
  if (arg0 == 362
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fmsvnx2df;
  if (arg0 == 340
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fcmlavnx8hf;
  if (arg0 == 341
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fcmla90vnx8hf;
  if (arg0 == 342
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fcmla180vnx8hf;
  if (arg0 == 343
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_fcmla270vnx8hf;
  if (arg0 == 340
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fcmlavnx4sf;
  if (arg0 == 341
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fcmla90vnx4sf;
  if (arg0 == 342
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fcmla180vnx4sf;
  if (arg0 == 343
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fcmla270vnx4sf;
  if (arg0 == 340
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fcmlavnx2df;
  if (arg0 == 341
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fcmla90vnx2df;
  if (arg0 == 342
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fcmla180vnx2df;
  if (arg0 == 343
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fcmla270vnx2df;
  if (arg0 == 181
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_shaddvnx16qi;
  if (arg0 == 185
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_shsubvnx16qi;
  if (arg0 == 217
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_sqrshlvnx16qi;
  if (arg0 == 183
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_srhaddvnx16qi;
  if (arg0 == 215
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_srshlvnx16qi;
  if (arg0 == 196
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_suqaddvnx16qi;
  if (arg0 == 182
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_uhaddvnx16qi;
  if (arg0 == 186
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_uhsubvnx16qi;
  if (arg0 == 218
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_uqrshlvnx16qi;
  if (arg0 == 184
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_urhaddvnx16qi;
  if (arg0 == 216
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_urshlvnx16qi;
  if (arg0 == 195
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_usqaddvnx16qi;
  if (arg0 == 181
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_shaddvnx8hi;
  if (arg0 == 185
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_shsubvnx8hi;
  if (arg0 == 217
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_sqrshlvnx8hi;
  if (arg0 == 183
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_srhaddvnx8hi;
  if (arg0 == 215
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_srshlvnx8hi;
  if (arg0 == 196
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_suqaddvnx8hi;
  if (arg0 == 182
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_uhaddvnx8hi;
  if (arg0 == 186
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_uhsubvnx8hi;
  if (arg0 == 218
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_uqrshlvnx8hi;
  if (arg0 == 184
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_urhaddvnx8hi;
  if (arg0 == 216
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_urshlvnx8hi;
  if (arg0 == 195
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_usqaddvnx8hi;
  if (arg0 == 181
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_shaddvnx4si;
  if (arg0 == 185
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_shsubvnx4si;
  if (arg0 == 217
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_sqrshlvnx4si;
  if (arg0 == 183
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_srhaddvnx4si;
  if (arg0 == 215
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_srshlvnx4si;
  if (arg0 == 196
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_suqaddvnx4si;
  if (arg0 == 182
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_uhaddvnx4si;
  if (arg0 == 186
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_uhsubvnx4si;
  if (arg0 == 218
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_uqrshlvnx4si;
  if (arg0 == 184
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_urhaddvnx4si;
  if (arg0 == 216
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_urshlvnx4si;
  if (arg0 == 195
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_usqaddvnx4si;
  if (arg0 == 181
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_shaddvnx2di;
  if (arg0 == 185
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_shsubvnx2di;
  if (arg0 == 217
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_sqrshlvnx2di;
  if (arg0 == 183
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_srhaddvnx2di;
  if (arg0 == 215
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_srshlvnx2di;
  if (arg0 == 196
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_suqaddvnx2di;
  if (arg0 == 182
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_uhaddvnx2di;
  if (arg0 == 186
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_uhsubvnx2di;
  if (arg0 == 218
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_uqrshlvnx2di;
  if (arg0 == 184
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_urhaddvnx2di;
  if (arg0 == 216
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_urshlvnx2di;
  if (arg0 == 195
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_usqaddvnx2di;
  if (arg0 == 205
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_sqshlvnx16qi;
  if (arg0 == 206
      && arg1 == E_VNx16QImode)
    return CODE_FOR_cond_uqshlvnx16qi;
  if (arg0 == 205
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_sqshlvnx8hi;
  if (arg0 == 206
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_uqshlvnx8hi;
  if (arg0 == 205
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_sqshlvnx4si;
  if (arg0 == 206
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_uqshlvnx4si;
  if (arg0 == 205
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_sqshlvnx2di;
  if (arg0 == 206
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_uqshlvnx2di;
  if (arg0 == 71
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_sadalpvnx8hi;
  if (arg0 == 95
      && arg1 == E_VNx8HImode)
    return CODE_FOR_cond_uadalpvnx8hi;
  if (arg0 == 71
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_sadalpvnx4si;
  if (arg0 == 95
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_uadalpvnx4si;
  if (arg0 == 71
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_sadalpvnx2di;
  if (arg0 == 95
      && arg1 == E_VNx2DImode)
    return CODE_FOR_cond_uadalpvnx2di;
  if (arg0 == 415
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fcvtltvnx4sf;
  if (arg0 == 415
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_fcvtltvnx2df;
  if (arg0 == 417
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_fcvtxvnx4sf;
  if (arg0 == 22
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_urecpevnx4si;
  if (arg0 == 104
      && arg1 == E_VNx4SImode)
    return CODE_FOR_cond_ursqrtevnx4si;
  if (arg0 == 419
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cond_flogbvnx8hf;
  if (arg0 == 419
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cond_flogbvnx4sf;
  if (arg0 == 419
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cond_flogbvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_cond (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_cond (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_cond (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_cond (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4, rtx x5)
{
  insn_code code = maybe_code_for_cond (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 6);
      return GEN_FCN (code) (x0, x1, x2, x3, x4, x5);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_sxt (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_sxtvnx8hivnx8qi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_sxtvnx8hivnx4qi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_sxtvnx8hivnx2qi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_sxtvnx8hivnx4hi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_sxtvnx8hivnx2hi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_sxtvnx8hivnx2si;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_sxtvnx4sivnx8qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_sxtvnx4sivnx4qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_sxtvnx4sivnx2qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_sxtvnx4sivnx4hi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_sxtvnx4sivnx2hi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_sxtvnx4sivnx2si;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_sxtvnx2divnx8qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_sxtvnx2divnx4qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_sxtvnx2divnx2qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_sxtvnx2divnx4hi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_sxtvnx2divnx2hi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_sxtvnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_sxt (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_pred_sxt (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_cond_sxt (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_cond_sxtvnx8hivnx8qi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_cond_sxtvnx8hivnx4qi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_cond_sxtvnx8hivnx2qi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_cond_sxtvnx8hivnx4hi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_cond_sxtvnx8hivnx2hi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_cond_sxtvnx8hivnx2si;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_cond_sxtvnx4sivnx8qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_cond_sxtvnx4sivnx4qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_cond_sxtvnx4sivnx2qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_cond_sxtvnx4sivnx4hi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_cond_sxtvnx4sivnx2hi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_cond_sxtvnx4sivnx2si;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_cond_sxtvnx2divnx8qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_cond_sxtvnx2divnx4qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_cond_sxtvnx2divnx2qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_cond_sxtvnx2divnx4hi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_cond_sxtvnx2divnx2hi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_cond_sxtvnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_cond_sxt (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_cond_sxt (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_cnot (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cnotvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cnotvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cnotvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cnotvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_cnot (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_pred_cnot (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond_cnot (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_cond_cnotvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_cond_cnotvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_cond_cnotvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_cond_cnotvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond_cnot (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_cond_cnot (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve (int arg0, machine_mode arg1)
{
  if (arg0 == 308
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_fexpavnx8hf;
  if (arg0 == 308
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fexpavnx4sf;
  if (arg0 == 308
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_fexpavnx2df;
  if (arg0 == 23
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_frecpevnx8hf;
  if (arg0 == 104
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_frsqrtevnx8hf;
  if (arg0 == 23
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_frecpevnx4sf;
  if (arg0 == 104
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_frsqrtevnx4sf;
  if (arg0 == 23
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_frecpevnx2df;
  if (arg0 == 104
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_frsqrtevnx2df;
  if (arg0 == 378
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_lslvnx16qi;
  if (arg0 == 379
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_asrvnx16qi;
  if (arg0 == 380
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_lsrvnx16qi;
  if (arg0 == 378
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_lslvnx8hi;
  if (arg0 == 379
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_asrvnx8hi;
  if (arg0 == 380
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_lsrvnx8hi;
  if (arg0 == 378
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_lslvnx4si;
  if (arg0 == 379
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_asrvnx4si;
  if (arg0 == 380
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_lsrvnx4si;
  if (arg0 == 311
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_ftsmulvnx8hf;
  if (arg0 == 312
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_ftsselvnx8hf;
  if (arg0 == 311
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_ftsmulvnx4sf;
  if (arg0 == 312
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_ftsselvnx4sf;
  if (arg0 == 311
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_ftsmulvnx2df;
  if (arg0 == 312
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_ftsselvnx2df;
  if (arg0 == 24
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_frecpsvnx8hf;
  if (arg0 == 105
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_frsqrtsvnx8hf;
  if (arg0 == 24
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_frecpsvnx4sf;
  if (arg0 == 105
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_frsqrtsvnx4sf;
  if (arg0 == 24
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_frecpsvnx2df;
  if (arg0 == 105
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_frsqrtsvnx2df;
  if (arg0 == 309
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fmmlavnx4sf;
  if (arg0 == 309
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_fmmlavnx2df;
  if (arg0 == 231
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_zip1vnx16qi;
  if (arg0 == 232
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_zip2vnx16qi;
  if (arg0 == 235
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_trn1vnx16qi;
  if (arg0 == 236
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_trn2vnx16qi;
  if (arg0 == 233
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_uzp1vnx16qi;
  if (arg0 == 234
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_uzp2vnx16qi;
  if (arg0 == 231
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_zip1vnx8qi;
  if (arg0 == 232
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_zip2vnx8qi;
  if (arg0 == 235
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_trn1vnx8qi;
  if (arg0 == 236
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_trn2vnx8qi;
  if (arg0 == 233
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_uzp1vnx8qi;
  if (arg0 == 234
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_uzp2vnx8qi;
  if (arg0 == 231
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_zip1vnx4qi;
  if (arg0 == 232
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_zip2vnx4qi;
  if (arg0 == 235
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_trn1vnx4qi;
  if (arg0 == 236
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_trn2vnx4qi;
  if (arg0 == 233
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_uzp1vnx4qi;
  if (arg0 == 234
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_uzp2vnx4qi;
  if (arg0 == 231
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_zip1vnx2qi;
  if (arg0 == 232
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_zip2vnx2qi;
  if (arg0 == 235
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_trn1vnx2qi;
  if (arg0 == 236
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_trn2vnx2qi;
  if (arg0 == 233
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_uzp1vnx2qi;
  if (arg0 == 234
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_uzp2vnx2qi;
  if (arg0 == 231
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_zip1vnx8hi;
  if (arg0 == 232
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_zip2vnx8hi;
  if (arg0 == 235
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_trn1vnx8hi;
  if (arg0 == 236
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_trn2vnx8hi;
  if (arg0 == 233
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uzp1vnx8hi;
  if (arg0 == 234
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uzp2vnx8hi;
  if (arg0 == 231
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_zip1vnx4hi;
  if (arg0 == 232
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_zip2vnx4hi;
  if (arg0 == 235
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_trn1vnx4hi;
  if (arg0 == 236
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_trn2vnx4hi;
  if (arg0 == 233
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_uzp1vnx4hi;
  if (arg0 == 234
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_uzp2vnx4hi;
  if (arg0 == 231
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_zip1vnx2hi;
  if (arg0 == 232
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_zip2vnx2hi;
  if (arg0 == 235
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_trn1vnx2hi;
  if (arg0 == 236
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_trn2vnx2hi;
  if (arg0 == 233
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_uzp1vnx2hi;
  if (arg0 == 234
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_uzp2vnx2hi;
  if (arg0 == 231
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_zip1vnx8hf;
  if (arg0 == 232
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_zip2vnx8hf;
  if (arg0 == 235
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_trn1vnx8hf;
  if (arg0 == 236
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_trn2vnx8hf;
  if (arg0 == 233
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx8hf;
  if (arg0 == 234
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx8hf;
  if (arg0 == 231
      && arg1 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_zip1vnx4hf;
  if (arg0 == 232
      && arg1 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_zip2vnx4hf;
  if (arg0 == 235
      && arg1 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_trn1vnx4hf;
  if (arg0 == 236
      && arg1 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_trn2vnx4hf;
  if (arg0 == 233
      && arg1 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx4hf;
  if (arg0 == 234
      && arg1 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx4hf;
  if (arg0 == 231
      && arg1 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_zip1vnx2hf;
  if (arg0 == 232
      && arg1 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_zip2vnx2hf;
  if (arg0 == 235
      && arg1 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_trn1vnx2hf;
  if (arg0 == 236
      && arg1 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_trn2vnx2hf;
  if (arg0 == 233
      && arg1 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx2hf;
  if (arg0 == 234
      && arg1 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx2hf;
  if (arg0 == 231
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_zip1vnx8bf;
  if (arg0 == 232
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_zip2vnx8bf;
  if (arg0 == 235
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_trn1vnx8bf;
  if (arg0 == 236
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_trn2vnx8bf;
  if (arg0 == 233
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx8bf;
  if (arg0 == 234
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx8bf;
  if (arg0 == 231
      && arg1 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_zip1vnx4bf;
  if (arg0 == 232
      && arg1 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_zip2vnx4bf;
  if (arg0 == 235
      && arg1 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_trn1vnx4bf;
  if (arg0 == 236
      && arg1 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_trn2vnx4bf;
  if (arg0 == 233
      && arg1 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx4bf;
  if (arg0 == 234
      && arg1 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx4bf;
  if (arg0 == 231
      && arg1 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_zip1vnx2bf;
  if (arg0 == 232
      && arg1 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_zip2vnx2bf;
  if (arg0 == 235
      && arg1 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_trn1vnx2bf;
  if (arg0 == 236
      && arg1 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_trn2vnx2bf;
  if (arg0 == 233
      && arg1 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx2bf;
  if (arg0 == 234
      && arg1 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx2bf;
  if (arg0 == 231
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_zip1vnx4si;
  if (arg0 == 232
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_zip2vnx4si;
  if (arg0 == 235
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_trn1vnx4si;
  if (arg0 == 236
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_trn2vnx4si;
  if (arg0 == 233
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uzp1vnx4si;
  if (arg0 == 234
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uzp2vnx4si;
  if (arg0 == 231
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_zip1vnx2si;
  if (arg0 == 232
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_zip2vnx2si;
  if (arg0 == 235
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_trn1vnx2si;
  if (arg0 == 236
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_trn2vnx2si;
  if (arg0 == 233
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_uzp1vnx2si;
  if (arg0 == 234
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_uzp2vnx2si;
  if (arg0 == 231
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_zip1vnx4sf;
  if (arg0 == 232
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_zip2vnx4sf;
  if (arg0 == 235
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_trn1vnx4sf;
  if (arg0 == 236
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_trn2vnx4sf;
  if (arg0 == 233
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx4sf;
  if (arg0 == 234
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx4sf;
  if (arg0 == 231
      && arg1 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_zip1vnx2sf;
  if (arg0 == 232
      && arg1 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_zip2vnx2sf;
  if (arg0 == 235
      && arg1 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_trn1vnx2sf;
  if (arg0 == 236
      && arg1 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_trn2vnx2sf;
  if (arg0 == 233
      && arg1 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx2sf;
  if (arg0 == 234
      && arg1 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx2sf;
  if (arg0 == 231
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_zip1vnx2di;
  if (arg0 == 232
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_zip2vnx2di;
  if (arg0 == 235
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_trn1vnx2di;
  if (arg0 == 236
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_trn2vnx2di;
  if (arg0 == 233
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uzp1vnx2di;
  if (arg0 == 234
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uzp2vnx2di;
  if (arg0 == 231
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_zip1vnx2df;
  if (arg0 == 232
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_zip2vnx2df;
  if (arg0 == 235
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_trn1vnx2df;
  if (arg0 == 236
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_trn2vnx2df;
  if (arg0 == 233
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_uzp1vnx2df;
  if (arg0 == 234
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_uzp2vnx2df;
  if (arg0 == 320
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_zip1qvnx16qi;
  if (arg0 == 321
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_zip2qvnx16qi;
  if (arg0 == 316
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_trn1qvnx16qi;
  if (arg0 == 317
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_trn2qvnx16qi;
  if (arg0 == 318
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_uzp1qvnx16qi;
  if (arg0 == 319
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_uzp2qvnx16qi;
  if (arg0 == 320
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_zip1qvnx8hi;
  if (arg0 == 321
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_zip2qvnx8hi;
  if (arg0 == 316
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_trn1qvnx8hi;
  if (arg0 == 317
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_trn2qvnx8hi;
  if (arg0 == 318
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uzp1qvnx8hi;
  if (arg0 == 319
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uzp2qvnx8hi;
  if (arg0 == 320
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_zip1qvnx4si;
  if (arg0 == 321
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_zip2qvnx4si;
  if (arg0 == 316
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_trn1qvnx4si;
  if (arg0 == 317
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_trn2qvnx4si;
  if (arg0 == 318
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uzp1qvnx4si;
  if (arg0 == 319
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uzp2qvnx4si;
  if (arg0 == 320
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_zip1qvnx2di;
  if (arg0 == 321
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_zip2qvnx2di;
  if (arg0 == 316
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_trn1qvnx2di;
  if (arg0 == 317
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_trn2qvnx2di;
  if (arg0 == 318
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uzp1qvnx2di;
  if (arg0 == 319
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uzp2qvnx2di;
  if (arg0 == 320
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_zip1qvnx8bf;
  if (arg0 == 321
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_zip2qvnx8bf;
  if (arg0 == 316
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_trn1qvnx8bf;
  if (arg0 == 317
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_trn2qvnx8bf;
  if (arg0 == 318
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_uzp1qvnx8bf;
  if (arg0 == 319
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_uzp2qvnx8bf;
  if (arg0 == 320
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_zip1qvnx8hf;
  if (arg0 == 321
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_zip2qvnx8hf;
  if (arg0 == 316
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_trn1qvnx8hf;
  if (arg0 == 317
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_trn2qvnx8hf;
  if (arg0 == 318
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_uzp1qvnx8hf;
  if (arg0 == 319
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_uzp2qvnx8hf;
  if (arg0 == 320
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_zip1qvnx4sf;
  if (arg0 == 321
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_zip2qvnx4sf;
  if (arg0 == 316
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_trn1qvnx4sf;
  if (arg0 == 317
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_trn2qvnx4sf;
  if (arg0 == 318
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_uzp1qvnx4sf;
  if (arg0 == 319
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_uzp2qvnx4sf;
  if (arg0 == 320
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_zip1qvnx2df;
  if (arg0 == 321
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_zip2qvnx2df;
  if (arg0 == 316
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_trn1qvnx2df;
  if (arg0 == 317
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_trn2qvnx2df;
  if (arg0 == 318
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_uzp1qvnx2df;
  if (arg0 == 319
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_uzp2qvnx2df;
  if (arg0 == 231
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_zip1vnx16bi;
  if (arg0 == 232
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_zip2vnx16bi;
  if (arg0 == 235
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_trn1vnx16bi;
  if (arg0 == 236
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_trn2vnx16bi;
  if (arg0 == 233
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_uzp1vnx16bi;
  if (arg0 == 234
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_uzp2vnx16bi;
  if (arg0 == 231
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_zip1vnx8bi;
  if (arg0 == 232
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_zip2vnx8bi;
  if (arg0 == 235
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_trn1vnx8bi;
  if (arg0 == 236
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_trn2vnx8bi;
  if (arg0 == 233
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_uzp1vnx8bi;
  if (arg0 == 234
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_uzp2vnx8bi;
  if (arg0 == 231
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_zip1vnx4bi;
  if (arg0 == 232
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_zip2vnx4bi;
  if (arg0 == 235
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_trn1vnx4bi;
  if (arg0 == 236
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_trn2vnx4bi;
  if (arg0 == 233
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_uzp1vnx4bi;
  if (arg0 == 234
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_uzp2vnx4bi;
  if (arg0 == 231
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_zip1vnx2bi;
  if (arg0 == 232
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_zip2vnx2bi;
  if (arg0 == 235
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_trn1vnx2bi;
  if (arg0 == 236
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_trn2vnx2bi;
  if (arg0 == 233
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_uzp1vnx2bi;
  if (arg0 == 234
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_uzp2vnx2bi;
  if (arg0 == 289
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_pfirstvnx16bi;
  if (arg0 == 290
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_pnextvnx16bi;
  if (arg0 == 289
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_pfirstvnx8bi;
  if (arg0 == 290
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_pnextvnx8bi;
  if (arg0 == 289
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_pfirstvnx4bi;
  if (arg0 == 290
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_pnextvnx4bi;
  if (arg0 == 289
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_pfirstvnx2bi;
  if (arg0 == 290
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_pnextvnx2bi;
  if (arg0 == 191
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqdmulhvnx16qi;
  if (arg0 == 192
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqrdmulhvnx16qi;
  if (arg0 == 191
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqdmulhvnx8hi;
  if (arg0 == 192
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdmulhvnx8hi;
  if (arg0 == 191
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdmulhvnx4si;
  if (arg0 == 192
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdmulhvnx4si;
  if (arg0 == 191
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdmulhvnx2di;
  if (arg0 == 192
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdmulhvnx2di;
  if (arg0 == 394
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_adclbvnx16qi;
  if (arg0 == 395
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_adcltvnx16qi;
  if (arg0 == 420
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_eorbtvnx16qi;
  if (arg0 == 421
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_eortbvnx16qi;
  if (arg0 == 452
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sbclbvnx16qi;
  if (arg0 == 453
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sbcltvnx16qi;
  if (arg0 == 259
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqrdmlahvnx16qi;
  if (arg0 == 260
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqrdmlshvnx16qi;
  if (arg0 == 394
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_adclbvnx8hi;
  if (arg0 == 395
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_adcltvnx8hi;
  if (arg0 == 420
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_eorbtvnx8hi;
  if (arg0 == 421
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_eortbvnx8hi;
  if (arg0 == 452
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sbclbvnx8hi;
  if (arg0 == 453
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sbcltvnx8hi;
  if (arg0 == 259
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdmlahvnx8hi;
  if (arg0 == 260
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdmlshvnx8hi;
  if (arg0 == 394
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_adclbvnx4si;
  if (arg0 == 395
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_adcltvnx4si;
  if (arg0 == 420
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_eorbtvnx4si;
  if (arg0 == 421
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_eortbvnx4si;
  if (arg0 == 452
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sbclbvnx4si;
  if (arg0 == 453
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sbcltvnx4si;
  if (arg0 == 259
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdmlahvnx4si;
  if (arg0 == 260
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdmlshvnx4si;
  if (arg0 == 394
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_adclbvnx2di;
  if (arg0 == 395
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_adcltvnx2di;
  if (arg0 == 420
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_eorbtvnx2di;
  if (arg0 == 421
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_eortbvnx2di;
  if (arg0 == 452
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sbclbvnx2di;
  if (arg0 == 453
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sbcltvnx2di;
  if (arg0 == 259
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdmlahvnx2di;
  if (arg0 == 260
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdmlshvnx2di;
  if (arg0 == 456
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_slivnx16qi;
  if (arg0 == 484
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_srivnx16qi;
  if (arg0 == 456
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_slivnx8hi;
  if (arg0 == 484
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_srivnx8hi;
  if (arg0 == 456
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_slivnx4si;
  if (arg0 == 484
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_srivnx4si;
  if (arg0 == 456
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_slivnx2di;
  if (arg0 == 484
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_srivnx2di;
  if (arg0 == 450
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_saddwbvnx8hi;
  if (arg0 == 451
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_saddwtvnx8hi;
  if (arg0 == 491
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ssubwbvnx8hi;
  if (arg0 == 492
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ssubwtvnx8hi;
  if (arg0 == 500
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uaddwbvnx8hi;
  if (arg0 == 501
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uaddwtvnx8hi;
  if (arg0 == 518
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_usubwbvnx8hi;
  if (arg0 == 519
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_usubwtvnx8hi;
  if (arg0 == 450
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_saddwbvnx4si;
  if (arg0 == 451
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_saddwtvnx4si;
  if (arg0 == 491
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ssubwbvnx4si;
  if (arg0 == 492
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ssubwtvnx4si;
  if (arg0 == 500
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uaddwbvnx4si;
  if (arg0 == 501
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uaddwtvnx4si;
  if (arg0 == 518
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_usubwbvnx4si;
  if (arg0 == 519
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_usubwtvnx4si;
  if (arg0 == 450
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_saddwbvnx2di;
  if (arg0 == 451
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_saddwtvnx2di;
  if (arg0 == 491
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ssubwbvnx2di;
  if (arg0 == 492
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ssubwtvnx2di;
  if (arg0 == 500
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uaddwbvnx2di;
  if (arg0 == 501
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uaddwtvnx2di;
  if (arg0 == 518
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_usubwbvnx2di;
  if (arg0 == 519
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_usubwtvnx2di;
  if (arg0 == 445
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sabdlbvnx8hi;
  if (arg0 == 446
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sabdltvnx8hi;
  if (arg0 == 447
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_saddlbvnx8hi;
  if (arg0 == 448
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_saddlbtvnx8hi;
  if (arg0 == 449
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_saddltvnx8hi;
  if (arg0 == 461
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_smullbvnx8hi;
  if (arg0 == 462
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_smulltvnx8hi;
  if (arg0 == 465
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqdmullbvnx8hi;
  if (arg0 == 467
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqdmulltvnx8hi;
  if (arg0 == 487
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ssublbvnx8hi;
  if (arg0 == 488
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ssublbtvnx8hi;
  if (arg0 == 489
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ssubltvnx8hi;
  if (arg0 == 490
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ssubltbvnx8hi;
  if (arg0 == 496
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uabdlbvnx8hi;
  if (arg0 == 497
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uabdltvnx8hi;
  if (arg0 == 498
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uaddlbvnx8hi;
  if (arg0 == 499
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uaddltvnx8hi;
  if (arg0 == 506
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_umullbvnx8hi;
  if (arg0 == 507
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_umulltvnx8hi;
  if (arg0 == 516
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_usublbvnx8hi;
  if (arg0 == 517
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_usubltvnx8hi;
  if (arg0 == 445
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sabdlbvnx4si;
  if (arg0 == 446
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sabdltvnx4si;
  if (arg0 == 447
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_saddlbvnx4si;
  if (arg0 == 448
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_saddlbtvnx4si;
  if (arg0 == 449
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_saddltvnx4si;
  if (arg0 == 461
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_smullbvnx4si;
  if (arg0 == 462
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_smulltvnx4si;
  if (arg0 == 465
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdmullbvnx4si;
  if (arg0 == 467
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdmulltvnx4si;
  if (arg0 == 487
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ssublbvnx4si;
  if (arg0 == 488
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ssublbtvnx4si;
  if (arg0 == 489
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ssubltvnx4si;
  if (arg0 == 490
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ssubltbvnx4si;
  if (arg0 == 496
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uabdlbvnx4si;
  if (arg0 == 497
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uabdltvnx4si;
  if (arg0 == 498
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uaddlbvnx4si;
  if (arg0 == 499
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uaddltvnx4si;
  if (arg0 == 506
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_umullbvnx4si;
  if (arg0 == 507
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_umulltvnx4si;
  if (arg0 == 516
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_usublbvnx4si;
  if (arg0 == 517
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_usubltvnx4si;
  if (arg0 == 445
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sabdlbvnx2di;
  if (arg0 == 446
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sabdltvnx2di;
  if (arg0 == 447
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_saddlbvnx2di;
  if (arg0 == 448
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_saddlbtvnx2di;
  if (arg0 == 449
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_saddltvnx2di;
  if (arg0 == 461
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_smullbvnx2di;
  if (arg0 == 462
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_smulltvnx2di;
  if (arg0 == 465
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdmullbvnx2di;
  if (arg0 == 467
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdmulltvnx2di;
  if (arg0 == 487
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ssublbvnx2di;
  if (arg0 == 488
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ssublbtvnx2di;
  if (arg0 == 489
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ssubltvnx2di;
  if (arg0 == 490
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ssubltbvnx2di;
  if (arg0 == 496
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uabdlbvnx2di;
  if (arg0 == 497
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uabdltvnx2di;
  if (arg0 == 498
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uaddlbvnx2di;
  if (arg0 == 499
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uaddltvnx2di;
  if (arg0 == 506
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_umullbvnx2di;
  if (arg0 == 507
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_umulltvnx2di;
  if (arg0 == 516
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_usublbvnx2di;
  if (arg0 == 517
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_usubltvnx2di;
  if (arg0 == 485
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sshllbvnx8hi;
  if (arg0 == 486
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sshlltvnx8hi;
  if (arg0 == 514
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ushllbvnx8hi;
  if (arg0 == 515
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ushlltvnx8hi;
  if (arg0 == 485
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sshllbvnx4si;
  if (arg0 == 486
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sshlltvnx4si;
  if (arg0 == 514
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ushllbvnx4si;
  if (arg0 == 515
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ushlltvnx4si;
  if (arg0 == 485
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sshllbvnx2di;
  if (arg0 == 486
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sshlltvnx2di;
  if (arg0 == 514
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ushllbvnx2di;
  if (arg0 == 515
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ushlltvnx2di;
  if (arg0 == 427
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fmlalbvnx4sf;
  if (arg0 == 428
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fmlaltvnx4sf;
  if (arg0 == 429
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fmlslbvnx4sf;
  if (arg0 == 430
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fmlsltvnx4sf;
  if (arg0 == 480
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqxtnbvnx8hi;
  if (arg0 == 482
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqxtunbvnx8hi;
  if (arg0 == 512
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqxtnbvnx8hi;
  if (arg0 == 480
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqxtnbvnx4si;
  if (arg0 == 482
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqxtunbvnx4si;
  if (arg0 == 512
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqxtnbvnx4si;
  if (arg0 == 480
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqxtnbvnx2di;
  if (arg0 == 482
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqxtunbvnx2di;
  if (arg0 == 512
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqxtnbvnx2di;
  if (arg0 == 481
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqxtntvnx8hi;
  if (arg0 == 483
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqxtuntvnx8hi;
  if (arg0 == 513
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqxtntvnx8hi;
  if (arg0 == 481
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqxtntvnx4si;
  if (arg0 == 483
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqxtuntvnx4si;
  if (arg0 == 513
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqxtntvnx4si;
  if (arg0 == 481
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqxtntvnx2di;
  if (arg0 == 483
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqxtuntvnx2di;
  if (arg0 == 513
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqxtntvnx2di;
  if (arg0 == 396
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_addhnbvnx8hi;
  if (arg0 == 439
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_raddhnbvnx8hi;
  if (arg0 == 443
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_rsubhnbvnx8hi;
  if (arg0 == 493
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_subhnbvnx8hi;
  if (arg0 == 396
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_addhnbvnx4si;
  if (arg0 == 439
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_raddhnbvnx4si;
  if (arg0 == 443
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_rsubhnbvnx4si;
  if (arg0 == 493
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_subhnbvnx4si;
  if (arg0 == 396
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_addhnbvnx2di;
  if (arg0 == 439
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_raddhnbvnx2di;
  if (arg0 == 443
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_rsubhnbvnx2di;
  if (arg0 == 493
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_subhnbvnx2di;
  if (arg0 == 397
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_addhntvnx8hi;
  if (arg0 == 440
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_raddhntvnx8hi;
  if (arg0 == 444
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_rsubhntvnx8hi;
  if (arg0 == 494
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_subhntvnx8hi;
  if (arg0 == 397
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_addhntvnx4si;
  if (arg0 == 440
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_raddhntvnx4si;
  if (arg0 == 444
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_rsubhntvnx4si;
  if (arg0 == 494
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_subhntvnx4si;
  if (arg0 == 397
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_addhntvnx2di;
  if (arg0 == 440
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_raddhntvnx2di;
  if (arg0 == 444
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_rsubhntvnx2di;
  if (arg0 == 494
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_subhntvnx2di;
  if (arg0 == 441
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_rshrnbvnx8hi;
  if (arg0 == 454
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_shrnbvnx8hi;
  if (arg0 == 472
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrshrnbvnx8hi;
  if (arg0 == 474
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrshrunbvnx8hi;
  if (arg0 == 476
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqshrnbvnx8hi;
  if (arg0 == 478
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqshrunbvnx8hi;
  if (arg0 == 508
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqrshrnbvnx8hi;
  if (arg0 == 510
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqshrnbvnx8hi;
  if (arg0 == 441
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_rshrnbvnx4si;
  if (arg0 == 454
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_shrnbvnx4si;
  if (arg0 == 472
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrshrnbvnx4si;
  if (arg0 == 474
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrshrunbvnx4si;
  if (arg0 == 476
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqshrnbvnx4si;
  if (arg0 == 478
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqshrunbvnx4si;
  if (arg0 == 508
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqrshrnbvnx4si;
  if (arg0 == 510
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqshrnbvnx4si;
  if (arg0 == 441
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_rshrnbvnx2di;
  if (arg0 == 454
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_shrnbvnx2di;
  if (arg0 == 472
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrshrnbvnx2di;
  if (arg0 == 474
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrshrunbvnx2di;
  if (arg0 == 476
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqshrnbvnx2di;
  if (arg0 == 478
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqshrunbvnx2di;
  if (arg0 == 508
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqrshrnbvnx2di;
  if (arg0 == 510
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqshrnbvnx2di;
  if (arg0 == 442
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_rshrntvnx8hi;
  if (arg0 == 455
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_shrntvnx8hi;
  if (arg0 == 473
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrshrntvnx8hi;
  if (arg0 == 475
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrshruntvnx8hi;
  if (arg0 == 477
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqshrntvnx8hi;
  if (arg0 == 479
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqshruntvnx8hi;
  if (arg0 == 509
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqrshrntvnx8hi;
  if (arg0 == 511
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqshrntvnx8hi;
  if (arg0 == 442
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_rshrntvnx4si;
  if (arg0 == 455
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_shrntvnx4si;
  if (arg0 == 473
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrshrntvnx4si;
  if (arg0 == 475
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrshruntvnx4si;
  if (arg0 == 477
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqshrntvnx4si;
  if (arg0 == 479
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqshruntvnx4si;
  if (arg0 == 509
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqrshrntvnx4si;
  if (arg0 == 511
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqshrntvnx4si;
  if (arg0 == 442
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_rshrntvnx2di;
  if (arg0 == 455
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_shrntvnx2di;
  if (arg0 == 473
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrshrntvnx2di;
  if (arg0 == 475
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrshruntvnx2di;
  if (arg0 == 477
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqshrntvnx2di;
  if (arg0 == 479
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqshruntvnx2di;
  if (arg0 == 509
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqrshrntvnx2di;
  if (arg0 == 511
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqshrntvnx2di;
  if (arg0 == 402
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_cadd90vnx16qi;
  if (arg0 == 401
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_cadd270vnx16qi;
  if (arg0 == 464
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqcadd90vnx16qi;
  if (arg0 == 463
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqcadd270vnx16qi;
  if (arg0 == 402
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_cadd90vnx8hi;
  if (arg0 == 401
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_cadd270vnx8hi;
  if (arg0 == 464
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqcadd90vnx8hi;
  if (arg0 == 463
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqcadd270vnx8hi;
  if (arg0 == 402
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cadd90vnx4si;
  if (arg0 == 401
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cadd270vnx4si;
  if (arg0 == 464
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqcadd90vnx4si;
  if (arg0 == 463
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqcadd270vnx4si;
  if (arg0 == 402
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cadd90vnx2di;
  if (arg0 == 401
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cadd270vnx2di;
  if (arg0 == 464
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqcadd90vnx2di;
  if (arg0 == 463
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqcadd270vnx2di;
  if (arg0 == 407
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_cmlavnx16qi;
  if (arg0 == 410
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_cmla90vnx16qi;
  if (arg0 == 408
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_cmla180vnx16qi;
  if (arg0 == 409
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_cmla270vnx16qi;
  if (arg0 == 468
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqrdcmlahvnx16qi;
  if (arg0 == 471
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah90vnx16qi;
  if (arg0 == 469
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah180vnx16qi;
  if (arg0 == 470
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah270vnx16qi;
  if (arg0 == 407
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_cmlavnx8hi;
  if (arg0 == 410
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_cmla90vnx8hi;
  if (arg0 == 408
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_cmla180vnx8hi;
  if (arg0 == 409
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_cmla270vnx8hi;
  if (arg0 == 468
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdcmlahvnx8hi;
  if (arg0 == 471
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah90vnx8hi;
  if (arg0 == 469
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah180vnx8hi;
  if (arg0 == 470
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah270vnx8hi;
  if (arg0 == 407
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cmlavnx4si;
  if (arg0 == 410
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cmla90vnx4si;
  if (arg0 == 408
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cmla180vnx4si;
  if (arg0 == 409
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cmla270vnx4si;
  if (arg0 == 468
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdcmlahvnx4si;
  if (arg0 == 471
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah90vnx4si;
  if (arg0 == 469
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah180vnx4si;
  if (arg0 == 470
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah270vnx4si;
  if (arg0 == 407
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cmlavnx2di;
  if (arg0 == 410
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cmla90vnx2di;
  if (arg0 == 408
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cmla180vnx2di;
  if (arg0 == 409
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cmla270vnx2di;
  if (arg0 == 468
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdcmlahvnx2di;
  if (arg0 == 471
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah90vnx2di;
  if (arg0 == 469
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah180vnx2di;
  if (arg0 == 470
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdcmlah270vnx2di;
  if (arg0 == 403
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cdotvnx4si;
  if (arg0 == 406
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cdot90vnx4si;
  if (arg0 == 404
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cdot180vnx4si;
  if (arg0 == 405
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_cdot270vnx4si;
  if (arg0 == 403
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cdotvnx2di;
  if (arg0 == 406
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cdot90vnx2di;
  if (arg0 == 404
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cdot180vnx2di;
  if (arg0 == 405
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_cdot270vnx2di;
  if (arg0 == 435
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_pmullbvnx8hi;
  if (arg0 == 437
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_pmulltvnx8hi;
  if (arg0 == 435
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_pmullbvnx2di;
  if (arg0 == 437
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_pmulltvnx2di;
  if (arg0 == 436
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_pmullb_pairvnx16qi;
  if (arg0 == 438
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_pmullt_pairvnx16qi;
  if (arg0 == 436
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_pmullb_pairvnx4si;
  if (arg0 == 438
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_pmullt_pairvnx4si;
  if (arg0 == 436
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_pmullb_pairvnx2di;
  if (arg0 == 438
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_pmullt_pairvnx2di;
  if (arg0 == 398
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_bdepvnx16qi;
  if (arg0 == 399
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_bextvnx16qi;
  if (arg0 == 400
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_bgrpvnx16qi;
  if (arg0 == 398
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_bdepvnx8hi;
  if (arg0 == 399
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_bextvnx8hi;
  if (arg0 == 400
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_bgrpvnx8hi;
  if (arg0 == 398
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_bdepvnx4si;
  if (arg0 == 399
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_bextvnx4si;
  if (arg0 == 400
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_bgrpvnx4si;
  if (arg0 == 398
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_bdepvnx2di;
  if (arg0 == 399
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_bextvnx2di;
  if (arg0 == 400
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_bgrpvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve (int arg0, machine_mode arg1, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_sve (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_aarch64_sve (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_aarch64_sve (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_adr (machine_mode arg0)
{
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_adrvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_adrvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_adr (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_adr (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_adr_shift (machine_mode arg0)
{
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_adrvnx4si_shift;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_adrvnx2di_shift;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_adr_shift (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_adr_shift (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_abd (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == SMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_sabdvnx16qi;
  if (arg0 == UMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_uabdvnx16qi;
  if (arg0 == SMAX
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_sabdvnx8qi;
  if (arg0 == UMAX
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_uabdvnx8qi;
  if (arg0 == SMAX
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_sabdvnx4qi;
  if (arg0 == UMAX
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_uabdvnx4qi;
  if (arg0 == SMAX
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_sabdvnx2qi;
  if (arg0 == UMAX
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_uabdvnx2qi;
  if (arg0 == SMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_sabdvnx8hi;
  if (arg0 == UMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_uabdvnx8hi;
  if (arg0 == SMAX
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_sabdvnx4hi;
  if (arg0 == UMAX
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_uabdvnx4hi;
  if (arg0 == SMAX
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_sabdvnx2hi;
  if (arg0 == UMAX
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_uabdvnx2hi;
  if (arg0 == SMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_sabdvnx4si;
  if (arg0 == UMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_uabdvnx4si;
  if (arg0 == SMAX
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_sabdvnx2si;
  if (arg0 == UMAX
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_uabdvnx2si;
  if (arg0 == SMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_sabdvnx2di;
  if (arg0 == UMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_uabdvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_abd (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_pred_abd (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_cond_abd (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == SMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_cond_sabdvnx16qi;
  if (arg0 == UMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_cond_uabdvnx16qi;
  if (arg0 == SMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_cond_sabdvnx8hi;
  if (arg0 == UMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_cond_uabdvnx8hi;
  if (arg0 == SMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cond_sabdvnx4si;
  if (arg0 == UMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cond_uabdvnx4si;
  if (arg0 == SMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_cond_sabdvnx2di;
  if (arg0 == UMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_cond_uabdvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_cond_abd (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_cond_abd (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == SS_PLUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_ssaddvnx16qi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sssubvnx16qi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ssaddvnx8hi;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sssubvnx8hi;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ssaddvnx4si;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sssubvnx4si;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ssaddvnx2di;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sssubvnx2di;
  if (arg0 == US_PLUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_usaddvnx16qi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_ussubvnx16qi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_usaddvnx8hi;
  if (arg0 == US_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_ussubvnx8hi;
  if (arg0 == US_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_usaddvnx4si;
  if (arg0 == US_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_ussubvnx4si;
  if (arg0 == US_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_usaddvnx2di;
  if (arg0 == US_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_ussubvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_bic (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_bicvnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_bicvnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_bicvnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_bicvnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_bicvnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_bicvnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_bicvnx2hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_bicvnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_bicvnx2si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_bicvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_bic (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_bic (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond_bic (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_cond_bicvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_cond_bicvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_cond_bicvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_cond_bicvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond_bic (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_cond_bic (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cadd3 (int arg0, machine_mode arg1)
{
  if (arg0 == 335
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cadd90vnx8hf3;
  if (arg0 == 336
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_cadd270vnx8hf3;
  if (arg0 == 335
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cadd90vnx4sf3;
  if (arg0 == 336
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_cadd270vnx4sf3;
  if (arg0 == 335
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cadd90vnx2df3;
  if (arg0 == 336
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_cadd270vnx2df3;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cadd3 (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_cadd3 (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_abd (machine_mode arg0)
{
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_abdvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_abdvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_abdvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_abd (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_abd (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_cond_abd (machine_mode arg0)
{
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_cond_abdvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_cond_abdvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_cond_abdvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_cond_abd (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_cond_abd (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_mul_lane (machine_mode arg0)
{
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_mul_lane_vnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_mul_lane_vnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_mul_lane_vnx2df;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_mul_lane_vnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_mul_lane_vnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_mul_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_mul_lane (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_mul_lane (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_z (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == AND
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_pred_andvnx16bi_z;
  if (arg0 == IOR
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_pred_iorvnx16bi_z;
  if (arg0 == XOR
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_pred_xorvnx16bi_z;
  if (arg0 == AND
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_pred_andvnx8bi_z;
  if (arg0 == IOR
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_pred_iorvnx8bi_z;
  if (arg0 == XOR
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_pred_xorvnx8bi_z;
  if (arg0 == AND
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_pred_andvnx4bi_z;
  if (arg0 == IOR
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_pred_iorvnx4bi_z;
  if (arg0 == XOR
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_pred_xorvnx4bi_z;
  if (arg0 == AND
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_pred_andvnx2bi_z;
  if (arg0 == IOR
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_pred_iorvnx2bi_z;
  if (arg0 == XOR
      && arg1 == E_VNx2BImode)
    return CODE_FOR_aarch64_pred_xorvnx2bi_z;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_z (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_pred_z (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_fma (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_fmavnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_fmavnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_fmavnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_fmavnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_fmavnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_fmavnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_fmavnx2hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_fmavnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_fmavnx2si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_fmavnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_fma (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_fma (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_fnma (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_fnmavnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_fnmavnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_fnmavnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_fnmavnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_fnmavnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_fnmavnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_fnmavnx2hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_fnmavnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_fnmavnx2si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_fnmavnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_fnma (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_fnma (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_dot_prod_lane (int arg0, machine_mode arg1)
{
  if (arg0 == 263
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sdot_prod_lanevnx16qi;
  if (arg0 == 264
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_udot_prod_lanevnx16qi;
  if (arg0 == 263
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sdot_prod_lanevnx8hi;
  if (arg0 == 264
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_udot_prod_lanevnx8hi;
  if (arg0 == 520
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_usdot_prod_lanevnx16qi;
  if (arg0 == 521
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sudot_prod_lanevnx16qi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_dot_prod_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_dot_prod_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_dot_prod (int arg0, machine_mode arg1)
{
  if (arg0 == 520
      && arg1 == E_VNx4SImode)
    return CODE_FOR_usdot_prodvnx16qi;
  return CODE_FOR_nothing;
}

insn_code
maybe_code_for_aarch64_sve_add (int arg0, machine_mode arg1)
{
  if (arg0 == 313
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_smatmulvnx16qi;
  if (arg0 == 314
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_umatmulvnx16qi;
  if (arg0 == 315
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_usmatmulvnx16qi;
  if (arg0 == 202
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_add_srshrvnx16qi;
  if (arg0 == 203
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_add_urshrvnx16qi;
  if (arg0 == 202
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_srshrvnx8hi;
  if (arg0 == 203
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_urshrvnx8hi;
  if (arg0 == 202
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_srshrvnx4si;
  if (arg0 == 203
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_urshrvnx4si;
  if (arg0 == 202
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_srshrvnx2di;
  if (arg0 == 203
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_urshrvnx2di;
  if (arg0 == 445
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_sabdlbvnx8hi;
  if (arg0 == 446
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_sabdltvnx8hi;
  if (arg0 == 461
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_smullbvnx8hi;
  if (arg0 == 462
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_smulltvnx8hi;
  if (arg0 == 496
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_uabdlbvnx8hi;
  if (arg0 == 497
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_uabdltvnx8hi;
  if (arg0 == 506
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_umullbvnx8hi;
  if (arg0 == 507
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_umulltvnx8hi;
  if (arg0 == 445
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_sabdlbvnx4si;
  if (arg0 == 446
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_sabdltvnx4si;
  if (arg0 == 461
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_smullbvnx4si;
  if (arg0 == 462
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_smulltvnx4si;
  if (arg0 == 496
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_uabdlbvnx4si;
  if (arg0 == 497
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_uabdltvnx4si;
  if (arg0 == 506
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_umullbvnx4si;
  if (arg0 == 507
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_umulltvnx4si;
  if (arg0 == 445
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_sabdlbvnx2di;
  if (arg0 == 446
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_sabdltvnx2di;
  if (arg0 == 461
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_smullbvnx2di;
  if (arg0 == 462
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_smulltvnx2di;
  if (arg0 == 496
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_uabdlbvnx2di;
  if (arg0 == 497
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_uabdltvnx2di;
  if (arg0 == 506
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_umullbvnx2di;
  if (arg0 == 507
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_umulltvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_add (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_add (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_lane (int arg0, machine_mode arg1)
{
  if (arg0 == 306
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fma_lane_vnx8hf;
  if (arg0 == 307
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fnma_lane_vnx8hf;
  if (arg0 == 306
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fma_lane_vnx4sf;
  if (arg0 == 307
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fnma_lane_vnx4sf;
  if (arg0 == 306
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_fma_lane_vnx2df;
  if (arg0 == 307
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_fnma_lane_vnx2df;
  if (arg0 == 385
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fcmla_lane_vnx8hf;
  if (arg0 == 386
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fcmla90_lane_vnx8hf;
  if (arg0 == 387
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fcmla180_lane_vnx8hf;
  if (arg0 == 388
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fcmla270_lane_vnx8hf;
  if (arg0 == 385
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fcmla_lane_vnx4sf;
  if (arg0 == 386
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fcmla90_lane_vnx4sf;
  if (arg0 == 387
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fcmla180_lane_vnx4sf;
  if (arg0 == 388
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fcmla270_lane_vnx4sf;
  if (arg0 == 427
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fmlalb_lane_vnx4sf;
  if (arg0 == 428
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fmlalt_lane_vnx4sf;
  if (arg0 == 429
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fmlslb_lane_vnx4sf;
  if (arg0 == 430
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fmlslt_lane_vnx4sf;
  if (arg0 == 407
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_cmla_lane_vnx8hi;
  if (arg0 == 410
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_cmla90_lane_vnx8hi;
  if (arg0 == 408
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_cmla180_lane_vnx8hi;
  if (arg0 == 409
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_cmla270_lane_vnx8hi;
  if (arg0 == 468
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sqrdcmlah_lane_vnx8hi;
  if (arg0 == 471
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sqrdcmlah90_lane_vnx8hi;
  if (arg0 == 469
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sqrdcmlah180_lane_vnx8hi;
  if (arg0 == 470
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sqrdcmlah270_lane_vnx8hi;
  if (arg0 == 407
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cmla_lane_vnx4si;
  if (arg0 == 410
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cmla90_lane_vnx4si;
  if (arg0 == 408
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cmla180_lane_vnx4si;
  if (arg0 == 409
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cmla270_lane_vnx4si;
  if (arg0 == 468
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sqrdcmlah_lane_vnx4si;
  if (arg0 == 471
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sqrdcmlah90_lane_vnx4si;
  if (arg0 == 469
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sqrdcmlah180_lane_vnx4si;
  if (arg0 == 470
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sqrdcmlah270_lane_vnx4si;
  if (arg0 == 403
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cdot_lane_vnx4si;
  if (arg0 == 406
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cdot90_lane_vnx4si;
  if (arg0 == 404
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cdot180_lane_vnx4si;
  if (arg0 == 405
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_cdot270_lane_vnx4si;
  if (arg0 == 403
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_cdot_lane_vnx2di;
  if (arg0 == 406
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_cdot90_lane_vnx2di;
  if (arg0 == 404
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_cdot180_lane_vnx2di;
  if (arg0 == 405
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_cdot270_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_tmad (machine_mode arg0)
{
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_tmadvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_tmadvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_tmadvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_tmad (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_tmad (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_vnx4sf (int arg0)
{
  if (arg0 == 522)
    return CODE_FOR_aarch64_sve_bfdotvnx4sf;
  if (arg0 == 523)
    return CODE_FOR_aarch64_sve_bfmlalbvnx4sf;
  if (arg0 == 524)
    return CODE_FOR_aarch64_sve_bfmlaltvnx4sf;
  if (arg0 == 525)
    return CODE_FOR_aarch64_sve_bfmmlavnx4sf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_vnx4sf (int arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_vnx4sf (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_lanevnx4sf (int arg0)
{
  if (arg0 == 522)
    return CODE_FOR_aarch64_sve_bfdot_lanevnx4sf;
  if (arg0 == 523)
    return CODE_FOR_aarch64_sve_bfmlalb_lanevnx4sf;
  if (arg0 == 524)
    return CODE_FOR_aarch64_sve_bfmlalt_lanevnx4sf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_lanevnx4sf (int arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_lanevnx4sf (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_vcond_mask (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx16QImode
      && arg1 == E_VNx16QImode)
    return CODE_FOR_vcond_mask_vnx16qivnx16bi;
  if (arg0 == E_VNx8QImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_vcond_mask_vnx8qivnx8bi;
  if (arg0 == E_VNx4QImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_vcond_mask_vnx4qivnx4bi;
  if (arg0 == E_VNx2QImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_vcond_mask_vnx2qivnx2bi;
  if (arg0 == E_VNx8HImode
      && arg1 == E_VNx8HImode)
    return CODE_FOR_vcond_mask_vnx8hivnx8bi;
  if (arg0 == E_VNx4HImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_vcond_mask_vnx4hivnx4bi;
  if (arg0 == E_VNx2HImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_vcond_mask_vnx2hivnx2bi;
  if (arg0 == E_VNx8HFmode
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_vcond_mask_vnx8hfvnx8bi;
  if (arg0 == E_VNx4HFmode
      && arg1 == E_VNx4HFmode)
    return CODE_FOR_vcond_mask_vnx4hfvnx4bi;
  if (arg0 == E_VNx2HFmode
      && arg1 == E_VNx2HFmode)
    return CODE_FOR_vcond_mask_vnx2hfvnx2bi;
  if (arg0 == E_VNx8BFmode
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_vcond_mask_vnx8bfvnx8bi;
  if (arg0 == E_VNx4BFmode
      && arg1 == E_VNx4BFmode)
    return CODE_FOR_vcond_mask_vnx4bfvnx4bi;
  if (arg0 == E_VNx2BFmode
      && arg1 == E_VNx2BFmode)
    return CODE_FOR_vcond_mask_vnx2bfvnx2bi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4SImode)
    return CODE_FOR_vcond_mask_vnx4sivnx4bi;
  if (arg0 == E_VNx2SImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_vcond_mask_vnx2sivnx2bi;
  if (arg0 == E_VNx4SFmode
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_vcond_mask_vnx4sfvnx4bi;
  if (arg0 == E_VNx2SFmode
      && arg1 == E_VNx2SFmode)
    return CODE_FOR_vcond_mask_vnx2sfvnx2bi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2DImode)
    return CODE_FOR_vcond_mask_vnx2divnx2bi;
  if (arg0 == E_VNx2DFmode
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_vcond_mask_vnx2dfvnx2bi;
  if (arg0 == E_VNx16BImode
      && arg1 == E_VNx16BImode)
    return CODE_FOR_vcond_mask_vnx16bivnx16bi;
  if (arg0 == E_VNx8BImode
      && arg1 == E_VNx8BImode)
    return CODE_FOR_vcond_mask_vnx8bivnx8bi;
  if (arg0 == E_VNx4BImode
      && arg1 == E_VNx4BImode)
    return CODE_FOR_vcond_mask_vnx4bivnx4bi;
  if (arg0 == E_VNx2BImode
      && arg1 == E_VNx2BImode)
    return CODE_FOR_vcond_mask_vnx2bivnx2bi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_vcond_mask (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_vcond_mask (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sel_dup (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sel_dupvnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_sel_dupvnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_sel_dupvnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_sel_dupvnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sel_dupvnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_sel_dupvnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_sel_dupvnx2hi;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sel_dupvnx8hf;
  if (arg0 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sel_dupvnx4hf;
  if (arg0 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sel_dupvnx2hf;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sel_dupvnx8bf;
  if (arg0 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sel_dupvnx4bf;
  if (arg0 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sel_dupvnx2bf;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sel_dupvnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_sel_dupvnx2si;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sel_dupvnx4sf;
  if (arg0 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sel_dupvnx2sf;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sel_dupvnx2di;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sel_dupvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sel_dup (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sel_dup (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_cmp (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == LT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpltvnx16qi;
  if (arg0 == LE
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmplevnx16qi;
  if (arg0 == EQ
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx16qi;
  if (arg0 == NE
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpnevnx16qi;
  if (arg0 == GE
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpgevnx16qi;
  if (arg0 == GT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx16qi;
  if (arg0 == LTU
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmplovnx16qi;
  if (arg0 == LEU
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmplsvnx16qi;
  if (arg0 == GEU
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmphsvnx16qi;
  if (arg0 == GTU
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmphivnx16qi;
  if (arg0 == LT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmpltvnx8qi;
  if (arg0 == LE
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmplevnx8qi;
  if (arg0 == EQ
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx8qi;
  if (arg0 == NE
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmpnevnx8qi;
  if (arg0 == GE
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmpgevnx8qi;
  if (arg0 == GT
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx8qi;
  if (arg0 == LTU
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmplovnx8qi;
  if (arg0 == LEU
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmplsvnx8qi;
  if (arg0 == GEU
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmphsvnx8qi;
  if (arg0 == GTU
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_pred_cmphivnx8qi;
  if (arg0 == LT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmpltvnx4qi;
  if (arg0 == LE
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmplevnx4qi;
  if (arg0 == EQ
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx4qi;
  if (arg0 == NE
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmpnevnx4qi;
  if (arg0 == GE
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmpgevnx4qi;
  if (arg0 == GT
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx4qi;
  if (arg0 == LTU
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmplovnx4qi;
  if (arg0 == LEU
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmplsvnx4qi;
  if (arg0 == GEU
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmphsvnx4qi;
  if (arg0 == GTU
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_pred_cmphivnx4qi;
  if (arg0 == LT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmpltvnx2qi;
  if (arg0 == LE
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmplevnx2qi;
  if (arg0 == EQ
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx2qi;
  if (arg0 == NE
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmpnevnx2qi;
  if (arg0 == GE
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmpgevnx2qi;
  if (arg0 == GT
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx2qi;
  if (arg0 == LTU
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmplovnx2qi;
  if (arg0 == LEU
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmplsvnx2qi;
  if (arg0 == GEU
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmphsvnx2qi;
  if (arg0 == GTU
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_pred_cmphivnx2qi;
  if (arg0 == LT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpltvnx8hi;
  if (arg0 == LE
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmplevnx8hi;
  if (arg0 == EQ
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx8hi;
  if (arg0 == NE
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpnevnx8hi;
  if (arg0 == GE
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpgevnx8hi;
  if (arg0 == GT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx8hi;
  if (arg0 == LTU
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmplovnx8hi;
  if (arg0 == LEU
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmplsvnx8hi;
  if (arg0 == GEU
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmphsvnx8hi;
  if (arg0 == GTU
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmphivnx8hi;
  if (arg0 == LT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmpltvnx4hi;
  if (arg0 == LE
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmplevnx4hi;
  if (arg0 == EQ
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx4hi;
  if (arg0 == NE
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmpnevnx4hi;
  if (arg0 == GE
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmpgevnx4hi;
  if (arg0 == GT
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx4hi;
  if (arg0 == LTU
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmplovnx4hi;
  if (arg0 == LEU
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmplsvnx4hi;
  if (arg0 == GEU
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmphsvnx4hi;
  if (arg0 == GTU
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_pred_cmphivnx4hi;
  if (arg0 == LT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmpltvnx2hi;
  if (arg0 == LE
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmplevnx2hi;
  if (arg0 == EQ
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx2hi;
  if (arg0 == NE
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmpnevnx2hi;
  if (arg0 == GE
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmpgevnx2hi;
  if (arg0 == GT
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx2hi;
  if (arg0 == LTU
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmplovnx2hi;
  if (arg0 == LEU
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmplsvnx2hi;
  if (arg0 == GEU
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmphsvnx2hi;
  if (arg0 == GTU
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_pred_cmphivnx2hi;
  if (arg0 == LT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpltvnx4si;
  if (arg0 == LE
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmplevnx4si;
  if (arg0 == EQ
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx4si;
  if (arg0 == NE
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpnevnx4si;
  if (arg0 == GE
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpgevnx4si;
  if (arg0 == GT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx4si;
  if (arg0 == LTU
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmplovnx4si;
  if (arg0 == LEU
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmplsvnx4si;
  if (arg0 == GEU
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmphsvnx4si;
  if (arg0 == GTU
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmphivnx4si;
  if (arg0 == LT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmpltvnx2si;
  if (arg0 == LE
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmplevnx2si;
  if (arg0 == EQ
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx2si;
  if (arg0 == NE
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmpnevnx2si;
  if (arg0 == GE
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmpgevnx2si;
  if (arg0 == GT
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx2si;
  if (arg0 == LTU
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmplovnx2si;
  if (arg0 == LEU
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmplsvnx2si;
  if (arg0 == GEU
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmphsvnx2si;
  if (arg0 == GTU
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_pred_cmphivnx2si;
  if (arg0 == LT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmpltvnx2di;
  if (arg0 == LE
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmplevnx2di;
  if (arg0 == EQ
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx2di;
  if (arg0 == NE
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmpnevnx2di;
  if (arg0 == GE
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmpgevnx2di;
  if (arg0 == GT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx2di;
  if (arg0 == LTU
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmplovnx2di;
  if (arg0 == LEU
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmplsvnx2di;
  if (arg0 == GEU
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmphsvnx2di;
  if (arg0 == GTU
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_cmphivnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_cmp (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_cmp (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_cmp_wide (int arg0, machine_mode arg1)
{
  if (arg0 == 323
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx16qi_wide;
  if (arg0 == 324
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpgevnx16qi_wide;
  if (arg0 == 325
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx16qi_wide;
  if (arg0 == 326
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmphivnx16qi_wide;
  if (arg0 == 327
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmphsvnx16qi_wide;
  if (arg0 == 328
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmplevnx16qi_wide;
  if (arg0 == 329
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmplovnx16qi_wide;
  if (arg0 == 330
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmplsvnx16qi_wide;
  if (arg0 == 331
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpltvnx16qi_wide;
  if (arg0 == 332
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_cmpnevnx16qi_wide;
  if (arg0 == 323
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx8hi_wide;
  if (arg0 == 324
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpgevnx8hi_wide;
  if (arg0 == 325
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx8hi_wide;
  if (arg0 == 326
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmphivnx8hi_wide;
  if (arg0 == 327
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmphsvnx8hi_wide;
  if (arg0 == 328
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmplevnx8hi_wide;
  if (arg0 == 329
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmplovnx8hi_wide;
  if (arg0 == 330
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmplsvnx8hi_wide;
  if (arg0 == 331
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpltvnx8hi_wide;
  if (arg0 == 332
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_cmpnevnx8hi_wide;
  if (arg0 == 323
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpeqvnx4si_wide;
  if (arg0 == 324
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpgevnx4si_wide;
  if (arg0 == 325
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpgtvnx4si_wide;
  if (arg0 == 326
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmphivnx4si_wide;
  if (arg0 == 327
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmphsvnx4si_wide;
  if (arg0 == 328
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmplevnx4si_wide;
  if (arg0 == 329
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmplovnx4si_wide;
  if (arg0 == 330
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmplsvnx4si_wide;
  if (arg0 == 331
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpltvnx4si_wide;
  if (arg0 == 332
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_cmpnevnx4si_wide;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_cmp_wide (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_cmp_wide (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_while (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_lesivnx16bi;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ultsivnx16bi;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ulesivnx16bi;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ltsivnx16bi;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gesivnx16bi;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gtsivnx16bi;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugtsivnx16bi;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugesivnx16bi;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_rwsivnx16bi;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_wrsivnx16bi;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ledivnx16bi;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ultdivnx16bi;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_uledivnx16bi;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ltdivnx16bi;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gedivnx16bi;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gtdivnx16bi;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugtdivnx16bi;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugedivnx16bi;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_rwdivnx16bi;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_wrdivnx16bi;
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_lesivnx8bi;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ultsivnx8bi;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ulesivnx8bi;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ltsivnx8bi;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gesivnx8bi;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gtsivnx8bi;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugtsivnx8bi;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugesivnx8bi;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_rwsivnx8bi;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_wrsivnx8bi;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ledivnx8bi;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ultdivnx8bi;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_uledivnx8bi;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ltdivnx8bi;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gedivnx8bi;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gtdivnx8bi;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugtdivnx8bi;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugedivnx8bi;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_rwdivnx8bi;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_wrdivnx8bi;
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_lesivnx4bi;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ultsivnx4bi;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ulesivnx4bi;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ltsivnx4bi;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gesivnx4bi;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gtsivnx4bi;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugtsivnx4bi;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugesivnx4bi;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_rwsivnx4bi;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_wrsivnx4bi;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ledivnx4bi;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ultdivnx4bi;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_uledivnx4bi;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ltdivnx4bi;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gedivnx4bi;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gtdivnx4bi;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugtdivnx4bi;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugedivnx4bi;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_rwdivnx4bi;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_wrdivnx4bi;
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_lesivnx2bi;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ultsivnx2bi;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ulesivnx2bi;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ltsivnx2bi;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gesivnx2bi;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gtsivnx2bi;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugtsivnx2bi;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugesivnx2bi;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_rwsivnx2bi;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_wrsivnx2bi;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ledivnx2bi;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ultdivnx2bi;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_uledivnx2bi;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ltdivnx2bi;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gedivnx2bi;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gtdivnx2bi;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugtdivnx2bi;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugedivnx2bi;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_rwdivnx2bi;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_wrdivnx2bi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_while (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_while (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_while_ptest (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_lesivnx16bi_ptest;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ultsivnx16bi_ptest;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ulesivnx16bi_ptest;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ltsivnx16bi_ptest;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gesivnx16bi_ptest;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gtsivnx16bi_ptest;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugtsivnx16bi_ptest;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugesivnx16bi_ptest;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_rwsivnx16bi_ptest;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_wrsivnx16bi_ptest;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ledivnx16bi_ptest;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ultdivnx16bi_ptest;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_uledivnx16bi_ptest;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ltdivnx16bi_ptest;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gedivnx16bi_ptest;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_gtdivnx16bi_ptest;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugtdivnx16bi_ptest;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_ugedivnx16bi_ptest;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_rwdivnx16bi_ptest;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_while_wrdivnx16bi_ptest;
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_lesivnx8bi_ptest;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ultsivnx8bi_ptest;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ulesivnx8bi_ptest;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ltsivnx8bi_ptest;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gesivnx8bi_ptest;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gtsivnx8bi_ptest;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugtsivnx8bi_ptest;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugesivnx8bi_ptest;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_rwsivnx8bi_ptest;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_wrsivnx8bi_ptest;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ledivnx8bi_ptest;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ultdivnx8bi_ptest;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_uledivnx8bi_ptest;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ltdivnx8bi_ptest;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gedivnx8bi_ptest;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_gtdivnx8bi_ptest;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugtdivnx8bi_ptest;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_ugedivnx8bi_ptest;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_rwdivnx8bi_ptest;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_while_wrdivnx8bi_ptest;
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_lesivnx4bi_ptest;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ultsivnx4bi_ptest;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ulesivnx4bi_ptest;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ltsivnx4bi_ptest;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gesivnx4bi_ptest;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gtsivnx4bi_ptest;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugtsivnx4bi_ptest;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugesivnx4bi_ptest;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_rwsivnx4bi_ptest;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_wrsivnx4bi_ptest;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ledivnx4bi_ptest;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ultdivnx4bi_ptest;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_uledivnx4bi_ptest;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ltdivnx4bi_ptest;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gedivnx4bi_ptest;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_gtdivnx4bi_ptest;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugtdivnx4bi_ptest;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_ugedivnx4bi_ptest;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_rwdivnx4bi_ptest;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_while_wrdivnx4bi_ptest;
  if (arg0 == 131
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_lesivnx2bi_ptest;
  if (arg0 == 132
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ultsivnx2bi_ptest;
  if (arg0 == 133
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ulesivnx2bi_ptest;
  if (arg0 == 134
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ltsivnx2bi_ptest;
  if (arg0 == 127
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gesivnx2bi_ptest;
  if (arg0 == 128
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gtsivnx2bi_ptest;
  if (arg0 == 129
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugtsivnx2bi_ptest;
  if (arg0 == 130
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugesivnx2bi_ptest;
  if (arg0 == 135
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_rwsivnx2bi_ptest;
  if (arg0 == 136
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_wrsivnx2bi_ptest;
  if (arg0 == 131
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ledivnx2bi_ptest;
  if (arg0 == 132
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ultdivnx2bi_ptest;
  if (arg0 == 133
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_uledivnx2bi_ptest;
  if (arg0 == 134
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ltdivnx2bi_ptest;
  if (arg0 == 127
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gedivnx2bi_ptest;
  if (arg0 == 128
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_gtdivnx2bi_ptest;
  if (arg0 == 129
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugtdivnx2bi_ptest;
  if (arg0 == 130
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_ugedivnx2bi_ptest;
  if (arg0 == 135
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_rwdivnx2bi_ptest;
  if (arg0 == 136
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_while_wrdivnx2bi_ptest;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_while_ptest (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_while_ptest (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_fcm (int arg0, machine_mode arg1)
{
  if (arg0 == 337
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmeqvnx8hf;
  if (arg0 == 338
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmgevnx8hf;
  if (arg0 == 339
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmgtvnx8hf;
  if (arg0 == 344
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmlevnx8hf;
  if (arg0 == 345
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmltvnx8hf;
  if (arg0 == 346
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmnevnx8hf;
  if (arg0 == 337
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmeqvnx4sf;
  if (arg0 == 338
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmgevnx4sf;
  if (arg0 == 339
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmgtvnx4sf;
  if (arg0 == 344
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmlevnx4sf;
  if (arg0 == 345
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmltvnx4sf;
  if (arg0 == 346
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmnevnx4sf;
  if (arg0 == 337
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmeqvnx2df;
  if (arg0 == 338
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmgevnx2df;
  if (arg0 == 339
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmgtvnx2df;
  if (arg0 == 344
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmlevnx2df;
  if (arg0 == 345
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmltvnx2df;
  if (arg0 == 346
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmnevnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_fcm (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_fcm (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_fcmuo (machine_mode arg0)
{
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_fcmuovnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_fcmuovnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_fcmuovnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_fcmuo (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_fcmuo (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_fac (int arg0, machine_mode arg1)
{
  if (arg0 == 338
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_facgevnx8hf;
  if (arg0 == 339
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_facgtvnx8hf;
  if (arg0 == 344
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_faclevnx8hf;
  if (arg0 == 345
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_facltvnx8hf;
  if (arg0 == 338
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_facgevnx4sf;
  if (arg0 == 339
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_facgtvnx4sf;
  if (arg0 == 344
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_faclevnx4sf;
  if (arg0 == 345
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_facltvnx4sf;
  if (arg0 == 338
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_facgevnx2df;
  if (arg0 == 339
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_facgtvnx2df;
  if (arg0 == 344
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_faclevnx2df;
  if (arg0 == 345
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_facltvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_fac (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_pred_fac (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_fold_extract (int arg0, machine_mode arg1)
{
  if (arg0 == 140
      && arg1 == E_VNx16QImode)
    return CODE_FOR_fold_extract_after_last_vnx16qi;
  if (arg0 == 141
      && arg1 == E_VNx16QImode)
    return CODE_FOR_fold_extract_last_vnx16qi;
  if (arg0 == 140
      && arg1 == E_VNx8HImode)
    return CODE_FOR_fold_extract_after_last_vnx8hi;
  if (arg0 == 141
      && arg1 == E_VNx8HImode)
    return CODE_FOR_fold_extract_last_vnx8hi;
  if (arg0 == 140
      && arg1 == E_VNx4SImode)
    return CODE_FOR_fold_extract_after_last_vnx4si;
  if (arg0 == 141
      && arg1 == E_VNx4SImode)
    return CODE_FOR_fold_extract_last_vnx4si;
  if (arg0 == 140
      && arg1 == E_VNx2DImode)
    return CODE_FOR_fold_extract_after_last_vnx2di;
  if (arg0 == 141
      && arg1 == E_VNx2DImode)
    return CODE_FOR_fold_extract_last_vnx2di;
  if (arg0 == 140
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_fold_extract_after_last_vnx8bf;
  if (arg0 == 141
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_fold_extract_last_vnx8bf;
  if (arg0 == 140
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_fold_extract_after_last_vnx8hf;
  if (arg0 == 141
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_fold_extract_last_vnx8hf;
  if (arg0 == 140
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_fold_extract_after_last_vnx4sf;
  if (arg0 == 141
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_fold_extract_last_vnx4sf;
  if (arg0 == 140
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_fold_extract_after_last_vnx2df;
  if (arg0 == 141
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_fold_extract_last_vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_fold_extract (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_fold_extract (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_fold_extract_vector (int arg0, machine_mode arg1)
{
  if (arg0 == 140
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx16qi;
  if (arg0 == 141
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx16qi;
  if (arg0 == 140
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx8hi;
  if (arg0 == 141
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx8hi;
  if (arg0 == 140
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx4si;
  if (arg0 == 141
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx4si;
  if (arg0 == 140
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx2di;
  if (arg0 == 141
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx2di;
  if (arg0 == 140
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx8bf;
  if (arg0 == 141
      && arg1 == E_VNx8BFmode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx8bf;
  if (arg0 == 140
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx8hf;
  if (arg0 == 141
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx8hf;
  if (arg0 == 140
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx4sf;
  if (arg0 == 141
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx4sf;
  if (arg0 == 140
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_fold_extract_vector_after_last_vnx2df;
  if (arg0 == 141
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_fold_extract_vector_last_vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_fold_extract_vector (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_fold_extract_vector (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_reduc (int arg0, machine_mode arg1)
{
  if (arg0 == 292
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_sadd_vnx16qi;
  if (arg0 == 293
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_uadd_vnx16qi;
  if (arg0 == 292
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_sadd_vnx8hi;
  if (arg0 == 293
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_uadd_vnx8hi;
  if (arg0 == 292
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_sadd_vnx4si;
  if (arg0 == 293
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_uadd_vnx4si;
  if (arg0 == 292
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_sadd_vnx2di;
  if (arg0 == 293
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_uadd_vnx2di;
  if (arg0 == 294
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_and_vnx16qi;
  if (arg0 == 295
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_ior_vnx16qi;
  if (arg0 == 177
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_smax_vnx16qi;
  if (arg0 == 178
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_smin_vnx16qi;
  if (arg0 == 179
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_umax_vnx16qi;
  if (arg0 == 180
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_umin_vnx16qi;
  if (arg0 == 296
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_pred_reduc_xor_vnx16qi;
  if (arg0 == 294
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_and_vnx8hi;
  if (arg0 == 295
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_ior_vnx8hi;
  if (arg0 == 177
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_smax_vnx8hi;
  if (arg0 == 178
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_smin_vnx8hi;
  if (arg0 == 179
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_umax_vnx8hi;
  if (arg0 == 180
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_umin_vnx8hi;
  if (arg0 == 296
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_pred_reduc_xor_vnx8hi;
  if (arg0 == 294
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_and_vnx4si;
  if (arg0 == 295
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_ior_vnx4si;
  if (arg0 == 177
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_smax_vnx4si;
  if (arg0 == 178
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_smin_vnx4si;
  if (arg0 == 179
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_umax_vnx4si;
  if (arg0 == 180
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_umin_vnx4si;
  if (arg0 == 296
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_pred_reduc_xor_vnx4si;
  if (arg0 == 294
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_and_vnx2di;
  if (arg0 == 295
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_ior_vnx2di;
  if (arg0 == 177
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_smax_vnx2di;
  if (arg0 == 178
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_smin_vnx2di;
  if (arg0 == 179
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_umax_vnx2di;
  if (arg0 == 180
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_umin_vnx2di;
  if (arg0 == 296
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_pred_reduc_xor_vnx2di;
  if (arg0 == 173
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_reduc_plus_vnx8hf;
  if (arg0 == 169
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_reduc_smax_nan_vnx8hf;
  if (arg0 == 168
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_reduc_smax_vnx8hf;
  if (arg0 == 172
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_reduc_smin_nan_vnx8hf;
  if (arg0 == 171
      && arg1 == E_VNx8HFmode)
    return CODE_FOR_aarch64_pred_reduc_smin_vnx8hf;
  if (arg0 == 173
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_reduc_plus_vnx4sf;
  if (arg0 == 169
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_reduc_smax_nan_vnx4sf;
  if (arg0 == 168
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_reduc_smax_vnx4sf;
  if (arg0 == 172
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_reduc_smin_nan_vnx4sf;
  if (arg0 == 171
      && arg1 == E_VNx4SFmode)
    return CODE_FOR_aarch64_pred_reduc_smin_vnx4sf;
  if (arg0 == 173
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_reduc_plus_vnx2df;
  if (arg0 == 169
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_reduc_smax_nan_vnx2df;
  if (arg0 == 168
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_reduc_smax_vnx2df;
  if (arg0 == 172
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_reduc_smin_nan_vnx2df;
  if (arg0 == 171
      && arg1 == E_VNx2DFmode)
    return CODE_FOR_aarch64_pred_reduc_smin_vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_reduc (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_pred_reduc (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_tbl (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_tblvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_tblvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_tblvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_tblvnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_tblvnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_tblvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_tblvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_tblvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_tbl (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_tbl (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_compact (machine_mode arg0)
{
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_compactvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_compactvnx2di;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_compactvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_compactvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_compact (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_compact (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_dup_lane (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2hi;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx8hf;
  if (arg0 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx4hf;
  if (arg0 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2hf;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx8bf;
  if (arg0 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx4bf;
  if (arg0 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2bf;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2si;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx4sf;
  if (arg0 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2sf;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2di;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_dup_lanevnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_dup_lane (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_dup_lane (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_dupq_lane (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_dupq_lanevnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_dupq_lane (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_dupq_lane (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_rev (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_revvnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_revvnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_revvnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_revvnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_revvnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_revvnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_revvnx2hi;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_revvnx8hf;
  if (arg0 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_revvnx4hf;
  if (arg0 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_revvnx2hf;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_revvnx8bf;
  if (arg0 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_revvnx4bf;
  if (arg0 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_revvnx2bf;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_revvnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_revvnx2si;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_revvnx4sf;
  if (arg0 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_revvnx2sf;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_revvnx2di;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_revvnx2df;
  if (arg0 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_revvnx16bi;
  if (arg0 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_revvnx8bi;
  if (arg0 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_revvnx4bi;
  if (arg0 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_revvnx2bi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_rev (machine_mode arg0, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_sve_rev (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_splice (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_splicevnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_splicevnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_splicevnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_splicevnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_splicevnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_splicevnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_splicevnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_splicevnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_splice (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_splice (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_ext (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_extvnx16qi;
  if (arg0 == E_VNx8QImode)
    return CODE_FOR_aarch64_sve_extvnx8qi;
  if (arg0 == E_VNx4QImode)
    return CODE_FOR_aarch64_sve_extvnx4qi;
  if (arg0 == E_VNx2QImode)
    return CODE_FOR_aarch64_sve_extvnx2qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_extvnx8hi;
  if (arg0 == E_VNx4HImode)
    return CODE_FOR_aarch64_sve_extvnx4hi;
  if (arg0 == E_VNx2HImode)
    return CODE_FOR_aarch64_sve_extvnx2hi;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_extvnx8hf;
  if (arg0 == E_VNx4HFmode)
    return CODE_FOR_aarch64_sve_extvnx4hf;
  if (arg0 == E_VNx2HFmode)
    return CODE_FOR_aarch64_sve_extvnx2hf;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_extvnx8bf;
  if (arg0 == E_VNx4BFmode)
    return CODE_FOR_aarch64_sve_extvnx4bf;
  if (arg0 == E_VNx2BFmode)
    return CODE_FOR_aarch64_sve_extvnx2bf;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_extvnx4si;
  if (arg0 == E_VNx2SImode)
    return CODE_FOR_aarch64_sve_extvnx2si;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_extvnx4sf;
  if (arg0 == E_VNx2SFmode)
    return CODE_FOR_aarch64_sve_extvnx2sf;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_extvnx2di;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_extvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_ext (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_ext (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_trn1_conv (machine_mode arg0)
{
  if (arg0 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_trn1_convvnx16bi;
  if (arg0 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_trn1_convvnx8bi;
  if (arg0 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_trn1_convvnx4bi;
  if (arg0 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_trn1_convvnx2bi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_trn1_conv (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_trn1_conv (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_unpk (int arg0, int arg1, machine_mode arg2)
{
  if (arg0 == 122
      && arg1 == 122
      && arg2 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sunpkhi_vnx16qi;
  if (arg0 == 123
      && arg1 == 123
      && arg2 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_uunpkhi_vnx16qi;
  if (arg0 == 124
      && arg1 == 124
      && arg2 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_sunpklo_vnx16qi;
  if (arg0 == 125
      && arg1 == 125
      && arg2 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_uunpklo_vnx16qi;
  if (arg0 == 122
      && arg1 == 122
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sunpkhi_vnx8hi;
  if (arg0 == 123
      && arg1 == 123
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uunpkhi_vnx8hi;
  if (arg0 == 124
      && arg1 == 124
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sunpklo_vnx8hi;
  if (arg0 == 125
      && arg1 == 125
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uunpklo_vnx8hi;
  if (arg0 == 122
      && arg1 == 122
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sunpkhi_vnx4si;
  if (arg0 == 123
      && arg1 == 123
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uunpkhi_vnx4si;
  if (arg0 == 124
      && arg1 == 124
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sunpklo_vnx4si;
  if (arg0 == 125
      && arg1 == 125
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uunpklo_vnx4si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_unpk (int arg0, int arg1, machine_mode arg2, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_sve_unpk (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_nontrunc (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 349
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx8hfvnx8hi;
  if (arg0 == 350
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx8hfvnx8hi;
  if (arg0 == 349
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx4sfvnx8hi;
  if (arg0 == 350
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx4sfvnx8hi;
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx2dfvnx8hi;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx2dfvnx8hi;
  if (arg0 == 349
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx8hfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx8hfvnx4si;
  if (arg0 == 349
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx4sfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx4sfvnx4si;
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx2dfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx2dfvnx4si;
  if (arg0 == 349
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx8hfvnx2di;
  if (arg0 == 350
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx8hfvnx2di;
  if (arg0 == 349
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx4sfvnx2di;
  if (arg0 == 350
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx4sfvnx2di;
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_fix_trunc_nontruncvnx2dfvnx2di;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_nontruncvnx2dfvnx2di;
  if (arg0 == 348
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fcvt_nontruncvnx8hfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_fcvt_nontruncvnx8hfvnx2df;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fcvt_nontruncvnx4sfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_fcvt_nontruncvnx4sfvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_nontrunc (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_nontrunc (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_trunc (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fix_trunc_truncvnx2dfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_fixuns_trunc_truncvnx2dfvnx4si;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_fcvt_truncvnx4sfvnx8hf;
  if (arg0 == 348
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_fcvt_truncvnx2dfvnx8hf;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fcvt_truncvnx4sfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_fcvt_truncvnx2dfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_fcvt_truncvnx4sfvnx8bf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_trunc (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_trunc (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond_nontrunc (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 349
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx8hfvnx8hi;
  if (arg0 == 350
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx8hfvnx8hi;
  if (arg0 == 349
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx4sfvnx8hi;
  if (arg0 == 350
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx4sfvnx8hi;
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx2dfvnx8hi;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx8HImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx2dfvnx8hi;
  if (arg0 == 349
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx8hfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx8hfvnx4si;
  if (arg0 == 349
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx4sfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx4sfvnx4si;
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx2dfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx2dfvnx4si;
  if (arg0 == 349
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx8hfvnx2di;
  if (arg0 == 350
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx8hfvnx2di;
  if (arg0 == 349
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx4sfvnx2di;
  if (arg0 == 350
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx4sfvnx2di;
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_cond_fix_trunc_nontruncvnx2dfvnx2di;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx2DImode)
    return CODE_FOR_cond_fixuns_trunc_nontruncvnx2dfvnx2di;
  if (arg0 == 348
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_fcvt_nontruncvnx8hfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx8HFmode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_fcvt_nontruncvnx8hfvnx2df;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_fcvt_nontruncvnx4sfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_fcvt_nontruncvnx4sfvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond_nontrunc (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_cond_nontrunc (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond_trunc (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 349
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fix_trunc_truncvnx2dfvnx4si;
  if (arg0 == 350
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SImode)
    return CODE_FOR_cond_fixuns_trunc_truncvnx2dfvnx4si;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_fcvt_truncvnx4sfvnx8hf;
  if (arg0 == 348
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_fcvt_truncvnx2dfvnx8hf;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_fcvt_truncvnx4sfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx2DFmode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_fcvt_truncvnx2dfvnx4sf;
  if (arg0 == 348
      && arg1 == E_VNx4SFmode
      && arg2 == E_VNx8BFmode)
    return CODE_FOR_cond_fcvt_truncvnx4sfvnx8bf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond_trunc (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_cond_trunc (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_nonextend (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 374
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx8hivnx8hf;
  if (arg0 == 375
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx8hivnx8hf;
  if (arg0 == 374
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx8hivnx4sf;
  if (arg0 == 375
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx8hivnx4sf;
  if (arg0 == 374
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx8hivnx2df;
  if (arg0 == 375
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx8hivnx2df;
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx4sivnx8hf;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx4sivnx8hf;
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx4sivnx4sf;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx4sivnx4sf;
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx4sivnx2df;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx4sivnx2df;
  if (arg0 == 374
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx2divnx8hf;
  if (arg0 == 375
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx2divnx8hf;
  if (arg0 == 374
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx2divnx4sf;
  if (arg0 == 375
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx2divnx4sf;
  if (arg0 == 374
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_float_nonextendvnx2divnx2df;
  if (arg0 == 375
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_floatuns_nonextendvnx2divnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_nonextend (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_nonextend (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_extend (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_float_extendvnx4sivnx2df;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve_floatuns_extendvnx4sivnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_extend (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_extend (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond_nonextend (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 374
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_float_nonextendvnx8hivnx8hf;
  if (arg0 == 375
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx8hivnx8hf;
  if (arg0 == 374
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_float_nonextendvnx8hivnx4sf;
  if (arg0 == 375
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx8hivnx4sf;
  if (arg0 == 374
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_float_nonextendvnx8hivnx2df;
  if (arg0 == 375
      && arg1 == E_VNx8HImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx8hivnx2df;
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_float_nonextendvnx4sivnx8hf;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx4sivnx8hf;
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_float_nonextendvnx4sivnx4sf;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx4sivnx4sf;
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_float_nonextendvnx4sivnx2df;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx4sivnx2df;
  if (arg0 == 374
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_float_nonextendvnx2divnx8hf;
  if (arg0 == 375
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx8HFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx2divnx8hf;
  if (arg0 == 374
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_float_nonextendvnx2divnx4sf;
  if (arg0 == 375
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4SFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx2divnx4sf;
  if (arg0 == 374
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_float_nonextendvnx2divnx2df;
  if (arg0 == 375
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_floatuns_nonextendvnx2divnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond_nonextend (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_cond_nonextend (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_cond_extend (int arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == 374
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_float_extendvnx4sivnx2df;
  if (arg0 == 375
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2DFmode)
    return CODE_FOR_cond_floatuns_extendvnx4sivnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_cond_extend (int arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_cond_extend (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_cvtnt (machine_mode arg0)
{
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve_cvtntvnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve_cvtntvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve_cvtntvnx4sf;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_cvtnt (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_cvtnt (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_punpk (int arg0, machine_mode arg1)
{
  if (arg0 == 125
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_punpklo_vnx16bi;
  if (arg0 == 123
      && arg1 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_punpkhi_vnx16bi;
  if (arg0 == 125
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_punpklo_vnx8bi;
  if (arg0 == 123
      && arg1 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_punpkhi_vnx8bi;
  if (arg0 == 125
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_punpklo_vnx4bi;
  if (arg0 == 123
      && arg1 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_punpkhi_vnx4bi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_punpk (int arg0, machine_mode arg1, rtx x0, rtx x1)
{
  insn_code code = maybe_code_for_aarch64_sve_punpk (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 2);
      return GEN_FCN (code) (x0, x1);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_brk (int arg0)
{
  if (arg0 == 284)
    return CODE_FOR_aarch64_brka;
  if (arg0 == 285)
    return CODE_FOR_aarch64_brkb;
  if (arg0 == 286)
    return CODE_FOR_aarch64_brkn;
  if (arg0 == 287)
    return CODE_FOR_aarch64_brkpa;
  if (arg0 == 288)
    return CODE_FOR_aarch64_brkpb;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_brk (int arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_brk (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_pat (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == PLUS
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_sve_incdi_pat;
  if (arg0 == SS_PLUS
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_sve_sqincdi_pat;
  if (arg0 == US_PLUS
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_sve_uqincdi_pat;
  if (arg0 == SS_PLUS
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_sve_sqincsi_pat;
  if (arg0 == US_PLUS
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_sve_uqincsi_pat;
  if (arg0 == PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_incvnx2di_pat;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqincvnx2di_pat;
  if (arg0 == US_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqincvnx2di_pat;
  if (arg0 == PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_incvnx4si_pat;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqincvnx4si_pat;
  if (arg0 == US_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqincvnx4si_pat;
  if (arg0 == PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_incvnx8hi_pat;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqincvnx8hi_pat;
  if (arg0 == US_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqincvnx8hi_pat;
  if (arg0 == MINUS
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_sve_decdi_pat;
  if (arg0 == SS_MINUS
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_sve_sqdecdi_pat;
  if (arg0 == US_MINUS
      && arg1 == E_DImode)
    return CODE_FOR_aarch64_sve_uqdecdi_pat;
  if (arg0 == SS_MINUS
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_sve_sqdecsi_pat;
  if (arg0 == US_MINUS
      && arg1 == E_SImode)
    return CODE_FOR_aarch64_sve_uqdecsi_pat;
  if (arg0 == MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_decvnx2di_pat;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdecvnx2di_pat;
  if (arg0 == US_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqdecvnx2di_pat;
  if (arg0 == MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_decvnx4si_pat;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdecvnx4si_pat;
  if (arg0 == US_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqdecvnx4si_pat;
  if (arg0 == MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_decvnx8hi_pat;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqdecvnx8hi_pat;
  if (arg0 == US_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqdecvnx8hi_pat;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_pat (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_pat (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_pred_cntp (machine_mode arg0)
{
  if (arg0 == E_VNx16BImode)
    return CODE_FOR_aarch64_pred_cntpvnx16bi;
  if (arg0 == E_VNx8BImode)
    return CODE_FOR_aarch64_pred_cntpvnx8bi;
  if (arg0 == E_VNx4BImode)
    return CODE_FOR_aarch64_pred_cntpvnx4bi;
  if (arg0 == E_VNx2BImode)
    return CODE_FOR_aarch64_pred_cntpvnx2bi;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_pred_cntp (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_pred_cntp (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_cntp (rtx_code arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_incdivnx16bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_sqincdivnx16bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_uqincdivnx16bi_cntp;
  if (arg0 == PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_incdivnx8bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_sqincdivnx8bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_uqincdivnx8bi_cntp;
  if (arg0 == PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_incdivnx4bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_sqincdivnx4bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_uqincdivnx4bi_cntp;
  if (arg0 == PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_incdivnx2bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_sqincdivnx2bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_uqincdivnx2bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_sqincsivnx16bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_uqincsivnx16bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_sqincsivnx8bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_uqincsivnx8bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_sqincsivnx4bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_uqincsivnx4bi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_sqincsivnx2bi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_uqincsivnx2bi_cntp;
  if (arg0 == MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_decdivnx16bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_sqdecdivnx16bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_uqdecdivnx16bi_cntp;
  if (arg0 == MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_decdivnx8bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_sqdecdivnx8bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_uqdecdivnx8bi_cntp;
  if (arg0 == MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_decdivnx4bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_sqdecdivnx4bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_uqdecdivnx4bi_cntp;
  if (arg0 == MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_decdivnx2bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_sqdecdivnx2bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_DImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_uqdecdivnx2bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_sqdecsivnx16bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx16BImode)
    return CODE_FOR_aarch64_sve_uqdecsivnx16bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_sqdecsivnx8bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx8BImode)
    return CODE_FOR_aarch64_sve_uqdecsivnx8bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_sqdecsivnx4bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx4BImode)
    return CODE_FOR_aarch64_sve_uqdecsivnx4bi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_sqdecsivnx2bi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_SImode
      && arg2 == E_VNx2BImode)
    return CODE_FOR_aarch64_sve_uqdecsivnx2bi_cntp;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_cntp (rtx_code arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_cntp (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_cntp (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_incvnx2di_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqincvnx2di_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqincvnx2di_cntp;
  if (arg0 == PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_incvnx4si_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqincvnx4si_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqincvnx4si_cntp;
  if (arg0 == PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_incvnx8hi_cntp;
  if (arg0 == SS_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqincvnx8hi_cntp;
  if (arg0 == US_PLUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqincvnx8hi_cntp;
  if (arg0 == MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_decvnx2di_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdecvnx2di_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_uqdecvnx2di_cntp;
  if (arg0 == MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_decvnx4si_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdecvnx4si_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_uqdecvnx4si_cntp;
  if (arg0 == MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_decvnx8hi_cntp;
  if (arg0 == SS_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqdecvnx8hi_cntp;
  if (arg0 == US_MINUS
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_uqdecvnx8hi_cntp;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_cntp (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_cntp (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_gather_ldnt (machine_mode arg0)
{
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_gather_ldntvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_gather_ldntvnx2di;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_gather_ldntvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_gather_ldntvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_gather_ldnt (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_gather_ldnt (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_gather_ldnt (rtx_code arg0, machine_mode arg1, machine_mode arg2)
{
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx8QImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx4sivnx8qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx8QImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx4sivnx8qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx8QImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx2divnx8qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx8QImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx2divnx8qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx4sivnx4qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx4sivnx4qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx2divnx4qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4QImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx2divnx4qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx4sivnx2qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx4sivnx2qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx2divnx2qi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2QImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx2divnx2qi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx4sivnx4hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx4sivnx4hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx2divnx4hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx4HImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx2divnx4hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx4sivnx2hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx4sivnx2hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx2divnx2hi;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2HImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx2divnx2hi;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx4sivnx2si;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx4SImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx4sivnx2si;
  if (arg0 == SIGN_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_ldnt_extendvnx2divnx2si;
  if (arg0 == ZERO_EXTEND
      && arg1 == E_VNx2DImode
      && arg2 == E_VNx2SImode)
    return CODE_FOR_aarch64_gather_ldnt_zero_extendvnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_gather_ldnt (rtx_code arg0, machine_mode arg1, machine_mode arg2, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_gather_ldnt (arg0, arg1, arg2);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_scatter_stnt (machine_mode arg0)
{
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_scatter_stntvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_scatter_stntvnx2di;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_scatter_stntvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_scatter_stntvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_scatter_stnt (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_scatter_stnt (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_scatter_stnt (machine_mode arg0, machine_mode arg1)
{
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx4sivnx8qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx8QImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx2divnx8qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx4sivnx4qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4QImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx2divnx4qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx4sivnx2qi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2QImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx2divnx2qi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx4sivnx4hi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx4HImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx2divnx4hi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx4sivnx2hi;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2HImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx2divnx2hi;
  if (arg0 == E_VNx4SImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx4sivnx2si;
  if (arg0 == E_VNx2DImode
      && arg1 == E_VNx2SImode)
    return CODE_FOR_aarch64_scatter_stnt_vnx2divnx2si;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_scatter_stnt (machine_mode arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_scatter_stnt (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_suqadd_const (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_suqaddvnx16qi_const;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_suqaddvnx8hi_const;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_suqaddvnx4si_const;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_suqaddvnx2di_const;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_suqadd_const (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve_suqadd_const (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_lane (int arg0, machine_mode arg1)
{
  if (arg0 == 191
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqdmulh_lane_vnx8hi;
  if (arg0 == 192
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdmulh_lane_vnx8hi;
  if (arg0 == 191
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdmulh_lane_vnx4si;
  if (arg0 == 192
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdmulh_lane_vnx4si;
  if (arg0 == 191
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdmulh_lane_vnx2di;
  if (arg0 == 192
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdmulh_lane_vnx2di;
  if (arg0 == 259
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdmlah_lane_vnx8hi;
  if (arg0 == 260
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sqrdmlsh_lane_vnx8hi;
  if (arg0 == 259
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdmlah_lane_vnx4si;
  if (arg0 == 260
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqrdmlsh_lane_vnx4si;
  if (arg0 == 259
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdmlah_lane_vnx2di;
  if (arg0 == 260
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqrdmlsh_lane_vnx2di;
  if (arg0 == 461
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_smullb_lane_vnx4si;
  if (arg0 == 462
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_smullt_lane_vnx4si;
  if (arg0 == 465
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdmullb_lane_vnx4si;
  if (arg0 == 467
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sqdmullt_lane_vnx4si;
  if (arg0 == 506
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_umullb_lane_vnx4si;
  if (arg0 == 507
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_umullt_lane_vnx4si;
  if (arg0 == 461
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_smullb_lane_vnx2di;
  if (arg0 == 462
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_smullt_lane_vnx2di;
  if (arg0 == 465
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdmullb_lane_vnx2di;
  if (arg0 == 467
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sqdmullt_lane_vnx2di;
  if (arg0 == 506
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_umullb_lane_vnx2di;
  if (arg0 == 507
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_umullt_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

rtx
maybe_gen_aarch64_sve_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_add_mul_lane (machine_mode arg0)
{
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_mul_lane_vnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_mul_lane_vnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_mul_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_add_mul_lane (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_add_mul_lane (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_sub_mul_lane (machine_mode arg0)
{
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sub_mul_lane_vnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_mul_lane_vnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_mul_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_sub_mul_lane (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_sub_mul_lane (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_xar (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_xarvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_xarvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_xarvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_xarvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_xar (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_xar (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_bcax (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_bcaxvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_bcaxvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_bcaxvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_bcaxvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_bcax (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_bcax (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_eor3 (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_eor3vnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_eor3vnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_eor3vnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_eor3vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_eor3 (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_eor3 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_bsl (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_bslvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_bslvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_bslvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_bslvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_bsl (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_bsl (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_nbsl (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_nbslvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_nbslvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_nbslvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_nbslvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_nbsl (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_nbsl (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_bsl1n (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_bsl1nvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_bsl1nvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_bsl1nvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_bsl1nvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_bsl1n (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_bsl1n (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_bsl2n (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_bsl2nvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_bsl2nvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_bsl2nvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_bsl2nvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_bsl2n (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_bsl2n (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_add (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_add_asrvnx16qi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve_add_lsrvnx16qi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_asrvnx8hi;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_add_lsrvnx8hi;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_asrvnx4si;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_lsrvnx4si;
  if (arg0 == ASHIFTRT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_asrvnx2di;
  if (arg0 == LSHIFTRT
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_lsrvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_add (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_add (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_aba (rtx_code arg0, machine_mode arg1)
{
  if (arg0 == SMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_sabavnx16qi;
  if (arg0 == UMAX
      && arg1 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_uabavnx16qi;
  if (arg0 == SMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_sabavnx8hi;
  if (arg0 == UMAX
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_uabavnx8hi;
  if (arg0 == SMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_sabavnx4si;
  if (arg0 == UMAX
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_uabavnx4si;
  if (arg0 == SMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_sabavnx2di;
  if (arg0 == UMAX
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_uabavnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_aba (rtx_code arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_aba (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_add_lane (int arg0, machine_mode arg1)
{
  if (arg0 == 461
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_smullb_lane_vnx4si;
  if (arg0 == 462
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_smullt_lane_vnx4si;
  if (arg0 == 506
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_umullb_lane_vnx4si;
  if (arg0 == 507
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_add_umullt_lane_vnx4si;
  if (arg0 == 461
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_smullb_lane_vnx2di;
  if (arg0 == 462
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_smullt_lane_vnx2di;
  if (arg0 == 506
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_umullb_lane_vnx2di;
  if (arg0 == 507
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_add_umullt_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_add_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_add_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_qadd (int arg0, machine_mode arg1)
{
  if (arg0 == 465
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullbvnx8hi;
  if (arg0 == 466
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullbtvnx8hi;
  if (arg0 == 467
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmulltvnx8hi;
  if (arg0 == 465
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullbvnx4si;
  if (arg0 == 466
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullbtvnx4si;
  if (arg0 == 467
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmulltvnx4si;
  if (arg0 == 465
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullbvnx2di;
  if (arg0 == 466
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullbtvnx2di;
  if (arg0 == 467
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmulltvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_qadd (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_qadd (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_qadd_lane (int arg0, machine_mode arg1)
{
  if (arg0 == 465
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullb_lane_vnx4si;
  if (arg0 == 467
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullt_lane_vnx4si;
  if (arg0 == 465
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullb_lane_vnx2di;
  if (arg0 == 467
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qadd_sqdmullt_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_qadd_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_qadd_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_sub (int arg0, machine_mode arg1)
{
  if (arg0 == 461
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sub_smullbvnx8hi;
  if (arg0 == 462
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sub_smulltvnx8hi;
  if (arg0 == 506
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sub_umullbvnx8hi;
  if (arg0 == 507
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_sub_umulltvnx8hi;
  if (arg0 == 461
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_smullbvnx4si;
  if (arg0 == 462
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_smulltvnx4si;
  if (arg0 == 506
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_umullbvnx4si;
  if (arg0 == 507
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_umulltvnx4si;
  if (arg0 == 461
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_smullbvnx2di;
  if (arg0 == 462
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_smulltvnx2di;
  if (arg0 == 506
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_umullbvnx2di;
  if (arg0 == 507
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_umulltvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_sub (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_sub (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_sub_lane (int arg0, machine_mode arg1)
{
  if (arg0 == 461
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_smullb_lane_vnx4si;
  if (arg0 == 462
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_smullt_lane_vnx4si;
  if (arg0 == 506
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_umullb_lane_vnx4si;
  if (arg0 == 507
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_sub_umullt_lane_vnx4si;
  if (arg0 == 461
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_smullb_lane_vnx2di;
  if (arg0 == 462
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_smullt_lane_vnx2di;
  if (arg0 == 506
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_umullb_lane_vnx2di;
  if (arg0 == 507
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_sub_umullt_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_sub_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_sub_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_qsub (int arg0, machine_mode arg1)
{
  if (arg0 == 465
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullbvnx8hi;
  if (arg0 == 466
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullbtvnx8hi;
  if (arg0 == 467
      && arg1 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmulltvnx8hi;
  if (arg0 == 465
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullbvnx4si;
  if (arg0 == 466
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullbtvnx4si;
  if (arg0 == 467
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmulltvnx4si;
  if (arg0 == 465
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullbvnx2di;
  if (arg0 == 466
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullbtvnx2di;
  if (arg0 == 467
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmulltvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_qsub (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve_qsub (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve_qsub_lane (int arg0, machine_mode arg1)
{
  if (arg0 == 465
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullb_lane_vnx4si;
  if (arg0 == 467
      && arg1 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullt_lane_vnx4si;
  if (arg0 == 465
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullb_lane_vnx2di;
  if (arg0 == 467
      && arg1 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve_qsub_sqdmullt_lane_vnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve_qsub_lane (int arg0, machine_mode arg1, rtx x0, rtx x1, rtx x2, rtx x3, rtx x4)
{
  insn_code code = maybe_code_for_aarch64_sve_qsub_lane (arg0, arg1);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 5);
      return GEN_FCN (code) (x0, x1, x2, x3, x4);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_cvtxnt (machine_mode arg0)
{
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve2_cvtxntvnx2df;
  return CODE_FOR_nothing;
}

insn_code
maybe_code_for_aarch64_sve2_pmul (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_pmulvnx16qi;
  return CODE_FOR_nothing;
}

insn_code
maybe_code_for_aarch64_sve2_tbl2 (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_tbl2vnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_tbl2vnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_tbl2vnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_tbl2vnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve2_tbl2vnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve2_tbl2vnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve2_tbl2vnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve2_tbl2vnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_tbl2 (machine_mode arg0, rtx x0, rtx x1, rtx x2)
{
  insn_code code = maybe_code_for_aarch64_sve2_tbl2 (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 3);
      return GEN_FCN (code) (x0, x1, x2);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_tbx (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_tbxvnx16qi;
  if (arg0 == E_VNx8HImode)
    return CODE_FOR_aarch64_sve2_tbxvnx8hi;
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_tbxvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_tbxvnx2di;
  if (arg0 == E_VNx8BFmode)
    return CODE_FOR_aarch64_sve2_tbxvnx8bf;
  if (arg0 == E_VNx8HFmode)
    return CODE_FOR_aarch64_sve2_tbxvnx8hf;
  if (arg0 == E_VNx4SFmode)
    return CODE_FOR_aarch64_sve2_tbxvnx4sf;
  if (arg0 == E_VNx2DFmode)
    return CODE_FOR_aarch64_sve2_tbxvnx2df;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_tbx (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_tbx (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_histcnt (machine_mode arg0)
{
  if (arg0 == E_VNx4SImode)
    return CODE_FOR_aarch64_sve2_histcntvnx4si;
  if (arg0 == E_VNx2DImode)
    return CODE_FOR_aarch64_sve2_histcntvnx2di;
  return CODE_FOR_nothing;
}

rtx
maybe_gen_aarch64_sve2_histcnt (machine_mode arg0, rtx x0, rtx x1, rtx x2, rtx x3)
{
  insn_code code = maybe_code_for_aarch64_sve2_histcnt (arg0);
  if (code != CODE_FOR_nothing)
    {
      gcc_assert (insn_data[code].n_generator_args == 4);
      return GEN_FCN (code) (x0, x1, x2, x3);
    }
  else
    return NULL_RTX;
}

insn_code
maybe_code_for_aarch64_sve2_histseg (machine_mode arg0)
{
  if (arg0 == E_VNx16QImode)
    return CODE_FOR_aarch64_sve2_histsegvnx16qi;
  return CODE_FOR_nothing;
}
