zdma: Zdma_v1_7

| zdma Xilinx SDK Drivers API Documentation

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Macros | Enumerations | Functions
Zdma_v1_7

## Macros
#define | XZDMA_HW_H_
| Prevent circular inclusions by using protection macros. More...
#define | XZDma_In32 Xil_In32
| Input operation. More...
#define | XZDma_Out32 Xil_Out32
| Output operation. More...
#define | XZDma_ReadReg(BaseAddress, RegOffset) XZDma_In32((BaseAddress) + (u32)(RegOffset))
| This macro reads the given register. More...
#define | XZDma_WriteReg(BaseAddress, RegOffset, Data) XZDma_Out32(((BaseAddress) + (u32)(RegOffset)), (u32)(Data))
| This macro writes the value into the given register. More...

## Enumerations
enum | XZDma_Handler { XZDMA_HANDLER_DONE, XZDMA_HANDLER_ERROR }
| This typedef contains ZDMA Handler Types. More...

## Functions
s32 | XZDma_CfgInitialize (XZDma *InstancePtr, XZDma_Config *CfgPtr, u32 EffectiveAddr)
| This function initializes an ZDMA core. More...
s32 | XZDma_SetMode (XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode)
| This function sets the pointer type and mode in which ZDMA needs to transfer the data. More...
u32 | XZDma_CreateBDList (XZDma *InstancePtr, XZDma_DscrType TypeOfDscr, UINTPTR Dscr_MemPtr, u32 NoOfBytes)
| This function sets the descriptor type and descriptor pointer's start address of both source and destination based on the memory allocated by user and also calculates no of descriptors(BDs) can be created in the allocated memory. More...
s32 | XZDma_SetChDataConfig (XZDma *InstancePtr, XZDma_DataConfig *Configure)
| This function sets the data attributes and control configurations of a ZDMA core based on the inputs provided. More...
void | XZDma_GetChDataConfig (XZDma *InstancePtr, XZDma_DataConfig *Configure)
| This function gets the data attributes and control configurations of a ZDMA core. More...
s32 | XZDma_SetChDscrConfig (XZDma *InstancePtr, XZDma_DscrConfig *Configure)
| This function sets the descriptor attributes based on the inputs provided in the structure. More...
void | XZDma_GetChDscrConfig (XZDma *InstancePtr, XZDma_DscrConfig *Configure)
| This function gets the descriptor attributes of the channel. More...
void | XZDma_WOData (XZDma *InstancePtr, u32 *Buffer)
| This function preloads the buffers which will be used in write only mode. More...
void | XZDma_Resume (XZDma *InstancePtr)
| This function resume the paused state of ZDMA core and starts the transfer from where it has paused. More...
void | XZDma_Reset (XZDma *InstancePtr)
| This function resets the ZDMA core. More...
XZDmaState | XZDma_ChannelState (XZDma *InstancePtr)
| This function returns the state of ZDMA core. More...
s32 | XZDma_Start (XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num)
| This function sets all the required fields for initiating data transfer. More...
void | XZDma_IntrHandler (void *Instance)
| This function is the interrupt handler for the ZDMA core. More...
s32 | XZDma_SetCallBack (XZDma *InstancePtr, XZDma_Handler HandlerType, void *CallBackFunc, void *CallBackRef)
| This routine installs an asynchronous callback function for the given HandlerType. More...
s32 | XZDma_SelfTest (XZDma *InstancePtr)
| This file contains a diagnostic self-test function for the ZDMA driver. More...
XZDma_Config * | XZDma_LookupConfig (u16 DeviceId)
| XZDma_LookupConfig returns a reference to an XZDma_Config structure based on the unique device id, DeviceId. More...

## Registers offsets
#define | XZDMA_ERR_CTRL (0x000U)
#define | XZDMA_CH_ECO (0x004U)
#define | XZDMA_CH_ISR_OFFSET (0x100U)
#define | XZDMA_CH_IMR_OFFSET (0x104U)
#define | XZDMA_CH_IEN_OFFSET (0x108U)
#define | XZDMA_CH_IDS_OFFSET (0x10CU)
#define | XZDMA_CH_CTRL0_OFFSET (0x110U)
#define | XZDMA_CH_CTRL1_OFFSET (0x114U)
#define | XZDMA_CH_PERIF_OFFSET (0x118U)
#define | XZDMA_CH_STS_OFFSET (0x11CU)
#define | XZDMA_CH_DATA_ATTR_OFFSET (0x120U)
#define | XZDMA_CH_DSCR_ATTR_OFFSET (0x124U)
#define | XZDMA_CH_SRC_DSCR_WORD0_OFFSET (0x128U)
#define | XZDMA_CH_SRC_DSCR_WORD1_OFFSET (0x12CU)
#define | XZDMA_CH_SRC_DSCR_WORD2_OFFSET (0x130U)
#define | XZDMA_CH_SRC_DSCR_WORD3_OFFSET (0x134U)
#define | XZDMA_CH_DST_DSCR_WORD0_OFFSET (0x138U)
#define | XZDMA_CH_DST_DSCR_WORD1_OFFSET (0x13CU)
#define | XZDMA_CH_DST_DSCR_WORD2_OFFSET (0x140U)
#define | XZDMA_CH_DST_DSCR_WORD3_OFFSET (0x144U)
#define | XZDMA_CH_WR_ONLY_WORD0_OFFSET (0x148U)
#define | XZDMA_CH_WR_ONLY_WORD1_OFFSET (0x14CU)
#define | XZDMA_CH_WR_ONLY_WORD2_OFFSET (0x150U)
#define | XZDMA_CH_WR_ONLY_WORD3_OFFSET (0x154U)
#define | XZDMA_CH_SRC_START_LSB_OFFSET (0x158U)
#define | XZDMA_CH_SRC_START_MSB_OFFSET (0x15CU)
#define | XZDMA_CH_DST_START_LSB_OFFSET (0x160U)
#define | XZDMA_CH_DST_START_MSB_OFFSET (0x164U)
#define | XZDMA_CH_SRC_CUR_PYLD_LSB_OFFSET (0x168U)
#define | XZDMA_CH_SRC_CUR_PYLD_MSB_OFFSET (0x16CU)
#define | XZDMA_CH_DST_CUR_PYLD_LSB_OFFSET (0x170U)
#define | XZDMA_CH_DST_CUR_PYLD_MSB_OFFSET (0x174U)
#define | XZDMA_CH_SRC_CUR_DSCR_LSB_OFFSET (0x178U)
#define | XZDMA_CH_SRC_CUR_DSCR_MSB_OFFSET (0x17CU)
#define | XZDMA_CH_DST_CUR_DSCR_LSB_OFFSET (0x180U)
#define | XZDMA_CH_DST_CUR_DSCR_MSB_OFFSET (0x184U)
#define | XZDMA_CH_TOTAL_BYTE_OFFSET (0x188U)
#define | XZDMA_CH_RATE_CNTL_OFFSET (0x18CU)
#define | XZDMA_CH_IRQ_SRC_ACCT_OFFSET (0x190U)
#define | XZDMA_CH_IRQ_DST_ACCT_OFFSET (0x194U)
#define | XZDMA_CH_CTRL2_OFFSET (0x200U)

## Interrupt Enable/Disable/Mask/Status registers bit masks and shifts
#define | XZDMA_IXR_DMA_PAUSE_MASK (0x00000800U)
| IXR pause mask. More...
#define | XZDMA_IXR_DMA_DONE_MASK (0x00000400U)
| IXR done mask. More...
#define | XZDMA_IXR_AXI_WR_DATA_MASK (0x00000200U)
| IXR AXI write data error mask. More...
#define | XZDMA_IXR_AXI_RD_DATA_MASK (0x00000100U)
| IXR AXI read data error mask. More...
#define | XZDMA_IXR_AXI_RD_DST_DSCR_MASK (0x00000080U)
| IXR AXI read descriptor error mask. More...
#define | XZDMA_IXR_AXI_RD_SRC_DSCR_MASK (0x00000040U)
| IXR AXI write descriptor error mask. More...
#define | XZDMA_IXR_DST_ACCT_ERR_MASK (0x00000020U)
| IXR DST interrupt count overflow mask. More...
#define | XZDMA_IXR_SRC_ACCT_ERR_MASK (0x00000010U)
| IXR SRC interrupt count overflow mask. More...
#define | XZDMA_IXR_BYTE_CNT_OVRFL_MASK (0x00000008U)
| IXR byte count over flow mask. More...
#define | XZDMA_IXR_DST_DSCR_DONE_MASK (0x00000004U)
| IXR destination descriptor done mask. More...
#define | XZDMA_IXR_SRC_DSCR_DONE_MASK (0x00000002U)
| IXR source descriptor done mask. More...
#define | XZDMA_IXR_INV_APB_MASK (0x00000001U)
| IXR invalid APB access mask. More...
#define | XZDMA_IXR_ALL_INTR_MASK (0x00000FFFU)
| IXR OR of all the interrupts mask. More...
#define | XZDMA_IXR_DONE_MASK (0x00000400U)
| IXR All done mask. More...
#define | XZDMA_IXR_ERR_MASK (0x00000BF9U)
| IXR all Error mask. More...

## Channel Control0 register bit masks and shifts
#define | XZDMA_CTRL0_OVR_FETCH_MASK (0x00000080U)
| Over fetch mask. More...
#define | XZDMA_CTRL0_POINT_TYPE_MASK (0x00000040U)
| Pointer type mask. More...
#define | XZDMA_CTRL0_MODE_MASK (0x00000030U)
| Mode mask. More...
#define | XZDMA_CTRL0_WRONLY_MASK (0x00000010U)
| Write only mask. More...
#define | XZDMA_CTRL0_RDONLY_MASK (0x00000020U)
| Read only mask. More...
#define | XZDMA_CTRL0_RATE_CNTL_MASK (0x00000008U)
| Rate control mask. More...
#define | XZDMA_CTRL0_CONT_ADDR_MASK (0x00000004U)
| Continue address specified mask. More...
#define | XZDMA_CTRL0_CONT_MASK (0x00000002U)
| Continue mask. More...
#define | XZDMA_CTRL0_OVR_FETCH_SHIFT (7U)
| Over fetch shift. More...
#define | XZDMA_CTRL0_POINT_TYPE_SHIFT (6U)
| Pointer type shift. More...
#define | XZDMA_CTRL0_MODE_SHIFT (4U)
| Mode type shift. More...
#define | XZDMA_CTRL0_RESET_VALUE (0x00000080U)
| CTRL0 reset value. More...

## Channel Control1 register bit masks and shifts
#define | XZDMA_CTRL1_SRC_ISSUE_MASK (0x0000001FU)
| Source issue mask. More...
#define | XZDMA_CTRL1_RESET_VALUE (0x000003FFU)
| CTRL1 reset value. More...

## Channel Peripheral register bit masks and shifts
#define | XZDMA_PERIF_PROG_CELL_CNT_MASK (0x0000003EU)
| Peripheral program cell count. More...
#define | XZDMA_PERIF_SIDE_MASK (0x00000002U)
| Interface attached the side mask. More...
#define | XZDMA_PERIF_EN_MASK (0x00000001U)
| Peripheral flow control mask. More...

## Channel Status register bit masks and shifts
#define | XZDMA_STS_DONE_ERR_MASK (0x00000003U)
| Done with errors mask. More...
#define | XZDMA_STS_BUSY_MASK (0x00000002U)
| ZDMA is busy in transfer mask. More...
#define | XZDMA_STS_PAUSE_MASK (0x00000001U)
| ZDMA is in Pause state mask. More...
#define | XZDMA_STS_DONE_MASK (0x00000000U)
| ZDMA done mask. More...
#define | XZDMA_STS_ALL_MASK (0x00000003U)
| ZDMA status mask. More...

## Channel Data Attribute register bit masks and shifts
#define | XZDMA_DATA_ATTR_ARBURST_MASK (0x0C000000U)
| Data ArBurst mask. More...
#define | XZDMA_DATA_ATTR_ARCACHE_MASK (0x03C00000U)
| Data ArCache mask. More...
#define | XZDMA_DATA_ATTR_ARQOS_MASK (0x003C0000U)
| Data ARQos masks. More...
#define | XZDMA_DATA_ATTR_ARLEN_MASK (0x0003C000U)
| Data Arlen mask. More...
#define | XZDMA_DATA_ATTR_AWBURST_MASK (0x00003000U)
| Data Awburst mask. More...
#define | XZDMA_DATA_ATTR_AWCACHE_MASK (0x00000F00U)
| Data AwCache mask. More...
#define | XZDMA_DATA_ATTR_AWQOS_MASK (0x000000F0U)
| Data AwQos mask. More...
#define | XZDMA_DATA_ATTR_AWLEN_MASK (0x0000000FU)
| Data Awlen mask. More...
#define | XZDMA_DATA_ATTR_ARBURST_SHIFT (26U)
| Data Arburst shift. More...
#define | XZDMA_DATA_ATTR_ARCACHE_SHIFT (22U)
| Data ArCache shift. More...
#define | XZDMA_DATA_ATTR_ARQOS_SHIFT (18U)
| Data ARQos shift. More...
#define | XZDMA_DATA_ATTR_ARLEN_SHIFT (14U)
| Data Arlen shift. More...
#define | XZDMA_DATA_ATTR_AWBURST_SHIFT (12U)
| Data Awburst shift. More...
#define | XZDMA_DATA_ATTR_AWCACHE_SHIFT (8U)
| Data Awcache shift. More...
#define | XZDMA_DATA_ATTR_AWQOS_SHIFT (4U)
| Data Awqos shift. More...
#define | XZDMA_DATA_ATTR_RESET_VALUE (0x0483D20FU)
| Data Attributes reset value. More...

## Channel DSCR Attribute register bit masks and shifts
#define | XZDMA_DSCR_ATTR_AXCOHRNT_MASK (0x00000100U)
| Descriptor coherent mask. More...
#define | XZDMA_DSCR_ATTR_AXCACHE_MASK (0x000000F0U)
| Descriptor cache mask. More...
#define | XZDMA_DSCR_ATTR_AXQOS_MASK (0x0000000FU)
| Descriptor AxQos mask. More...
#define | XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT (8U)
| Descriptor coherent shift. More...
#define | XZDMA_DSCR_ATTR_AXCACHE_SHIFT (4U)
| Descriptor cache shift. More...
#define | XZDMA_DSCR_ATTR_RESET_VALUE (0x00000000U)
| Dscr Attributes reset value. More...

## Channel Source/Destination Word0 register bit mask
#define | XZDMA_WORD0_LSB_MASK (0xFFFFFFFFU)
| LSB Address mask. More...

## Channel Source/Destination Word1 register bit mask
#define | XZDMA_WORD1_MSB_MASK (0x0001FFFFU)
| MSB Address mask. More...
#define | XZDMA_WORD1_MSB_SHIFT (32U)
| MSB Address shift. More...

## Channel Source/Destination Word2 register bit mask
#define | XZDMA_WORD2_SIZE_MASK (0x3FFFFFFFU)
| Size mask. More...

## Channel Source/Destination Word3 register bit masks and shifts
#define | XZDMA_WORD3_CMD_MASK (0x00000018U)
| Cmd mask. More...
#define | XZDMA_WORD3_CMD_SHIFT (3U)
| Cmd shift. More...
#define | XZDMA_WORD3_CMD_NXTVALID_MASK (0x00000000U)
| Next Dscr is valid mask. More...
#define | XZDMA_WORD3_CMD_PAUSE_MASK (0x00000008U)
| Pause after this dscr mask. More...
#define | XZDMA_WORD3_CMD_STOP_MASK (0x00000010U)
| Stop after this ..* dscr mask. More...
#define | XZDMA_WORD3_INTR_MASK (0x00000004U)
| Interrupt enable or disable mask. More...
#define | XZDMA_WORD3_INTR_SHIFT (2U)
| Interrupt enable disable shift. More...
#define | XZDMA_WORD3_TYPE_MASK (0x00000002U)
| Type of Descriptor mask. More...
#define | XZDMA_WORD3_TYPE_SHIFT (1U)
| Type of Descriptor Shift. More...
#define | XZDMA_WORD3_COHRNT_MASK (0x00000001U)
| Coherence mask. More...

## Channel Source/Destination start address or current payload
MSB register bit mask
#define | XZDMA_START_MSB_ADDR_MASK (0x0001FFFFU)
| Start msb address mask. More...

## Channel Rate control count register bit mask
#define | XZDMA_CH_RATE_CNTL_MASK (0x00000FFFU)
| Channel rate control mask. More...

## Channel Source/Destination Interrupt account count register bit mask
#define | XZDMA_CH_IRQ_ACCT_MASK (0x000000FFU)
| Interrupt count mask. More...

## Channel debug register 0/1 bit mask
#define | XZDMA_CH_DBG_CMN_BUF_MASK (0x000001FFU)
| Common buffer count mask. More...

## Channel control2 register bit mask
#define | XZDMA_CH_CTRL2_EN_MASK (0x00000001U)
| Channel enable mask. More...
#define | XZDMA_CH_CTRL2_DIS_MASK (0x00000000U)
| Channel disable mask. More...
#define | XZDMA_WRITE_TO_CLEAR_MASK (0x00000000U)
| Write to clear mask. More...

## Macro Definition Documentation

#define XZDMA_CH_CTRL2_DIS_MASK (0x00000000U)

Channel disable mask.

#define XZDMA_CH_CTRL2_EN_MASK (0x00000001U)

Channel enable mask.

#define XZDMA_CH_DBG_CMN_BUF_MASK (0x000001FFU)

Common buffer count mask.

#define XZDMA_CH_IRQ_ACCT_MASK (0x000000FFU)

Interrupt count mask.

#define XZDMA_CH_RATE_CNTL_MASK (0x00000FFFU)

Channel rate control mask.

#define XZDMA_CTRL0_CONT_ADDR_MASK (0x00000004U)

Continue address specified mask.

Referenced by XZDma_Resume().

#define XZDMA_CTRL0_CONT_MASK (0x00000002U)

Continue mask.

Referenced by XZDma_Resume().

#define XZDMA_CTRL0_MODE_MASK (0x00000030U)

Mode mask.

Referenced by XZDma_SetMode().

#define XZDMA_CTRL0_MODE_SHIFT (4U)

Mode type shift.

#define XZDMA_CTRL0_OVR_FETCH_MASK (0x00000080U)

Over fetch mask.

Referenced by XZDma_SelfTest(), and XZDma_SetChDataConfig().

#define XZDMA_CTRL0_OVR_FETCH_SHIFT (7U)

Over fetch shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_CTRL0_POINT_TYPE_MASK (0x00000040U)

Pointer type mask.

Referenced by XZDma_SetMode().

#define XZDMA_CTRL0_POINT_TYPE_SHIFT (6U)

Pointer type shift.

#define XZDMA_CTRL0_RATE_CNTL_MASK (0x00000008U)

Rate control mask.

#define XZDMA_CTRL0_RDONLY_MASK (0x00000020U)

Read only mask.

Referenced by XZDma_SetMode().

#define XZDMA_CTRL0_RESET_VALUE (0x00000080U)

CTRL0 reset value.

Referenced by XZDma_Reset().

#define XZDMA_CTRL0_WRONLY_MASK (0x00000010U)

Write only mask.

Referenced by XZDma_SetMode().

#define XZDMA_CTRL1_RESET_VALUE (0x000003FFU)

CTRL1 reset value.

Referenced by XZDma_Reset().

#define XZDMA_CTRL1_SRC_ISSUE_MASK (0x0000001FU)

Source issue mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARBURST_MASK (0x0C000000U)

Data ArBurst mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARBURST_SHIFT (26U)

Data Arburst shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARCACHE_MASK (0x03C00000U)

Data ArCache mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARCACHE_SHIFT (22U)

Data ArCache shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARLEN_MASK (0x0003C000U)

Data Arlen mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARLEN_SHIFT (14U)

Data Arlen shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARQOS_MASK (0x003C0000U)

Data ARQos masks.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_ARQOS_SHIFT (18U)

Data ARQos shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_AWBURST_MASK (0x00003000U)

Data Awburst mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_AWBURST_SHIFT (12U)

Data Awburst shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_AWCACHE_MASK (0x00000F00U)

Data AwCache mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_AWCACHE_SHIFT (8U)

Data Awcache shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_AWLEN_MASK (0x0000000FU)

Data Awlen mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_AWQOS_MASK (0x000000F0U)

Data AwQos mask.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_AWQOS_SHIFT (4U)

Data Awqos shift.

Referenced by XZDma_SetChDataConfig().

#define XZDMA_DATA_ATTR_RESET_VALUE (0x0483D20FU)

Data Attributes reset value.

Referenced by XZDma_Reset().

#define XZDMA_DSCR_ATTR_AXCACHE_MASK (0x000000F0U)

Descriptor cache mask.

Referenced by XZDma_SetChDscrConfig().

#define XZDMA_DSCR_ATTR_AXCACHE_SHIFT (4U)

Descriptor cache shift.

Referenced by XZDma_SetChDscrConfig().

#define XZDMA_DSCR_ATTR_AXCOHRNT_MASK (0x00000100U)

Descriptor coherent mask.

Referenced by XZDma_SetChDscrConfig().

#define XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT (8U)

Descriptor coherent shift.

Referenced by XZDma_Reset(), and XZDma_SetChDscrConfig().

#define XZDMA_DSCR_ATTR_AXQOS_MASK (0x0000000FU)

Descriptor AxQos mask.

Referenced by XZDma_SetChDscrConfig().

#define XZDMA_DSCR_ATTR_RESET_VALUE (0x00000000U)

Dscr Attributes reset value.

Referenced by XZDma_Reset().

#define XZDMA_HW_H_

Prevent circular inclusions by using protection macros.

#define XZDma_In32 Xil_In32

Input operation.

#define XZDMA_IXR_ALL_INTR_MASK (0x00000FFFU)

IXR OR of all the interrupts mask.

Referenced by XZDma_IntrHandler(), XZDma_Reset(), and XZDma_SimpleExample().

#define XZDMA_IXR_AXI_RD_DATA_MASK (0x00000100U)

IXR AXI read data error mask.

Referenced by XZDma_IntrHandler(), and XZDma_SimpleExample().

#define XZDMA_IXR_AXI_RD_DST_DSCR_MASK (0x00000080U)

IXR AXI read descriptor error mask.

Referenced by XZDma_IntrHandler().

#define XZDMA_IXR_AXI_RD_SRC_DSCR_MASK (0x00000040U)

IXR AXI write descriptor error mask.

Referenced by XZDma_IntrHandler().

#define XZDMA_IXR_AXI_WR_DATA_MASK (0x00000200U)

IXR AXI write data error mask.

Referenced by XZDma_IntrHandler(), and XZDma_SimpleExample().

#define XZDMA_IXR_BYTE_CNT_OVRFL_MASK (0x00000008U)

IXR byte count over flow mask.

#define XZDMA_IXR_DMA_DONE_MASK (0x00000400U)

IXR done mask.

Referenced by XZDma_IntrHandler(), XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

#define XZDMA_IXR_DMA_PAUSE_MASK (0x00000800U)

IXR pause mask.

Referenced by XZDma_IntrHandler(), and XZDma_LinearExample().

#define XZDMA_IXR_DONE_MASK (0x00000400U)

IXR All done mask.

#define XZDMA_IXR_DST_ACCT_ERR_MASK (0x00000020U)

IXR DST interrupt count overflow mask.

#define XZDMA_IXR_DST_DSCR_DONE_MASK (0x00000004U)

IXR destination descriptor done mask.

#define XZDMA_IXR_ERR_MASK (0x00000BF9U)

IXR all Error mask.

Or of XZDMA_IXR_AXI_WR_DATA_MASK, XZDMA_IXR_AXI_RD_DATA_MASK, XZDMA_IXR_AXI_RD_DST_DSCR_MASK, XZDMA_IXR_AXI_RD_SRC_DSCR_MASK, XZDMA_IXR_INV_APB_MASK, XZDMA_IXR_DMA_PAUSE_MASK, XZDMA_IXR_BYTE_CNT_OVRFL_MASK, XZDMA_IXR_SRC_ACCT_ERR_MASK, XZDMA_IXR_DST_ACCT_ERR_MASK

Referenced by XZDma_IntrHandler().

#define XZDMA_IXR_INV_APB_MASK (0x00000001U)

IXR invalid APB access mask.

#define XZDMA_IXR_SRC_ACCT_ERR_MASK (0x00000010U)

IXR SRC interrupt count overflow mask.

#define XZDMA_IXR_SRC_DSCR_DONE_MASK (0x00000002U)

IXR source descriptor done mask.

#define XZDma_Out32 Xil_Out32

Output operation.

#define XZDMA_PERIF_EN_MASK (0x00000001U)

Peripheral flow control mask.

#define XZDMA_PERIF_PROG_CELL_CNT_MASK (0x0000003EU)

Peripheral program cell count.

#define XZDMA_PERIF_SIDE_MASK (0x00000002U)

Interface attached the side mask.

#define XZDma_ReadReg | ( |  | BaseAddress,
|  |  | RegOffset
| ) |  | XZDma_In32((BaseAddress) + (u32)(RegOffset))

This macro reads the given register.

Parameters

  BaseAddress | is the Xilinx base address of the ZDMA core.
  RegOffset | is the register offset of the register.

Returns
  The 32-bit value of the register.

Note
  C-style signature: u32 XZDma_ReadReg(u32 BaseAddress, u32 RegOffset)

Referenced by XZDma_ChannelState(), XZDma_Resume(), XZDma_SelfTest(), XZDma_SetChDataConfig(), and XZDma_SetMode().

#define XZDMA_START_MSB_ADDR_MASK (0x0001FFFFU)

Start msb address mask.

#define XZDMA_STS_ALL_MASK (0x00000003U)

ZDMA status mask.

Referenced by XZDma_ChannelState().

#define XZDMA_STS_BUSY_MASK (0x00000002U)

ZDMA is busy in transfer mask.

#define XZDMA_STS_DONE_ERR_MASK (0x00000003U)

Done with errors mask.

Referenced by XZDma_ChannelState().

#define XZDMA_STS_DONE_MASK (0x00000000U)

ZDMA done mask.

Referenced by XZDma_ChannelState().

#define XZDMA_STS_PAUSE_MASK (0x00000001U)

ZDMA is in Pause state mask.

Referenced by XZDma_ChannelState().

#define XZDMA_WORD0_LSB_MASK (0xFFFFFFFFU)

LSB Address mask.

#define XZDMA_WORD1_MSB_MASK (0x0001FFFFU)

MSB Address mask.

#define XZDMA_WORD1_MSB_SHIFT (32U)

MSB Address shift.

#define XZDMA_WORD2_SIZE_MASK (0x3FFFFFFFU)

Size mask.

#define XZDMA_WORD3_CMD_MASK (0x00000018U)

Cmd mask.

#define XZDMA_WORD3_CMD_NXTVALID_MASK (0x00000000U)

Next Dscr is valid mask.

#define XZDMA_WORD3_CMD_PAUSE_MASK (0x00000008U)

Pause after this dscr mask.

#define XZDMA_WORD3_CMD_SHIFT (3U)

Cmd shift.

#define XZDMA_WORD3_CMD_STOP_MASK (0x00000010U)

Stop after this ..* dscr mask.

#define XZDMA_WORD3_COHRNT_MASK (0x00000001U)

Coherence mask.

Referenced by XZDma_Reset().

#define XZDMA_WORD3_INTR_MASK (0x00000004U)

Interrupt enable or disable mask.

#define XZDMA_WORD3_INTR_SHIFT (2U)

Interrupt enable disable shift.

#define XZDMA_WORD3_TYPE_MASK (0x00000002U)

Type of Descriptor mask.

#define XZDMA_WORD3_TYPE_SHIFT (1U)

Type of Descriptor Shift.

#define XZDMA_WRITE_TO_CLEAR_MASK (0x00000000U)

Write to clear mask.

#define XZDma_WriteReg | ( |  | BaseAddress,
|  |  | RegOffset,
|  |  | Data
| ) |  | XZDma_Out32(((BaseAddress) + (u32)(RegOffset)), (u32)(Data))

This macro writes the value into the given register.

Parameters

  BaseAddress | is the Xilinx base address of the ZDMA core.
  RegOffset | is the register offset of the register.
  Data | is the 32-bit value to write to the register.

Returns
  None.

Note
  C-style signature: void XZDma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)

Referenced by XZDma_Reset(), XZDma_Resume(), XZDma_SelfTest(), XZDma_SetChDataConfig(), XZDma_SetChDscrConfig(), XZDma_SetMode(), and XZDma_WOData().

## Enumeration Type Documentation

enum XZDma_Handler

This typedef contains ZDMA Handler Types.

Enumerator
XZDMA_HANDLER_DONE | For Done Handler.
XZDMA_HANDLER_ERROR | For Error Handler.

## Function Documentation

s32 XZDma_CfgInitialize | ( | XZDma * | InstancePtr,
|  | XZDma_Config * | CfgPtr,
|  | u32 | EffectiveAddr
| ) |  |

This function initializes an ZDMA core.

This function must be called prior to using an ZDMA core. Initialization of an ZDMA includes setting up the instance data and ensuring the hardware is in a quiescent state and resets all the hardware configurations.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  CfgPtr | is a reference to a structure containing information about a specific XZDma instance.
  EffectiveAddr | is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, pass in the physical address instead.

Returns
  - XST_SUCCESS if initialization was successful.

Note
  None.

References XZDma_Config::BaseAddress, XZDma::ChannelState, XZDma::Config, XZDma_Config::DeviceId, XZDma_Config::DmaType, XZDma::DoneHandler, XZDma::ErrorHandler, XZDma::IntrMask, XZDma_Config::IsCacheCoherent, XZDma::IsReady, XZDma::IsSgDma, XZDma::Mode, XZDMA_IDLE, XZDMA_NORMAL_MODE, and XZDma_Reset().

Referenced by XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SelfTestExample(), XZDma_SimpleExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

XZDmaState XZDma_ChannelState | ( | XZDma * | InstancePtr | ) |

This function returns the state of ZDMA core.

Parameters

  InstancePtr | is a pointer to the XZDma instance.

Returns
  This function returns state of ZDMA core
  - XZDMA_IDLE - If ZDMA core is in idle state.
  - XZDMA_PAUSE - If ZDMA is in paused state.
  - XZDMA_BUSY - If ZDMA is in busy state.

Note
  None. C-style signature: XZDmaState XZDma_ChannelState(XZDma *InstancePtr)

References XZDma_Config::BaseAddress, XZDma::Config, XZDMA_BUSY, XZDMA_IDLE, XZDMA_PAUSE, XZDma_ReadReg, XZDMA_STS_ALL_MASK, XZDMA_STS_DONE_ERR_MASK, XZDMA_STS_DONE_MASK, and XZDMA_STS_PAUSE_MASK.

u32 XZDma_CreateBDList | ( | XZDma * | InstancePtr,
|  | XZDma_DscrType | TypeOfDscr,
|  | UINTPTR | Dscr_MemPtr,
|  | u32 | NoOfBytes
| ) |  |

This function sets the descriptor type and descriptor pointer's start address of both source and destination based on the memory allocated by user and also calculates no of descriptors(BDs) can be created in the allocated memory.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  TypeOfDscr | is a variable which specifies descriptor type whether Linear or linked list type of descriptor. XZDMA_LINEAR - Linear type of descriptor. XZDMA_LINKEDLIST- Linked list type of descriptor.
  Dscr_MemPtr | is a pointer to the allocated memory for creating descriptors. It Should be aligned to 64 bytes.
  NoOfBytes | specifies the number of bytes allocated for descriptors

Returns
  The Count of the descriptors can be created.

Note
  User should allocate the memory for descriptors which should be capable of how many transfers he wish to do in one start. For Linear mode each descriptor needs 128 bit memory so for one data transfer it requires 2*128 = 256 bits i.e. 32 bytes Similarly for Linked list mode for each descriptor it needs 256 bit, so for one data transfer it require 2*256 = 512 bits i.e. 64 bytes.

References XZDma::Config, XZDma::Descriptor, XZDma_Descriptor::DscrCount, XZDma_Descriptor::DscrType, XZDma_Descriptor::DstDscrPtr, XZDma_Config::IsCacheCoherent, XZDma_Descriptor::SrcDscrPtr, XZDMA_LINEAR, and XZDMA_LINKEDLIST.

Referenced by XZDma_LinearExample(), and XZDma_LinkedListExample().

void XZDma_GetChDataConfig | ( | XZDma * | InstancePtr,
|  | XZDma_DataConfig * | Configure
| ) |  |

This function gets the data attributes and control configurations of a ZDMA core.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  Configure | is a pointer to the XZDma_ChDataConfig structure which has all the configuration fields. The fields of the structure are: OverFetch - Allows over fetch or not 0 - Not allowed to over-fetch on SRC 1 - Allowed to over-fetch on SRC SrcIssue - Outstanding transaction on SRC Range is 1 to 32 SrcBurstType - Burst Type for SRC AXI transaction XZDMA_FIXED_BURST - Fixed burst XZDMA_INCR_BURST - Incremental burst SrcBurstLen - AXI Length for Data Read. Can be max of 16 to be compatible with AXI3 DstBurstType - Burst Type for SRC AXI transaction XZDMA_FIXED_BURST - Fixed burst XZDMA_INCR_BURST - Incremental burst DstBurstLen - AXI Length for Data write. Can be max of 16 to be compatible with AXI3 SrcCache - AXI cache bits for Data read SrcQos - Configurable QoS bits for AXI Data read DstCache - AXI cache bits for Data write DstQos - Configurable QoS bits for AXI Data write

Returns
  None

Note
  None.

References XZDma::DataConfig, XZDma_DataConfig::DstBurstLen, XZDma_DataConfig::DstBurstType, XZDma_DataConfig::DstCache, XZDma_DataConfig::DstQos, XZDma_DataConfig::OverFetch, XZDma_DataConfig::SrcBurstLen, XZDma_DataConfig::SrcBurstType, XZDma_DataConfig::SrcCache, XZDma_DataConfig::SrcIssue, and XZDma_DataConfig::SrcQos.

Referenced by XZDma_LinearExample(), and XZDma_LinkedListExample().

void XZDma_GetChDscrConfig | ( | XZDma * | InstancePtr,
|  | XZDma_DscrConfig * | Configure
| ) |  |

This function gets the descriptor attributes of the channel.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  Configure | is a pointer to the XZDma_ChDscrConfig structure which has all the configuration fields. The fields of the structure are: AxCoherent - AXI transactions generated for the descriptor. 0 - Non coherent 1 - Coherent AXCache - AXI cache bit used for DSCR fetch (both on SRC and DST Side) AXQos - QoS bit used for DSCR fetch (both on SRC and DST Side)

Returns
  None.

Note
  None.

References XZDma_DscrConfig::AXCache, XZDma_DscrConfig::AxCoherent, XZDma_DscrConfig::AXQos, and XZDma::DscrConfig.

void XZDma_IntrHandler | ( | void * | Instance | ) |

This function is the interrupt handler for the ZDMA core.

This handler reads the pending interrupt from Status register, determines the source of the interrupts and calls the respective callbacks for the interrupts that are enabled in IRQ_ENABLE register, and finally clears the interrupts.

The application is responsible for connecting this function to the interrupt system. Application beyond this driver is also responsible for providing callbacks to handle interrupts and installing the callbacks using XZDma_SetCallBack() during initialization phase. .

Parameters

  Instance | is a pointer to the XZDma instance to be worked on.

Returns
  None.

Note
  To generate interrupt required interrupts should be enabled.

References XZDma::ChannelState, XZDma::DoneHandler, XZDma::DoneRef, XZDma::ErrorHandler, XZDma::ErrorRef, XZDma_DisableIntr, XZDma_GetIntrMask, XZDMA_IDLE, XZDma_IntrClear, XZDma_IntrGetStatus, XZDMA_IXR_ALL_INTR_MASK, XZDMA_IXR_AXI_RD_DATA_MASK, XZDMA_IXR_AXI_RD_DST_DSCR_MASK, XZDMA_IXR_AXI_RD_SRC_DSCR_MASK, XZDMA_IXR_AXI_WR_DATA_MASK, XZDMA_IXR_DMA_DONE_MASK, XZDMA_IXR_DMA_PAUSE_MASK, XZDMA_IXR_ERR_MASK, and XZDMA_PAUSE.

Referenced by XZDma_WriteOnlyExample().

XZDma_Config* XZDma_LookupConfig | ( | u16 | DeviceId | ) |

XZDma_LookupConfig returns a reference to an XZDma_Config structure based on the unique device id, DeviceId.

The return value will refer to an entry in the device configuration table defined in the xzdma_g.c file.

Parameters

  DeviceId | is the unique device ID of the device for the lookup operation.

Returns
  CfgPtr is a reference to a config record in the configuration table (in xzdma_g.c) corresponding to DeviceId, or NULL if no match is found.

Note
  None.

Referenced by XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SelfTestExample(), XZDma_SimpleExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

void XZDma_Reset | ( | XZDma * | InstancePtr | ) |

This function resets the ZDMA core.

Parameters

  InstancePtr | is a pointer to the XZDma instance.

Returns
  None.

Note
  This function resets all the configurations made previously. Disables all the interrupts and clears interrupt status.

References XZDma_Config::BaseAddress, XZDma::ChannelState, XZDma::Config, XZDma::IntrMask, XZDma_Config::IsCacheCoherent, XZDMA_CTRL0_RESET_VALUE, XZDMA_CTRL1_RESET_VALUE, XZDMA_DATA_ATTR_RESET_VALUE, XZDma_DisableCh, XZDma_DisableIntr, XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT, XZDMA_DSCR_ATTR_RESET_VALUE, XZDma_GetDstIntrCnt, XZDma_GetSrcIntrCnt, XZDMA_IDLE, XZDma_IntrClear, XZDMA_IXR_ALL_INTR_MASK, XZDma_TotalByteClear, XZDMA_WORD3_COHRNT_MASK, and XZDma_WriteReg.

Referenced by XZDma_CfgInitialize().

void XZDma_Resume | ( | XZDma * | InstancePtr | ) |

This function resume the paused state of ZDMA core and starts the transfer from where it has paused.

Parameters

  InstancePtr | is a pointer to the XZDma instance.

Returns
  None.

Note
  Valid only for scatter gather mode.

References XZDma_Config::BaseAddress, XZDma::ChannelState, XZDma::Config, XZDma::IsSgDma, XZDMA_BUSY, XZDMA_CTRL0_CONT_ADDR_MASK, XZDMA_CTRL0_CONT_MASK, XZDMA_PAUSE, XZDma_ReadReg, and XZDma_WriteReg.

Referenced by XZDma_LinearExample().

s32 XZDma_SelfTest | ( | XZDma * | InstancePtr | ) |

This file contains a diagnostic self-test function for the ZDMA driver.

Refer to the header file xzdma.h for more detailed information.

Parameters

  InstancePtr | is a pointer to XZDma instance.

Returns
  - XST_SUCCESS if the test is successful.
  - XST_FAILURE if the test is failed.

Note
  None.

References XZDma_Config::BaseAddress, XZDma::Config, XZDMA_CTRL0_OVR_FETCH_MASK, XZDma_ReadReg, and XZDma_WriteReg.

Referenced by XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SelfTestExample(), XZDma_SimpleExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

s32 XZDma_SetCallBack | ( | XZDma * | InstancePtr,
|  | XZDma_Handler | HandlerType,
|  | void * | CallBackFunc,
|  | void * | CallBackRef
| ) |  |

This routine installs an asynchronous callback function for the given HandlerType.

    HandlerType              Callback Function Type
    -----------------------  --------------------------------------------------
    XZDMA_HANDLER_DONE         Done handler
    XZDMA_HANDLER_ERROR        Error handler

Parameters

  InstancePtr | is a pointer to the XZDma instance to be worked on.
  HandlerType | specifies which callback is to be attached.
  CallBackFunc | is the address of the callback function.
  CallBackRef | is a user data item that will be passed to the callback function when it is invoked.

Returns
  - XST_SUCCESS when handler is installed.
  - XST_INVALID_PARAM when HandlerType is invalid.

Note
  Invoking this function for a handler that already has been installed replaces it with the new handler.

References XZDma::DoneHandler, XZDma::DoneRef, XZDma::ErrorHandler, XZDma::ErrorRef, XZDma::IsReady, XZDMA_HANDLER_DONE, and XZDMA_HANDLER_ERROR.

Referenced by XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SimpleExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

s32 XZDma_SetChDataConfig | ( | XZDma * | InstancePtr,
|  | XZDma_DataConfig * | Configure
| ) |  |

This function sets the data attributes and control configurations of a ZDMA core based on the inputs provided.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  Configure | is a pointer to the XZDma_ChDataConfig structure which has all the configuration fields. The fields of the structure are: OverFetch - Allows over fetch or not 0 - Not allowed to over-fetch on SRC 1 - Allowed to over-fetch on SRC SrcIssue - Outstanding transaction on SRC Range is 1 to 32 SrcBurstType - Burst Type for SRC AXI transaction XZDMA_FIXED_BURST - Fixed burst XZDMA_INCR_BURST - Incremental burst SrcBurstLen - AXI Length for Data Read. Range of values is (1,2,4,8,16). DstBurstType - Burst Type for SRC AXI transaction XZDMA_FIXED_BURST - Fixed burst XZDMA_INCR_BURST - Incremental burst DstBurstLen - AXI Length for Data write. Range of values is (1,2,4,8,16). SrcCache - AXI cache bits for Data read SrcQos - Configurable QoS bits for AXI Data read DstCache - AXI cache bits for Data write DstQos - configurable QoS bits for AXI Data write

Returns
  - XST_FAILURE If ZDMA Core is not in Idle state and
  - XST_SUCCESS If Configurations are made successfully

Note
  - These configurations will last till we modify or Reset by XZDma_Reset(XZDma *InstancePtr).
  - Configurations should be modified only when ZDMA channel is IDLE this can be confirmed by using XZDma_ChannelState(XZDma *InstancePtr) API.

References XZDma_Config::BaseAddress, XZDma::ChannelState, XZDma::Config, XZDma::DataConfig, XZDma_DataConfig::DstBurstLen, XZDma_DataConfig::DstBurstType, XZDma_DataConfig::DstCache, XZDma_DataConfig::DstQos, XZDma_DataConfig::OverFetch, XZDma_DataConfig::SrcBurstLen, XZDma_DataConfig::SrcBurstType, XZDma_DataConfig::SrcCache, XZDma_DataConfig::SrcIssue, XZDma_DataConfig::SrcQos, XZDMA_CTRL0_OVR_FETCH_MASK, XZDMA_CTRL0_OVR_FETCH_SHIFT, XZDMA_CTRL1_SRC_ISSUE_MASK, XZDMA_DATA_ATTR_ARBURST_MASK, XZDMA_DATA_ATTR_ARBURST_SHIFT, XZDMA_DATA_ATTR_ARCACHE_MASK, XZDMA_DATA_ATTR_ARCACHE_SHIFT, XZDMA_DATA_ATTR_ARLEN_MASK, XZDMA_DATA_ATTR_ARLEN_SHIFT, XZDMA_DATA_ATTR_ARQOS_MASK, XZDMA_DATA_ATTR_ARQOS_SHIFT, XZDMA_DATA_ATTR_AWBURST_MASK, XZDMA_DATA_ATTR_AWBURST_SHIFT, XZDMA_DATA_ATTR_AWCACHE_MASK, XZDMA_DATA_ATTR_AWCACHE_SHIFT, XZDMA_DATA_ATTR_AWLEN_MASK, XZDMA_DATA_ATTR_AWQOS_MASK, XZDMA_DATA_ATTR_AWQOS_SHIFT, XZDMA_IDLE, XZDma_ReadReg, and XZDma_WriteReg.

Referenced by XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SimpleExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

s32 XZDma_SetChDscrConfig | ( | XZDma * | InstancePtr,
|  | XZDma_DscrConfig * | Configure
| ) |  |

This function sets the descriptor attributes based on the inputs provided in the structure.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  Configure | is a pointer to the XZDma_ChDscrConfig structure which has all the configuration fields. The fields of the structure are: AxCoherent - AXI transactions generated for the descriptor. 0 - Non coherent 1 - Coherent AXCache - AXI cache bit used for DSCR fetch (both on SRC and DST Side) AXQos - QoS bit used for DSCR fetch (both on SRC and DST Side)

Returns
  - XST_FAILURE If ZDMA core is not in Idle state and
    - XST_SUCCESS If Configurations are made successfully

Note
  None.

References XZDma_DscrConfig::AXCache, XZDma_DscrConfig::AxCoherent, XZDma_DscrConfig::AXQos, XZDma_Config::BaseAddress, XZDma::ChannelState, XZDma::Config, XZDma::DscrConfig, XZDMA_DSCR_ATTR_AXCACHE_MASK, XZDMA_DSCR_ATTR_AXCACHE_SHIFT, XZDMA_DSCR_ATTR_AXCOHRNT_MASK, XZDMA_DSCR_ATTR_AXCOHRNT_SHIFT, XZDMA_DSCR_ATTR_AXQOS_MASK, XZDMA_IDLE, and XZDma_WriteReg.

s32 XZDma_SetMode | ( | XZDma * | InstancePtr,
|  | u8 | IsSgDma,
|  | XZDma_Mode | Mode
| ) |  |

This function sets the pointer type and mode in which ZDMA needs to transfer the data.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  IsSgDma | is a variable which specifies whether transfer has to to be done in scatter gather mode or simple mode. TRUE - Scatter gather pointer type FALSE - Simple pointer type
  Mode | is the type of the mode in which data has to be initiated XZDMA_NORMAL_MODE - Normal data transfer from source to destination (Valid for both Scatter gather and simple types) XZDMA_WRONLY_MODE - Write only mode (Valid only for Simple) XZDMA_RDONLY_MODE - Read only mode (Valid only for Simple)

Returns
  - XST_SUCCESS - If mode has been set successfully.
  - XST_FAILURE - If mode has not been set.

Note
  Mode cannot be changed while ZDMA is not in IDLE state.

References XZDma_Config::BaseAddress, XZDma::ChannelState, XZDma::Config, XZDma::IsSgDma, XZDma::Mode, XZDMA_CTRL0_MODE_MASK, XZDMA_CTRL0_POINT_TYPE_MASK, XZDMA_CTRL0_RDONLY_MASK, XZDMA_CTRL0_WRONLY_MASK, XZDMA_IDLE, XZDMA_NORMAL_MODE, XZDMA_RDONLY_MODE, XZDma_ReadReg, XZDma_WriteReg, and XZDMA_WRONLY_MODE.

Referenced by XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SimpleExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

s32 XZDma_Start | ( | XZDma * | InstancePtr,
|  | XZDma_Transfer * | Data,
|  | u32 | Num
| ) |  |

This function sets all the required fields for initiating data transfer.

Data transfer elements needs to be passed through structure pointer. Data transfer can be done in any of the three modes (simple, Linear or Linked List) based on the selected mode but before calling this API make sure that ZDMA is in Idle state.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  Data | is a pointer of array to the XZDma_Transfer structure which has all the configuration fields for initiating data transfer. The fields of the structure are: SrcAddr - Source address DstAddr - Destination address Size - size of the data to be transferred in bytes SrcCoherent - AXI transactions generated to process the descriptor payload for source channel 0 - Non coherent 1 - Coherent DstCoherent - AXI transactions generated to process the descriptor payload for destination channel 0 - Non coherent 1 - Coherent Pause - Valid only for scatter gather mode. Will pause after completion of this descriptor.
  Num | specifies number of array elements of Data pointer. For simple mode Num should be equal to 1 For Scatter gather mode (either linear or linked list) Num can be any choice. (But based on which memory should be allocated by Application) It should be less than the return value of XZDma_CreateBDList.

Returns
  - XST_SUCCESS - if ZDMA initiated the transfer.
  - XST_FAILURE - if ZDMA has not initiated data transfer.

Note
  After Pause to resume the transfer need to use the following API
  - XZDma_Resume User should provide allocated memory and descriptor type in scatter gather mode through the following API before calling the start API.
  - XZDma_SetDescriptorType(XZDma *InstancePtr, XZDma_DscrType TypeOfDscr, UINTPTR Dscr_MemPtr, u32 NoOfBytes)

References XZDma::ChannelState, XZDma::Descriptor, XZDma_Descriptor::DscrCount, XZDma::IsSgDma, and XZDMA_BUSY.

Referenced by XZDma_LinearExample(), XZDma_LinkedListExample(), XZDma_SimpleExample(), XZDma_SimpleReadOnlyExample(), and XZDma_WriteOnlyExample().

void XZDma_WOData | ( | XZDma * | InstancePtr,
|  | u32 * | Buffer
| ) |  |

This function preloads the buffers which will be used in write only mode.

In write only mode the data in the provided buffer will be written in destination address for specified size.

Parameters

  InstancePtr | is a pointer to the XZDma instance.
  Buffer | is a pointer to an array of 64/128 bit data. i.e. pointer to 32 bit array of size 2/4 Array of Size 2 for ADMA Array of Size 4 for GDMA

Returns
  None.

Note
  Valid only in simple mode. Prior to call this function ZDMA instance should be set in Write only mode by using XZDma_SetMode(XZDma *InstancePtr, u8 IsSgDma, XZDma_Mode Mode) To initiate data transfer after this API need to call XZDma_Start(XZDma *InstancePtr, XZDma_Transfer *Data, u32 Num) In which only destination fields has to be filled.

References XZDma_Config::BaseAddress, XZDma::Config, XZDma_Config::DmaType, and XZDma_WriteReg.

Referenced by XZDma_WriteOnlyExample().