xdmapcie: xdmapcie.c File Reference

| xdmapcie Xilinx SDK Drivers API Documentation

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xdmapcie.c File Reference

## Overview

Implements all of functions for XDmaPcie IP driver except interrupts and initialization.

    MODIFICATION HISTORY:

    Ver   Who  Date     Changes

    1.0     tk      01/30/2019      First release

## Functions
int | XDmaPcie_CfgInitialize (XDmaPcie *InstancePtr, XDmaPcie_Config *CfgPtr, UINTPTR EffectiveAddress)
| Initialize the XDmaPcie instance provided by the caller based on the given Config structure. More...
void | XDmaPcie_EnumerateFabric (XDmaPcie *InstancePtr)
| This function starts PCIe enumeration. More...
void | XDmaPcie_GetVsecCapability (XDmaPcie *InstancePtr, u8 VsecNum, u16 *VsecIdPtr, u8 *VersionPtr, u16 *NextCapPtr)
| This API is used to read the VSEC Capability Register. More...
void | XDmaPcie_GetVsecHeader (XDmaPcie *InstancePtr, u8 VsecNum, u16 *VsecIdPtr, u8 *RevisionPtr, u16 *LengthPtr)
| This API is used to read the VSEC Header Register. More...
void | XDmaPcie_GetBridgeInfo (XDmaPcie *InstancePtr, u8 *Gen2Ptr, u8 *RootPortPtr, u8 *ECAMSizePtr)
| This API Reads the Bridge info register. More...
void | XDmaPcie_GetRequesterId (XDmaPcie *InstancePtr, u8 *BusNumPtr, u8 *DevNumPtr, u8 *FunNumPtr, u8 *PortNumPtr)
| Read the Bus Location register. More...
void | XDmaPcie_GetPhyStatusCtrl (XDmaPcie *InstancePtr, u32 *PhyState)
| This API is used to read the Phy Status/Control Register. More...
void | XDmaPcie_GetRootPortStatusCtrl (XDmaPcie *InstancePtr, u32 *StatusPtr)
| Read Root Port Status/Control Register. More...
void | XDmaPcie_SetRootPortStatusCtrl (XDmaPcie *InstancePtr, u32 StatusData)
| Write Value in Root Port Status/Control Register. More...
int | XDmaPcie_SetRootPortMSIBase (XDmaPcie *InstancePtr, unsigned long long MsiBase)
| Write MSI Base Address to Root Port MSI Base Address Register. More...
void | XDmaPcie_GetRootPortErrFIFOMsg (XDmaPcie *InstancePtr, u16 *ReqIdPtr, u8 *ErrType, u8 *ErrValid)
| Read Root Port Error FIFO Message. More...
void | XDmaPcie_ClearRootPortErrFIFOMsg (XDmaPcie *InstancePtr)
| Clear Root Port Error FIFO Message. More...
int | XDmaPcie_GetRootPortIntFIFOReg (XDmaPcie *InstancePtr, u16 *ReqIdPtr, u16 *MsiAddr, u8 *MsiInt, u8 *IntValid, u16 *MsiMsgData)
| Read Root Port Interrupt FIFO message Register 1 & 2. More...
void | XDmaPcie_ClearRootPortIntFIFOReg (XDmaPcie *InstancePtr)
| Clear Root Port FIFO Interrupt message Register 1 & 2. More...
void | XDmaPcie_GetLocalBusBar2PcieBar (XDmaPcie *InstancePtr, u8 BarNumber, XDmaPcie_BarAddr *BarAddrPtr)
| Read PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller. More...
void | XDmaPcie_SetLocalBusBar2PcieBar (XDmaPcie *InstancePtr, u8 BarNumber, XDmaPcie_BarAddr *BarAddrPtr)
| Write PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller. More...
void | XDmaPcie_ReadLocalConfigSpace (XDmaPcie *InstancePtr, u16 Offset, u32 *DataPtr)
| Read 32-bit value from one of this IP own configuration space. More...
void | XDmaPcie_WriteLocalConfigSpace (XDmaPcie *InstancePtr, u16 Offset, u32 Data)
| Write 32-bit value to one of this IP own configuration space. More...
void | XDmaPcie_ReadRemoteConfigSpace (XDmaPcie *InstancePtr, u8 Bus, u8 Device, u8 Function, u16 Offset, u32 *DataPtr)
| Read 32-bit value from external PCIe Function's configuration space. More...
void | XDmaPcie_WriteRemoteConfigSpace (XDmaPcie *InstancePtr, u8 Bus, u8 Device, u8 Function, u16 Offset, u32 Data)
| Write 32-bit value to external PCIe function's configuration space. More...

## Function Documentation

int XDmaPcie_CfgInitialize | ( | XDmaPcie * | InstancePtr,
|  | XDmaPcie_Config * | CfgPtr,
|  | UINTPTR | EffectiveAddress
| ) |  |

Initialize the XDmaPcie instance provided by the caller based on the given Config structure.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.The memory of the pointer references must be pre-allocated by the caller.
  CfgPtr | is the device configuration structure containing required HW build data.
  EffectiveAddress | is the Physical address of the hardware in a Virtual Memory operating system environment.It is the Base Address in a stand alone environment.

Returns

                  - XST_SUCCESS Initialization was successful.

Note
  None.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie::IsReady, XDmaPcie::MaxNumOfBuses, XDMAPCIE_BI_ECAM_SIZE_MASK, XDMAPCIE_BI_ECAM_SIZE_SHIFT, XDMAPCIE_BI_OFFSET, XDmaPcie_DisableInterrupts(), XDMAPCIE_IM_DISABLE_ALL_MASK, and XDmaPcie_ReadReg.

Referenced by PcieInitRootComplex().

void XDmaPcie_ClearRootPortErrFIFOMsg | ( | XDmaPcie * | InstancePtr | ) |

Clear Root Port Error FIFO Message.

Parameters

  InstancePtr | is the PCIe component to operate on.

Returns
  None.

Note
  This function is valid only when IP is configured as a root complex.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDMAPCIE_RPEFR_OFFSET, and XDmaPcie_WriteReg.

void XDmaPcie_ClearRootPortIntFIFOReg | ( | XDmaPcie * | InstancePtr | ) |

Clear Root Port FIFO Interrupt message Register 1 & 2.

Parameters

  InstancePtr | is the PCIe component to operate on

Returns
  None.

Note
  This function is valid only when IP is configured as a root complex.Clearing any one Interrupt FIFO register clears both registers.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDMAPCIE_RPIFR1_OFFSET, and XDmaPcie_WriteReg.

void XDmaPcie_EnumerateFabric | ( | XDmaPcie * | InstancePtr | ) |

This function starts PCIe enumeration.

Parameters

  InstancePtr | pointer to XDmaPcie Instance Pointer

Returns
  none

Referenced by main().

void XDmaPcie_GetBridgeInfo | ( | XDmaPcie * | InstancePtr,
|  | u8 * | Gen2Ptr,
|  | u8 * | RootPortPtr,
|  | u8 * | ECAMSizePtr
| ) |  |

This API Reads the Bridge info register.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  Gen2Ptr | is a pointer to a variable indicating whether underlying PCIe block support PCIe Gen2 Speed.
  RootPortPtr | is a pointer to a variable indication whether underlying PCIe block is root port.
  ECAMSizePtr | is a pointer to a variable where it indicates ECAM size. Value is between 1 to 8. Total address bits dedicated to ECAM is 20 + ECAM size.

Returns
  None.

Note
  None

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie::IsReady, XDMAPCIE_BI_ECAM_SIZE_MASK, XDMAPCIE_BI_ECAM_SIZE_SHIFT, XDMAPCIE_BI_GEN2_MASK, XDMAPCIE_BI_OFFSET, XDMAPCIE_BI_RP_MASK, XDMAPCIE_BI_RP_SHIFT, and XDmaPcie_ReadReg.

void XDmaPcie_GetLocalBusBar2PcieBar | ( | XDmaPcie * | InstancePtr,
|  | u8 | BarNumber,
|  | XDmaPcie_BarAddr * | BarAddrPtr
| ) |  |

Read PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  BarNumber | is AXI bar number (0 - 5) passed by caller.
  BarAddrPtr | is a pointer to a variable where the driver will . pass back translation vector.

Returns
  None.

Note
  None.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeBarOffsetReg, XDmaPcie_BarAddr::LowerAddr, XDmaPcie_BarAddr::UpperAddr, XDMAPCIE_AXIBAR2PCIBAR_0L_OFFSET, XDMAPCIE_AXIBAR2PCIBAR_0U_OFFSET, and XDmaPcie_ReadReg.

void XDmaPcie_GetPhyStatusCtrl | ( | XDmaPcie * | InstancePtr,
|  | u32 * | PhyState
| ) |  |

This API is used to read the Phy Status/Control Register.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  PhyState | is a pointer to a variable where the driver will pass back Current physical status.

Returns
  None.

Note
  None.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie::IsReady, XDMAPCIE_PHYSC_OFFSET, and XDmaPcie_ReadReg.

void XDmaPcie_GetRequesterId | ( | XDmaPcie * | InstancePtr,
|  | u8 * | BusNumPtr,
|  | u8 * | DevNumPtr,
|  | u8 * | FunNumPtr,
|  | u8 * | PortNumPtr
| ) |  |

Read the Bus Location register.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  BusNumPtr | is a pointer to a variable where the driver will pass back the bus number of requester ID assigned to IP.
  DevNumPtr | is a pointer to a variable where the driver will pass back the device number of requester ID assigned to IP.
  FunNumPtr | is a pointer to a variable where the driver will pass back the function number of requester ID assigned to IP.
  PortNumPtr | is a pointer to a variable where the driver will pass back the Port number of requester ID assigned to IP.

Returns
  None.

Note
  None

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie::IsReady, XDMAPCIE_BL_BUS_MASK, XDMAPCIE_BL_BUS_SHIFT, XDMAPCIE_BL_DEV_MASK, XDMAPCIE_BL_DEV_SHIFT, XDMAPCIE_BL_FUNC_MASK, XDMAPCIE_BL_OFFSET, XDMAPCIE_BL_PORT_MASK, XDMAPCIE_BL_PORT_SHIFT, and XDmaPcie_ReadReg.

Referenced by PcieInitRootComplex().

void XDmaPcie_GetRootPortErrFIFOMsg | ( | XDmaPcie * | InstancePtr,
|  | u16 * | ReqIdPtr,
|  | u8 * | ErrType,
|  | u8 * | ErrValid
| ) |  |

Read Root Port Error FIFO Message.

Parameters

  InstancePtr | is the PCIe component to operate on.
  ReqIdPtr | is a variable where the driver will pass back the requester Id of error message.
  ErrType | is a variable where the driver will pass back the type of error message
  ErrValid | is a variable where the driver will pass back the status of read operation of error message.

Returns
  None.

Note
  This function is valid only when IP is configured as a root complex.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDmaPcie_ReadReg, XDMAPCIE_RPEFR_ERR_TYPE_MASK, XDMAPCIE_RPEFR_ERR_TYPE_SHIFT, XDMAPCIE_RPEFR_ERR_VALID_MASK, XDMAPCIE_RPEFR_ERR_VALID_SHIFT, XDMAPCIE_RPEFR_OFFSET, and XDMAPCIE_RPEFR_REQ_ID_MASK.

int XDmaPcie_GetRootPortIntFIFOReg | ( | XDmaPcie * | InstancePtr,
|  | u16 * | ReqIdPtr,
|  | u16 * | MsiAddr,
|  | u8 * | MsiInt,
|  | u8 * | IntValid,
|  | u16 * | MsiMsgData
| ) |  |

Read Root Port Interrupt FIFO message Register 1 & 2.

Parameters

  InstancePtr | is the PCIe component to operate on.
  ReqIdPtr | is a variable where the driver will pass back the requester Id of error message.
  MsiAddr | is a variable where the driver will pass back the MSI address for which interrupt message recieved.
  MsiInt | is a variable where the driver will pass back the type of interrupt message recieved (MSI/INTx).
  IntValid | is a variable where the driver will pass back the status of read operation of interrupt message.
  MsiMsgData | is a variable where the driver will pass back the MSI data recieved.

Returns
  MsiMsgData if MSI interrupt is observed or 0 if there is no MSI interrupt.

Note
  This function is valid only when IP is configured as a root complex.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDmaPcie_ReadReg, XDMAPCIE_RPIFR1_INTR_VALID_MASK, XDMAPCIE_RPIFR1_INTR_VALID_SHIFT, XDMAPCIE_RPIFR1_MSI_ADDR_MASK, XDMAPCIE_RPIFR1_MSI_ADDR_SHIFT, XDMAPCIE_RPIFR1_MSIINTR_VALID_MASK, XDMAPCIE_RPIFR1_MSIINTR_VALID_SHIFT, XDMAPCIE_RPIFR1_OFFSET, XDMAPCIE_RPIFR1_REQ_ID_MASK, XDMAPCIE_RPIFR2_MSG_DATA_MASK, and XDMAPCIE_RPIFR2_OFFSET.

void XDmaPcie_GetRootPortStatusCtrl | ( | XDmaPcie * | InstancePtr,
|  | u32 * | StatusPtr
| ) |  |

Read Root Port Status/Control Register.

Parameters

  InstancePtr | is the PCIe component to operate on.
  StatusPtr | is a pointer to a variable where the driver will pass back the root port status.

Returns
  None.

Note
  This function is valid only when IP is configured as a root complex.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDmaPcie_ReadReg, and XDMAPCIE_RPSC_OFFSET.

void XDmaPcie_GetVsecCapability | ( | XDmaPcie * | InstancePtr,
|  | u8 | VsecNum,
|  | u16 * | VsecIdPtr,
|  | u8 * | VersionPtr,
|  | u16 * | NextCapPtr
| ) |  |

This API is used to read the VSEC Capability Register.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  VsecNum | is a VSEC register number as there are two registers. Possible values are. XDMAPCIE_VSEC1 (0) XDMAPCIE_VSEC2 (1)
  VsecIdPtr | is a pointer to a variable where the driver will pass back the Vendor Specific Enhanced Capability ID.
  VersionPtr | is a pointer to a variable where the driver will . pass back the Version of VSEC.
  NextCapPtr | is a pointer to a variable where the driver will pass back the Next Capability offset.

Returns
  None.

Note
  None

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie::IsReady, XDmaPcie_ReadReg, XDMAPCIE_VSECC_ID_MASK, XDMAPCIE_VSECC_NEXT_MASK, XDMAPCIE_VSECC_NEXT_SHIFT, XDMAPCIE_VSECC_OFFSET, XDMAPCIE_VSECC_VER_MASK, and XDMAPCIE_VSECC_VER_SHIFT.

void XDmaPcie_GetVsecHeader | ( | XDmaPcie * | InstancePtr,
|  | u8 | VsecNum,
|  | u16 * | VsecIdPtr,
|  | u8 * | RevisionPtr,
|  | u16 * | LengthPtr
| ) |  |

This API is used to read the VSEC Header Register.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  VsecNum | is a VSEC register number as there are two registers. Possible values are. XDMAPCIE_VSEC1 (0) XDMAPCIE_VSEC2 (1)
  VsecIdPtr | is a pointer to a variable where the driver will pass back the VSEC header structure Id.
  RevisionPtr | is a pointer to a variable where the driver will pass back the Revision of VSEC capability Structure.
  LengthPtr | is a pointer to a variable where the driver will pass . back the length of the VSEC capability structure.

Returns
  None.

Note
  None

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie::IsReady, XDmaPcie_ReadReg, XDMAPCIE_VSECH_ID_MASK, XDMAPCIE_VSECH_LEN_MASK, XDMAPCIE_VSECH_LEN_SHIFT, XDMAPCIE_VSECH_OFFSET, XDMAPCIE_VSECH_REV_MASK, and XDMAPCIE_VSECH_REV_SHIFT.

void XDmaPcie_ReadLocalConfigSpace | ( | XDmaPcie * | InstancePtr,
|  | u16 | Offset,
|  | u32 * | DataPtr
| ) |  |

Read 32-bit value from one of this IP own configuration space.

Location is identified by its offset from the beginning of the configuration space.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  Offset | from beginning of IP own configuration space.
  DataPtr | is a pointer to a variable where the driver will pass back the value read from the specified location.

Returns
  None

Note
  None

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie::IsReady, XDMAPCIE_PCIE_CORE_OFFSET, and XDmaPcie_ReadReg.

Referenced by PcieInitRootComplex().

void XDmaPcie_ReadRemoteConfigSpace | ( | XDmaPcie * | InstancePtr,
|  | u8 | Bus,
|  | u8 | Device,
|  | u8 | Function,
|  | u16 | Offset,
|  | u32 * | DataPtr
| ) |  |

Read 32-bit value from external PCIe Function's configuration space.

External PCIe function is identified by its Requester ID (Bus#, Device#, Function#). Location is identified by its offset from the begginning of the configuration space.

Parameters

  InstancePtr | is the PCIe component to operate on.
  Bus | is the external PCIe function's Bus number.
  Device | is the external PCIe function's Device number.
  Function | is the external PCIe function's Function number.
  Offset | from beggininng of PCIe function's configuration space.
  DataPtr | is a pointer to a variable where the driver will pass back the value read from the specified location.

Returns
  None

Note
  This function is valid only when IP is configured as a root complex. The XDmaPcie_ReadLocalConfigSpace API should be used for reading the local config space.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDmaPcie::MaxNumOfBuses, XDmaPcie_IsEcamBusy, and XDmaPcie_ReadReg.

Referenced by XDmaPcie_GetCapability(), XDmaPcie_HasCapability(), and XDmaPcie_PrintAllCapabilites().

void XDmaPcie_SetLocalBusBar2PcieBar | ( | XDmaPcie * | InstancePtr,
|  | u8 | BarNumber,
|  | XDmaPcie_BarAddr * | BarAddrPtr
| ) |  |

Write PCIe address translation vector that corresponds to one of AXI local bus bars passed by the caller.

Parameters

  InstancePtr | is the XDmaPcie instance to operate on.
  BarNumber | is AXI bar number (0 - 5) passed by caller.
  BarAddrPtr | is a pointer to a variable where the driver will pass back translation vector.

Returns
  None.

Note
  None.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeBarOffsetReg, XDmaPcie_BarAddr::LowerAddr, XDmaPcie_BarAddr::UpperAddr, XDMAPCIE_AXIBAR2PCIBAR_0L_OFFSET, XDMAPCIE_AXIBAR2PCIBAR_0U_OFFSET, and XDmaPcie_WriteReg.

int XDmaPcie_SetRootPortMSIBase | ( | XDmaPcie * | InstancePtr,
|  | unsigned long long | MsiBase
| ) |  |

Write MSI Base Address to Root Port MSI Base Address Register.

Parameters

  InstancePtr | is the PCIe component to operate on.
  MsiBase | is 64 bit base address for MSI.This address should be 4kB aligned always.

Returns
  XST_SUCCESS if success or XST_FAILURE if failure .

Note
  This function is valid only when IP is configured as a root complex.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDMAPCIE_RPMSIB_LOWER_MASK, XDMAPCIE_RPMSIB_LOWER_OFFSET, XDMAPCIE_RPMSIB_UPPER_MASK, XDMAPCIE_RPMSIB_UPPER_OFFSET, and XDmaPcie_WriteReg.

void XDmaPcie_SetRootPortStatusCtrl | ( | XDmaPcie * | InstancePtr,
|  | u32 | StatusData
| ) |  |

Write Value in Root Port Status/Control Register.

Parameters

  InstancePtr | is the PCIe component to operate on.
  StatusData | is data to set.

Returns
  None.

Note
  This function is valid only when IP is configured as a root complex.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDMAPCIE_RPSC_MASK, XDMAPCIE_RPSC_OFFSET, and XDmaPcie_WriteReg.

void XDmaPcie_WriteLocalConfigSpace | ( | XDmaPcie * | InstancePtr,
|  | u16 | Offset,
|  | u32 | Data
| ) |  |

Write 32-bit value to one of this IP own configuration space.

Location is identified by its offset from the begginning of the configuration space.

Parameters

  InstancePtr | is the PCIe component to operate on.
  Offset | from beggininng of IP own configuration space.
  Data | to be written to the specified location.

Returns
  None

Note
  This function is valid only when IP is configured as a root complex.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDMAPCIE_PCIE_CORE_OFFSET, and XDmaPcie_WriteReg.

Referenced by PcieInitRootComplex().

void XDmaPcie_WriteRemoteConfigSpace | ( | XDmaPcie * | InstancePtr,
|  | u8 | Bus,
|  | u8 | Device,
|  | u8 | Function,
|  | u16 | Offset,
|  | u32 | Data
| ) |  |

Write 32-bit value to external PCIe function's configuration space.

External PCIe function is identified by its Requester ID (Bus#, Device#, Function#). Location is identified by its offset from the begginning of the configuration space.

Parameters

  InstancePtr | is the PCIe component to operate on.
  Bus | is the external PCIe function's Bus number.
  Device | is the external PCIe function's Device number.
  Function | is the external PCIe function's Function number.
  Offset | from beggininng of PCIe function's configuration space.
  Data | to be written to the specified location.

Returns
  None

Note
  This function is valid only when IP is configured as a root complex. The XDmaPcie_WriteLocalConfigSpace should be used for writing to local config space.

References XDmaPcie_Config::BaseAddress, XDmaPcie::Config, XDmaPcie_Config::IncludeRootComplex, XDmaPcie::IsReady, XDmaPcie::MaxNumOfBuses, XDmaPcie_IsEcamBusy, XDmaPcie_ReadReg, and XDmaPcie_WriteReg.