usbps: xusbps.h File Reference

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xusbps.h File Reference

## Data Structures
struct | XUsbPs_EpOut
| The following data structures are used internally by the L0/L1 driver. More...
struct | XUsbPs_EpIn
| The following data structure represents IN endpoint. More...
struct | XUsbPs_Endpoint
| The following data structure represents an endpoint used internally by the L0/L1 driver. More...
struct | XUsbPs_SetupData
| The following structure is used by the user to receive Setup Data from an endpoint. More...
struct | XUsbPs_EpSetup
| Data structures used to configure endpoints. More...
struct | XUsbPs_EpConfig
| Endpoint configuration structure. More...
struct | XUsbPs_DeviceConfig
| The XUsbPs_DeviceConfig structure contains the configuration information to configure the USB controller for DEVICE mode. More...
struct | XUsbPs_Config
| The XUsbPs_Config structure contains configuration information for the USB controller. More...
struct | XUsbPs
| The XUsbPs driver instance data. More...

## Macros
#define | XUSBPS_MAX_PACKET_SIZE 1024
| Maximum value can be put into the queue head. More...
#define | XUsbPs_GetFrameNum(InstancePtr) XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, XUSBPS_FRAME_OFFSET)
| This macro returns the current frame number. More...
#define | XUsbPs_Start(InstancePtr) XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
| This macro starts the USB engine. More...
#define | XUsbPs_Stop(InstancePtr) XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)
| This macro stops the USB engine. More...
#define | XUsbPs_ForceFS(InstancePtr)
| This macro forces the USB engine to be in Full Speed (FS) mode. More...
#define | XUsbPs_StartTimer0(InstancePtr, Interval)
| This macro starts the USB Timer 0, with repeat option for period of one second. More...
#define | XUsbPs_StopTimer0(InstancePtr)
| This macro stops Timer 0. More...
#define | XUsbPs_ReadTimer0(InstancePtr)
| This macro reads Timer 0. More...
#define | XUsbPs_RemoteWakeup(InstancePtr)
| This macro force remote wakeup on host. More...
#define | XUsbPs_EpEnable(InstancePtr, EpNum, Dir)
| This macro enables the given endpoint for the given direction. More...
#define | XUsbPs_EpDisable(InstancePtr, EpNum, Dir)
| This macro disables the given endpoint for the given direction. More...
#define | XUsbPs_EpStall(InstancePtr, EpNum, Dir)
| This macro stalls the given endpoint for the given direction, and flush the buffers. More...
#define | XUsbPs_EpUnStall(InstancePtr, EpNum, Dir)
| This macro unstalls the given endpoint for the given direction. More...
#define | XUsbPs_EpFlush(InstancePtr, EpNum, Dir)
| This macro flush an endpoint upon interface disable. More...
#define | XUsbPs_IntrEnable(InstancePtr, IntrMask) XUsbPs_SetBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
| This macro enables the interrupts defined by the bit mask. More...
#define | XUsbPs_IntrDisable(InstancePtr, IntrMask) XUsbPs_ClrBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)
| This function disables the interrupts defined by the bit mask. More...
#define | XUsbPs_NakIntrEnable(InstancePtr, NakIntrMask) XUsbPs_SetBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
| This macro enables the endpoint NAK interrupts defined by the bit mask. More...
#define | XUsbPs_NakIntrDisable(InstancePtr, NakIntrMask) XUsbPs_ClrBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)
| This macro disables the endpoint NAK interrupts defined by the bit mask. More...
#define | XUsbPs_NakIntrClear(InstancePtr, NakIntrMask)
| This function clears the endpoint NAK interrupts status defined by the bit mask. More...
#define | XUsbPs_SetIntrThreshold(InstancePtr, Threshold)
| This macro sets the Interrupt Threshold value in the control register. More...
#define | XUsbPs_SetSetupTripwire(InstancePtr)
| This macro sets the Tripwire bit in the USB command register. More...
#define | XUsbPs_ClrSetupTripwire(InstancePtr)
| This macro clears the Tripwire bit in the USB command register. More...
#define | XUsbPs_SetupTripwireIsSet(InstancePtr)
| This macro checks if the Tripwire bit in the USB command register is set. More...
#define | XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
| This macro sets the given bit mask in the register. More...
#define | XUsbPs_ClrBits(InstancePtr, RegOffset, Bits)
| This macro clears the given bits in the register. More...
System hang prevention Timeout counter value.
This value is used throughout the code to initialize a Timeout counter that is used when hard polling a register. The ides is to initialize the Timeout counter to a value that is longer than any expected Timeout but short enough so the system will continue to work and report an error while the user is still paying attention. A reasonable Timeout time would be about 10 seconds. The XUSBPS_TIMEOUT_COUNTER value should be chosen so a polling loop would run about 10 seconds before a Timeout is detected. For example:
        int Timeout = XUSBPS_TIMEOUT_COUNTER;
     while ((XUsbPs_ReadReg(InstancePtr->Config.BaseAddress,
                        XUSBPS_CMD_OFFSET) &
                        XUSBPS_CMD_RST_MASK) && --Timeout) {
        ;
     }
     if (0 == Timeout) {
        return XST_FAILURE;
#define | XUSBPS_TIMEOUT_COUNTER 1000000
Endpoint Direction (bitmask)
Definitions to be used with Endpoint related function that require a 'Direction' parameter. NOTE: The direction is always defined from the perspective of the HOST! This means that an IN endpoint on the controller is used for sending data while the OUT endpoint on the controller is used for receiving data.
#define | XUSBPS_EP_DIRECTION_IN 0x01
| Endpoint direction IN. More...
#define | XUSBPS_EP_DIRECTION_OUT 0x02
| Endpoint direction OUT. More...
Endpoint Type
Definitions to be used with Endpoint related functions that require a 'Type' parameter.
#define | XUSBPS_EP_TYPE_NONE 0
| Endpoint is not used. More...
#define | XUSBPS_EP_TYPE_CONTROL 1
| Endpoint for Control Transfers. More...
#define | XUSBPS_EP_TYPE_ISOCHRONOUS 2
| Endpoint for isochronous data. More...
#define | XUSBPS_EP_TYPE_BULK 3
| Endpoint for BULK Transfers. More...
#define | XUSBPS_EP_TYPE_INTERRUPT 4
| Endpoint for interrupt Transfers. More...
#define | ENDPOINT_MAXP_LENGTH 0x400
| Endpoint Max Packet Length in DeviceConfig is a coded value, ch9.6.6. More...
Field names for status retrieval
Definitions for the XUsbPs_GetStatus() function call 'StatusType' parameter.
#define | XUSBPS_EP_STS_ADDRESS 1
| Address of controller. More...
#define | XUSBPS_EP_STS_CONTROLLER_STATE 2
| Current controller state. More...
USB Default alternate setting
#define | XUSBPS_DEFAULT_ALT_SETTING 0
| The default alternate setting is 0. More...
Endpoint event types
Definitions that are used to identify events that occur on endpoints. Passed to the endpoint event handler functions registered with XUsbPs_EpSetHandler().
#define | XUSBPS_EP_EVENT_SETUP_DATA_RECEIVED 0x01
| Setup data has been received on the endpoint. More...
#define | XUSBPS_EP_EVENT_DATA_RX 0x02
| Data frame has been received on the endpoint. More...
#define | XUSBPS_EP_EVENT_DATA_TX 0x03
| Data frame has been sent on the endpoint. More...

## Functions
int | XUsbPs_CfgInitialize (XUsbPs *InstancePtr, const XUsbPs_Config *ConfigPtr, u32 BaseAddress)
| Setup / Initialize functions. More...
int | XUsbPs_ConfigureDevice (XUsbPs *InstancePtr, const XUsbPs_DeviceConfig *CfgPtr)
| This function configures the DEVICE side of the controller. More...
int | XUsbPs_Reset (XUsbPs *InstancePtr)
| Common functions used for DEVICE/HOST mode. More...
void | XUsbPs_DeviceReset (XUsbPs *InstancePtr)
| This function performs device reset, device is stopped at the end. More...
int | XUsbPs_BusReset (XUsbPs *InstancePtr)
| DEVICE mode specific functions. More...
int | XUsbPs_SetDeviceAddress (XUsbPs *InstancePtr, u8 Address)
| This functions sets the controller's DEVICE address. More...
int | XUsbPs_Suspend (const XUsbPs *InstancePtr)
| Handling Suspend and Resume. More...
int | XUsbPs_Resume (const XUsbPs *InstancePtr)
| USB Resume. More...
int | XUsbPs_RequestHostResume (const XUsbPs *InstancePtr)
| USB Assert Resume. More...
int | XUsbPs_EpBufferSend (XUsbPs *InstancePtr, u8 EpNum, const u8 *BufferPtr, u32 BufferLen)
| This function sends a given data buffer. More...
int | XUsbPs_EpBufferSendWithZLT (XUsbPs *InstancePtr, u8 EpNum, const u8 *BufferPtr, u32 BufferLen)
| This function sends a given data buffer and also zero length packet if the Bufferlen is in multiples of endpoint max packet size. More...
int | XUsbPs_EpBufferReceive (XUsbPs *InstancePtr, u8 EpNum, u8 **BufferPtr, u32 *BufferLenPtr, u32 *Handle)
| This function receives a data buffer from the endpoint of the given endpoint number. More...
void | XUsbPs_EpBufferRelease (u32 Handle)
| This function returns a previously received data buffer to the driver. More...
int | XUsbPs_EpSetHandler (XUsbPs *InstancePtr, u8 EpNum, u8 Direction, XUsbPs_EpHandlerFunc CallBackFunc, void *CallBackRef)
| This function sets the handler for endpoint events. More...
int | XUsbPs_EpGetSetupData (XUsbPs *InstancePtr, int EpNum, XUsbPs_SetupData *SetupDataPtr)
| This function extracts the Setup Data from a given endpoint. More...
int | XUsbPs_EpPrime (XUsbPs *InstancePtr, u8 EpNum, u8 Direction)
| This function primes an endpoint. More...
int | XUsbPs_ReconfigureEp (XUsbPs *InstancePtr, XUsbPs_DeviceConfig *CfgPtr, int EpNum, unsigned short NewDirection, int DirectionChanged)
| This function reconfigures one Ep corresponding to host's request of setting alternate interface. More...
void | XUsbPs_IntrHandler (void *InstancePtr)
| This function is the first-level interrupt handler for the USB core. More...
int | XUsbPs_IntrSetHandler (XUsbPs *InstancePtr, XUsbPs_IntrHandlerFunc CallBackFunc, void *CallBackRef, u32 Mask)
| This function registers the user callback handler for controller (non-endpoint) interrupts. More...
XUsbPs_Config * | XUsbPs_LookupConfig (u16 DeviceId)
| Looks up the controller configuration based on the unique controller ID. More...

## Macro Definition Documentation

#define XUsbPs_ClrBits | ( |  | InstancePtr,
|  |  | RegOffset,
|  |  | Bits
| ) |  |

Value:
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
RegOffset) & ~(Bits));
XUsbPs_ReadReg
#define XUsbPs_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xusbps_hw.h:498
XUsbPs_WriteReg
#define XUsbPs_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xusbps_hw.h:517

This macro clears the given bits in the register.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  RegOffset | is the register offset to be written.
  Bits | are the bits to be cleared in the register

Returns
  None.

Note
  C-style signature: void XUsbPs_ClrBits(u32 BaseAddress, u32 RegOffset, u32 Bits)

#define XUsbPs_ClrSetupTripwire | ( |  | InstancePtr | ) |

Value:
XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, \
XUSBPS_CMD_SUTW_MASK)
XUsbPs_ClrBits
#define XUsbPs_ClrBits(InstancePtr, RegOffset, Bits)
This macro clears the given bits in the register.
Definition: xusbps.h:1004
XUSBPS_CMD_SUTW_MASK
#define XUSBPS_CMD_SUTW_MASK
Setup TripWire.
Definition: xusbps_hw.h:202
XUSBPS_CMD_OFFSET
#define XUSBPS_CMD_OFFSET
Configuration.
Definition: xusbps_hw.h:114

This macro clears the Tripwire bit in the USB command register.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_ClrTripwire(XUsbPs *InstancePtr)

Referenced by XUsbPs_EpGetSetupData().

#define XUsbPs_EpDisable | ( |  | InstancePtr,
|  |  | EpNum,
|  |  | Dir
| ) |  |

Value:
XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
XUSBPS_EPCR_RXE_MASK
#define XUSBPS_EPCR_RXE_MASK
Transmit enable.
Definition: xusbps_hw.h:186
XUsbPs_ClrBits
#define XUsbPs_ClrBits(InstancePtr, RegOffset, Bits)
This macro clears the given bits in the register.
Definition: xusbps.h:1004
XUSBPS_EP_DIRECTION_IN
#define XUSBPS_EP_DIRECTION_IN
Endpoint direction IN.
Definition: xusbps.h:239
XUSBPS_EP_DIRECTION_OUT
#define XUSBPS_EP_DIRECTION_OUT
Endpoint direction OUT.
Definition: xusbps.h:240
XUSBPS_EPCR_TXE_MASK
#define XUSBPS_EPCR_TXE_MASK
Transmit enable - TX.
Definition: xusbps_hw.h:176

This macro disables the given endpoint for the given direction.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.
  EpNum | is the number of the endpoint to disable.
  Dir | is the direction of the endpoint (bitfield): XUSBPS_EP_DIRECTION_OUT XUSBPS_EP_DIRECTION_IN

Note
  C-style signature: void XUsbPs_EpDisable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)

#define XUsbPs_EpEnable | ( |  | InstancePtr,
|  |  | EpNum,
|  |  | Dir
| ) |  |

Value:
XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXE_MASK : 0) | \
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXE_MASK : 0))
XUSBPS_EPCR_RXE_MASK
#define XUSBPS_EPCR_RXE_MASK
Transmit enable.
Definition: xusbps_hw.h:186
XUSBPS_EP_DIRECTION_IN
#define XUSBPS_EP_DIRECTION_IN
Endpoint direction IN.
Definition: xusbps.h:239
XUsbPs_SetBits
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
This macro sets the given bit mask in the register.
Definition: xusbps.h:982
XUSBPS_EP_DIRECTION_OUT
#define XUSBPS_EP_DIRECTION_OUT
Endpoint direction OUT.
Definition: xusbps.h:240
XUSBPS_EPCR_TXE_MASK
#define XUSBPS_EPCR_TXE_MASK
Transmit enable - TX.
Definition: xusbps_hw.h:176

This macro enables the given endpoint for the given direction.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.
  EpNum | is number of the endpoint to enable.
  Dir | is direction of the endpoint (bitfield): XUSBPS_EP_DIRECTION_OUT XUSBPS_EP_DIRECTION_IN

Note
  C-style signature: void XUsbPs_EpEnable(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)

Referenced by XUsbPs_SetConfiguration().

#define XUsbPs_EpFlush | ( |  | InstancePtr,
|  |  | EpNum,
|  |  | Dir
| ) |  |

Value:
XUsbPs_SetBits(InstancePtr, XUSBPS_EPFLUSH_OFFSET, \
1 << (EpNum + ((Dir) & XUSBPS_EP_DIRECTION_OUT ? \
XUSBPS_EPFLUSH_RX_SHIFT:XUSBPS_EPFLUSH_TX_SHIFT))) \
XUSBPS_EPFLUSH_OFFSET
#define XUSBPS_EPFLUSH_OFFSET
Endpoint Flush.
Definition: xusbps_hw.h:139
XUsbPs_SetBits
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
This macro sets the given bit mask in the register.
Definition: xusbps.h:982
XUSBPS_EP_DIRECTION_OUT
#define XUSBPS_EP_DIRECTION_OUT
Endpoint direction OUT.
Definition: xusbps.h:240

This macro flush an endpoint upon interface disable.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.
  EpNum | is the number of the endpoint to flush.
  Dir | is the direction of the endpoint (bitfield): XUSBPS_EP_DIRECTION_OUT XUSBPS_EP_DIRECTION_IN

Note
  C-style signature: void XUsbPs_EpFlush(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)

#define XUsbPs_EpStall | ( |  | InstancePtr,
|  |  | EpNum,
|  |  | Dir
| ) |  |

Value:
XUsbPs_SetBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
XUSBPS_EPCR_TXS_MASK
#define XUSBPS_EPCR_TXS_MASK
Stall TX endpoint.
Definition: xusbps_hw.h:175
XUSBPS_EP_DIRECTION_IN
#define XUSBPS_EP_DIRECTION_IN
Endpoint direction IN.
Definition: xusbps.h:239
XUsbPs_SetBits
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
This macro sets the given bit mask in the register.
Definition: xusbps.h:982
XUSBPS_EP_DIRECTION_OUT
#define XUSBPS_EP_DIRECTION_OUT
Endpoint direction OUT.
Definition: xusbps.h:240
XUSBPS_EPCR_RXS_MASK
#define XUSBPS_EPCR_RXS_MASK
Stall RX endpoint.
Definition: xusbps_hw.h:185

This macro stalls the given endpoint for the given direction, and flush the buffers.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.
  EpNum | is number of the endpoint to stall.
  Dir | is the direction of the endpoint (bitfield): XUSBPS_EP_DIRECTION_OUT XUSBPS_EP_DIRECTION_IN

Note
  C-style signature: void XUsbPs_EpStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)

Referenced by XUsbPs_Ch9HandleSetupPacket(), and XUsbPs_ClassReq().

#define XUsbPs_EpUnStall | ( |  | InstancePtr,
|  |  | EpNum,
|  |  | Dir
| ) |  |

Value:
XUsbPs_ClrBits(InstancePtr, XUSBPS_EPCRn_OFFSET(EpNum), \
((Dir) & XUSBPS_EP_DIRECTION_OUT ? XUSBPS_EPCR_RXS_MASK : 0) | \
((Dir) & XUSBPS_EP_DIRECTION_IN ? XUSBPS_EPCR_TXS_MASK : 0))
XUSBPS_EPCR_TXS_MASK
#define XUSBPS_EPCR_TXS_MASK
Stall TX endpoint.
Definition: xusbps_hw.h:175
XUsbPs_ClrBits
#define XUsbPs_ClrBits(InstancePtr, RegOffset, Bits)
This macro clears the given bits in the register.
Definition: xusbps.h:1004
XUSBPS_EP_DIRECTION_IN
#define XUSBPS_EP_DIRECTION_IN
Endpoint direction IN.
Definition: xusbps.h:239
XUSBPS_EP_DIRECTION_OUT
#define XUSBPS_EP_DIRECTION_OUT
Endpoint direction OUT.
Definition: xusbps.h:240
XUSBPS_EPCR_RXS_MASK
#define XUSBPS_EPCR_RXS_MASK
Stall RX endpoint.
Definition: xusbps_hw.h:185

This macro unstalls the given endpoint for the given direction.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.
  EpNum | is the Number of the endpoint to unstall.
  Dir | is the Direction of the endpoint (bitfield): XUSBPS_EP_DIRECTION_OUT XUSBPS_EP_DIRECTION_IN

Note
  C-style signature: void XUsbPs_EpUnStall(XUsbPs *InstancePtr, u8 EpNum, u8 Dir)

#define XUsbPs_ForceFS | ( |  | InstancePtr | ) |

Value:
XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
XUSBPS_PORTSCR_PFSC_MASK)
XUSBPS_PORTSCR1_OFFSET
#define XUSBPS_PORTSCR1_OFFSET
Port Control/Status 1.
Definition: xusbps_hw.h:128
XUsbPs_SetBits
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
This macro sets the given bit mask in the register.
Definition: xusbps.h:982
XUSBPS_PORTSCR_PFSC_MASK
#define XUSBPS_PORTSCR_PFSC_MASK
Port Force Full Speed Connect.
Definition: xusbps_hw.h:387

This macro forces the USB engine to be in Full Speed (FS) mode.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_ForceFS(XUsbPs *InstancePtr)

#define XUsbPs_GetFrameNum | ( |  | InstancePtr | ) | XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, XUSBPS_FRAME_OFFSET)

This macro returns the current frame number.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.

Returns
  The current frame number.

Note
  C-style signature: u32 XUsbPs_GetFrameNum(const XUsbPs *InstancePtr)

#define XUsbPs_IntrDisable | ( |  | InstancePtr,
|  |  | IntrMask
| ) |  | XUsbPs_ClrBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)

This function disables the interrupts defined by the bit mask.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  IntrMask | is a Bit mask of interrupts to be disabled.

Note
  C-style signature: void XUsbPs_IntrDisable(XUsbPs *InstancePtr, u32 IntrMask)

#define XUsbPs_IntrEnable | ( |  | InstancePtr,
|  |  | IntrMask
| ) |  | XUsbPs_SetBits(InstancePtr, XUSBPS_IER_OFFSET, IntrMask)

This macro enables the interrupts defined by the bit mask.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  IntrMask | is the Bit mask of interrupts to be enabled.

Note
  C-style signature: void XUsbPs_IntrEnable(XUsbPs *InstancePtr, u32 IntrMask)

#define XUsbPs_NakIntrClear | ( |  | InstancePtr,
|  |  | NakIntrMask
| ) |  |

Value:
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
XUSBPS_EPNAKISR_OFFSET, NakIntrMask)
XUsbPs_WriteReg
#define XUsbPs_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xusbps_hw.h:517
XUSBPS_EPNAKISR_OFFSET
#define XUSBPS_EPNAKISR_OFFSET
Endpoint NAK IRQ Status.
Definition: xusbps_hw.h:126

This function clears the endpoint NAK interrupts status defined by the bit mask.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  NakIntrMask | is the Bit mask of endpoint NAK interrupts to be cleared.

Note
  C-style signature: void XUsbPs_NakIntrClear(XUsbPs *InstancePtr, u32 NakIntrMask)

#define XUsbPs_NakIntrDisable | ( |  | InstancePtr,
|  |  | NakIntrMask
| ) |  | XUsbPs_ClrBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)

This macro disables the endpoint NAK interrupts defined by the bit mask.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  NakIntrMask | is a Bit mask of endpoint NAK interrupts to be disabled.

Note
  C-style signature: void XUsbPs_NakIntrDisable(XUsbPs *InstancePtr, u32 NakIntrMask)

#define XUsbPs_NakIntrEnable | ( |  | InstancePtr,
|  |  | NakIntrMask
| ) |  | XUsbPs_SetBits(InstancePtr, XUSBPS_EPNAKIER_OFFSET, NakIntrMask)

This macro enables the endpoint NAK interrupts defined by the bit mask.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  NakIntrMask | is the Bit mask of endpoint NAK interrupts to be enabled.

Note
  C-style signature: void XUsbPs_NakIntrEnable(XUsbPs *InstancePtr, u32 NakIntrMask)

#define XUsbPs_ReadTimer0 | ( |  | InstancePtr | ) |

Value:
XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
XUSBPS_TIMER0_CTL_OFFSET) & \
XUSBPS_TIMER_COUNTER_MASK
XUsbPs_ReadReg
#define XUsbPs_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xusbps_hw.h:498

This macro reads Timer 0.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_ReadTimer0(XUsbPs *InstancePtr)

#define XUsbPs_RemoteWakeup | ( |  | InstancePtr | ) |

Value:
XUsbPs_SetBits(InstancePtr, XUSBPS_PORTSCR1_OFFSET, \
XUSBPS_PORTSCR_FPR_MASK)
XUSBPS_PORTSCR1_OFFSET
#define XUSBPS_PORTSCR1_OFFSET
Port Control/Status 1.
Definition: xusbps_hw.h:128
XUsbPs_SetBits
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
This macro sets the given bit mask in the register.
Definition: xusbps.h:982
XUSBPS_PORTSCR_FPR_MASK
#define XUSBPS_PORTSCR_FPR_MASK
Force Port Resume.
Definition: xusbps_hw.h:372

This macro force remote wakeup on host.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_RemoteWakeup(XUsbPs *InstancePtr)

#define XUsbPs_SetBits | ( |  | InstancePtr,
|  |  | RegOffset,
|  |  | Bits
| ) |  |

Value:
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, RegOffset, \
XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
RegOffset) | (Bits));
XUsbPs_ReadReg
#define XUsbPs_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xusbps_hw.h:498
XUsbPs_WriteReg
#define XUsbPs_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xusbps_hw.h:517

This macro sets the given bit mask in the register.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  RegOffset | is the register offset to be written.
  Bits | is the Bits to be set in the register

Returns
  None.

Note
  C-style signature: void XUsbPs_SetBits(u32 BaseAddress, u32 RegOffset, u32 Bits)

Referenced by XUsbPs_ConfigureDevice(), and XUsbPs_SetConfiguration().

#define XUsbPs_SetIntrThreshold | ( |  | InstancePtr,
|  |  | Threshold
| ) |  |

Value:
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
XUSBPS_CMD_OFFSET, (Threshold))\
XUSBPS_CMD_OFFSET
#define XUSBPS_CMD_OFFSET
Configuration.
Definition: xusbps_hw.h:114
XUsbPs_WriteReg
#define XUsbPs_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xusbps_hw.h:517

This macro sets the Interrupt Threshold value in the control register.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  Threshold | is the Interrupt threshold to be set. Allowed values: XUSBPS_CMD_ITHRESHOLD_0 - Immediate interrupt XUSBPS_CMD_ITHRESHOLD_1 - 1 Frame XUSBPS_CMD_ITHRESHOLD_2 - 2 Frames XUSBPS_CMD_ITHRESHOLD_4 - 4 Frames XUSBPS_CMD_ITHRESHOLD_8 - 8 Frames XUSBPS_CMD_ITHRESHOLD_16 - 16 Frames XUSBPS_CMD_ITHRESHOLD_32 - 32 Frames XUSBPS_CMD_ITHRESHOLD_64 - 64 Frames

Note
  C-style signature: void XUsbPs_SetIntrThreshold(XUsbPs *InstancePtr, u8 Threshold)

#define XUsbPs_SetSetupTripwire | ( |  | InstancePtr | ) |

Value:
XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, \
XUSBPS_CMD_SUTW_MASK)
XUSBPS_CMD_SUTW_MASK
#define XUSBPS_CMD_SUTW_MASK
Setup TripWire.
Definition: xusbps_hw.h:202
XUSBPS_CMD_OFFSET
#define XUSBPS_CMD_OFFSET
Configuration.
Definition: xusbps_hw.h:114
XUsbPs_SetBits
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
This macro sets the given bit mask in the register.
Definition: xusbps.h:982

This macro sets the Tripwire bit in the USB command register.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_SetTripwire(XUsbPs *InstancePtr)

Referenced by XUsbPs_EpGetSetupData().

#define XUsbPs_SetupTripwireIsSet | ( |  | InstancePtr | ) |

Value:
(XUsbPs_ReadReg((InstancePtr)->Config.BaseAddress, \
XUSBPS_CMD_OFFSET) & \
XUSBPS_CMD_SUTW_MASK ? TRUE : FALSE)
XUsbPs_ReadReg
#define XUsbPs_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xusbps_hw.h:498
XUSBPS_CMD_SUTW_MASK
#define XUSBPS_CMD_SUTW_MASK
Setup TripWire.
Definition: xusbps_hw.h:202
XUSBPS_CMD_OFFSET
#define XUSBPS_CMD_OFFSET
Configuration.
Definition: xusbps_hw.h:114

This macro checks if the Tripwire bit in the USB command register is set.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.

Returns
  - TRUE: The tripwire bit is still set.
  - FALSE: The tripwire bit has been cleared.

Note
  C-style signature: int XUsbPs_TripwireIsSet(XUsbPs *InstancePtr)

Referenced by XUsbPs_EpGetSetupData().

#define XUsbPs_Start | ( |  | InstancePtr | ) | XUsbPs_SetBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)

This macro starts the USB engine.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_Start(XUsbPs *InstancePtr)

#define XUsbPs_StartTimer0 | ( |  | InstancePtr,
|  |  | Interval
| ) |  |

Value:
{ \
XUsbPs_WriteReg((InstancePtr)->Config.BaseAddress, \
XUSBPS_TIMER0_LD_OFFSET, (Interval)); \
XUsbPs_SetBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
XUSBPS_TIMER_RUN_MASK | \
XUSBPS_TIMER_RESET_MASK | \
XUSBPS_TIMER_REPEAT_MASK); \
} \
XUsbPs_SetBits
#define XUsbPs_SetBits(InstancePtr, RegOffset, Bits)
This macro sets the given bit mask in the register.
Definition: xusbps.h:982
XUsbPs_WriteReg
#define XUsbPs_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xusbps_hw.h:517

This macro starts the USB Timer 0, with repeat option for period of one second.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.
  Interval | is the interval for Timer0 to generate an interrupt

Note
  C-style signature: void XUsbPs_StartTimer0(XUsbPs *InstancePtr, u32 Interval)

#define XUsbPs_Stop | ( |  | InstancePtr | ) | XUsbPs_ClrBits(InstancePtr, XUSBPS_CMD_OFFSET, XUSBPS_CMD_RS_MASK)

This macro stops the USB engine.

Parameters

  InstancePtr | is a pointer to the XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_Stop(XUsbPs *InstancePtr)

Referenced by XUsbPs_DeviceReset().

#define XUsbPs_StopTimer0 | ( |  | InstancePtr | ) |

Value:
XUsbPs_ClrBits(InstancePtr, XUSBPS_TIMER0_CTL_OFFSET, \
XUSBPS_TIMER_RUN_MASK)
XUsbPs_ClrBits
#define XUsbPs_ClrBits(InstancePtr, RegOffset, Bits)
This macro clears the given bits in the register.
Definition: xusbps.h:1004

This macro stops Timer 0.

Parameters

  InstancePtr | is a pointer to XUsbPs instance of the controller.

Note
  C-style signature: void XUsbPs_StopTimer0(XUsbPs *InstancePtr)

## Function Documentation

int XUsbPs_BusReset | ( | XUsbPs * | InstancePtr | ) |

DEVICE mode specific functions.