hdcp1x: xhdcp1x_port_dp.h File Reference

| hdcp1x Xilinx SDK Drivers API Documentation

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xhdcp1x_port_dp.h File Reference

## Macros
#define | XHDCP1X_PORT_DP_H
| < Prevent circular inclusions by using protection macros More...
#define | XHDCP1X_PORT_OFFSET_BKSV (0x00u)
| These constants specify the offsets for the various fields and/or attributes within the hdcp port. More...
#define | XHDCP1X_PORT_OFFSET_RO (0x05u)
| R0' Offset. More...
#define | XHDCP1X_PORT_OFFSET_AKSV (0x07u)
| Aksv Offset. More...
#define | XHDCP1X_PORT_OFFSET_AN (0x0Cu)
| An Offset. More...
#define | XHDCP1X_PORT_OFFSET_VH0 (0x14u)
| V'.H0 Offset. More...
#define | XHDCP1X_PORT_OFFSET_VH1 (0x18u)
| V'.H1 Offset. More...
#define | XHDCP1X_PORT_OFFSET_VH2 (0x1Cu)
| V'.H2 Offset. More...
#define | XHDCP1X_PORT_OFFSET_VH3 (0x20u)
| V'.H3 Offset. More...
#define | XHDCP1X_PORT_OFFSET_VH4 (0x24u)
| V'.H4 Offset. More...
#define | XHDCP1X_PORT_OFFSET_BCAPS (0x28u)
| Bcaps Offset. More...
#define | XHDCP1X_PORT_OFFSET_BSTATUS (0x29u)
| Bstatus Offset. More...
#define | XHDCP1X_PORT_OFFSET_BINFO (0x2Au)
| Binfo Offset. More...
#define | XHDCP1X_PORT_OFFSET_KSVFIFO (0x2Cu)
| KSV FIFO Offset. More...
#define | XHDCP1X_PORT_OFFSET_AINFO (0x3Bu)
| Ainfo Offset. More...
#define | XHDCP1X_PORT_OFFSET_DBG (0xC0u)
| Debug Space Offset. More...
#define | XHDCP1X_PORT_HDCP_RESET_KSV (0xD0u)
| KSV FIFO Read pointer reset Offset. More...
#define | XHDCP1X_PORT_SIZE_BKSV (0x05u)
| These constants specify the sizes for the various fields and/or attributes within the hdcp port. More...
#define | XHDCP1X_PORT_SIZE_RO (0x02u)
| R0' Size. More...
#define | XHDCP1X_PORT_SIZE_AKSV (0x05u)
| Aksv Size. More...
#define | XHDCP1X_PORT_SIZE_AN (0x08u)
| An Size. More...
#define | XHDCP1X_PORT_SIZE_VH0 (0x04u)
| V'.H0 Size. More...
#define | XHDCP1X_PORT_SIZE_VH1 (0x04u)
| V'.H1 Size. More...
#define | XHDCP1X_PORT_SIZE_VH2 (0x04u)
| V'.H2 Size. More...
#define | XHDCP1X_PORT_SIZE_VH3 (0x04u)
| V'.H3 Size. More...
#define | XHDCP1X_PORT_SIZE_VH4 (0x04u)
| V'.H4 Size. More...
#define | XHDCP1X_PORT_SIZE_BCAPS (0x01u)
| Bcaps Size. More...
#define | XHDCP1X_PORT_SIZE_BSTATUS (0x01u)
| Bstatus Size. More...
#define | XHDCP1X_PORT_SIZE_BINFO (0x02u)
| Binfo Size. More...
#define | XHDCP1X_PORT_SIZE_KSVFIFO (0x0Fu)
| KSV FIFO Size. More...
#define | XHDCP1X_PORT_SIZE_AINFO (0x01u)
| Ainfo Offset. More...
#define | XHDCP1X_PORT_SIZE_DBG (0x40u)
| Debug Space Size. More...
#define | XHDCP1X_PORT_SIZE_HDCP_RESET_KSV (0x40u)
| KSV FIFO pointer reset Size. More...
#define | XHDCP1X_PORT_BIT_BSTATUS_READY (1u << 0)
| These constants specify the bit definitions within the various fields and/or attributes within the hdcp port. More...
#define | XHDCP1X_PORT_BIT_BSTATUS_RO_AVAILABLE (1u << 1)
| BStatus Ro available Mask. More...
#define | XHDCP1X_PORT_BIT_BSTATUS_LINK_FAILURE (1u << 2)
| BStatus Link Failure Mask. More...
#define | XHDCP1X_PORT_BIT_BSTATUS_REAUTH_REQUEST (1u << 3)
| BStatus Reauth Request Mask. More...
#define | XHDCP1X_PORT_BIT_BCAPS_HDCP_CAPABLE (1u << 0)
| BCaps HDCP Capable Mask. More...
#define | XHDCP1X_PORT_BIT_BCAPS_REPEATER (1u << 1)
| BCaps HDCP Repeater Mask. More...
#define | XHDCP1X_PORT_BIT_AINFO_REAUTH_ENABLE_IRQ (1u << 0)
| Ainfo Reauth Enable Mask. More...
#define | XHDCP1X_PORT_HDCP_RESET_KSV_RST (1u << 0)
| KSV FIFO pointer Reset Mask. More...
#define | XHDCP1X_PORT_BINFO_BIT_DEV_CNT_ERR (1u << 7)
| BInfo Device Count Error Mask. More...
#define | XHDCP1X_PORT_BINFO_BIT_DEV_CNT_NO_ERR (0u << 7)
| BInfo Device Count for No Error Mask. More...
#define | XHDCP1X_PORT_BINFO_DEV_CNT_MASK (0x7F)
| BInfo Device Count Error Mask. More...
#define | XHDCP1X_PORT_BINFO_BIT_DEPTH_ERR (1u << 11)
| BInfo Depth Error Mask. More...
#define | XHDCP1X_PORT_BINFO_BIT_DEPTH_NO_ERR (0u << 11)
| BInfo Depth Error for No Error Mask. More...
#define | XHDCP1X_PORT_BINFO_DEV_CNT_ERR_SHIFT (7)
| BStatus Device Count Error Shift Mask. More...
#define | XHDCP1X_PORT_BINFO_DEPTH_ERR_SHIFT (11)
| BStatus Depth Error Shift Mask. More...
#define | XHDCP1X_PORT_BINFO_DEPTH_SHIFT (8)
| BInfo Device Count Error Mask. More...
#define | XHDCP1X_PORT_DPCD_BASE (0x68000u)
| This constant defines the base address of the hdcp port within the DPCD address space. More...