qspipsu: Qspipsu_v1_10

| qspipsu Xilinx SDK Drivers API Documentation

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Data Structures | Macros | Typedefs | Functions | Variables
Qspipsu_v1_10

## Data Structures
struct | XQspiPsu_Msg
| This typedef contains configuration information for a flash message. More...
struct | XQspiPsu_Config
| This typedef contains configuration information for the device. More...
struct | XQspiPsu
| The XQspiPsu driver instance data. More...

## Macros
#define | BYTES256_PER_PAGE 256U
| Definitions for Intel, STM, Winbond and Spansion Serial Flash Device geometry. More...
#define | BYTES512_PER_PAGE 512U
| 512 Bytes per Page More...
#define | BYTES1024_PER_PAGE 1024U
| 1024 Bytes per Page More...
#define | PAGES16_PER_SECTOR 16U
| 16 Pages per Sector More...
#define | PAGES128_PER_SECTOR 128U
| 128 Pages per Sector More...
#define | PAGES256_PER_SECTOR 256U
| 256 Pages per Sector More...
#define | PAGES512_PER_SECTOR 512U
| 512 Pages per Sector More...
#define | PAGES1024_PER_SECTOR 1024U
| 1024 Pages per Sector More...
#define | NUM_OF_SECTORS2 2U
| 2 Sectors More...
#define | NUM_OF_SECTORS4 4U
| 4 Sectors More...
#define | NUM_OF_SECTORS8 8U
| 8 Sector More...
#define | NUM_OF_SECTORS16 16U
| 16 Sectors More...
#define | NUM_OF_SECTORS32 32U
| 32 Sectors More...
#define | NUM_OF_SECTORS64 64U
| 64 Sectors More...
#define | NUM_OF_SECTORS128 128U
| 128 Sectors More...
#define | NUM_OF_SECTORS256 256U
| 256 Sectors More...
#define | NUM_OF_SECTORS512 512U
| 512 Sectors More...
#define | NUM_OF_SECTORS1024 1024U
| 1024 Sectors More...
#define | NUM_OF_SECTORS2048 2048U
| 2048 Sectors More...
#define | NUM_OF_SECTORS4096 4096U
| 4096 Sectors More...
#define | NUM_OF_SECTORS8192 8192U
| 8192 Sectors More...
#define | SECTOR_SIZE_64K 0X10000U
| 64K Sector More...
#define | SECTOR_SIZE_128K 0X20000U
| 128K Sector More...
#define | SECTOR_SIZE_256K 0X40000U
| 256K Sector More...
#define | SECTOR_SIZE_512K 0X80000U
| 512K Sector More...
#define | XQSPIPS_BASEADDR 0XFF0F0000U
| QSPI Base Address. More...
#define | XQSPIPSU_BASEADDR 0xFF0F0100U
| GQSPI Base Address. More...
#define | XQSPIPS_EN_REG ( ( XQSPIPS_BASEADDR ) + 0X00000014U )
| Register: XQSPIPS_EN_REG. More...
#define | XQSPIPSU_CFG_OFFSET 0X00000000U
| Register: XQSPIPSU_CFG. More...
#define | XQSPIPSU_LQSPI_CR_OFFSET 0X000000A0U
| Register: XQSPIPSU_CFG. More...
#define | XQSPIPSU_LQSPI_CR_LINEAR_MASK 0x80000000U
| LQSPI mode enable. More...
#define | XQSPIPSU_LQSPI_CR_TWO_MEM_MASK 0x40000000U
| Both memories or one. More...
#define | XQSPIPSU_LQSPI_CR_SEP_BUS_MASK 0x20000000U
| Separate memory bus. More...
#define | XQSPIPSU_LQSPI_CR_U_PAGE_MASK 0x10000000U
| Upper memory page. More...
#define | XQSPIPSU_LQSPI_CR_ADDR_32BIT_MASK 0x01000000U
| Upper memory page. More...
#define | XQSPIPSU_LQSPI_CR_MODE_EN_MASK 0x02000000U
| Enable mode bits. More...
#define | XQSPIPSU_LQSPI_CR_MODE_ON_MASK 0x01000000U
| Mode on. More...
#define | XQSPIPSU_LQSPI_CR_MODE_BITS_MASK 0x00FF0000U
| Mode value for dual I/O or quad I/O. More...
#define | XQSPIPS_LQSPI_CR_INST_MASK 0x000000FFU
| Read instr code. More...
#define | XQSPIPS_LQSPI_CR_RST_STATE 0x80000003U
| Default LQSPI CR value. More...
#define | XQSPIPS_LQSPI_CR_4_BYTE_STATE 0x88000013U
| Default 4 Byte LQSPI CR value. More...
#define | XQSPIPS_LQSPI_CFG_RST_STATE 0x800238C1U
| Default LQSPI CFG value. More...
#define | XQSPIPSU_ISR_OFFSET 0X00000004U
| Register: XQSPIPSU_ISR. More...
#define | XQSPIPSU_IER_OFFSET 0X00000008U
| Register: XQSPIPSU_IER. More...
#define | XQSPIPSU_IDR_OFFSET 0X0000000CU
| Register: XQSPIPSU_IDR. More...
#define | XQSPIPSU_IMR_OFFSET 0X00000010U
| Register: XQSPIPSU_IMR. More...
#define | XQSPIPSU_EN_OFFSET 0X00000014U
| Register: XQSPIPSU_EN_REG. More...
#define | XQSPIPSU_TXD_OFFSET 0X0000001CU
| Register: XQSPIPSU_TXD. More...
#define | XQSPIPSU_RXD_OFFSET 0X00000020U
| Register: XQSPIPSU_RXD. More...
#define | XQSPIPSU_TX_THRESHOLD_OFFSET 0X00000028U
| Register: XQSPIPSU_TX_THRESHOLD. More...
#define | XQSPIPSU_RX_THRESHOLD_OFFSET 0X0000002CU
| Register: XQSPIPSU_RX_THRESHOLD. More...
#define | XQSPIPSU_GPIO_OFFSET 0X00000030U
| Register: XQSPIPSU_GPIO. More...
#define | XQSPIPSU_LPBK_DLY_ADJ_OFFSET 0X00000038U
| Register: XQSPIPSU_LPBK_DLY_ADJ. More...
#define | XQSPIPSU_GEN_FIFO_OFFSET 0X00000040U
| Register: XQSPIPSU_GEN_FIFO. More...
#define | XQSPIPSU_SEL_OFFSET 0X00000044U
| Register: XQSPIPSU_SEL. More...
#define | XQSPIPSU_FIFO_CTRL_OFFSET 0X0000004CU
| Register: XQSPIPSU_FIFO_CTRL. More...
#define | XQSPIPSU_GF_THRESHOLD_OFFSET 0X00000050U
| Register: XQSPIPSU_GF_THRESHOLD. More...
#define | XQSPIPSU_POLL_CFG_OFFSET 0X00000054U
| Register: XQSPIPSU_POLL_CFG. More...
#define | XQSPIPSU_P_TO_OFFSET 0X00000058U
| Register: XQSPIPSU_P_TIMEOUT. More...
#define | XQSPIPSU_XFER_STS_OFFSET 0X0000005CU
| Register: XQSPIPSU_XFER_STS. More...
#define | XQSPIPSU_GF_SNAPSHOT_OFFSET 0X00000060U
| Register: XQSPIPSU_GF_SNAPSHOT. More...
#define | XQSPIPSU_RX_COPY_OFFSET 0X00000064U
| Register: XQSPIPSU_RX_COPY. More...
#define | XQSPIPSU_MOD_ID_OFFSET 0X000000FCU
| Register: XQSPIPSU_MOD_ID. More...
#define | XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET 0X00000700U
| Register: XQSPIPSU_QSPIDMA_DST_ADDR. More...
#define | XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET 0X00000704U
| Register: XQSPIPSU_QSPIDMA_DST_SIZE. More...
#define | XQSPIPSU_QSPIDMA_DST_STS_OFFSET 0X00000708U
| Register: XQSPIPSU_QSPIDMA_DST_STS. More...
#define | XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET 0X0000070CU
| Register: XQSPIPSU_QSPIDMA_DST_CTRL. More...
#define | XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET 0X00000714U
| Register: XQSPIPSU_QSPIDMA_DST_I_STS. More...
#define | XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET 0X00000718U
| Register: XQSPIPSU_QSPIDMA_DST_I_EN. More...
#define | XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET 0X0000071CU
| Register: XQSPIPSU_QSPIDMA_DST_I_DIS. More...
#define | XQSPIPSU_QSPIDMA_DST_IMR_OFFSET 0X00000720U
| Register: XQSPIPSU_QSPIDMA_DST_IMR. More...
#define | XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET 0X00000724U
| Register: XQSPIPSU_QSPIDMA_DST_CTRL2. More...
#define | XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET 0X00000728U
| Register: XQSPIPSU_QSPIDMA_DST_ADDR_MSB. More...
#define | XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET 0X00000EFCU
| Register: XQSPIPSU_QSPIDMA_FUTURE_ECO. More...
#define | XQspiPsu_ReadReg(BaseAddress, RegOffset) XQspiPsu_In32((BaseAddress) + (RegOffset))
| Read a register. More...
#define | XQspiPsu_WriteReg(BaseAddress, RegOffset, RegisterValue) XQspiPsu_Out32((BaseAddress) + (RegOffset), (RegisterValue))
| Write to a register. More...

## Typedefs
typedef void(* | XQspiPsu_StatusHandler )(const void *CallBackRef, u32 StatusEvent, u32 ByteCount)
| The handler data type allows the user to define a callback function to handle the asynchronous processing for the QSPIPSU device. More...

## Functions
s32 | XQspiPsu_CfgInitialize (XQspiPsu *InstancePtr, const XQspiPsu_Config *ConfigPtr, u32 EffectiveAddr)
| Initializes a specific XQspiPsu instance as such the driver is ready to use. More...
void | XQspiPsu_Idle (const XQspiPsu *InstancePtr)
| Stops the transfer of data to internal DST FIFO from stream interface and also stops the issuing of new write commands to memory. More...
void | XQspiPsu_Reset (XQspiPsu *InstancePtr)
| Resets the QSPIPSU device. More...
void | XQspiPsu_Abort (XQspiPsu *InstancePtr)
| Aborts a transfer in progress by. More...
s32 | XQspiPsu_PolledTransfer (XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg, u32 NumMsg)
| This function performs a transfer on the bus in polled mode. More...
s32 | XQspiPsu_InterruptTransfer (XQspiPsu *InstancePtr, XQspiPsu_Msg *Msg, u32 NumMsg)
| This function initiates a transfer on the bus and enables interrupts. More...
s32 | XQspiPsu_InterruptHandler (XQspiPsu *InstancePtr)
| Handles interrupt based transfers by acting on GENFIFO and DMA interurpts. More...
void | XQspiPsu_SetStatusHandler (XQspiPsu *InstancePtr, void *CallBackRef, XQspiPsu_StatusHandler FuncPointer)
| Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software. More...
void | XQspiPsu_WriteProtectToggle (const XQspiPsu *InstancePtr, u32 Toggle)
| This API enables/ disables Write Protect pin on the flash parts. More...
XQspiPsu_Config * | XQspiPsu_LookupConfig (u16 DeviceId)
| Looks up the device configuration based on the unique device ID. More...
s32 | XQspiPsu_SetClkPrescaler (const XQspiPsu *InstancePtr, u8 Prescaler)
| Configures the clock according to the prescaler passed. More...
void | XQspiPsu_SelectFlash (XQspiPsu *InstancePtr, u8 FlashCS, u8 FlashBus)
| This function should be used to tell the QSPIPSU driver the HW flash configuration being used. More...
s32 | XQspiPsu_SetOptions (XQspiPsu *InstancePtr, u32 Options)
| This function sets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus. More...
s32 | XQspiPsu_ClearOptions (XQspiPsu *InstancePtr, u32 Options)
| This function resets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus. More...
u32 | XQspiPsu_GetOptions (const XQspiPsu *InstancePtr)
| This function gets the options for the QSPIPSU device. More...
s32 | XQspiPsu_SetReadMode (XQspiPsu *InstancePtr, u32 Mode)
| This function sets the Read mode for the QSPIPSU device driver.The device must be idle rather than busy transferring data before setting Read mode options. More...
void | XQspiPsu_SetWP (const XQspiPsu *InstancePtr, u8 Value)
| This function sets the Write Protect and Hold options for the QSPIPSU device driver.The device must be idle rather than busy transferring data before setting Write Protect and Hold options. More...

## Variables
XQspiPsu_Config | XQspiPsu_ConfigTable [XPAR_XQSPIPSU_NUM_INSTANCES]
| This table contains configuration information for each QSPIPSU device in the system. More...
XQspiPsu_Config | XQspiPsu_ConfigTable [XPAR_XQSPIPSU_NUM_INSTANCES]
| This table contains configuration information for each QSPIPSU device in the system. More...

## Macro Definition Documentation

#define BYTES1024_PER_PAGE 1024U

1024 Bytes per Page

#define BYTES256_PER_PAGE 256U

Definitions for Intel, STM, Winbond and Spansion Serial Flash Device geometry.

256 Bytes per Page

#define BYTES512_PER_PAGE 512U

512 Bytes per Page

#define NUM_OF_SECTORS1024 1024U

1024 Sectors

#define NUM_OF_SECTORS128 128U

128 Sectors

#define NUM_OF_SECTORS16 16U

16 Sectors

#define NUM_OF_SECTORS2 2U

2 Sectors

#define NUM_OF_SECTORS2048 2048U

2048 Sectors

#define NUM_OF_SECTORS256 256U

256 Sectors

#define NUM_OF_SECTORS32 32U

32 Sectors

#define NUM_OF_SECTORS4 4U

4 Sectors

#define NUM_OF_SECTORS4096 4096U

4096 Sectors

#define NUM_OF_SECTORS512 512U

512 Sectors

#define NUM_OF_SECTORS64 64U

64 Sectors

#define NUM_OF_SECTORS8 8U

8 Sector

#define NUM_OF_SECTORS8192 8192U

8192 Sectors

#define PAGES1024_PER_SECTOR 1024U

1024 Pages per Sector

#define PAGES128_PER_SECTOR 128U

128 Pages per Sector

#define PAGES16_PER_SECTOR 16U

16 Pages per Sector

#define PAGES256_PER_SECTOR 256U

256 Pages per Sector

#define PAGES512_PER_SECTOR 512U

512 Pages per Sector

#define SECTOR_SIZE_128K 0X20000U

128K Sector

#define SECTOR_SIZE_256K 0X40000U

256K Sector

#define SECTOR_SIZE_512K 0X80000U

512K Sector

#define SECTOR_SIZE_64K 0X10000U

64K Sector

#define XQSPIPS_BASEADDR 0XFF0F0000U

QSPI Base Address.

Referenced by XQspiPsu_SetOptions().

#define XQSPIPS_EN_REG ( ( XQSPIPS_BASEADDR ) + 0X00000014U )

Register: XQSPIPS_EN_REG.

#define XQSPIPS_LQSPI_CFG_RST_STATE 0x800238C1U

Default LQSPI CFG value.

Referenced by XQspiPsu_SetOptions().

#define XQSPIPS_LQSPI_CR_4_BYTE_STATE 0x88000013U

Default 4 Byte LQSPI CR value.

Referenced by XQspiPsu_SetOptions().

#define XQSPIPS_LQSPI_CR_INST_MASK 0x000000FFU

Read instr code.

#define XQSPIPS_LQSPI_CR_RST_STATE 0x80000003U

Default LQSPI CR value.

Referenced by XQspiPsu_SetOptions().

#define XQSPIPSU_BASEADDR 0xFF0F0100U

GQSPI Base Address.

#define XQSPIPSU_CFG_OFFSET 0X00000000U

Register: XQSPIPSU_CFG.

Referenced by XQspiPsu_Abort(), XQspiPsu_ClearOptions(), XQspiPsu_GetOptions(), XQspiPsu_InterruptHandler(), XQspiPsu_InterruptTransfer(), XQspiPsu_PolledTransfer(), XQspiPsu_Reset(), XQspiPsu_SetClkPrescaler(), XQspiPsu_SetOptions(), XQspiPsu_SetReadMode(), and XQspiPsu_SetWP().

#define XQSPIPSU_EN_OFFSET 0X00000014U

Register: XQSPIPSU_EN_REG.

Referenced by XQspiPsu_Idle(), and XQspiPsu_SetOptions().

#define XQSPIPSU_FIFO_CTRL_OFFSET 0X0000004CU

Register: XQSPIPSU_FIFO_CTRL.

Referenced by XQspiPsu_Abort().

#define XQSPIPSU_GEN_FIFO_OFFSET 0X00000040U

Register: XQSPIPSU_GEN_FIFO.

#define XQSPIPSU_GF_SNAPSHOT_OFFSET 0X00000060U

Register: XQSPIPSU_GF_SNAPSHOT.

#define XQSPIPSU_GF_THRESHOLD_OFFSET 0X00000050U

Register: XQSPIPSU_GF_THRESHOLD.

Referenced by XQspiPsu_Reset().

#define XQSPIPSU_GPIO_OFFSET 0X00000030U

Register: XQSPIPSU_GPIO.

Referenced by XQspiPsu_WriteProtectToggle().

#define XQSPIPSU_IDR_OFFSET 0X0000000CU

Register: XQSPIPSU_IDR.

Referenced by XQspiPsu_Abort(), and XQspiPsu_InterruptHandler().

#define XQSPIPSU_IER_OFFSET 0X00000008U

Register: XQSPIPSU_IER.

Referenced by XQspiPsu_InterruptTransfer().

#define XQSPIPSU_IMR_OFFSET 0X00000010U

Register: XQSPIPSU_IMR.

#define XQSPIPSU_ISR_OFFSET 0X00000004U

Register: XQSPIPSU_ISR.

Referenced by XQspiPsu_Abort(), XQspiPsu_InterruptHandler(), and XQspiPsu_PolledTransfer().

#define XQSPIPSU_LPBK_DLY_ADJ_OFFSET 0X00000038U

Register: XQSPIPSU_LPBK_DLY_ADJ.

Referenced by XQspiPsu_Reset().

#define XQSPIPSU_LQSPI_CR_ADDR_32BIT_MASK 0x01000000U

Upper memory page.

#define XQSPIPSU_LQSPI_CR_LINEAR_MASK 0x80000000U

LQSPI mode enable.

Referenced by XQspiPsu_LqspiRead(), and XQspiPsu_SetOptions().

#define XQSPIPSU_LQSPI_CR_MODE_BITS_MASK 0x00FF0000U

Mode value for dual I/O or quad I/O.

#define XQSPIPSU_LQSPI_CR_MODE_EN_MASK 0x02000000U

Enable mode bits.

#define XQSPIPSU_LQSPI_CR_MODE_ON_MASK 0x01000000U

Mode on.

#define XQSPIPSU_LQSPI_CR_OFFSET 0X000000A0U

Register: XQSPIPSU_CFG.

Referenced by XQspiPsu_SetOptions().

#define XQSPIPSU_LQSPI_CR_SEP_BUS_MASK 0x20000000U

Separate memory bus.

#define XQSPIPSU_LQSPI_CR_TWO_MEM_MASK 0x40000000U

Both memories or one.

#define XQSPIPSU_LQSPI_CR_U_PAGE_MASK 0x10000000U

Upper memory page.

#define XQSPIPSU_MOD_ID_OFFSET 0X000000FCU

Register: XQSPIPSU_MOD_ID.

#define XQSPIPSU_P_TO_OFFSET 0X00000058U

Register: XQSPIPSU_P_TIMEOUT.

#define XQSPIPSU_POLL_CFG_OFFSET 0X00000054U

Register: XQSPIPSU_POLL_CFG.

#define XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET 0X00000728U

Register: XQSPIPSU_QSPIDMA_DST_ADDR_MSB.

#define XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET 0X00000700U

Register: XQSPIPSU_QSPIDMA_DST_ADDR.

#define XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET 0X00000724U

Register: XQSPIPSU_QSPIDMA_DST_CTRL2.

#define XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET 0X0000070CU

Register: XQSPIPSU_QSPIDMA_DST_CTRL.

Referenced by XQspiPsu_Idle(), and XQspiPsu_Reset().

#define XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET 0X0000071CU

Register: XQSPIPSU_QSPIDMA_DST_I_DIS.

Referenced by XQspiPsu_Abort(), and XQspiPsu_InterruptHandler().

#define XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET 0X00000718U

Register: XQSPIPSU_QSPIDMA_DST_I_EN.

Referenced by XQspiPsu_InterruptTransfer().

#define XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET 0X00000714U

Register: XQSPIPSU_QSPIDMA_DST_I_STS.

Referenced by XQspiPsu_Abort(), XQspiPsu_InterruptHandler(), and XQspiPsu_PolledTransfer().

#define XQSPIPSU_QSPIDMA_DST_IMR_OFFSET 0X00000720U

Register: XQSPIPSU_QSPIDMA_DST_IMR.

#define XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET 0X00000704U

Register: XQSPIPSU_QSPIDMA_DST_SIZE.

#define XQSPIPSU_QSPIDMA_DST_STS_OFFSET 0X00000708U

Register: XQSPIPSU_QSPIDMA_DST_STS.

Referenced by XQspiPsu_Abort().

#define XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET 0X00000EFCU

Register: XQSPIPSU_QSPIDMA_FUTURE_ECO.

#define XQspiPsu_ReadReg | ( |  | BaseAddress,
|  |  | RegOffset
| ) |  | XQspiPsu_In32((BaseAddress) + (RegOffset))

Read a register.

Parameters

  BaseAddress | contains the base address of the device.
  RegOffset | contains the offset from the 1st register of the device to the target register.

Returns
  The value read from the register.

Note
  C-Style signature: u32 XQspiPsu_ReadReg(u32 BaseAddress. s32 RegOffset)

Referenced by XQspiPsu_Abort(), XQspiPsu_ClearOptions(), XQspiPsu_GetOptions(), XQspiPsu_Idle(), XQspiPsu_InterruptHandler(), XQspiPsu_InterruptTransfer(), XQspiPsu_PolledTransfer(), XQspiPsu_Reset(), XQspiPsu_SetClkPrescaler(), XQspiPsu_SetOptions(), XQspiPsu_SetReadMode(), and XQspiPsu_SetWP().

#define XQSPIPSU_RX_COPY_OFFSET 0X00000064U

Register: XQSPIPSU_RX_COPY.

#define XQSPIPSU_RX_THRESHOLD_OFFSET 0X0000002CU

Register: XQSPIPSU_RX_THRESHOLD.

Referenced by XQspiPsu_InterruptHandler(), XQspiPsu_PolledTransfer(), and XQspiPsu_Reset().

#define XQSPIPSU_RXD_OFFSET 0X00000020U

Register: XQSPIPSU_RXD.

Referenced by XQspiPsu_InterruptHandler().

#define XQSPIPSU_SEL_OFFSET 0X00000044U

Register: XQSPIPSU_SEL.

#define XQSPIPSU_TX_THRESHOLD_OFFSET 0X00000028U

Register: XQSPIPSU_TX_THRESHOLD.

Referenced by XQspiPsu_Reset().

#define XQSPIPSU_TXD_OFFSET 0X0000001CU

Register: XQSPIPSU_TXD.

#define XQspiPsu_WriteReg | ( |  | BaseAddress,
|  |  | RegOffset,
|  |  | RegisterValue
| ) |  | XQspiPsu_Out32((BaseAddress) + (RegOffset), (RegisterValue))

Write to a register.

Parameters

  BaseAddress | contains the base address of the device.
  RegOffset | contains the offset from the 1st register of the device to target register.
  RegisterValue | is the value to be written to the register.

Returns
  None.

Note
  C-Style signature: void XQspiPsu_WriteReg(u32 BaseAddress, s32 RegOffset, u32 RegisterValue)

Referenced by XQspiPsu_Abort(), XQspiPsu_ClearOptions(), XQspiPsu_Idle(), XQspiPsu_InterruptHandler(), XQspiPsu_InterruptTransfer(), XQspiPsu_PolledTransfer(), XQspiPsu_Reset(), XQspiPsu_SetClkPrescaler(), XQspiPsu_SetOptions(), XQspiPsu_SetReadMode(), XQspiPsu_SetWP(), and XQspiPsu_WriteProtectToggle().

#define XQSPIPSU_XFER_STS_OFFSET 0X0000005CU

Register: XQSPIPSU_XFER_STS.

## Typedef Documentation

typedef void(* XQspiPsu_StatusHandler)(const void *CallBackRef, u32 StatusEvent, u32 ByteCount)

The handler data type allows the user to define a callback function to handle the asynchronous processing for the QSPIPSU device.

The application using this driver is expected to define a handler of this type to support interrupt driven mode. The handler executes in an interrupt context, so only minimal processing should be performed.

Parameters

  CallBackRef | is the callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is not important to the driver, so it is a void pointer.
  StatusEvent | holds one or more status events that have occurred. See the XQspiPsu_SetStatusHandler() for details on the status events that can be passed in the callback.
  ByteCount | indicates how many bytes of data were successfully transferred. This may be less than the number of bytes requested if the status event indicates an error.

## Function Documentation

void XQspiPsu_Abort | ( | XQspiPsu * | InstancePtr | ) |

Aborts a transfer in progress by.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.

Returns
  None.

Note

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::GenFifoEntries, XQspiPsu::IsBusy, XQspiPsu::ReadMode, XQspiPsu::RxBytes, XQspiPsu::TxBytes, XQSPIPSU_CFG_OFFSET, XQSPIPSU_FIFO_CTRL_OFFSET, XQSPIPSU_IDR_OFFSET, XQSPIPSU_ISR_OFFSET, XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET, XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET, XQSPIPSU_QSPIDMA_DST_STS_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

Referenced by XQspiPsu_Reset().

s32 XQspiPsu_CfgInitialize | ( | XQspiPsu * | InstancePtr,
|  | const XQspiPsu_Config * | ConfigPtr,
|  | u32 | EffectiveAddr
| ) |  |

Initializes a specific XQspiPsu instance as such the driver is ready to use.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  ConfigPtr | is a reference to a structure containing information about a specific QSPIPSU device. This function initializes an InstancePtr object for a specific device specified by the contents of Config.
  EffectiveAddr | is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use ConfigPtr->Config.BaseAddress for this device.

Returns
  - XST_SUCCESS if successful.
  - XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu_Config::BusWidth, XQspiPsu::Config, XQspiPsu_Config::ConnectionMode, XQspiPsu::GenFifoBufferPtr, XQspiPsu::GenFifoEntries, XQspiPsu_Config::InputClockHz, XQspiPsu::IsBusy, XQspiPsu_Config::IsCacheCoherent, XQspiPsu::IsReady, XQspiPsu::ReadMode, XQspiPsu::RecvBufferPtr, XQspiPsu::RxBytes, XQspiPsu::SendBufferPtr, XQspiPsu::TxBytes, and XQspiPsu_Reset().

Referenced by QspiPsuInterruptFlashExample(), QspiPsuPolledFlashExample(), and QspiPsuWriteProtectFlashExample().

s32 XQspiPsu_ClearOptions | ( | XQspiPsu * | InstancePtr,
|  | u32 | Options
| ) |  |

This function resets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus.

The device must be idle rather than busy transferring data before setting these device options.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  Options | contains the specified options to be set. This is a bit mask where a 1 indicates the option should be turned OFF and a 0 indicates no action. One or more bit values may be contained in the mask. See the bit definitions named XQSPIPSU_*_OPTIONS in the file xqspipsu.h.

Returns
  - XST_SUCCESS if options are successfully set.
  - XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.

Note
  This function is not thread-safe.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsBusy, XQspiPsu::IsReady, XQSPIPSU_CFG_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

u32 XQspiPsu_GetOptions | ( | const XQspiPsu * | InstancePtr | ) |

This function gets the options for the QSPIPSU device.

The options control how the device behaves relative to the QSPIPSU bus.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.

Returns

Options contains the specified options currently set. This is a bit value where a 1 means the option is on, and a 0 means the option is off. See the bit definitions named XQSPIPSU_*_OPTIONS in file xqspipsu.h.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsReady, XQSPIPSU_CFG_OFFSET, and XQspiPsu_ReadReg.

void XQspiPsu_Idle | ( | const XQspiPsu * | InstancePtr | ) |

Stops the transfer of data to internal DST FIFO from stream interface and also stops the issuing of new write commands to memory.

By calling this API, any ongoing Dma transfers will be paused and DMA will not issue AXI write commands to memory

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.

Returns
  None.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQSPIPSU_EN_OFFSET, XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

s32 XQspiPsu_InterruptHandler | ( | XQspiPsu * | InstancePtr | ) |

Handles interrupt based transfers by acting on GENFIFO and DMA interurpts.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.

Returns
  - XST_SUCCESS if successful.
  - XST_FAILURE if transfer fails.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsBusy, XQspiPsu::ReadMode, XQspiPsu::RxBytes, XQspiPsu::StatusRef, XQspiPsu::TxBytes, XQSPIPSU_CFG_OFFSET, XQSPIPSU_IDR_OFFSET, XQSPIPSU_ISR_OFFSET, XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET, XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET, XQspiPsu_ReadReg, XQSPIPSU_RX_THRESHOLD_OFFSET, XQSPIPSU_RXD_OFFSET, XQspiPsu_SetReadMode(), and XQspiPsu_WriteReg.

s32 XQspiPsu_InterruptTransfer | ( | XQspiPsu * | InstancePtr,
|  | XQspiPsu_Msg * | Msg,
|  | u32 | NumMsg
| ) |  |

This function initiates a transfer on the bus and enables interrupts.

The transfer is completed by the interrupt handler. The messages passed are all transferred on the bus between one CS assert and de-assert.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  Msg | is a pointer to the structure containing transfer data.
  NumMsg | is the number of messages to be transferred.

Returns
  - XST_SUCCESS if successful.
  - XST_FAILURE if transfer fails.
  - XST_DEVICE_BUSY if a transfer is already in progress.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsBusy, XQspiPsu::IsReady, XQspiPsu::ReadMode, XQSPIPSU_CFG_OFFSET, XQSPIPSU_IER_OFFSET, XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

Referenced by BulkErase(), DieErase(), FlashEnableQuadMode(), FlashEnterExit4BAddMode(), FlashErase(), FlashRead(), FlashReadID(), FlashWrite(), and MultiDieRead().

XQspiPsu_Config * XQspiPsu_LookupConfig | ( | u16 | DeviceId | ) |

Looks up the device configuration based on the unique device ID.

A table contains the configuration info for each device in the system.

Parameters

  DeviceId | contains the ID of the device to look up the configuration for.

Returns

A pointer to the configuration found or NULL if the specified device ID was not found. See xqspipsu.h for the definition of XQspiPsu_Config.

Note
  None.

Referenced by QspiPsuInterruptFlashExample(), QspiPsuPolledFlashExample(), and QspiPsuWriteProtectFlashExample().

s32 XQspiPsu_PolledTransfer | ( | XQspiPsu * | InstancePtr,
|  | XQspiPsu_Msg * | Msg,
|  | u32 | NumMsg
| ) |  |

This function performs a transfer on the bus in polled mode.

The messages passed are all transferred on the bus between one CS assert and de-assert.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  Msg | is a pointer to the structure containing transfer data.
  NumMsg | is the number of messages to be transferred.

Returns
  - XST_SUCCESS if successful.
  - XST_FAILURE if transfer fails.
  - XST_DEVICE_BUSY if a transfer is already in progress.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsBusy, XQspiPsu::IsReady, XQspiPsu::ReadMode, XQspiPsu::RxBytes, XQspiPsu::TxBytes, XQSPIPSU_CFG_OFFSET, XQSPIPSU_ISR_OFFSET, XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET, XQspiPsu_ReadReg, XQSPIPSU_RX_THRESHOLD_OFFSET, and XQspiPsu_WriteReg.

Referenced by FlashRegisterRead(), and FlashRegisterWrite().

void XQspiPsu_Reset | ( | XQspiPsu * | InstancePtr | ) |

Resets the QSPIPSU device.

Reset must only be called after the driver has been initialized. Any data transfer that is in progress is aborted.

The upper layer software is responsible for re-configuring (if necessary) and restarting the QSPIPSU device after the reset.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.

Returns
  None.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu_Abort(), XQSPIPSU_CFG_OFFSET, XQSPIPSU_GF_THRESHOLD_OFFSET, XQSPIPSU_LPBK_DLY_ADJ_OFFSET, XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET, XQspiPsu_ReadReg, XQSPIPSU_RX_THRESHOLD_OFFSET, XQSPIPSU_TX_THRESHOLD_OFFSET, and XQspiPsu_WriteReg.

Referenced by XQspiPsu_CfgInitialize().

void XQspiPsu_SelectFlash | ( | XQspiPsu * | InstancePtr,
|  | u8 | FlashCS,
|  | u8 | FlashBus
| ) |  |

This function should be used to tell the QSPIPSU driver the HW flash configuration being used.

This API should be called at least once in the application. If desired, it can be called multiple times when switching between communicating to different flahs devices/using different configs.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  FlashCS | - Flash Chip Select.
  FlashBus | - Flash Bus (Upper, Lower or Both).

Returns
  - XST_SUCCESS if successful.
  - XST_DEVICE_IS_STARTED if the device is already started. It must be stopped to re-initialize.

Note
  If this function is not called at least once in the application, the driver assumes there is a single flash connected to the lower bus and CS line.

Referenced by FlashErase(), GetRealAddr(), QspiPsuConfigurePoll(), QspiPsuInterruptFlashExample(), QspiPsuPolledFlashExample(), and QspiPsuWriteProtectFlashExample().

s32 XQspiPsu_SetClkPrescaler | ( | const XQspiPsu * | InstancePtr,
|  | u8 | Prescaler
| ) |  |

Configures the clock according to the prescaler passed.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  Prescaler | - clock prescaler to be set.

Returns
  - XST_SUCCESS if successful.
  - XST_DEVICE_IS_STARTED if the device is already started.
  - XST_DEVICE_BUSY if the device is currently transferring data. It must be stopped to re-initialize.

Note
  None.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsBusy, XQspiPsu::IsReady, XQSPIPSU_CFG_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

Referenced by QspiPsuInterruptFlashExample(), QspiPsuPolledFlashExample(), and QspiPsuWriteProtectFlashExample().

s32 XQspiPsu_SetOptions | ( | XQspiPsu * | InstancePtr,
|  | u32 | Options
| ) |  |

This function sets the options for the QSPIPSU device driver.The options control how the device behaves relative to the QSPIPSU bus.

The device must be idle rather than busy transferring data before setting these device options.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  Options | contains the specified options to be set. This is a bit mask where a 1 indicates the option should be turned ON and a 0 indicates no action. One or more bit values may be contained in the mask. See the bit definitions named XQSPIPSU_*_OPTIONS in the file xqspipsu.h.

Returns
  - XST_SUCCESS if options are successfully set.
  - XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting options.

Note
  This function is not thread-safe.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsBusy, XQspiPsu::IsReady, XQSPIPS_BASEADDR, XQSPIPS_LQSPI_CFG_RST_STATE, XQSPIPS_LQSPI_CR_4_BYTE_STATE, XQSPIPS_LQSPI_CR_RST_STATE, XQSPIPSU_CFG_OFFSET, XQSPIPSU_EN_OFFSET, XQSPIPSU_LQSPI_CR_LINEAR_MASK, XQSPIPSU_LQSPI_CR_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

Referenced by QspiPsuInterruptFlashExample(), QspiPsuPolledFlashExample(), and QspiPsuWriteProtectFlashExample().

s32 XQspiPsu_SetReadMode | ( | XQspiPsu * | InstancePtr,
|  | u32 | Mode
| ) |  |

This function sets the Read mode for the QSPIPSU device driver.The device must be idle rather than busy transferring data before setting Read mode options.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  Mode | contains the specified Mode to be set. See the bit definitions named XQSPIPSU_READMODE_* in the file xqspipsu.h.

Returns
  - XST_SUCCESS if options are successfully set.
  - XST_DEVICE_BUSY if the device is currently transferring data. The transfer must complete or be aborted before setting Mode.

Note
  This function is not thread-safe.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu::IsBusy, XQspiPsu::IsReady, XQspiPsu::ReadMode, XQSPIPSU_CFG_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

Referenced by XQspiPsu_InterruptHandler().

void XQspiPsu_SetStatusHandler | ( | XQspiPsu * | InstancePtr,
|  | void * | CallBackRef,
|  | XQspiPsu_StatusHandler | FuncPointer
| ) |  |

Sets the status callback function, the status handler, which the driver calls when it encounters conditions that should be reported to upper layer software.

The handler executes in an interrupt context, so it must minimize the amount of processing performed. One of the following status events is passed to the status handler.

    XST_SPI_TRANSFER_DONE           The requested data transfer is done

    XST_SPI_TRANSMIT_UNDERRUN       As a slave device, the master clocked data
                            but there were none available in the transmit
                            register/FIFO. This typically means the slave
                            application did not issue a transfer request
                            fast enough, or the processor/driver could not
                            fill the transmit register/FIFO fast enough.

    XST_SPI_RECEIVE_OVERRUN The QSPIPSU device lost data. Data was received
                            but the receive data register/FIFO was full.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  CallBackRef | is the upper layer callback reference passed back when the callback function is invoked.
  FuncPointer | is the pointer to the callback function.

Returns
  None.

Note

The handler is called within interrupt context, so it should do its work quickly and queue potentially time-consuming work to a task-level thread.

References XQspiPsu::IsReady, and XQspiPsu::StatusRef.

Referenced by QspiPsuInterruptFlashExample(), and QspiPsuWriteProtectFlashExample().

void XQspiPsu_SetWP | ( | const XQspiPsu * | InstancePtr,
|  | u8 | Value
| ) |  |

This function sets the Write Protect and Hold options for the QSPIPSU device driver.The device must be idle rather than busy transferring data before setting Write Protect and Hold options.

Parameters

  InstancePtr | is a pointer to the XQspiPsu instance.
  Value | of the WP_HOLD bit in configuration register

Returns
  None

Note
  This function is not thread-safe. This function can only be used with single flash configuration and x1/x2 data mode. This function cannot be used with x4 data mode and dual parallel and stacked flash configuration.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQSPIPSU_CFG_OFFSET, XQspiPsu_ReadReg, and XQspiPsu_WriteReg.

Referenced by QspiPsuWriteProtectFlashExample().

void XQspiPsu_WriteProtectToggle | ( | const XQspiPsu * | InstancePtr,
|  | u32 | Toggle
| ) |  |

This API enables/ disables Write Protect pin on the flash parts.

Parameters

  QspiPsuPtr | is a pointer to the QSPIPSU driver component to use.
  Toggle | is a value of the GPIO pin

Returns
  None

Note
  By default WP pin as per the QSPI controller is driven High which means no write protection. Calling this function once will enable the protection.

References XQspiPsu_Config::BaseAddress, XQspiPsu::Config, XQspiPsu_Config::ConnectionMode, XQSPIPSU_GPIO_OFFSET, and XQspiPsu_WriteReg.

Referenced by QspiPsuWriteProtectFlashExample().

## Variable Documentation

XQspiPsu_Config XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES]

This table contains configuration information for each QSPIPSU device in the system.

XQspiPsu_Config XQspiPsu_ConfigTable[XPAR_XQSPIPSU_NUM_INSTANCES]

Initial value:
= {
{
XPAR_XQSPIPSU_0_DEVICE_ID,
XPAR_XQSPIPSU_0_BASEADDR,
XPAR_XQSPIPSU_0_QSPI_CLK_FREQ_HZ,
XPAR_XQSPIPSU_0_QSPI_MODE,
XPAR_XQSPIPSU_0_QSPI_BUS_WIDTH,
XPAR_XQSPIPSU_0_IS_CACHE_COHERENT
},
}

This table contains configuration information for each QSPIPSU device in the system.