tmrctr: Tmrctr_v4_6

| tmrctr Xilinx SDK Drivers API Documentation

- Overview
- Data Structures
- APIs
- File List
- Examples

Data Structures | Macros | Typedefs | Functions | Variables
Tmrctr_v4_6

## Data Structures
struct | XTmrCtr_Config
| This typedef contains configuration information for the device. More...
struct | XTmrCtrStats
| Timer/Counter statistics. More...
struct | XTmrCtr
| The XTmrCtr driver instance data. More...

## Macros
#define | XTC_DEVICE_TIMER_COUNT 2
| Defines the number of timer counters within a single hardware device. More...
#define | XTmrCtr_ReadReg(BaseAddress, TmrCtrNumber, RegOffset)
| Read one of the timer counter registers. More...
#define | XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
| Write a specified value to a register of a timer counter. More...
#define | XTmrCtr_SetControlStatusReg(BaseAddress, TmrCtrNumber, RegisterValue)
| Set the Control Status Register of a timer counter to the specified value. More...
#define | XTmrCtr_GetControlStatusReg(BaseAddress, TmrCtrNumber) XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET)
| Get the Control Status Register of a timer counter. More...
#define | XTmrCtr_GetTimerCounterReg(BaseAddress, TmrCtrNumber) XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), XTC_TCR_OFFSET) \
| Get the Timer Counter Register of a timer counter. More...
#define | XTmrCtr_SetLoadReg(BaseAddress, TmrCtrNumber, RegisterValue)
| Set the Load Register of a timer counter to the specified value. More...
#define | XTmrCtr_GetLoadReg(BaseAddress, TmrCtrNumber) XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), XTC_TLR_OFFSET)
| Get the Load Register of a timer counter. More...
#define | XTmrCtr_Enable(BaseAddress, TmrCtrNumber)
| Enable a timer counter such that it starts running. More...
#define | XTmrCtr_Disable(BaseAddress, TmrCtrNumber)
| Disable a timer counter such that it stops running. More...
#define | XTmrCtr_EnableIntr(BaseAddress, TmrCtrNumber)
| Enable the interrupt for a timer counter. More...
#define | XTmrCtr_DisableIntr(BaseAddress, TmrCtrNumber)
| Disable the interrupt for a timer counter. More...
#define | XTmrCtr_LoadTimerCounterReg(BaseAddress, TmrCtrNumber)
| Cause the timer counter to load it's Timer Counter Register with the value in the Load Register. More...
#define | XTmrCtr_HasEventOccurred(BaseAddress, TmrCtrNumber)
| Determine if a timer counter event has occurred. More...

## Typedefs
typedef void(* | XTmrCtr_Handler )(void *CallBackRef, u8 TmrCtrNumber)
| Signature for the callback function. More...

## Functions
void | XTmrCtr_CfgInitialize (XTmrCtr *InstancePtr, XTmrCtr_Config *ConfigPtr, UINTPTR EffectiveAddr)
| This function populates the timer counter's configuration structure and sets some configurations defaults. More...
int | XTmrCtr_InitHw (XTmrCtr *InstancePtr)
| (Re-)initialzes all timer counters which aren't started already. More...
int | XTmrCtr_Initialize (XTmrCtr *InstancePtr, u16 DeviceId)
| Initializes a specific timer/counter instance/driver. More...
void | XTmrCtr_Start (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Starts the specified timer counter of the device such that it starts running. More...
void | XTmrCtr_Stop (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Stops the timer counter by disabling it. More...
u32 | XTmrCtr_GetValue (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Get the current value of the specified timer counter. More...
void | XTmrCtr_SetResetValue (XTmrCtr *InstancePtr, u8 TmrCtrNumber, u32 ResetValue)
| Set the reset value for the specified timer counter. More...
u32 | XTmrCtr_GetCaptureValue (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Returns the timer counter value that was captured the last time the external capture input was asserted. More...
void | XTmrCtr_Reset (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Resets the specified timer counter of the device. More...
int | XTmrCtr_IsExpired (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Checks if the specified timer counter of the device has expired. More...
u8 | XTmrCtr_PwmConfigure (XTmrCtr *InstancePtr, u32 PwmPeriod, u32 PwmHighTime)
| Configures timers to generate PWM output. More...
void | XTmrCtr_PwmEnable (XTmrCtr *InstancePtr)
| Enables the PWM output as per configurations set by XTmrCtr_PwmConfigure. More...
void | XTmrCtr_PwmDisable (XTmrCtr *InstancePtr)
| Disables the PWM output. More...
XTmrCtr_Config * | XTmrCtr_LookupConfig (u16 DeviceId)
| Looks up the device configuration based on the unique device ID. More...
void | XTmrCtr_SetOptions (XTmrCtr *InstancePtr, u8 TmrCtrNumber, u32 Options)
| Enables the specified options for the specified timer counter. More...
u32 | XTmrCtr_GetOptions (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Get the options for the specified timer counter. More...
void | XTmrCtr_GetStats (XTmrCtr *InstancePtr, XTmrCtrStats *StatsPtr)
| Get a copy of the XTmrCtrStats structure, which contains the current statistics for this driver. More...
void | XTmrCtr_ClearStats (XTmrCtr *InstancePtr)
| Clear the XTmrCtrStats structure for this driver. More...
int | XTmrCtr_SelfTest (XTmrCtr *InstancePtr, u8 TmrCtrNumber)
| Runs a self-test on the driver/device. More...
void | XTmrCtr_SetHandler (XTmrCtr *InstancePtr, XTmrCtr_Handler FuncPtr, void *CallBackRef)
| Sets the timer callback function, which the driver calls when the specified timer times out. More...
void | XTmrCtr_InterruptHandler (void *InstancePtr)
| Interrupt Service Routine (ISR) for the driver. More...

## Variables
XTmrCtr_Config | XTmrCtr_ConfigTable []
| The timer/counter configuration table, sized by the number of instances defined in xparameters.h. More...
XTmrCtr_Config | XTmrCtr_ConfigTable [XPAR_XTMRCTR_NUM_INSTANCES]
| The timer/counter configuration table, sized by the number of instances defined in xparameters.h. More...

## Configuration options
These options are used in XTmrCtr_SetOptions() and XTmrCtr_GetOptions()
#define | XTC_CASCADE_MODE_OPTION 0x00000080UL
| Used to configure the timer counter device. More...
#define | XTC_ENABLE_ALL_OPTION 0x00000040UL
#define | XTC_DOWN_COUNT_OPTION 0x00000020UL
#define | XTC_CAPTURE_MODE_OPTION 0x00000010UL
#define | XTC_INT_MODE_OPTION 0x00000008UL
#define | XTC_AUTO_RELOAD_OPTION 0x00000004UL
#define | XTC_EXT_COMPARE_OPTION 0x00000002UL

## Register Offset Definitions
Register offsets within a timer counter, there are multiple timer counters within a single device
#define | XTC_TCSR_OFFSET 0
| Control/Status register. More...
#define | XTC_TLR_OFFSET 4
| Load register. More...
#define | XTC_TCR_OFFSET 8
| Timer counter register. More...

## Control Status Register Bit Definitions
Control Status Register bit masks Used to configure the timer counter device.
#define | XTC_CSR_CASC_MASK 0x00000800
| Cascade Mode. More...
#define | XTC_CSR_ENABLE_ALL_MASK 0x00000400
| Enables all timer counters. More...
#define | XTC_CSR_ENABLE_PWM_MASK 0x00000200
| Enables the Pulse Width Modulation. More...
#define | XTC_CSR_INT_OCCURED_MASK 0x00000100
| If bit is set, an interrupt has occured. More...
#define | XTC_CSR_ENABLE_TMR_MASK 0x00000080
| Enables only the specific timer. More...
#define | XTC_CSR_ENABLE_INT_MASK 0x00000040
| Enables the interrupt output. More...
#define | XTC_CSR_LOAD_MASK 0x00000020
| Loads the timer using the load value provided earlier in the Load Register, XTC_TLR_OFFSET. More...
#define | XTC_CSR_AUTO_RELOAD_MASK 0x00000010
| In compare mode, configures the timer counter to reload from the Load Register. More...
#define | XTC_CSR_EXT_CAPTURE_MASK 0x00000008
| Enables the external input to the timer counter. More...
#define | XTC_CSR_EXT_GENERATE_MASK 0x00000004
| Enables the external generate output for the timer. More...
#define | XTC_CSR_DOWN_COUNT_MASK 0x00000002
| Configures the timer counter to count down from start value, the default is to count up. More...
#define | XTC_CSR_CAPTURE_MODE_MASK 0x00000001
| Enables the timer to capture the timer counter value when the external capture line is asserted. More...

## Macro Definition Documentation

#define XTC_CASCADE_MODE_OPTION 0x00000080UL

Used to configure the timer counter device.

    XTC_CASCADE_MODE_OPTION Enables the Cascade Mode only valid for TCSRO.
    XTC_ENABLE_ALL_OPTION   Enables all timer counters at once.
    XTC_DOWN_COUNT_OPTION   Configures the timer counter to count down from
                            start value, the default is to count up.
    XTC_CAPTURE_MODE_OPTION Configures the timer to capture the timer
                            counter value when the external capture line is
                            asserted. The default mode is compare mode.
    XTC_INT_MODE_OPTION             Enables the timer counter interrupt output.
    XTC_AUTO_RELOAD_OPTION  In compare mode, configures the timer counter to
                            reload from the compare value. The default mode
                            causes the timer counter to hold when the
                            compare value is hit.
                            In capture mode, configures the timer counter to
                            not hold the previous capture value if a new
                            event occurs. The default mode cause the timer
                            counter to hold the capture value until
                            recognized.
    XTC_EXT_COMPARE_OPTION  Enables the external compare output signal.

Referenced by TmrCtrCascadeIntrExample().

#define XTC_CSR_AUTO_RELOAD_MASK 0x00000010

In compare mode, configures the timer counter to reload from the Load Register.

The default mode causes the timer counter to hold when the compare value is hit. In capture mode, configures the timer counter to not hold the previous capture value if a new event occurs. The default mode cause the timer counter to hold the capture value until recognized.

Referenced by XTmrCtr_InterruptHandler(), and XTmrCtr_PwmConfigure().

#define XTC_CSR_CAPTURE_MODE_MASK 0x00000001

Enables the timer to capture the timer counter value when the external capture line is asserted.

The default mode is compare mode.

Referenced by XTmrCtr_InterruptHandler(), and XTmrCtr_PwmConfigure().

#define XTC_CSR_CASC_MASK 0x00000800

Cascade Mode.

Referenced by XTmrCtr_PwmConfigure().

#define XTC_CSR_DOWN_COUNT_MASK 0x00000002

Configures the timer counter to count down from start value, the default is to count up.

Referenced by XTmrCtr_PwmConfigure().

#define XTC_CSR_ENABLE_ALL_MASK 0x00000400

Enables all timer counters.

Referenced by XTmrCtr_PwmEnable().

#define XTC_CSR_ENABLE_INT_MASK 0x00000040

Enables the interrupt output.

Referenced by XTmrCtr_InterruptHandler().

#define XTC_CSR_ENABLE_PWM_MASK 0x00000200

Enables the Pulse Width Modulation.

Referenced by XTmrCtr_PwmDisable(), and XTmrCtr_PwmEnable().

#define XTC_CSR_ENABLE_TMR_MASK 0x00000080

Enables only the specific timer.

Referenced by XTmrCtr_InterruptHandler(), XTmrCtr_SelfTest(), XTmrCtr_Start(), and XTmrCtr_Stop().

#define XTC_CSR_EXT_CAPTURE_MASK 0x00000008

Enables the external input to the timer counter.

#define XTC_CSR_EXT_GENERATE_MASK 0x00000004

Enables the external generate output for the timer.

Referenced by XTmrCtr_PwmConfigure(), XTmrCtr_PwmDisable(), and XTmrCtr_PwmEnable().

#define XTC_CSR_INT_OCCURED_MASK 0x00000100

If bit is set, an interrupt has occured.

If set and '1' is written to this bit position, bit is cleared.

Referenced by XTmrCtr_InitHw(), XTmrCtr_InterruptHandler(), XTmrCtr_IsExpired(), and XTmrCtr_SelfTest().

#define XTC_CSR_LOAD_MASK 0x00000020

Loads the timer using the load value provided earlier in the Load Register, XTC_TLR_OFFSET.

Referenced by TmrCtrLowLevelExample(), XTmrCtr_InitHw(), XTmrCtr_InterruptHandler(), XTmrCtr_Reset(), XTmrCtr_SelfTest(), and XTmrCtr_Start().

#define XTC_DEVICE_TIMER_COUNT 2

Defines the number of timer counters within a single hardware device.

This number is not currently parameterized in the hardware but may be in the future.

Referenced by XTmrCtr_GetCaptureValue(), XTmrCtr_GetOptions(), XTmrCtr_GetValue(), XTmrCtr_InitHw(), XTmrCtr_InterruptHandler(), XTmrCtr_IsExpired(), XTmrCtr_Reset(), XTmrCtr_SelfTest(), XTmrCtr_SetOptions(), XTmrCtr_SetResetValue(), XTmrCtr_Start(), and XTmrCtr_Stop().

#define XTC_TCR_OFFSET 8

Timer counter register.

Referenced by XTmrCtr_GetValue(), and XTmrCtr_SelfTest().

#define XTC_TCSR_OFFSET 0

Control/Status register.

Referenced by XTmrCtr_GetOptions(), XTmrCtr_InitHw(), XTmrCtr_InterruptHandler(), XTmrCtr_IsExpired(), XTmrCtr_PwmConfigure(), XTmrCtr_PwmDisable(), XTmrCtr_PwmEnable(), XTmrCtr_Reset(), XTmrCtr_SelfTest(), XTmrCtr_SetOptions(), XTmrCtr_Start(), and XTmrCtr_Stop().

#define XTC_TLR_OFFSET 4

Load register.

Referenced by XTmrCtr_GetCaptureValue(), XTmrCtr_InitHw(), XTmrCtr_PwmConfigure(), XTmrCtr_SelfTest(), and XTmrCtr_SetResetValue().

#define XTmrCtr_Disable | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  |

Value:
XTmrCtr_WriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET, \
(XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber),\
XTC_TCSR_OFFSET) & ~ XTC_CSR_ENABLE_TMR_MASK))
XTC_TCSR_OFFSET
#define XTC_TCSR_OFFSET
Control/Status register.
Definition: xtmrctr_l.h:101
XTmrCtr_ReadReg
#define XTmrCtr_ReadReg(BaseAddress, TmrCtrNumber, RegOffset)
Read one of the timer counter registers.
Definition: xtmrctr_l.h:236
XTC_CSR_ENABLE_TMR_MASK
#define XTC_CSR_ENABLE_TMR_MASK
Enables only the specific timer.
Definition: xtmrctr_l.h:131
XTmrCtr_WriteReg
#define XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
Write a specified value to a register of a timer counter.
Definition: xtmrctr_l.h:259

Disable a timer counter such that it stops running.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  C-Style signature: void XTmrCtr_Disable(u32 BaseAddress, u8 TmrCtrNumber);

Referenced by TmrCtrLowLevelExample().

#define XTmrCtr_DisableIntr | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  |

Value:
XTmrCtr_WriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET, \
(XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), \
XTC_TCSR_OFFSET) & ~ (XTC_CSR_ENABLE_INT_MASK \
| XTC_CSR_INT_OCCURED_MASK)))
XTC_TCSR_OFFSET
#define XTC_TCSR_OFFSET
Control/Status register.
Definition: xtmrctr_l.h:101
XTmrCtr_ReadReg
#define XTmrCtr_ReadReg(BaseAddress, TmrCtrNumber, RegOffset)
Read one of the timer counter registers.
Definition: xtmrctr_l.h:236
XTC_CSR_INT_OCCURED_MASK
#define XTC_CSR_INT_OCCURED_MASK
If bit is set, an interrupt has occured.
Definition: xtmrctr_l.h:120
XTC_CSR_ENABLE_INT_MASK
#define XTC_CSR_ENABLE_INT_MASK
Enables the interrupt output.
Definition: xtmrctr_l.h:134
XTmrCtr_WriteReg
#define XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
Write a specified value to a register of a timer counter.
Definition: xtmrctr_l.h:259

Disable the interrupt for a timer counter.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  C-Style signature: void XTmrCtr_DisableIntr(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_Enable | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  |

Value:
XTmrCtr_WriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET, \
(XTmrCtr_ReadReg((BaseAddress), ( TmrCtrNumber), \
XTC_TCSR_OFFSET) | XTC_CSR_ENABLE_TMR_MASK))
XTC_TCSR_OFFSET
#define XTC_TCSR_OFFSET
Control/Status register.
Definition: xtmrctr_l.h:101
XTmrCtr_ReadReg
#define XTmrCtr_ReadReg(BaseAddress, TmrCtrNumber, RegOffset)
Read one of the timer counter registers.
Definition: xtmrctr_l.h:236
XTC_CSR_ENABLE_TMR_MASK
#define XTC_CSR_ENABLE_TMR_MASK
Enables only the specific timer.
Definition: xtmrctr_l.h:131
XTmrCtr_WriteReg
#define XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
Write a specified value to a register of a timer counter.
Definition: xtmrctr_l.h:259

Enable a timer counter such that it starts running.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  C-Style signature: void XTmrCtr_Enable(u32 BaseAddress, u8 TmrCtrNumber);

Referenced by TmrCtrLowLevelExample().

#define XTmrCtr_EnableIntr | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  |

Value:
XTmrCtr_WriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET, \
(XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), \
XTC_TCSR_OFFSET) | XTC_CSR_ENABLE_INT_MASK))
XTC_TCSR_OFFSET
#define XTC_TCSR_OFFSET
Control/Status register.
Definition: xtmrctr_l.h:101
XTmrCtr_ReadReg
#define XTmrCtr_ReadReg(BaseAddress, TmrCtrNumber, RegOffset)
Read one of the timer counter registers.
Definition: xtmrctr_l.h:236
XTC_CSR_ENABLE_INT_MASK
#define XTC_CSR_ENABLE_INT_MASK
Enables the interrupt output.
Definition: xtmrctr_l.h:134
XTmrCtr_WriteReg
#define XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
Write a specified value to a register of a timer counter.
Definition: xtmrctr_l.h:259

Enable the interrupt for a timer counter.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  C-Style signature: void XTmrCtr_EnableIntr(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_GetControlStatusReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  | XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET)

Get the Control Status Register of a timer counter.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  The value read from the register, a 32 bit value.

Note
  C-Style signature: u32 XTmrCtr_GetControlStatusReg(u32 BaseAddress, u8 TmrCtrNumber);

Referenced by TmrCtrLowLevelExample().

#define XTmrCtr_GetLoadReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  | XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), XTC_TLR_OFFSET)

Get the Load Register of a timer counter.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  The value read from the register, a 32 bit value.

Note
  C-Style signature: u32 XTmrCtr_GetLoadReg(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_GetTimerCounterReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  | XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), XTC_TCR_OFFSET) \

Get the Timer Counter Register of a timer counter.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  The value read from the register, a 32 bit value.

Note
  C-Style signature: u32 XTmrCtr_GetTimerCounterReg(u32 BaseAddress, u8 TmrCtrNumber);

Referenced by TmrCtrLowLevelExample().

#define XTmrCtr_HasEventOccurred | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  |

Value:
((XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber), \
XTC_TCSR_OFFSET) & XTC_CSR_INT_OCCURED_MASK) == \
XTC_CSR_INT_OCCURED_MASK)
XTC_TCSR_OFFSET
#define XTC_TCSR_OFFSET
Control/Status register.
Definition: xtmrctr_l.h:101
XTmrCtr_ReadReg
#define XTmrCtr_ReadReg(BaseAddress, TmrCtrNumber, RegOffset)
Read one of the timer counter registers.
Definition: xtmrctr_l.h:236
XTC_CSR_INT_OCCURED_MASK
#define XTC_CSR_INT_OCCURED_MASK
If bit is set, an interrupt has occured.
Definition: xtmrctr_l.h:120

Determine if a timer counter event has occurred.

Events are defined to be when a capture has occurred or the counter has roller over.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Note
  C-Style signature: int XTmrCtr_HasEventOccurred(u32 BaseAddress, u8 TmrCtrNumber);

#define XTmrCtr_LoadTimerCounterReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber
| ) |  |

Value:
XTmrCtr_WriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET, \
(XTmrCtr_ReadReg((BaseAddress), (TmrCtrNumber),\
XTC_TCSR_OFFSET) | XTC_CSR_LOAD_MASK))
XTC_TCSR_OFFSET
#define XTC_TCSR_OFFSET
Control/Status register.
Definition: xtmrctr_l.h:101
XTC_CSR_LOAD_MASK
#define XTC_CSR_LOAD_MASK
Loads the timer using the load value provided earlier in the Load Register, XTC_TLR_OFFSET.
Definition: xtmrctr_l.h:137
XTmrCtr_ReadReg
#define XTmrCtr_ReadReg(BaseAddress, TmrCtrNumber, RegOffset)
Read one of the timer counter registers.
Definition: xtmrctr_l.h:236
XTmrCtr_WriteReg
#define XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
Write a specified value to a register of a timer counter.
Definition: xtmrctr_l.h:259

Cause the timer counter to load it's Timer Counter Register with the value in the Load Register.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  C-Style signature: void XTmrCtr_LoadTimerCounterReg(u32 BaseAddress, u8 TmrCtrNumber);

Referenced by TmrCtrLowLevelExample().

#define XTmrCtr_ReadReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber,
|  |  | RegOffset
| ) |  |

Value:
Xil_In32((BaseAddress) + XTmrCtr_Offsets[(TmrCtrNumber)] + \
(RegOffset))

Read one of the timer counter registers.

Parameters

  BaseAddress | contains the base address of the timer counter device.
  TmrCtrNumber | contains the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
  RegOffset | contains the offset from the 1st register of the timer counter to select the specific register of the timer counter.

Returns
  The value read from the register, a 32 bit value.

Note
  C-Style signature: u32 XTmrCtr_ReadReg(u32 BaseAddress, u8 TimerNumber, unsigned RegOffset);

Referenced by XTmrCtr_GetCaptureValue(), XTmrCtr_GetOptions(), XTmrCtr_GetValue(), XTmrCtr_InterruptHandler(), XTmrCtr_IsExpired(), XTmrCtr_PwmConfigure(), XTmrCtr_PwmDisable(), XTmrCtr_PwmEnable(), XTmrCtr_Reset(), XTmrCtr_SelfTest(), XTmrCtr_Start(), and XTmrCtr_Stop().

#define XTmrCtr_SetControlStatusReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber,
|  |  | RegisterValue
| ) |  |

Value:
XTmrCtr_WriteReg((BaseAddress), (TmrCtrNumber), XTC_TCSR_OFFSET, \
(RegisterValue))
XTC_TCSR_OFFSET
#define XTC_TCSR_OFFSET
Control/Status register.
Definition: xtmrctr_l.h:101
XTmrCtr_WriteReg
#define XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
Write a specified value to a register of a timer counter.
Definition: xtmrctr_l.h:259

Set the Control Status Register of a timer counter to the specified value.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
  RegisterValue | is the 32 bit value to be written to the register.

Returns
  None.

Note
  C-Style signature: void XTmrCtr_SetControlStatusReg(u32 BaseAddress, u8 TmrCtrNumber,u32 RegisterValue);

Referenced by TmrCtrLowLevelExample().

#define XTmrCtr_SetLoadReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber,
|  |  | RegisterValue
| ) |  |

Value:
XTmrCtr_WriteReg((BaseAddress), (TmrCtrNumber), XTC_TLR_OFFSET, \
(RegisterValue))
XTC_TLR_OFFSET
#define XTC_TLR_OFFSET
Load register.
Definition: xtmrctr_l.h:102
XTmrCtr_WriteReg
#define XTmrCtr_WriteReg(BaseAddress, TmrCtrNumber, RegOffset, ValueToWrite)
Write a specified value to a register of a timer counter.
Definition: xtmrctr_l.h:259

Set the Load Register of a timer counter to the specified value.

Parameters

  BaseAddress | is the base address of the device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
  RegisterValue | is the 32 bit value to be written to the register.

Returns
  None.

Note
  C-Style signature: void XTmrCtr_SetLoadReg(u32 BaseAddress, u8 TmrCtrNumber, u32 RegisterValue);

Referenced by TmrCtrLowLevelExample().

#define XTmrCtr_WriteReg | ( |  | BaseAddress,
|  |  | TmrCtrNumber,
|  |  | RegOffset,
|  |  | ValueToWrite
| ) |  |

Value:
Xil_Out32(((BaseAddress) + XTmrCtr_Offsets[(TmrCtrNumber)] + \
(RegOffset)), (ValueToWrite))

Write a specified value to a register of a timer counter.

Parameters

  BaseAddress | is the base address of the timer counter device.
  TmrCtrNumber | is the specific timer counter within the device, a zero based number, 0 - (XTC_DEVICE_TIMER_COUNT - 1).
  RegOffset | contain the offset from the 1st register of the timer counter to select the specific register of the timer counter.
  ValueToWrite | is the 32 bit value to be written to the register.

Note
  C-Style signature: void XTmrCtr_WriteReg(u32 BaseAddress, u8 TimerNumber, unsigned RegOffset, u32 ValueToWrite);

Referenced by XTmrCtr_InitHw(), XTmrCtr_InterruptHandler(), XTmrCtr_PwmConfigure(), XTmrCtr_PwmDisable(), XTmrCtr_PwmEnable(), XTmrCtr_Reset(), XTmrCtr_SelfTest(), XTmrCtr_SetOptions(), XTmrCtr_SetResetValue(), XTmrCtr_Start(), and XTmrCtr_Stop().

## Typedef Documentation

typedef void(* XTmrCtr_Handler)(void *CallBackRef, u8 TmrCtrNumber)

Signature for the callback function.

Parameters

  CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is unimportant to the driver, so it is a void pointer.
  TmrCtrNumber | is the number of the timer/counter within the device. The device typically contains at least two timer/counters. The timer number is a zero based number with a range of 0 to (XTC_DEVICE_TIMER_COUNT - 1).

## Function Documentation

void XTmrCtr_CfgInitialize | ( | XTmrCtr * | InstancePtr,
|  | XTmrCtr_Config * | ConfigPtr,
|  | UINTPTR | EffectiveAddr
| ) |  |

This function populates the timer counter's configuration structure and sets some configurations defaults.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  ConfigPtr | is a pointer to the configuration structure that will be used to copy the settings from.
  EffectiveAddr | is the device base address in the virtual memory space. If the address translation is not used, then the physical address is passed.

Returns
  None.

Note
  Unexpected errors may occur if the address mapping is changed after this function is invoked.

References XTmrCtr_Config::BaseAddress, XTmrCtr::BaseAddress, XTmrCtr::CallBackRef, XTmrCtr::Config, XTmrCtr::Handler, XTmrCtrStats::Interrupts, XTmrCtr::IsReady, and XTmrCtr::Stats.

Referenced by XTmrCtr_Initialize().

void XTmrCtr_ClearStats | ( | XTmrCtr * | InstancePtr | ) |

Clear the XTmrCtrStats structure for this driver.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.

Returns
  None.

Note
  None.

References XTmrCtrStats::Interrupts, XTmrCtr::IsReady, and XTmrCtr::Stats.

u32 XTmrCtr_GetCaptureValue | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Returns the timer counter value that was captured the last time the external capture input was asserted.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  The current capture value for the indicated timer counter.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_DEVICE_TIMER_COUNT, XTC_TLR_OFFSET, and XTmrCtr_ReadReg.

u32 XTmrCtr_GetOptions | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Get the options for the specified timer counter.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns

The currently set options. An option which is set to a '1' is enabled and set to a '0' is disabled. The options are bit masks such that multiple options may be set or cleared. The options are described in xtmrctr.h.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, and XTmrCtr_ReadReg.

void XTmrCtr_GetStats | ( | XTmrCtr * | InstancePtr,
|  | XTmrCtrStats * | StatsPtr
| ) |  |

Get a copy of the XTmrCtrStats structure, which contains the current statistics for this driver.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  StatsPtr | is a pointer to a XTmrCtrStats structure which will get a copy of current statistics.

Returns
  None.

Note
  None.

References XTmrCtrStats::Interrupts, XTmrCtr::IsReady, and XTmrCtr::Stats.

u32 XTmrCtr_GetValue | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Get the current value of the specified timer counter.

The timer counter may be either incrementing or decrementing based upon the current mode of operation.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  The current value for the timer counter.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_DEVICE_TIMER_COUNT, XTC_TCR_OFFSET, and XTmrCtr_ReadReg.

Referenced by TmrCtrPolledExample().

int XTmrCtr_InitHw | ( | XTmrCtr * | InstancePtr | ) |

(Re-)initialzes all timer counters which aren't started already.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.

Returns
  - XST_SUCCESS if at least one timer counter is stopped.
  - XST_DEVICE_IS_STARTED otherwise.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTmrCtr::IsStartedTmrCtr0, XTmrCtr::IsStartedTmrCtr1, XTC_CSR_INT_OCCURED_MASK, XTC_CSR_LOAD_MASK, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, XTC_TLR_OFFSET, and XTmrCtr_WriteReg.

Referenced by XTmrCtr_Initialize().

int XTmrCtr_Initialize | ( | XTmrCtr * | InstancePtr,
|  | u16 | DeviceId
| ) |  |

Initializes a specific timer/counter instance/driver.

Initialize fields of the XTmrCtr structure, then reset the timer/counter.If a timer is already running then it is not initialized.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  DeviceId | is the unique id of the device controlled by this XTmrCtr component. Passing in a device id associates the generic XTmrCtr component to a specific device, as chosen by the caller or application developer.

Returns
  - XST_SUCCESS if initialization was successful
  - XST_DEVICE_IS_STARTED if the device has already been started
  - XST_DEVICE_NOT_FOUND if the device doesn't exist

Note
  None.

References XTmrCtr_Config::BaseAddress, XTmrCtr::IsStartedTmrCtr0, XTmrCtr::IsStartedTmrCtr1, XTmrCtr_CfgInitialize(), XTmrCtr_InitHw(), and XTmrCtr_LookupConfig().

Referenced by TmrCtrCascadeIntrExample(), TmrCtrFastIntrExample(), TmrCtrIntrExample(), TmrCtrPolledExample(), TmrCtrPwmExample(), and TmrCtrSelfTestExample().

void XTmrCtr_InterruptHandler | ( | void * | InstancePtr | ) |

Interrupt Service Routine (ISR) for the driver.

This function only performs processing for the device and does not save and restore the interrupt context.

Parameters

  InstancePtr | contains a pointer to the timer/counter instance for the interrupt.

Returns
  None.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::CallBackRef, XTmrCtr::Handler, XTmrCtrStats::Interrupts, XTmrCtr::Stats, XTC_CSR_AUTO_RELOAD_MASK, XTC_CSR_CAPTURE_MODE_MASK, XTC_CSR_ENABLE_INT_MASK, XTC_CSR_ENABLE_TMR_MASK, XTC_CSR_INT_OCCURED_MASK, XTC_CSR_LOAD_MASK, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, XTmrCtr_ReadReg, and XTmrCtr_WriteReg.

int XTmrCtr_IsExpired | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Checks if the specified timer counter of the device has expired.

In capture mode, expired is defined as a capture occurred. In compare mode, expired is defined as the timer counter rolled over/under for up/down counting.

When interrupts are enabled, the expiration causes an interrupt. This function is typically used to poll a timer counter to determine when it has expired.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  TRUE if the timer has expired, and FALSE otherwise.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_CSR_INT_OCCURED_MASK, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, and XTmrCtr_ReadReg.

XTmrCtr_Config * XTmrCtr_LookupConfig | ( | u16 | DeviceId | ) |

Looks up the device configuration based on the unique device ID.

The table TmrCtr_ConfigTable contains the configuration info for each device in the system.

Parameters

  DeviceId | is the unique device ID to search for in the config table.

Returns
  A pointer to the configuration that matches the given device ID, or NULL if no match is found.

Note
  None.

Referenced by XTmrCtr_Initialize().

u8 XTmrCtr_PwmConfigure | ( | XTmrCtr * | InstancePtr,
|  | u32 | PwmPeriod,
|  | u32 | PwmHighTime
| ) |  |

Configures timers to generate PWM output.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  PwmPeriod | is the period of pwm signal in nano seconds.
  PwmHighTime | is the high time of pwm signal in nano seconds.

Returns
  the duty cycle that will possibly be achieved.

Note
  This function needs to be called before enabling PWM otherwise the output of PWM may be indeterminate. Here Down count mode of timers are used for generating PWM output.

References XTmrCtr::BaseAddress, XTmrCtr::Config, XTmrCtr::IsReady, XTmrCtr::IsStartedTmrCtr0, XTmrCtr::IsStartedTmrCtr1, XTmrCtr_Config::SysClockFreqHz, XTC_CSR_AUTO_RELOAD_MASK, XTC_CSR_CAPTURE_MODE_MASK, XTC_CSR_CASC_MASK, XTC_CSR_DOWN_COUNT_MASK, XTC_CSR_EXT_GENERATE_MASK, XTC_TCSR_OFFSET, XTC_TLR_OFFSET, XTmrCtr_ReadReg, XTmrCtr_Stop(), and XTmrCtr_WriteReg.

Referenced by TmrCtrPwmExample().

void XTmrCtr_PwmDisable | ( | XTmrCtr * | InstancePtr | ) |

Disables the PWM output.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.

Returns
  none.

Note
  Call to this function disables only the PWM output and do not alter any configuration. PWM output can again be enabled by calling XTmrCtr_PwmEnable without the need of re-configuration.

References XTmrCtr::BaseAddress, XTmrCtr::IsPwmEnabled, XTC_CSR_ENABLE_PWM_MASK, XTC_CSR_EXT_GENERATE_MASK, XTC_TCSR_OFFSET, XTmrCtr_ReadReg, XTmrCtr_Reset(), XTmrCtr_Stop(), and XTmrCtr_WriteReg.

Referenced by TmrCtrPwmExample().

void XTmrCtr_PwmEnable | ( | XTmrCtr * | InstancePtr | ) |

Enables the PWM output as per configurations set by XTmrCtr_PwmConfigure.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.

Returns
  none.

Note
  none.

References XTmrCtr::BaseAddress, XTmrCtr::IsPwmEnabled, XTC_CSR_ENABLE_ALL_MASK, XTC_CSR_ENABLE_PWM_MASK, XTC_CSR_EXT_GENERATE_MASK, XTC_TCSR_OFFSET, XTmrCtr_ReadReg, XTmrCtr_Reset(), and XTmrCtr_WriteReg.

Referenced by TmrCtrPwmExample().

void XTmrCtr_Reset | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Resets the specified timer counter of the device.

A reset causes the timer counter to set it's value to the reset value.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_CSR_LOAD_MASK, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, XTmrCtr_ReadReg, and XTmrCtr_WriteReg.

Referenced by TmrCtrCascadeIntrExample(), XTmrCtr_PwmDisable(), and XTmrCtr_PwmEnable().

int XTmrCtr_SelfTest | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Runs a self-test on the driver/device.

This test verifies that the specified timer counter of the device can be enabled and increments.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  - XST_SUCCESS if self-test was successful

- XST_FAILURE if the timer is not incrementing.

Note

This is a destructive test using the provided timer. The current settings of the timer are returned to the initialized values and all settings at the time this function is called are overwritten.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_CSR_ENABLE_TMR_MASK, XTC_CSR_INT_OCCURED_MASK, XTC_CSR_LOAD_MASK, XTC_DEVICE_TIMER_COUNT, XTC_TCR_OFFSET, XTC_TCSR_OFFSET, XTC_TLR_OFFSET, XTmrCtr_ReadReg, and XTmrCtr_WriteReg.

Referenced by TmrCtrCascadeIntrExample(), TmrCtrFastIntrExample(), TmrCtrIntrExample(), TmrCtrPolledExample(), TmrCtrPwmExample(), and TmrCtrSelfTestExample().

void XTmrCtr_SetHandler | ( | XTmrCtr * | InstancePtr,
|  | XTmrCtr_Handler | FuncPtr,
|  | void * | CallBackRef
| ) |  |

Sets the timer callback function, which the driver calls when the specified timer times out.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance .
  CallBackRef | is the upper layer callback reference passed back when the callback function is invoked.
  FuncPtr | is the pointer to the callback function.

Returns
  None.

Note

The handler is called within interrupt context so the function that is called should either be short or pass the more extensive processing off to another task to allow the interrupt to return and normal processing to continue.

References XTmrCtr::CallBackRef, XTmrCtr::Handler, and XTmrCtr::IsReady.

Referenced by TmrCtrCascadeIntrExample(), TmrCtrFastIntrExample(), TmrCtrIntrExample(), and TmrCtrPwmExample().

void XTmrCtr_SetOptions | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber,
|  | u32 | Options
| ) |  |

Enables the specified options for the specified timer counter.

This function sets the options without regard to the current options of the driver. To prevent a loss of the current options, the user should call XTmrCtr_GetOptions() prior to this function and modify the retrieved options to pass into this function to prevent loss of the current options.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).
  Options | contains the desired options to be set or cleared. Setting the option to '1' enables the option, clearing the to '0' disables the option. The options are bit masks such that multiple options may be set or cleared. The options are described in xtmrctr.h.

Returns
  None.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, and XTmrCtr_WriteReg.

Referenced by TmrCtrCascadeIntrExample(), TmrCtrFastIntrExample(), TmrCtrIntrExample(), TmrCtrPolledExample(), and TmrCtrPwmExample().

void XTmrCtr_SetResetValue | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber,
|  | u32 | ResetValue
| ) |  |

Set the reset value for the specified timer counter.

This is the value that is loaded into the timer counter when it is reset. This value is also loaded when the timer counter is started.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).
  ResetValue | contains the value to be used to reset the timer counter.

Returns
  None.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTC_DEVICE_TIMER_COUNT, XTC_TLR_OFFSET, and XTmrCtr_WriteReg.

Referenced by TmrCtrCascadeIntrExample(), TmrCtrFastIntrExample(), and TmrCtrIntrExample().

void XTmrCtr_Start | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Starts the specified timer counter of the device such that it starts running.

The timer counter is reset before it is started and the reset value is loaded into the timer counter.

If interrupt mode is specified in the options, it is necessary for the caller to connect the interrupt handler of the timer/counter to the interrupt source, typically an interrupt controller, and enable the interrupt within the interrupt controller.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTmrCtr::IsStartedTmrCtr0, XTmrCtr::IsStartedTmrCtr1, XTC_CSR_ENABLE_TMR_MASK, XTC_CSR_LOAD_MASK, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, XTmrCtr_ReadReg, and XTmrCtr_WriteReg.

Referenced by TmrCtrCascadeIntrExample(), TmrCtrFastIntrExample(), TmrCtrIntrExample(), and TmrCtrPolledExample().

void XTmrCtr_Stop | ( | XTmrCtr * | InstancePtr,
|  | u8 | TmrCtrNumber
| ) |  |

Stops the timer counter by disabling it.

It is the callers' responsibility to disconnect the interrupt handler of the timer_counter from the interrupt source, typically an interrupt controller, and disable the interrupt within the interrupt controller.

Parameters

  InstancePtr | is a pointer to the XTmrCtr instance.
  TmrCtrNumber | is the timer counter of the device to operate on. Each device may contain multiple timer counters. The timer number is a zero based number with a range of 0 - (XTC_DEVICE_TIMER_COUNT - 1).

Returns
  None.

Note
  None.

References XTmrCtr::BaseAddress, XTmrCtr::IsReady, XTmrCtr::IsStartedTmrCtr0, XTmrCtr::IsStartedTmrCtr1, XTC_CSR_ENABLE_TMR_MASK, XTC_DEVICE_TIMER_COUNT, XTC_TCSR_OFFSET, XTmrCtr_ReadReg, and XTmrCtr_WriteReg.

Referenced by TmrCtrCascadeIntrExample(), TmrCtrFastIntrExample(), TmrCtrIntrExample(), XTmrCtr_PwmConfigure(), and XTmrCtr_PwmDisable().

## Variable Documentation

XTmrCtr_Config XTmrCtr_ConfigTable[XPAR_XTMRCTR_NUM_INSTANCES]

The timer/counter configuration table, sized by the number of instances defined in xparameters.h.

XTmrCtr_Config XTmrCtr_ConfigTable[]

Initial value:
= {
}

The timer/counter configuration table, sized by the number of instances defined in xparameters.h.