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| v_mix Xilinx SDK Drivers API Documentation

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v_mix Documentation

This header file contains layer 2 API's of the mixer core driver.The functions contained herein provides a high level implementation of features provided by the IP, abstracting away the register level details from the user

Mixer IP Features

The Mixer IP supports following features

- AXI4-S Master Layer
- Up to 8 optional layers (user configurable)
- Each layer can be configured as Streaming or Memory (build time)
  - Color format for each layer is set at build time
- 1 Logo Layer (optional)
- Logo Layer Color Key feature (optional)
- Alpha Level (8 bit) per layer (optional)
- Scale (1x, 2x, 4x) capability per layer (optional)

Dependency

This driver makes use of the video enumerations and data types defined in the Xilinx Video Common Driver (video_common_vX.x) and as such the common driver must be included as dependency to compile this driver

Initialization & Configuration

The device driver enables higher layer software (e.g., an application) to communicate with the mixer core.

Driver is built with layered architecture

- Layer 1 provides API's to peek/poke registers at HW level.
- Layer 2 provides API's that abstract sub-core functionality, providing an easy to use feature interface

Before using the layer-2 API's user must initialize the core by calling API XVMix_Initialize(). This function will look for a configuration structure for the device and initialize it to defined HW settings. It is recommended user always make use of Layer-2 API to interact with this core. Advanced users always have the capability to directly interact with the IP core using Layer-1 API's that perform low level register peek/poke.

Pre-Requisite's

If optional layers are included in the IP then

- Application must set the memory address for each layer using provided API Address must be aligned to memory width. This can be computed with following equation Align = 2 * PPC * 4 Bytes (where PPC is the Pixels/Clock selected in IP configuration)
- When setting up layer window the Stride must be provided in Bytes and must be aligned to respective color space of the layer. This can be computed with following equation StrideInBytes = (Window_Width * (YUV422 ? 2 : 4))

Interrupts

Driver is configured to operate both in polling as well as interrupt mode.

- To use interrupt based processing, application must set up the system's interrupt controller and connect the XVMix_InterruptHandler function to service interrupts. Next interrupts must be enabled using the provided API. When an interrupt occurs, ISR will confirm if frame processing is is done. If call back is registered such function will be called and application can apply new setting updates here. Subsequently next frame processing will be triggered with new settings.
- To use polling method disable interrupts using the provided API. Doing so will configure the IP to keep processing frames without sw intervention.
- Polling mode is the default configuration set during driver initialization

Virtual Memory

This driver supports Virtual Memory. The RTOS is responsible for calculating the correct device base address in Virtual Memory space.

Threads

This driver is not thread safe. Any needs for threads or thread mutual exclusion must be satisfied by the layer above this driver.

    MODIFICATION HISTORY:

    Ver   Who    Date     Changes

    1.00  rco   10/29/15   Initial Release
                12/14/15   Added interrupt handler
                02/12/16   Added Stride and memory Alignement requirements
                02/25/16   Replace GetColorFromat function with a macro
                03/08/16   Replace GetColorFromat macro with function and added
                           master layer video format
    2.00  rco   07/21/16   Used UINTPTR instead of u32 for Baseaddress
                08/03/16   Add Logo Pixel Alpha support
    3.00  vyc   10/04/17   Add second buffer pointer for semi-planar formats
    4.00  vyc   04/04/18   Add 8th overlayer
                           Move logo layer enable from bit 8 to bit 15