canfd: Canfd_v2_2

| canfd Xilinx SDK Drivers API Documentation

- Overview
- Data Structures
- APIs
- File List
- Examples

Data Structures | Macros | Typedefs | Functions
Canfd_v2_2

## Data Structures
struct | XCanFd_Config
| This typedef contains configuration information for a device. More...
struct | XCanFd
| The XCanFd driver instance data. More...

## Macros
#define | XCanFd_IsTxDone(InstancePtr)
| This macro checks if the transmission is complete. More...
#define | XCanFd_CreateIdValue(StandardId, SubRemoteTransReq, IdExtension, ExtendedId, RemoteTransReq)
| This macro calculates CAN message identifier value given identifier field values. More...
#define | XCanFd_Create_CanFD_DlcValue(DataLengCode)
| This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames). More...
#define | XCanFd_Create_CanFD_Dlc_BrsValue(DataLengCode)
| This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames) and Setting the BRS. More...
#define | XCanFd_CreateDlcValue(DataLengCode) ((((DataLengCode) << XCANFD_DLCR_DLC_SHIFT) & XCANFD_DLCR_DLC_MASK))
| This macro calculates value for Data Length Code register given Data Length Code value i.e Only Stand. More...
#define | XCanFd_IsBufferTransmitted(InstancePtr, TxBuffer)
| This macro checks whether Particular Buffer is Transmitted or not. More...
#define | MAKE_CURRENTBUFFER_ZERO(InstancePtr)
| This macro initializes CurrentBuffer[32] to zeros. More...
#define | XCANFD_TXID_OFFSET(FreeBuffer) (XCANFD_TXFIFO_0_BASE_ID_OFFSET+(FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the TXBUFFER ID Offset. More...
#define | XCANFD_TXDLC_OFFSET(FreeBuffer) (XCANFD_TXFIFO_0_BASE_DLC_OFFSET+(FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the TXBUFFER DLC Offset. More...
#define | XCANFD_TXDW_OFFSET(FreeBuffer) (XCANFD_TXFIFO_0_BASE_DW0_OFFSET+(FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the TXBUFFER DW Offset. More...
#define | XCANFD_TXEID_OFFSET(TXEVENTIndex) (XCANFD_TXEFIFO_0_BASE_ID_OFFSET+(TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))
| This macro Returns the TX Event Buffer ID Offset. More...
#define | XCANFD_TXEDLC_OFFSET(TXEVENTIndex) (XCANFD_TXEFIFO_0_BASE_DLC_OFFSET+(TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))
| This macro Returns the TX Event Buffer DLC Offset. More...
#define | XCANFD_RXID_OFFSET(ReadIndex) (XCANFD_RXFIFO_0_BASE_ID_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the RXBUFFER ID Offset. More...
#define | XCANFD_RXDLC_OFFSET(ReadIndex) (XCANFD_RXFIFO_0_BASE_DLC_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the RXBUFFER DLC Offset. More...
#define | XCANFD_RXDW_OFFSET(ReadIndex) (XCANFD_RXFIFO_0_BASE_DW0_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the RXBUFFER DW Offset. More...
#define | XCANFD_FIFO_1_RXID_OFFSET(ReadIndex) (XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the RXBUFFER ID Offset for FIFO 1. More...
#define | XCANFD_FIFO_1_RXDLC_OFFSET(ReadIndex) (XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the RXBUFFER DLC Offset for FIFO 1. More...
#define | XCANFD_FIFO_1_RXDW_OFFSET(ReadIndex) (XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the RXBUFFER DW Offset for FIFO 1. More...
#define | XCANFD_RCS_OFFSET(NoCtrlStatus) (XCANFD_RCS0_OFFSET+(NoCtrlStatus*4))
| This macro Returns the RCS Register Offset. More...
#define | XCANFD_AFMR_OFFSET(FilterIndex)
| This macro Returns the AFMR Register Offset. More...
#define | XCANFD_AFIDR_OFFSET(FilterIndex)
| This macro Returns the AFIDR Registger Offset. More...
#define | XCANFD_MAILBOX_MASK_OFFSET(BufferNr) (XCANFD_MAILBOX_RB_MASK_BASE_OFFSET+(BufferNr*4))
| This macro Returns the MAILBOX MODE RXMASK Offset. More...
#define | XCANFD_MAILBOX_ID_OFFSET(BufferNr) (XCANFD_RXFIFO_0_BASE_ID_OFFSET+(BufferNr*XCANFD_MAX_FRAME_SIZE))
| This macro Returns the MAILBOX MODE ID Offset. More...
#define | XCANFD_GET_RX_MODE(InstancePtr) InstancePtr->CanFdConfig.Rx_Mode
| This macro Returns Design mode 1- Mailbox 0- Sequential. More...
#define | XCanFd_Reset(InstancePtr)
| This function resets the CAN device. More...
#define | XCanFd_GetBusErrorStatus(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ESR_OFFSET)
| This function reads Error Status value from Error Status Register (ESR). More...
#define | XCanFd_GetStatus(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_SR_OFFSET)
| This function returns Status value from Status Register (SR). More...
#define | XCanFd_ClearBusErrorStatus(InstancePtr, Mask)
| This function clears Error Status bit(s) previously set in Error Status Register (ESR). More...
#define | XCanFd_Get_Tranceiver_Delay_CompensationOffset(InstancePtr)
| This function returns the Tranceive delay comensation Offset. More...
#define | XCanFd_ClearTImeStamp_Count(InstancePtr)
| This function Clears Time Stamp Counter Value. More...
#define | XCanFd_GetTImeStamp_Count(InstancePtr)
| This function returns Time Stamp Counter Value. More...
#define | XCanFd_GetRxIntrWatermark(InstancePtr)
| This routine returns the Rx water Mark threshold Value. More...
#define | XCanFd_InterruptGetEnabled(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_IER_OFFSET)
| This routine returns enabled interrupt(s). More...
#define | XCanFd_InterruptGetStatus(InstancePtr) XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ISR_OFFSET)
| This routine returns interrupt status read from Interrupt Status Register. More...
#define | XCanFd_Get_NofRxBuffers(InstancePtr)
| This routine returns Number of RCS registers to access because in Mail box mode user can configure 48,32,16 Rx Buffers. More...
#define | XCanFd_Get_RxBuffers(InstancePtr) InstancePtr->CanFdConfig.NumofRxMbBuf;
| This routine returns Number of RxBuffers user can Desing RxBuffers as 48,32,16. More...
#define | XCanFD_Check_TrrVal_Set_Bit(Var) Var&(-Var)
| This routine returns Number with right most bit set from the target input value. More...
#define | XCanFD_Check_TrrVal_Set_Bit(Var) Var&(-Var)
| This routine returns Number with right most bit set from the target input value. More...
#define | XCanFd_ReadReg(BaseAddress, RegOffset) Xil_In32((BaseAddress) + (RegOffset))
| This macro reads the given register. More...
#define | XCanFd_WriteReg(BaseAddress, RegOffset, Data) Xil_Out32((BaseAddress) + (RegOffset), (Data))
| This macro writes the given register. More...

## Typedefs
typedef void(* | XCanFd_SendRecvHandler )(void *CallBackRef)
| Callback type for frame sending and reception interrupts. More...
typedef void(* | XCanFd_ErrorHandler )(void *CallBackRef, u32 ErrorMask)
| Callback type for error interrupt. More...
typedef void(* | XCanFd_EventHandler )(void *CallBackRef, u32 Mask)
| Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt. More...

## Functions
int | XCanFd_CfgInitialize (XCanFd *InstancePtr, XCanFd_Config *ConfigPtr, UINTPTR EffectiveAddr)
| This routine initializes a specific XCanFd instance/driver. More...
u32 | XCanFd_AcceptFilterGetEnabled (XCanFd *InstancePtr)
| This function returns enabled acceptance filters. More...
u8 | XCanFd_GetMode (XCanFd *InstancePtr)
| This routine returns current operation mode the CAN device is in. More...
void | XCanFd_EnterMode (XCanFd *InstancePtr, u8 OperationMode)
| This function allows the CAN device to enter one of the following operation modes: More...
void | XCanFd_GetBusErrorCounter (XCanFd *InstancePtr, u8 *RxErrorCount, u8 *TxErrorCount)
| This function reads Receive and Transmit error counters. More...
int | XCanFd_Send (XCanFd *InstancePtr, u32 *FramePtr, u32 *TxBufferNumber)
| This function sends a CAN/CANFD Frame. More...
int | XCanFd_Addto_Queue (XCanFd *InstancePtr, u32 *FramePtr, u32 *TxBufferNumber)
| This function writes the Data into specific Buffer.we have 32 TxBuffers we can Add data to each Buffer using this routine.This routine won't transmit the data. More...
u32 | XCanFd_Recv_Sequential (XCanFd *InstancePtr, u32 *FramePtr)
| This function receives a CAN/CAN FD Frame. More...
u32 | XCanFd_Recv_TXEvents_Sequential (XCanFd *InstancePtr, u32 *FramePtr)
| This function receives a CAN/CAN FD TX Events. More...
u32 | XCanFd_Recv_Mailbox (XCanFd *InstancePtr, u32 *FramePtr)
| This function receives a CAN Frame in MAIL BOX Mode. More...
u32 | XCanFd_RxBuff_MailBox_Active (XCanFd *InstancePtr, u32 RxBuffer)
| This function sets an RxBuffer to Active State.In Mailbox Mode configuration we can set each buffer to receive with specific Id and Mask.inorder compare we need to first Activate the Buffer.Maximum number of RxBuffers depends on Design.Range 48,32,16. More...
u32 | XCanFd_Set_MailBox_IdMask (XCanFd *InstancePtr, u32 RxBuffer, u32 MaskValue, u32 IdValue)
| This function sets the Id and Mask for an RxBuffer to participate in Id match.if a packet is received with an id which is equal to id we configured, then it is stored in RxBuffer. More...
u32 | XCanFd_RxBuff_MailBox_DeActive (XCanFd *InstancePtr, u32 RxBuffer)
| This function sets an RxBuffer to InActive State.if we change a buffer to InActive state, then Rx Packet won't store into that buffer, even the Id is matched. More...
int | XCanFd_TxBuffer_Cancel_Request (XCanFd *InstancePtr, u32 BufferNumber)
| This function Cancels a CAN/CAN FD Frame which was already initiated for transmission.This function first checks TRR Bit based on BufferNumber. More...
void | XCanFd_AcceptFilterEnable (XCanFd *InstancePtr, u32 FilterIndexMask)
| This routine enables the acceptance filters. More...
void | XCanFd_AcceptFilterDisable (XCanFd *InstancePtr, u32 FilterIndexMask)
| This routine disables the acceptance filters. More...
int | XCanFd_AcceptFilterSet (XCanFd *InstancePtr, u32 FilterIndex, u32 MaskValue, u32 IdValue)
| This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter. More...
void | XCanFd_AcceptFilterGet (XCanFd *InstancePtr, u32 FilterIndex, u32 *MaskValue, u32 *IdValue)
| This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter. More...
XCanFd_Config * | XCanFd_GetConfig (unsigned int InstanceIndex)
| This function looks for the device configuration based on the device index. More...
int | XCanFd_GetDlc2len (u32 Dlc, u32 Edl)
| This function returns Data Length Code(in Bytes),we need to pass DLC Field value in DLC Register. More...
u8 | XCanFd_GetLen2Dlc (int len)
| This function returns Data Length Code of 4bits,we need to pass length in bytes. More...
u32 | XCanFd_GetFreeBuffer (XCanFd *InstancePtr)
| This Routine returns the Free Buffer out of 32 Transmit Buffers. More...
int | XCanFd_Send_Queue (XCanFd *InstancePtr)
| This routine sends queue of buffers,when added to queue using Addto_Queue() Basically this will trigger the TRR Bit(s).This routine can be used when user want to send multiple packets at a time. More...
void | XCanFd_PollQueue_Buffer (XCanFd *InstancePtr)
| This function Polls the TxBuffer(s) whether it is transmitted or not. More...
int | XCanFd_GetNofMessages_Stored_Rx_Fifo (XCanFd *InstancePtr, u8 fifo_no)
| This function returns Number of messages Stored. More...
int | XCanFd_GetNofMessages_Stored_TXE_FIFO (XCanFd *InstancePtr)
| This function returns Number of messages Stored in TX Event FIFO The FSR Register has Field called FL. More...
void | XCanFd_Enable_Tranceiver_Delay_Compensation (XCanFd *InstancePtr)
| This function Enables the Transceiver delay compensation. More...
void | XCanFd_Set_Tranceiver_Delay_Compensation (XCanFd *InstancePtr, u32 TdcOffset)
| This function Sets the Transceiver delay compensation offset. More...
void | XCanFd_Disable_Tranceiver_Delay_Compensation (XCanFd *InstancePtr)
| This function Disables the Transceiver delay compensation. More...
XCanFd_Config * | XCanFd_LookupConfig (u16 DeviceId)
| This function looks for the device configuration based on the unique device ID. More...
int | XCanFd_SetBaudRatePrescaler (XCanFd *InstancePtr, u8 Prescaler)
| This routine sets Baud Rate Prescaler value in Arbitration Phse. More...
u8 | XCanFd_GetBaudRatePrescaler (XCanFd *InstancePtr)
| This routine gets Baud Rate Prescaler value. More...
u8 | XCanFd_GetFBaudRatePrescaler (XCanFd *InstancePtr)
| This routine gets Baud Rate Prescaler value in Data Phase. More...
int | XCanFd_SetBitTiming (XCanFd *InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u16 TimeSegment1)
| This routine sets Bit time. More...
void | XCanFd_GetBitTiming (XCanFd *InstancePtr, u8 *SyncJumpWidth, u8 *TimeSegment2, u8 *TimeSegment1)
| This routine gets Bit time. More...
void | XCanFd_GetFBitTiming (XCanFd *InstancePtr, u8 *SyncJumpWidth, u8 *TimeSegment2, u8 *TimeSegment1)
| This routine gets Bit time in Data Phase. More...
int | XCanFd_SetFBaudRatePrescaler (XCanFd *InstancePtr, u8 Prescaler)
| This routine sets Baud Rate Prescaler value in Data Phase. More...
int | XCanFd_SetFBitTiming (XCanFd *InstancePtr, u8 SyncJumpWidth, u8 TimeSegment2, u8 TimeSegment1)
| This routine sets Bit time in Data Phase. More...
void | XCanFd_SetBitRateSwitch_DisableNominal (XCanFd *InstancePtr)
| This routine Disables the BRSD bit, so that Bit Rate Switch can be happen with Nominal or configured rate. More...
void | XCanFd_SetBitRateSwitch_EnableNominal (XCanFd *InstancePtr)
| This routine sets the Bit Rate Switch with nominal bit rate. More...
u32 | XCanFd_SetRxIntrWatermark (XCanFd *InstancePtr, s8 Threshold)
| This routine sets the Rx Full threshold in the Watermark Interrupt Register. More...
u32 | XCanFd_SetRxIntrWatermarkFifo1 (XCanFd *InstancePtr, s8 Threshold)
| This routine sets the Rx Full threshold in the Watermark Interrupt Register. More...
u32 | XCanFd_SetTxEventIntrWatermark (XCanFd *InstancePtr, u8 Threshold)
| This routine sets the TX Events Full threshold in the Watermark Interrupt Register. More...
u32 | XCanFd_SetRxFilterPartition (XCanFd *InstancePtr, u8 FilterPartition)
| This routine sets the Receive filter partition in the Watermark Interrupt Register. More...
int | XCanFd_SelfTest (XCanFd *InstancePtr)
| This function runs a self-test on the CAN driver/device. More...
void | XCanFd_InterruptEnable (XCanFd *InstancePtr, u32 Mask)
| This routine enables interrupt(s). More...
void | XCanFd_InterruptDisable (XCanFd *InstancePtr, u32 Mask)
| This routine disables interrupt(s). More...
void | XCanFd_InterruptClear (XCanFd *InstancePtr, u32 Mask)
| This function clears interrupt(s). More...
void | XCanFd_IntrHandler (void *InstancePtr)
| This routine is the interrupt handler for the CAN driver. More...
int | XCanFd_SetHandler (XCanFd *InstancePtr, u32 HandlerType, void *CallBackFunc, void *CallBackRef)
| This routine installs an asynchronous callback function for the given HandlerType: More...
void | XCanFd_InterruptEnable_ReadyRqt (XCanFd *InstancePtr, u32 Mask)
| This routine enables TxBuffer Ready Request interrupt(s). More...
void | XCanFd_InterruptEnable_CancelRqt (XCanFd *InstancePtr, u32 Mask)
| This routine enables TxBuffer Cancellation interrupt(s). More...
void | XCanFd_InterruptDisable_ReadyRqt (XCanFd *InstancePtr, u32 Mask)
| This routine disables TxBuffer Ready Request interrupt(s). More...
void | XCanFd_InterruptDisable_CancelRqt (XCanFd *InstancePtr, u32 Mask)
| This routine disables the TxBuffer Cancel Request interrupt(s). More...
void | XCanFd_InterruptEnable_RxBuffFull (XCanFd *InstancePtr, u32 Mask, u32 RxBuffNumber)
| This routine Enables the RxBuffer Full interrupt(s) in MailBox Mode. More...
void | XCanFd_InterruptDisable_RxBuffFull (XCanFd *InstancePtr, u32 Mask, u32 RxBuffNumber)
| This routine disables the RxBuffer Full interrupt(s) in MailBox Mode. More...

## CAN normal Bit rate fields
#define | XCANFD_MAX_SJW_VALUE 0x80
#define | XCANFD_MAX_TS1_VALUE 0x100
#define | XCANFD_MAX_TS2_VALUE 0x80

## CAN Fast Bit rate fields
#define | XCANFD_MAX_F_SJW_VALUE 0x10
#define | XCANFD_MAX_F_TS1_VALUE 0x20
#define | XCANFD_MAX_F_TS2_VALUE 0x10

## CAN operation modes
#define | XCANFD_MODE_CONFIG 0x00000001
| Configuration mode. More...
#define | XCANFD_MODE_NORMAL 0x00000002
| Normal mode. More...
#define | XCANFD_MODE_LOOPBACK 0x00000004
| Loop Back mode. More...
#define | XCANFD_MODE_SLEEP 0x00000008
| Sleep mode. More...
#define | XCANFD_MODE_SNOOP 0x00000010
| Snoop mode. More...
#define | XCANFD_MODE_ABR 0x00000020
| Auto Bus-Off Recovery. More...
#define | XCANFD_MODE_SBR 0x00000040
| Starut Bus-Off Recovery. More...
#define | XCANFD_MODE_PEE 0x00000080
| Protocol Exception mode. More...
#define | XCANFD_MODE_DAR 0x0000000A
| Disable Auto Retransmission mode. More...
#define | XCANFD_MODE_BR 0x0000000B
| Bus-Off Recovery Mode. More...
#define | XCANFD_RX_FIFO_0 0
| Selection for RX Fifo 0. More...
#define | XCANFD_RX_FIFO_1 1
| Selection for RX Fifo 1. More...

## Callback identifiers used as parameters to XCanFd_SetHandler()
#define | XCANFD_HANDLER_SEND 1
| Handler type for frame sending interrupt. More...
#define | XCANFD_HANDLER_RECV 2
| Handler type for frame reception interrupt. More...
#define | XCANFD_HANDLER_ERROR 3
| Handler type for error interrupt. More...
#define | XCANFD_HANDLER_EVENT 4
| Handler type for all other interrupts. More...

## Register offsets for the CAN. Each register is 32 bits.
#define | XCANFD_SRR_OFFSET 0x000
| Software Reset Register. More...
#define | XCANFD_MSR_OFFSET 0x004
| Mode Select Register. More...
#define | XCANFD_BRPR_OFFSET 0x008
| Baud Rate Prescaler Register. More...
#define | XCANFD_BTR_OFFSET 0x00C
| Bit Timing Register. More...
#define | XCANFD_ECR_OFFSET 0x010
| Error Counter Register. More...
#define | XCANFD_ESR_OFFSET 0x014
| Error Status Register. More...
#define | XCANFD_SR_OFFSET 0x018
| Status Register. More...
#define | XCANFD_ISR_OFFSET 0x01C
| Interrupt Status Register. More...
#define | XCANFD_IER_OFFSET 0x020
| Interrupt Enable Register. More...
#define | XCANFD_ICR_OFFSET 0x024
| Interrupt Clear Register. More...
#define | XCANFD_F_BRPR_OFFSET 0x088
| Data Phase Baud Rate Prescalar Register. More...
#define | XCANFD_F_BTR_OFFSET 0x08C
| Data Phase Bit Timing Register. More...
#define | XCANFD_TRR_OFFSET 0x090
| Tx Buffer Ready Request Register. More...
#define | XCANFD_IETRS_OFFSET 0x094
| Tx Buffer Ready Request Served Interrupt Enable Register. More...
#define | XCANFD_TCR_OFFSET 0x098
| Tx Buffer Cancel Request Register. More...
#define | XCANFD_IETCS_OFFSET 0x09C
| Tx Buffer Cancel Request Served Interrupt Enable Register. More...
#define | XCANFD_RSD0_OFFSET 0x0A0
| Reserved. More...
#define | XCANFD_RSD1_OFFSET 0x0A4
| Reserved. More...
#define | XCANFD_RSD2_OFFSET 0x0A8
| Reserved. More...
#define | XCANFD_RSD3_OFFSET 0x0AC
| Reserved. More...

## Mail box mode registers
#define | XCANFD_RCS0_OFFSET 0x0B0
| Rx Buffer Control Status 0 Register. More...
#define | XCANFD_RCS1_OFFSET 0x0B4
| Rx Buffer Control Status 1 Register. More...
#define | XCANFD_RCS2_OFFSET 0x0B8
| Rx Buffer Control Status 2 Register. More...
#define | XCANFD_RCS_HCB_MASK 0xFFFF
| Rx Buffer Control Status Register Host Control Bit Mask. More...
#define | XCANFD_RXBFLL1_OFFSET 0x0C0
| Rx Buffer Full Interrupt Enable Register. More...
#define | XCANFD_RXBFLL2_OFFSET 0x0C4
| Rx Buffer Full Interrupt Enable Register. More...
#define | XCANFD_MAILBOX_RB_MASK_BASE_OFFSET 0x2F00
| Mailbox RxBuffer Mask Register. More...
#define | XCANFD_MAILBOX_NXT_RB 4
#define | XCANFD_MBRXBUF_MASK 0x0000FFFF

## TxBuffer Element ID Registers
Tx Message Buffer Element Start Address - 0x0100 (2304 Bytes) End Address - 0x09FF
#define | XCANFD_DLCR_TIMESTAMP_MASK 0x0000FFFF
| Dlc Register TimeStamp Mask. More...
#define | XCANFD_TXFIFO_0_BASE_ID_OFFSET 0x0100
| Tx Message Buffer Element 0 ID Register. More...

## TxBuffer Element DLC Registers
#define | XCANFD_TXFIFO_0_BASE_DLC_OFFSET 0x0104
| Tx Message Buffer Element 0 DLC Register. More...

## TxBuffer Element DW Registers
#define | XCANFD_TXFIFO_0_BASE_DW0_OFFSET 0x0108
| Tx Message Buffer Element 0 DW Register. More...

## TXEVENT Buffer Element ID Registers
#define | XCANFD_TXEFIFO_0_BASE_ID_OFFSET 0x2000
| Tx Event Message Buffer Element 0 ID Register. More...

## TXEVENT Buffer Element DLC Registers
#define | XCANFD_TXEFIFO_0_BASE_DLC_OFFSET 0x2004
| Tx Event Message Buffer Element 0 DLC Register. More...

## Rx Message Buffer Element ID Registers.
Start Address - 0x1100 (2304 Bytes) End Address - 0x19FF
#define | XCANFD_RXFIFO_0_BASE_ID_OFFSET 0x2100
| Rx Message Buffer Element 0 ID Register. More...

## Rx Message Buffer Element DLC Registers.
#define | XCANFD_RXFIFO_0_BASE_DLC_OFFSET 0x2104
| Rx Message Buffer Element 0 DLC Register. More...

## Rx Message Buffer Element DW Registers.
#define | XCANFD_RXFIFO_0_BASE_DW0_OFFSET 0x2108
| Rx Message Buffer Element 0 DW Register. More...

## Rx Message Buffer Element FIFO 1 ID Registers.
Start Address - 0x4100 End Address - 0x52b8
#define | XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET 0x4100
| Rx Message Buffer Element 0 ID Register. More...

## Rx Message Buffer Element FIFO 1 DLC Registers.
Start Address - 0x4104 End Address - 0x52bc
#define | XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET 0x4104
| Rx Message Buffer Element 0 DLC Register. More...

## Rx Message Buffer Element FIFO 1 SW Registers.
Start Address - 0x4108 End Address - 0x52c0
#define | XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET 0x4108
| Rx Message Buffer Element 0 DW Register. More...

## Rx Message Buffer Element ID,DLC,DW Sizes.
#define | XCANFD_RXFIFO_NEXTID_OFFSET 72
| Rx Message Buffer Element Next ID AT Offset. More...
#define | XCANFD_RXFIFO_NEXTDLC_OFFSET 72
| Rx Message Buffer Element Next DLC AT Offset. More...
#define | XCANFD_RXFIFO_NEXTDW_OFFSET 72
| Rx Message Buffer Element Next DW AT Offset. More...

## EDL and BRS Masks.
#define | XCANFD_DLCR_EDL_MASK 0x08000000
| EDL Mask in DLC Register. More...
#define | XCANFD_DLCR_BRS_MASK 0x04000000
| BRS Mask in DLC Register. More...

## Acceptance Filter Mask Registers
#define | XCANFD_AFMR_BASE_OFFSET 0x0A00
| Acceptance Filter Mask Register. More...
#define | XCANFD_AFIDR_BASE_OFFSET 0x0A04
| Acceptance Filter ID Register. More...
#define | XCANFD_AFMR_NXT_OFFSET 8
#define | XCANFD_AFIDR_NXT_OFFSET 8
#define | XCANFD_AFR_OFFSET 0x0E0
| Acceptance Filter Register. More...
#define | XCANFD_FSR_OFFSET 0x0E8
| Receive FIFO Status Register. More...
#define | XCANFD_NOOF_AFR 32
| Number Of Acceptance FIlter Registers. More...
#define | XCANFD_WIR_OFFSET 0x0EC
| Rx FIFO Water Mark Register. More...
#define | XCANFD_WIR_MASK 0x0000003F
| Rx FIFO Full watermark Mask. More...
#define | XCANFD_WM_FIFO0_THRESHOLD 63
#define | XCANFD_WMR_RXFWM_1_SHIFT 8
| RX FIFO 1 Full Watermark Mask. More...
#define | XCANFD_WMR_RXFP_MASK 0x001F0000
| Receive filter partition Mask. More...
#define | XCANFD_WMR_RXFP_SHIFT 16
| Receive filter partition Mask. More...
#define | XCANFD_TXEVENT_WIR_OFFSET 0x000000A4
#define | XCANFD_TXEVENT_WIR_MASK 0x0F
#define | XCANFD_TIMESTAMPR_OFFSET 0x0028
| Time Stamp Register. More...
#define | XCANFD_CTS_MASK 0x00000001
| Time Stamp Counter Clear. More...
#define | XCANFD_DAR_MASK 0x00000010
| Disable AutoRetransmission. More...

## Software Reset Register
#define | XCANFD_SRR_CEN_MASK 0x00000002
| Can Enable Mask. More...
#define | XCANFD_SRR_SRST_MASK 0x00000001
| Reset Mask. More...

## Mode Select Register
#define | XCANFD_MSR_LBACK_MASK 0x00000002
| Loop Back Mode Select Mask. More...
#define | XCANFD_MSR_SLEEP_MASK 0x00000001
| Sleep Mode Select Mask. More...
#define | XCANFD_MSR_BRSD_MASK 0x00000008
| Bit Rate Switch Select Mask. More...
#define | XCANFD_MSR_DAR_MASK 0x00000010
| Disable Auto-Retransmission Select Mask. More...
#define | XCANFD_MSR_SNOOP_MASK 0x00000004
| Snoop Mode Select Mask. More...
#define | XCANFD_MSR_DPEE_MASK 0x00000020
| Protocol Exception Event Mask. More...
#define | XCANFD_MSR_SBR_MASK 0x00000040
| Start Bus-Off Recovery Mask. More...
#define | XCANFD_MSR_ABR_MASK 0x00000080
| Auto Bus-Off Recovery Mask. More...
#define | XCANFD_MSR_CONFIG_MASK 0x000000F8
| Configuration Mode Mask. More...

## Baud Rate Prescaler register
#define | XCANFD_BRPR_BRP_MASK 0x000000FF
| Baud Rate Prescaler Mask. More...

## Bit Timing Register
#define | XCANFD_BTR_SJW_MASK 0x007F0000
| Sync Jump Width Mask. More...
#define | XCANFD_BTR_TS2_MASK 0x00007F00
| Time Segment 2 Mask. More...
#define | XCANFD_BTR_TS1_MASK 0x000000FF
| Time Segment 1 Mask. More...
#define | XCANFD_F_BRPR_TDCMASK 0x00003F00
| Transceiver Delay compensation Offset Mask. More...
#define | XCANFD_BTR_TS2_SHIFT 8
| Time Segment 2 Shift. More...
#define | XCANFD_BTR_SJW_SHIFT 16
| Sync Jump Width Shift. More...
#define | XCANFD_F_BRPR_TDC_ENABLE_MASK 0x00010000
| Transceiver Delay compensation Enable Maskk. More...

## Fast Bit Timing Register
#define | XCANFD_F_BTR_SJW_MASK 0x000F0000
| Sync Jump Width Mask. More...
#define | XCANFD_F_BTR_TS2_MASK 0x00000F00
| Time Segment 2 Mask. More...
#define | XCANFD_F_BTR_TS1_MASK 0x0000001F
| Time Segment 1 Mask. More...
#define | XCANFD_F_BTR_TS2_SHIFT 8
| Time Segment 2 Shift. More...
#define | XCANFD_F_BTR_SJW_SHIFT 16
| Sync Jump Width Shift. More...

## Error Counter Register
#define | XCANFD_ECR_REC_MASK 0x0000FF00
| Receive Error Counter Mask. More...
#define | XCANFD_ECR_REC_SHIFT 8
| Receive Error Counter Shift. More...
#define | XCANFD_ECR_TEC_MASK 0x000000FF
| Transmit Error Counter Mask. More...

## Error Status Register
#define | XCANFD_ESR_ACKER_MASK 0x00000010
| ACK Error Mask. More...
#define | XCANFD_ESR_BERR_MASK 0x00000008
| Bit Error Mask. More...
#define | XCANFD_ESR_STER_MASK 0x00000004
| Stuff Error Mask. More...
#define | XCANFD_ESR_FMER_MASK 0x00000002
| Form Error Mask. More...
#define | XCANFD_ESR_CRCER_MASK 0x00000001
| CRC Error Mask. More...
#define | XCANFD_ESR_F_BERR_MASK 0x00000800
| F_Bit Error Mask. More...
#define | XCANFD_ESR_F_STER_MASK 0x00000400
| F_Stuff Error Mask. More...
#define | XCANFD_ESR_F_FMER_MASK 0x00000200
| F_Form Error Mask. More...
#define | XCANFD_ESR_F_CRCER_MASK 0x00000100
| F_CRC Error Mask. More...

## Status Register
#define | XCANFD_SR_TDCV_MASK 0x007F0000
| Transceiver Dealy compensation Mask. More...
#define | XCANFD_SR_SNOOP_MASK 0x00001000
| Snoop Mode Mask. More...
#define | XCANFD_SR_ESTAT_MASK 0x00000180
| Error Status Mask. More...
#define | XCANFD_SR_ESTAT_SHIFT 7
| Error Status Shift. More...
#define | XCANFD_SR_ERRWRN_MASK 0x00000040
| Error Warning Mask. More...
#define | XCANFD_SR_BBSY_MASK 0x00000020
| Bus Busy Mask. More...
#define | XCANFD_SR_BIDLE_MASK 0x00000010
| Bus Idle Mask. More...
#define | XCANFD_SR_NORMAL_MASK 0x00000008
| Normal Mode Mask. More...
#define | XCANFD_SR_SLEEP_MASK 0x00000004
| Sleep Mode Mask. More...
#define | XCANFD_SR_LBACK_MASK 0x00000002
| Loop Back Mode Mask. More...
#define | XCANFD_SR_CONFIG_MASK 0x00000001
| Configuration Mode Mask. More...
#define | XCANFD_SR_PEE_CONFIG_MASK 0x00000200
| Protocol Exception Mode Indicator Mask. More...
#define | XCANFD_SR_BSFR_CONFIG_MASK 0x00000400
| Bus-Off recovery Mode Indicator Mask. More...
#define | XCANFD_SR_NISO_MASK 0x00000800
| Non-ISO Core Mask. More...

## Interrupt Status/Enable/Clear Register
#define | XCANFD_IXR_RXBOFLW_BI_MASK 0x3F000000
| Rx Buffer index for Overflow (Mailbox Mode) More...
#define | XCANFD_IXR_RXLRM_BI_MASK 0x00FC0000
| Rx Buffer index for Last Received Message (Mailbox Mode) More...
#define | XCANFD_RXLRM_BI_SHIFT 18
| Rx Buffer Index Shift Value. More...
#define | XCANFD_CSB_SHIFT 16
| Core Status Bit Shift Value. More...
#define | XCANFD_IXR_RXMNF_MASK 0x00020000
| Rx Match Not Finished Intr Mask. More...
#define | XCANFD_IXR_RXBOFLW_MASK 0x00010000
| Rx Buffer Overflow interrupt Mask (Mailbox mode) More...
#define | XCANFD_IXR_RXRBF_MASK 0x00008000
| Rx Buffer Full Interrupt Mask (Mailbox mode) More...
#define | XCANFD_IXR_TXCRS_MASK 0x00004000
| Tx Cancellation Request Served Interrupt Mask. More...
#define | XCANFD_IXR_TXRRS_MASK 0x00002000
| Tx Buffer Ready Request Served Interrupt Mask. More...
#define | XCANFD_IXR_RXFWMFLL_MASK 0x00001000
| Rx Watermark Full interrupt Mask (FIFO mode) More...
#define | XCANFD_IXR_WKUP_MASK 0x00000800
| Wake up Interrupt Mask. More...
#define | XCANFD_IXR_SLP_MASK 0x00000400
| Sleep Interrupt Mask. More...
#define | XCANFD_IXR_BSOFF_MASK 0x00000200
| Bus Off Interrupt Mask. More...
#define | XCANFD_IXR_ERROR_MASK 0x00000100
| Error Interrupt Mask. More...
#define | XCANFD_IXR_RXFOFLW_MASK 0x00000040
| RX FIFO Overflow Intr Mask. More...
#define | XCANFD_IXR_RXOK_MASK 0x00000010
| New Message Received Intr. More...
#define | XCANFD_IXR_TXOK_MASK 0x00000002
| TX Successful Interrupt Mask. More...
#define | XCANFD_IXR_ARBLST_MASK 0x00000001
| Arbitration Lost Intr Mask. More...
#define | XCANFD_IXR_PEE_MASK 0x00000004
| Protocol Exception Intr Mask. More...
#define | XCANFD_IXR_BSRD_MASK 0x00000008
| Bus-Off recovery done Intr Mask. More...
#define | XCANFD_IXR_TSCNT_OFLW_MASK 0x00000020
| Timestamp overflow Mask. More...
#define | XCANFD_IXR_RXFOFLW_1_MASK 0x00008000
| RX FIFO 1 Overflow Intr Mask. More...
#define | XCANFD_IXR_RXFWMFLL_1_MASK 0x00010000
| Rx Watermark Full interrupt Mask for FIFO 1. More...
#define | XCANFD_IXR_TXEOFLW_MASK 0x40000000
| TX Event FIFO Intr Mask. More...
#define | XCANFD_IXR_TXEWMFLL_MASK 0x80000000
| TX Event FIFO Watermark Full Intr Mask. More...
#define | XCANFD_IXR_ALL

## Transmit Ready request All Mask
#define | XCANFD_TRR_MASK 0xFFFFFFFF

## CAN Frame Identifier (TX High Priority Buffer/TX/RX/Acceptance Filter
Mask/Acceptance Filter ID)
#define | XCANFD_IDR_ID1_MASK 0xFFE00000
| Standard Messg Ident Mask. More...
#define | XCANFD_IDR_ID1_SHIFT 21
| Standard Messg Ident Shift. More...
#define | XCANFD_IDR_SRR_MASK 0x00100000
| Substitute Remote TX Req. More...
#define | XCANFD_IDR_SRR_SHIFT 20
#define | XCANFD_IDR_IDE_MASK 0x00080000
| Identifier Extension Mask. More...
#define | XCANFD_IDR_IDE_SHIFT 19
| Identifier Extension Shift. More...
#define | XCANFD_IDR_ID2_MASK 0x0007FFFE
| Extended Message Ident Mask. More...
#define | XCANFD_IDR_ID2_SHIFT 1
| Extended Message Ident Shift. More...
#define | XCANFD_IDR_RTR_MASK 0x00000001
| Remote TX Request Mask. More...

## CAN Frame Data Length Code (TX High Priority Buffer/TX/RX)
#define | XCANFD_DLCR_DLC_MASK 0xF0000000
| Data Length Code Mask. More...
#define | XCANFD_DLCR_DLC_SHIFT 28
| Data Length Code Shift. More...
#define | XCANFD_DLCR_MM_MASK 0x00FF0000
| Message Marker Mask. More...
#define | XCANFD_DLCR_MM_SHIFT 16
| Message Marker Shift. More...
#define | XCANFD_DLCR_EFC_MASK 0x01000000
| Event FIFO Control Mask. More...
#define | XCANFD_DLCR_EFC_SHIFT 24
| Event FIFO Control Shift. More...
#define | XCANFD_DLC1 0x10000000
| Data Length Code 1. More...
#define | XCANFD_DLC2 0x20000000
| Data Length Code 2. More...
#define | XCANFD_DLC3 0x30000000
| Data Length Code 3. More...
#define | XCANFD_DLC4 0x40000000
| Data Length Code 4. More...
#define | XCANFD_DLC5 0x50000000
| Data Length Code 5. More...
#define | XCANFD_DLC6 0x60000000
| Data Length Code 6. More...
#define | XCANFD_DLC7 0x70000000
| Data Length Code 7. More...
#define | XCANFD_DLC8 0x80000000
| Data Length Code 8. More...
#define | XCANFD_DLC9 0x90000000
| Data Length Code 9. More...
#define | XCANFD_DLC10 0xA0000000
| Data Length Code 10. More...
#define | XCANFD_DLC11 0xB0000000
| Data Length Code 11. More...
#define | XCANFD_DLC12 0xC0000000
| Data Length Code 12. More...
#define | XCANFD_DLC13 0xD0000000
| Data Length Code 13. More...
#define | XCANFD_DLC14 0xE0000000
| Data Length Code 14. More...
#define | XCANFD_DLC15 0xF0000000
| Data Length Code 15. More...

## Acceptance Filter Register
#define | XCANFD_AFR_UAF_ALL_MASK 0xFFFFFFFF

## CAN Receive FIFO Status Register
#define | XCANFD_FSR_FL_MASK 0x00007F00
| Fill Level Mask FIFO 0. More...
#define | XCANFD_FSR_RI_MASK 0x0000003F
| Read Index Mask FIFO 0. More...
#define | XCANFD_FSR_FL_1_MASK 0x7F000000
| Fill Level Mask FIFO 1. More...
#define | XCANFD_FSR_RI_1_MASK 0x003F0000
| Read Index Mask FIFO 1. More...
#define | XCANFD_FSR_IRI_1_MASK 0x00800000
| Increment Read Index Mask FIFO1. More...
#define | XCANFD_FSR_FL_0_SHIFT 8
| Fill Level Mask FIFO 0. More...
#define | XCANFD_FSR_FL_1_SHIFT 24
| Fill Level Mask FIFO 1. More...
#define | XCANFD_FSR_RI_1_SHIFT 16
| Read Index Mask FIFO 1. More...
#define | XCANFD_FSR_IRI_MASK 0x00000080
| Increment Read Index Mask. More...

## CAN RX FIFO Watermark Register
#define | XCANFD_WMR_RXFWM_1_MASK 0x00003F00
| RX FIFO 1 Full Watermark Mask. More...
#define | XCANFD_WMR_RXFWM_1_MASK 0x00003F00
| RX FIFO 1 Full Watermark Mask. More...
#define | XCANFD_WMR_RXFWM_MASK 0x0000003F
| RX FIFO 0 Full Watermark Mask. More...

## TX Event FIFO Registers
#define | XCANFD_TXE_FWM_OFFSET 0x000000A4
| TX Event FIFO watermark Offset. More...
#define | XCANFD_TXE_FWM_MASK 0x0000001F
| TX Event FIFO watermark Mask. More...
#define | XCANFD_TXE_FSR_OFFSET 0x000000A0
| TX Event FIFO Status Register Offset. More...
#define | XCANFD_TXE_RI_MASK 0x0000001F
| TX Event FIFO Read Index Mask. More...
#define | XCANFD_TXE_IRI_MASK 0x00000080
| TX Event FIFO Increment Read Index Mask. More...
#define | XCANFD_TXE_FL_MASK 0x00001F00
| TX Event FIFO Fill Level Mask. More...
#define | XCANFD_TXE_FL_SHIFT 8
| TX Event FIFO Fill Level Shift. More...
#define | XCANFD_TXE_IRI_SHIFT 7
| TX Event FIFO Increment Read Index SHIFT. More...

## CAN TxBuffer Ready Request Served Interrupt Enable Register Masks
#define | XCANFD_TXBUFFER0_RDY_RQT_MASK 0x00000001
| TxBuffer0 Ready Request Mask. More...
#define | XCANFD_TXBUFFER1_RDY_RQT_MASK 0x00000002
| TxBuffer1 Ready Request Mask. More...
#define | XCANFD_TXBUFFER2_RDY_RQT_MASK 0x00000004
| TxBuffer2 Ready Request Mask. More...
#define | XCANFD_TXBUFFER3_RDY_RQT_MASK 0x00000008
| TxBuffer3 Ready Request Mask. More...
#define | XCANFD_TXBUFFER4_RDY_RQT_MASK 0x00000010
| TxBuffer4 Ready Request Mask. More...
#define | XCANFD_TXBUFFER5_RDY_RQT_MASK 0x00000020
| TxBuffer5 Ready Request Mask. More...
#define | XCANFD_TXBUFFER6_RDY_RQT_MASK 0x00000040
| TxBuffer6 Ready Request Mask. More...
#define | XCANFD_TXBUFFER7_RDY_RQT_MASK 0x00000080
| TxBuffer7 Ready Request Mask. More...
#define | XCANFD_TXBUFFER8_RDY_RQT_MASK 0x00000100
| TxBuffer8 Ready Request Mask. More...
#define | XCANFD_TXBUFFER9_RDY_RQT_MASK 0x00000200
| TxBuffer9 Ready Request Mask. More...
#define | XCANFD_TXBUFFER10_RDY_RQT_MASK 0x00000400
| TxBuffer10 Ready Request Mask. More...
#define | XCANFD_TXBUFFER11_RDY_RQT_MASK 0x00000800
| TxBuffer11 Ready Request Mask. More...
#define | XCANFD_TXBUFFER12_RDY_RQT_MASK 0x00001000
| TxBuffer12 Ready Request Mask. More...
#define | XCANFD_TXBUFFER13_RDY_RQT_MASK 0x00002000
| TxBuffer13 Ready Request Mask. More...
#define | XCANFD_TXBUFFER14_RDY_RQT_MASK 0x00004000
| TxBuffer14 Ready Request Mask. More...
#define | XCANFD_TXBUFFER15_RDY_RQT_MASK 0x00008000
| TxBuffer15 Ready Request Mask. More...
#define | XCANFD_TXBUFFER16_RDY_RQT_MASK 0x00010000
| TxBuffer16 Ready Request Mask. More...
#define | XCANFD_TXBUFFER17_RDY_RQT_MASK 0x00020000
| TxBuffer17 Ready Request Mask. More...
#define | XCANFD_TXBUFFER18_RDY_RQT_MASK 0x00040000
| TxBuffer18 Ready Request Mask. More...
#define | XCANFD_TXBUFFER19_RDY_RQT_MASK 0x00080000
| TxBuffer19 Ready Request Mask. More...
#define | XCANFD_TXBUFFER20_RDY_RQT_MASK 0x00100000
| TxBuffer20 Ready Request Mask. More...
#define | XCANFD_TXBUFFER21_RDY_RQT_MASK 0x00200000
| TxBuffer21 Ready Request Mask. More...
#define | XCANFD_TXBUFFER22_RDY_RQT_MASK 0x00400000
| TxBuffer22 Ready Request Mask. More...
#define | XCANFD_TXBUFFER23_RDY_RQT_MASK 0x00800000
| TxBuffer23 Ready Request Mask. More...
#define | XCANFD_TXBUFFER24_RDY_RQT_MASK 0x01000000
| TxBuffer24 Ready Request Mask. More...
#define | XCANFD_TXBUFFER25_RDY_RQT_MASK 0x02000000
| TxBuffer25 Ready Request Mask. More...
#define | XCANFD_TXBUFFER26_RDY_RQT_MASK 0x04000000
| TxBuffer26 Ready Request Mask. More...
#define | XCANFD_TXBUFFER27_RDY_RQT_MASK 0x08000000
| TxBuffer27 Ready Request Mask. More...
#define | XCANFD_TXBUFFER28_RDY_RQT_MASK 0x10000000
| TxBuffer28 Ready Request Mask. More...
#define | XCANFD_TXBUFFER29_RDY_RQT_MASK 0x20000000
| TxBuffer29 Ready Request Mask. More...
#define | XCANFD_TXBUFFER30_RDY_RQT_MASK 0x40000000
| TxBuffer30 Ready Request Mask. More...
#define | XCANFD_TXBUFFER31_RDY_RQT_MASK 0x80000000
| TxBuffer31 Ready Request Mask. More...
#define | XCANFD_TXBUFFER_ALL_RDY_RQT_MASK 0xFFFFFFFF

## CAN TxBuffer Cancel Request Served Interrupt Enable Register Masks
#define | XCANFD_TXBUFFER0_CANCEL_RQT_MASK 0x00000001
| TxBuffer0 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER1_CANCEL_RQT_MASK 0x00000002
| TxBuffer1 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER2_CANCEL_RQT_MASK 0x00000004
| TxBuffer2 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER3_CANCEL_RQT_MASK 0x00000008
| TxBuffer3 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER4_CANCEL_RQT_MASK 0x00000010
| TxBuffer4 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER5_CANCEL_RQT_MASK 0x00000020
| TxBuffer5 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER6_CANCEL_RQT_MASK 0x00000040
| TxBuffer6 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER7_CANCEL_RQT_MASK 0x00000080
| TxBuffer7 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER8_CANCEL_RQT_MASK 0x00000100
| TxBuffer8 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER9_CANCEL_RQT_MASK 0x00000200
| TxBuffer9 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER10_CANCEL_RQT_MASK 0x00000400
| TxBuffer10 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER11_CANCEL_RQT_MASK 0x00000800
| TxBuffer11 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER12_CANCEL_RQT_MASK 0x00001000
| TxBuffer12 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER13_CANCEL_RQT_MASK 0x00002000
| TxBuffer13 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER14_CANCEL_RQT_MASK 0x00004000
| TxBuffer14 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER15_CANCEL_RQT_MASK 0x00008000
| TxBuffer15 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER16_CANCEL_RQT_MASK 0x00010000
| TxBuffer16 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER17_CANCEL_RQT_MASK 0x00020000
| TxBuffer17 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER18_CANCEL_RQT_MASK 0x00040000
| TxBuffer18 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER19_CANCEL_RQT_MASK 0x00080000
| TxBuffer19 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER20_CANCEL_RQT_MASK 0x00100000
| TxBuffer20 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER21_CANCEL_RQT_MASK 0x00200000
| TxBuffer21 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER22_CANCEL_RQT_MASK 0x00400000
| TxBuffer22 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER23_CANCEL_RQT_MASK 0x00800000
| TxBuffer23 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER24_CANCEL_RQT_MASK 0x01000000
| TxBuffer24 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER25_CANCEL_RQT_MASK 0x02000000
| TxBuffer25 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER26_CANCEL_RQT_MASK 0x04000000
| TxBuffer26 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER27_CANCEL_RQT_MASK 0x08000000
| TxBuffer27 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER28_CANCEL_RQT_MASK 0x10000000
| TxBuffer28 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER29_CANCEL_RQT_MASK 0x20000000
| TxBuffer29 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER30_CANCEL_RQT_MASK 0x40000000
| TxBuffer30 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER31_CANCEL_RQT_MASK 0x80000000
| TxBuffer31 Cancel Request Mask. More...
#define | XCANFD_TXBUFFER_CANCEL_RQT_ALL_MASK 0xFFFFFFFF

## CAN RxBuffer Full Register
#define | XCANFD_RXBUFFER0_FULL_MASK 0x00000001
| RxBuffer0 Full Mask. More...
#define | XCANFD_RXBUFFER1_FULL_MASK 0x00000002
| RxBuffer1 Full Mask. More...
#define | XCANFD_RXBUFFER2_FULL_MASK 0x00000004
| RxBuffer2 Full Mask. More...
#define | XCANFD_RXBUFFER3_FULL_MASK 0x00000008
| RxBuffer3 Full Mask. More...
#define | XCANFD_RXBUFFER4_FULL_MASK 0x00000010
| RxBuffer4 Full Mask. More...
#define | XCANFD_RXBUFFER5_FULL_MASK 0x00000020
| RxBuffer5 Full Mask. More...
#define | XCANFD_RXBUFFER6_FULL_MASK 0x00000040
| RxBuffer6 Full Mask. More...
#define | XCANFD_RXBUFFER7_FULL_MASK 0x00000080
| RxBuffer7 Full Mask. More...
#define | XCANFD_RXBUFFER8_FULL_MASK 0x00000100
| RxBuffer8 Full Mask. More...
#define | XCANFD_RXBUFFER9_FULL_MASK 0x00000200
| RxBuffer9 Full Mask. More...
#define | XCANFD_RXBUFFER10_FULL_MASK 0x00000400
| RxBuffer10 Full Mask. More...
#define | XCANFD_RXBUFFER11_FULL_MASK 0x00000800
| RxBuffer11 Full Mask. More...
#define | XCANFD_RXBUFFER12_FULL_MASK 0x00001000
| RxBuffer12 Full Mask. More...
#define | XCANFD_RXBUFFER13_FULL_MASK 0x00002000
| RxBuffer13 Full Mask. More...
#define | XCANFD_RXBUFFER14_FULL_MASK 0x00004000
| RxBuffer14 Full Mask. More...
#define | XCANFD_RXBUFFER15_FULL_MASK 0x00008000
| RxBuffer15 Full Mask. More...
#define | XCANFD_RXBUFFER16_FULL_MASK 0x00010000
| RxBuffer16 Full Mask. More...
#define | XCANFD_RXBUFFER17_FULL_MASK 0x00020000
| RxBuffer17 Full Mask. More...
#define | XCANFD_RXBUFFER18_FULL_MASK 0x00040000
| RxBuffer18 Full Mask. More...
#define | XCANFD_RXBUFFER19_FULL_MASK 0x00080000
| RxBuffer19 Full Mask. More...
#define | XCANFD_RXBUFFER20_FULL_MASK 0x00100000
| RxBuffer20 Full Mask. More...
#define | XCANFD_RXBUFFER21_FULL_MASK 0x00200000
| RxBuffer21 Full Mask. More...
#define | XCANFD_RXBUFFER22_FULL_MASK 0x00400000
| RxBuffer22 Full Mask. More...
#define | XCANFD_RXBUFFER23_FULL_MASK 0x00800000
| RxBuffer23 Full Mask. More...
#define | XCANFD_RXBUFFER24_FULL_MASK 0x01000000
| RxBuffer24 Full Mask. More...
#define | XCANFD_RXBUFFER25_FULL_MASK 0x02000000
| RxBuffer25 Full Mask. More...
#define | XCANFD_RXBUFFER26_FULL_MASK 0x04000000
| RxBuffer26 Full Mask. More...
#define | XCANFD_RXBUFFER27_FULL_MASK 0x08000000
| RxBuffer27 Full Mask. More...
#define | XCANFD_RXBUFFER28_FULL_MASK 0x10000000
| RxBuffer28 Full Mask. More...
#define | XCANFD_RXBUFFER29_FULL_MASK 0x20000000
| RxBuffer29 Full Mask. More...
#define | XCANFD_RXBUFFER30_FULL_MASK 0x40000000
| RxBuffer30 Full Mask. More...
#define | XCANFD_RXBUFFER31_FULL_MASK 0x80000000
| RxBuffer31 Full Mask. More...
#define | XCANFD_RXBUFFER32_FULL_MASK 0x00000001
| RxBuffer32 Full Mask. More...
#define | XCANFD_RXBUFFER33_FULL_MASK 0x00000002
| RxBuffer33 Full Mask. More...
#define | XCANFD_RXBUFFER34_FULL_MASK 0x00000004
| RxBuffer34 Full Mask. More...
#define | XCANFD_RXBUFFER35_FULL_MASK 0x00000008
| RxBuffer35 Full Mask. More...
#define | XCANFD_RXBUFFER36_FULL_MASK 0x00000010
| RxBuffer36 Full Mask. More...
#define | XCANFD_RXBUFFER37_FULL_MASK 0x00000020
| RxBuffer37 Full Mask. More...
#define | XCANFD_RXBUFFER38_FULL_MASK 0x00000040
| RxBuffer38 Full Mask. More...
#define | XCANFD_RXBUFFER39_FULL_MASK 0x00000080
| RxBuffer39 Full Mask. More...
#define | XCANFD_RXBUFFER40_FULL_MASK 0x00000100
| RxBuffer40 Full Mask. More...
#define | XCANFD_RXBUFFER41_FULL_MASK 0x00000200
| RxBuffer41 Full Mask. More...
#define | XCANFD_RXBUFFER42_FULL_MASK 0x00000400
| RxBuffer42 Full Mask. More...
#define | XCANFD_RXBUFFER43_FULL_MASK 0x00000800
| RxBuffer43 Full Mask. More...
#define | XCANFD_RXBUFFER44_FULL_MASK 0x00001000
| RxBuffer44 Full Mask. More...
#define | XCANFD_RXBUFFER45_FULL_MASK 0x00002000
| RxBuffer45 Full Mask. More...
#define | XCANFD_RXBUFFER46_FULL_MASK 0x00004000
| RxBuffer46 Full Mask. More...
#define | XCANFD_RXBUFFER47_FULL_MASK 0x00008000
| RxBuffer47 Full Mask. More...

## CAN frame length constants
#define | XCANFD_MAX_FRAME_SIZE 72
| Maximum CAN frame length in bytes. More...
#define | XCANFD_TXE_MESSAGE_SIZE 8
#define | XCANFD_DW_BYTES 4
| Data Word Bytes. More...
#define | XST_NOBUFFER 33L
| All Buffers (32) are filled. More...
#define | XST_BUFFER_ALREADY_FILLED 34L
| Given Buffer is Already filled. More...
#define | XST_INVALID_DLC 16L
| Invalid Dlc code. More...
#define | TRR_POS_MASK 0x1
#define | MAX_BUFFER_VAL 32
#define | FAST_MATH_MASK1 0xDB6DB6DB
#define | FAST_MATH_MASK2 0x49249249
#define | FAST_MATH_MASK3 0xC71C71C7
#define | TRR_INIT_VAL 0x00000000
#define | TRR_MASK_INIT_VAL 0xFFFFFFFF
#define | DESIGN_RANGE_1 15
#define | DESIGN_RANGE_2 31
#define | CONTROL_STATUS_1 0
#define | CONTROL_STATUS_2 1
#define | CONTROL_STATUS_3 2
#define | EXTRACTION_MASK 63
#define | SHIFT1 1
#define | SHIFT2 2
#define | SHIFT3 3
#define | TDC_MAX_OFFSET 32
#define | TDC_SHIFT 8
#define | MAX_BUFFER_INDEX 32
#define | MIN_FILTER_INDEX 0
#define | MAX_FILTER_INDEX 32
#define | EDL_CANFD 1
#define | EDL_CAN 0

## Macro Definition Documentation

#define MAKE_CURRENTBUFFER_ZERO | ( |  | InstancePtr | ) |

Value:
for (BufferNr = 0;BufferNr <= 31; BufferNr++) \
InstancePtr->FreeBuffStatus[BufferNr] = 0

This macro initializes CurrentBuffer[32] to zeros.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  none

Note
  makes bufferstatus to zero.

#define XCANFD_AFIDR_BASE_OFFSET 0x0A04

Acceptance Filter ID Register.

#define XCANFD_AFIDR_OFFSET | ( |  | FilterIndex | ) |

Value:
(XCANFD_AFIDR_BASE_OFFSET+\
(FilterIndex*8))
XCANFD_AFIDR_BASE_OFFSET
#define XCANFD_AFIDR_BASE_OFFSET
Acceptance Filter ID Register.
Definition: xcanfd_hw.h:287

This macro Returns the AFIDR Registger Offset.

Parameters

  FilterIndex | is the Index of Id Register

Note
  none

Referenced by XCanFd_AcceptFilterGet(), and XCanFd_AcceptFilterSet().

#define XCANFD_AFMR_BASE_OFFSET 0x0A00

Acceptance Filter Mask Register.

#define XCANFD_AFMR_OFFSET | ( |  | FilterIndex | ) |

Value:
(XCANFD_AFMR_BASE_OFFSET+\
(FilterIndex*8))
XCANFD_AFMR_BASE_OFFSET
#define XCANFD_AFMR_BASE_OFFSET
Acceptance Filter Mask Register.
Definition: xcanfd_hw.h:286

This macro Returns the AFMR Register Offset.

Parameters

  FilterIndex | is the Index number of Mask Register

Note
  none

Referenced by XCanFd_AcceptFilterGet(), and XCanFd_AcceptFilterSet().

#define XCANFD_AFR_OFFSET 0x0E0

Acceptance Filter Register.

Referenced by XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), and XCanFd_AcceptFilterGetEnabled().

#define XCANFD_BRPR_BRP_MASK 0x000000FF

Baud Rate Prescaler Mask.

Referenced by XCanFd_GetFBaudRatePrescaler(), and XCanFd_SetFBaudRatePrescaler().

#define XCANFD_BRPR_OFFSET 0x008

Baud Rate Prescaler Register.

Referenced by XCanFd_GetBaudRatePrescaler(), and XCanFd_SetBaudRatePrescaler().

#define XCANFD_BTR_OFFSET 0x00C

Bit Timing Register.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_SJW_MASK 0x007F0000

Sync Jump Width Mask.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_SJW_SHIFT 16

Sync Jump Width Shift.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_TS1_MASK 0x000000FF

Time Segment 1 Mask.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_TS2_MASK 0x00007F00

Time Segment 2 Mask.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCANFD_BTR_TS2_SHIFT 8

Time Segment 2 Shift.

Referenced by XCanFd_GetBitTiming(), and XCanFd_SetBitTiming().

#define XCanFD_Check_TrrVal_Set_Bit | ( |  | Var | ) | Var&(-Var)

This routine returns Number with right most bit set from the target input value.

Parameters

  Target | value.

Returns
  Number with right most bit set from the target value.

Note
  None.

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCanFD_Check_TrrVal_Set_Bit | ( |  | Var | ) | Var&(-Var)

This routine returns Number with right most bit set from the target input value.

Parameters

  Target | value.

Returns
  Number with right most bit set from the target value.

Note
  None.

#define XCanFd_ClearBusErrorStatus | ( |  | InstancePtr,
|  |  | Mask
| ) |  |

Value:
XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ESR_OFFSET, \
Mask)
XCANFD_ESR_OFFSET
#define XCANFD_ESR_OFFSET
Error Status Register.
Definition: xcanfd_hw.h:84
XCanFd_WriteReg
#define XCanFd_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xcanfd_hw.h:1153

This function clears Error Status bit(s) previously set in Error Status Register (ESR).

Use the XCANFD_ESR_* constants defined in xcanfd_hw.h to create the value to pass in. If a bit was cleared in Error Status Register before this function is called, it will not be touched.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is he 32-bit mask used to clear bits in Error Status Register. Multiple XCANFD_ESR_* values could be 'OR'ed to clear multiple bits

Note
  None.

Referenced by XCanFd_IntrHandler().

#define XCanFd_ClearTImeStamp_Count | ( |  | InstancePtr | ) |

Value:
XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, \
XCANFD_TIMESTAMPR_OFFSET,XCANFD_CTS_MASK)
XCanFd_WriteReg
#define XCanFd_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xcanfd_hw.h:1153
XCANFD_TIMESTAMPR_OFFSET
#define XCANFD_TIMESTAMPR_OFFSET
Time Stamp Register.
Definition: xcanfd_hw.h:319
XCANFD_CTS_MASK
#define XCANFD_CTS_MASK
Time Stamp Counter Clear.
Definition: xcanfd_hw.h:320

This function Clears Time Stamp Counter Value.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  none

Note
  None.

#define XCanFd_Create_CanFD_Dlc_BrsValue | ( |  | DataLengCode | ) |

Value:
((((DataLengCode) << XCANFD_DLCR_DLC_SHIFT) & XCANFD_DLCR_DLC_MASK) \
|(XCANFD_DLCR_EDL_MASK) |(XCANFD_DLCR_BRS_MASK))
XCANFD_DLCR_EDL_MASK
#define XCANFD_DLCR_EDL_MASK
EDL Mask in DLC Register.
Definition: xcanfd_hw.h:275
XCANFD_DLCR_DLC_SHIFT
#define XCANFD_DLCR_DLC_SHIFT
Data Length Code Shift.
Definition: xcanfd_hw.h:573
XCANFD_DLCR_BRS_MASK
#define XCANFD_DLCR_BRS_MASK
BRS Mask in DLC Register.
Definition: xcanfd_hw.h:276
XCANFD_DLCR_DLC_MASK
#define XCANFD_DLCR_DLC_MASK
Data Length Code Mask.
Definition: xcanfd_hw.h:572

This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames) and Setting the BRS.

Parameters

  DataLengCode | indicates Data Length Code value.

Returns
  Value that can be assigned to Data Length Code register.

Note
  C-Style signature: u32 XCanFd_Create_CanFD_Dlc_BrsValue(u32 DataLengCode);

Read the CAN specification for meaning of Data Length Code.

Referenced by XCanFd_SelfTest().

#define XCanFd_Create_CanFD_DlcValue | ( |  | DataLengCode | ) |

Value:
((((DataLengCode) << XCANFD_DLCR_DLC_SHIFT) & XCANFD_DLCR_DLC_MASK) \
|(XCANFD_DLCR_EDL_MASK))
XCANFD_DLCR_EDL_MASK
#define XCANFD_DLCR_EDL_MASK
EDL Mask in DLC Register.
Definition: xcanfd_hw.h:275
XCANFD_DLCR_DLC_SHIFT
#define XCANFD_DLCR_DLC_SHIFT
Data Length Code Shift.
Definition: xcanfd_hw.h:573
XCANFD_DLCR_DLC_MASK
#define XCANFD_DLCR_DLC_MASK
Data Length Code Mask.
Definition: xcanfd_hw.h:572

This macro calculates value for Data Length Code register given Data Length Code value with EDL set to 1(Only Can FD frames).

Parameters

  DataLengCode | indicates Data Length Code value.

Returns
  Value that can be assigned to Data Length Code register.

Note
  C-Style signature: u32 XCanFd_Create_CanFD_DlcValue(u32 DataLengCode);

          Read the CAN specification for meaning of Data Length Code.

#define XCanFd_CreateDlcValue | ( |  | DataLengCode | ) | ((((DataLengCode) << XCANFD_DLCR_DLC_SHIFT) & XCANFD_DLCR_DLC_MASK))

This macro calculates value for Data Length Code register given Data Length Code value i.e Only Stand.

. Can frames.

Parameters

  DataLengCode | indicates Data Length Code value.

Returns
  Value that can be assigned to Data Length Code register.

Note
  C-Style signature: u32 XCanFd_CreateDlcValue(u32 DataLengCode);

Read the CAN specification for meaning of Data Length Code.

#define XCanFd_CreateIdValue | ( |  | StandardId,
|  |  | SubRemoteTransReq,
|  |  | IdExtension,
|  |  | ExtendedId,
|  |  | RemoteTransReq
| ) |  |

Value:
((((StandardId) << XCANFD_IDR_ID1_SHIFT) & XCANFD_IDR_ID1_MASK) | \
(((SubRemoteTransReq) << XCANFD_IDR_SRR_SHIFT) & XCANFD_IDR_SRR_MASK) | \
(((IdExtension) << XCANFD_IDR_IDE_SHIFT) & XCANFD_IDR_IDE_MASK) | \
(((ExtendedId) << XCANFD_IDR_ID2_SHIFT) & XCANFD_IDR_ID2_MASK) | \
((RemoteTransReq) & XCANFD_IDR_RTR_MASK))
XCANFD_IDR_ID2_MASK
#define XCANFD_IDR_ID2_MASK
Extended Message Ident Mask.
Definition: xcanfd_hw.h:562
XCANFD_IDR_SRR_MASK
#define XCANFD_IDR_SRR_MASK
Substitute Remote TX Req.
Definition: xcanfd_hw.h:558
XCANFD_IDR_IDE_MASK
#define XCANFD_IDR_IDE_MASK
Identifier Extension Mask.
Definition: xcanfd_hw.h:560
XCANFD_IDR_ID1_MASK
#define XCANFD_IDR_ID1_MASK
Standard Messg Ident Mask.
Definition: xcanfd_hw.h:556
XCANFD_IDR_ID2_SHIFT
#define XCANFD_IDR_ID2_SHIFT
Extended Message Ident Shift.
Definition: xcanfd_hw.h:563
XCANFD_IDR_IDE_SHIFT
#define XCANFD_IDR_IDE_SHIFT
Identifier Extension Shift.
Definition: xcanfd_hw.h:561
XCANFD_IDR_RTR_MASK
#define XCANFD_IDR_RTR_MASK
Remote TX Request Mask.
Definition: xcanfd_hw.h:566
XCANFD_IDR_ID1_SHIFT
#define XCANFD_IDR_ID1_SHIFT
Standard Messg Ident Shift.
Definition: xcanfd_hw.h:557

This macro calculates CAN message identifier value given identifier field values.

Parameters

  StandardId | contains Standard Message ID value.
  SubRemoteTransReq | contains Substitute Remote Transmission Request value.
  IdExtension | contains Identifier Extension value.
  ExtendedId | contains Extended Message ID value.
  RemoteTransReq | contains Remote Transmission Request value.

Returns
  Message Identifier value.

Note
  C-Style signature: u32 XCanFd_CreateIdValue(u32 StandardId, u32 SubRemoteTransReq, u32 IdExtension, u32 ExtendedId, u32 RemoteTransReq);

Read the CAN specification for meaning of each parameter.

Referenced by XCanFd_SelfTest().

#define XCANFD_CSB_SHIFT 16

Core Status Bit Shift Value.

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_CTS_MASK 0x00000001

Time Stamp Counter Clear.

#define XCANFD_DAR_MASK 0x00000010

Disable AutoRetransmission.

#define XCANFD_DLC1 0x10000000

Data Length Code 1.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC10 0xA0000000

Data Length Code 10.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC11 0xB0000000

Data Length Code 11.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC12 0xC0000000

Data Length Code 12.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC13 0xD0000000

Data Length Code 13.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC14 0xE0000000

Data Length Code 14.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC15 0xF0000000

Data Length Code 15.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC2 0x20000000

Data Length Code 2.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC3 0x30000000

Data Length Code 3.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC4 0x40000000

Data Length Code 4.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC5 0x50000000

Data Length Code 5.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC6 0x60000000

Data Length Code 6.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC7 0x70000000

Data Length Code 7.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC8 0x80000000

Data Length Code 8.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLC9 0x90000000

Data Length Code 9.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLCR_BRS_MASK 0x04000000

BRS Mask in DLC Register.

#define XCANFD_DLCR_DLC_MASK 0xF0000000

Data Length Code Mask.

Referenced by XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), XCanFd_SelfTest(), and XCanFd_Send().

#define XCANFD_DLCR_DLC_SHIFT 28

Data Length Code Shift.

Referenced by XCanFd_GetDlc2len().

#define XCANFD_DLCR_EDL_MASK 0x08000000

EDL Mask in DLC Register.

Referenced by XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), and XCanFd_Send().

#define XCANFD_DLCR_EFC_MASK 0x01000000

Event FIFO Control Mask.

#define XCANFD_DLCR_EFC_SHIFT 24

Event FIFO Control Shift.

#define XCANFD_DLCR_MM_MASK 0x00FF0000

Message Marker Mask.

#define XCANFD_DLCR_MM_SHIFT 16

Message Marker Shift.

#define XCANFD_DLCR_TIMESTAMP_MASK 0x0000FFFF

Dlc Register TimeStamp Mask.

#define XCANFD_DW_BYTES 4

Data Word Bytes.

Referenced by XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), and XCanFd_Send().

#define XCANFD_ECR_OFFSET 0x010

Error Counter Register.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ECR_REC_MASK 0x0000FF00

Receive Error Counter Mask.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ECR_REC_SHIFT 8

Receive Error Counter Shift.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ECR_TEC_MASK 0x000000FF

Transmit Error Counter Mask.

Referenced by XCanFd_GetBusErrorCounter().

#define XCANFD_ESR_ACKER_MASK 0x00000010

ACK Error Mask.

#define XCANFD_ESR_BERR_MASK 0x00000008

Bit Error Mask.

#define XCANFD_ESR_CRCER_MASK 0x00000001

CRC Error Mask.

#define XCANFD_ESR_F_BERR_MASK 0x00000800

F_Bit Error Mask.

#define XCANFD_ESR_F_CRCER_MASK 0x00000100

F_CRC Error Mask.

#define XCANFD_ESR_F_FMER_MASK 0x00000200

F_Form Error Mask.

#define XCANFD_ESR_F_STER_MASK 0x00000400

F_Stuff Error Mask.

#define XCANFD_ESR_FMER_MASK 0x00000002

Form Error Mask.

#define XCANFD_ESR_OFFSET 0x014

Error Status Register.

#define XCANFD_ESR_STER_MASK 0x00000004

Stuff Error Mask.

#define XCANFD_F_BRPR_OFFSET 0x088

Data Phase Baud Rate Prescalar Register.

Referenced by XCanFd_Disable_Tranceiver_Delay_Compensation(), XCanFd_Enable_Tranceiver_Delay_Compensation(), XCanFd_GetFBaudRatePrescaler(), XCanFd_Set_Tranceiver_Delay_Compensation(), and XCanFd_SetFBaudRatePrescaler().

#define XCANFD_F_BRPR_TDC_ENABLE_MASK 0x00010000

Transceiver Delay compensation Enable Maskk.

Referenced by XCanFd_Disable_Tranceiver_Delay_Compensation(), and XCanFd_Enable_Tranceiver_Delay_Compensation().

#define XCANFD_F_BRPR_TDCMASK 0x00003F00

Transceiver Delay compensation Offset Mask.

Referenced by XCanFd_Set_Tranceiver_Delay_Compensation().

#define XCANFD_F_BTR_OFFSET 0x08C

Data Phase Bit Timing Register.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_SJW_MASK 0x000F0000

Sync Jump Width Mask.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_SJW_SHIFT 16

Sync Jump Width Shift.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_TS1_MASK 0x0000001F

Time Segment 1 Mask.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_TS2_MASK 0x00000F00

Time Segment 2 Mask.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_F_BTR_TS2_SHIFT 8

Time Segment 2 Shift.

Referenced by XCanFd_GetFBitTiming(), and XCanFd_SetFBitTiming().

#define XCANFD_FIFO_1_RXDLC_OFFSET | ( |  | ReadIndex | ) | (XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DLC Offset for FIFO 1.

Parameters

  ReadIndex | is the Buffer number to locate the FIFO

Note
  This API is meant to be used with IP with CanFD 2.0 spec support only.

#define XCANFD_FIFO_1_RXDW_OFFSET | ( |  | ReadIndex | ) | (XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DW Offset for FIFO 1.

Parameters

  ReadIndex | is the Buffer number to locate the FIFO

Note
  This API is meant to be used with IP with CanFD 2.0 spec support only.

#define XCANFD_FIFO_1_RXID_OFFSET | ( |  | ReadIndex | ) | (XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER ID Offset for FIFO 1.

Parameters

  ReadIndex | is the Buffer number to locate the FIFO

Note
  This API is meant to be used with IP with CanFD 2.0 spec support only.

#define XCANFD_FSR_FL_0_SHIFT 8

Fill Level Mask FIFO 0.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo().

#define XCANFD_FSR_FL_1_MASK 0x7F000000

Fill Level Mask FIFO 1.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_FSR_FL_1_SHIFT 24

Fill Level Mask FIFO 1.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo().

#define XCANFD_FSR_FL_MASK 0x00007F00

Fill Level Mask FIFO 0.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_FSR_IRI_1_MASK 0x00800000

Increment Read Index Mask FIFO1.

Referenced by XCanFd_Recv_Sequential().

#define XCANFD_FSR_IRI_MASK 0x00000080

Increment Read Index Mask.

#define XCANFD_FSR_OFFSET 0x0E8

Receive FIFO Status Register.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_FSR_RI_1_MASK 0x003F0000

Read Index Mask FIFO 1.

#define XCANFD_FSR_RI_1_SHIFT 16

Read Index Mask FIFO 1.

Referenced by XCanFd_Recv_Sequential().

#define XCANFD_FSR_RI_MASK 0x0000003F

Read Index Mask FIFO 0.

Referenced by XCanFd_Recv_Sequential().

#define XCanFd_Get_NofRxBuffers | ( |  | InstancePtr | ) |

Value:
((InstancePtr->CanFdConfig.NumofRxMbBuf == 48) ? (3) \
:((InstancePtr->CanFdConfig.NumofRxMbBuf == 32) ? \
(2) : (1)))

This routine returns Number of RCS registers to access because in Mail box mode user can configure 48,32,16 Rx Buffers.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  The value stored in Interrupt Status Register.

Note
  None.

#define XCANFD_GET_RX_MODE | ( |  | InstancePtr | ) | InstancePtr->CanFdConfig.Rx_Mode

This macro Returns Design mode 1- Mailbox 0- Sequential.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Note
  none

Referenced by XCanFd_SelfTest().

#define XCanFd_Get_RxBuffers | ( |  | InstancePtr | ) | InstancePtr->CanFdConfig.NumofRxMbBuf;

This routine returns Number of RxBuffers user can Desing RxBuffers as 48,32,16.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  The value stored in Interrupt Status Register.

Note
  None.

#define XCanFd_Get_Tranceiver_Delay_CompensationOffset | ( |  | InstancePtr | ) |

Value:
((XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress,\
XCANFD_F_BRPR_OFFSET) & XCANFD_F_BRPR_TDCMASK) >> 8)
XCANFD_F_BRPR_TDCMASK
#define XCANFD_F_BRPR_TDCMASK
Transceiver Delay compensation Offset Mask.
Definition: xcanfd_hw.h:368
XCANFD_F_BRPR_OFFSET
#define XCANFD_F_BRPR_OFFSET
Data Phase Baud Rate Prescalar Register.
Definition: xcanfd_hw.h:91
XCanFd_ReadReg
#define XCanFd_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xcanfd_hw.h:1135

This function returns the Tranceive delay comensation Offset.

This function can call when user sends multiple Buffers using Addto_Queue() and XCanFd_Send_Queue().

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  None.

Note
  None.

#define XCanFd_GetBusErrorStatus | ( |  | InstancePtr | ) | XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ESR_OFFSET)

This function reads Error Status value from Error Status Register (ESR).

Use the XCANFD_ESR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  The 32-bit value read from Error Status Register.

Note
  None.

Referenced by XCanFd_IntrHandler().

#define XCanFd_GetRxIntrWatermark | ( |  | InstancePtr | ) |

Value:
(XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, \
XCANFD_WIR_OFFSET) & XCANFD_WIR_MASK)
XCANFD_WIR_MASK
#define XCANFD_WIR_MASK
Rx FIFO Full watermark Mask.
Definition: xcanfd_hw.h:302
XCANFD_WIR_OFFSET
#define XCANFD_WIR_OFFSET
Rx FIFO Water Mark Register.
Definition: xcanfd_hw.h:297
XCanFd_ReadReg
#define XCanFd_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xcanfd_hw.h:1135

This routine returns the Rx water Mark threshold Value.

Parameters

  InstancePtr | is a pointer to the XCanFd instance.

Returns
  Threshold Value.

Note
  none

#define XCanFd_GetStatus | ( |  | InstancePtr | ) | XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_SR_OFFSET)

This function returns Status value from Status Register (SR).

Use the XCANFD_SR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  The 32-bit value read from Status Register.

Note
  None.

Referenced by XCanFd_GetMode().

#define XCanFd_GetTImeStamp_Count | ( |  | InstancePtr | ) |

Value:
(XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress,\
XCANFD_TIMESTAMPR_OFFSET) >> 16)
XCANFD_TIMESTAMPR_OFFSET
#define XCANFD_TIMESTAMPR_OFFSET
Time Stamp Register.
Definition: xcanfd_hw.h:319
XCanFd_ReadReg
#define XCanFd_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xcanfd_hw.h:1135

This function returns Time Stamp Counter Value.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  TimeStampCount

Note
  None.

#define XCANFD_HANDLER_ERROR 3

Handler type for error interrupt.

Referenced by XCanFd_SetHandler().

#define XCANFD_HANDLER_EVENT 4

Handler type for all other interrupts.

Referenced by XCanFd_SetHandler().

#define XCANFD_HANDLER_RECV 2

Handler type for frame reception interrupt.

Referenced by XCanFd_SetHandler().

#define XCANFD_HANDLER_SEND 1

Handler type for frame sending interrupt.

Referenced by XCanFd_SetHandler().

#define XCANFD_ICR_OFFSET 0x024

Interrupt Clear Register.

Referenced by XCanFd_InterruptClear().

#define XCANFD_IDR_ID1_MASK 0xFFE00000

Standard Messg Ident Mask.

#define XCANFD_IDR_ID1_SHIFT 21

Standard Messg Ident Shift.

#define XCANFD_IDR_ID2_MASK 0x0007FFFE

Extended Message Ident Mask.

#define XCANFD_IDR_ID2_SHIFT 1

Extended Message Ident Shift.

#define XCANFD_IDR_IDE_MASK 0x00080000

Identifier Extension Mask.

#define XCANFD_IDR_IDE_SHIFT 19

Identifier Extension Shift.

#define XCANFD_IDR_RTR_MASK 0x00000001

Remote TX Request Mask.

#define XCANFD_IDR_SRR_MASK 0x00100000

Substitute Remote TX Req.

#define XCANFD_IER_OFFSET 0x020

Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable(), and XCanFd_InterruptEnable().

#define XCANFD_IETCS_OFFSET 0x09C

Tx Buffer Cancel Request Served Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_CancelRqt(), and XCanFd_InterruptEnable_CancelRqt().

#define XCANFD_IETRS_OFFSET 0x094

Tx Buffer Ready Request Served Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_ReadyRqt(), and XCanFd_InterruptEnable_ReadyRqt().

#define XCanFd_InterruptGetEnabled | ( |  | InstancePtr | ) | XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_IER_OFFSET)

This routine returns enabled interrupt(s).

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  Enabled interrupt(s) in a 32-bit format.

Note
  None.

Referenced by XCanFd_InterruptDisable(), XCanFd_InterruptEnable(), and XCanFd_IntrHandler().

#define XCanFd_InterruptGetStatus | ( |  | InstancePtr | ) | XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_ISR_OFFSET)

This routine returns interrupt status read from Interrupt Status Register.

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to interpret the returned value.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  The value stored in Interrupt Status Register.

Note
  None.

Referenced by XCanFd_InterruptClear(), and XCanFd_IntrHandler().

#define XCanFd_IsBufferTransmitted | ( |  | InstancePtr,
|  |  | TxBuffer
| ) |  |

Value:
((XCanFd_ReadReg(InstancePtr->CanFdConfig.BaseAddress, \
XCANFD_TRR_OFFSET) & (1 << TxBuffer)) ? FALSE : TRUE)
XCANFD_TRR_OFFSET
#define XCANFD_TRR_OFFSET
Tx Buffer Ready Request Register.
Definition: xcanfd_hw.h:95
XCanFd_ReadReg
#define XCanFd_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xcanfd_hw.h:1135

This macro checks whether Particular Buffer is Transmitted or not.

Transmit Ready Request Register gives which Buffer is transmitted if you trigger the Buffer1 then TRR Reg : 0x00000001 After transmission Core clears the bit TRR Reg : 0x00000000

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  TxBuffer | is the buffer where driver has written user data\

Returns
  - TRUE if the device is busy and NOT ready to accept writes to AFIR and AFMR.
  - FALSE if the device is ready to accept writes to AFIR and AFMR.

Note
  C-Style signature: int XCanFd_IsAcceptFilterBusy(XCanFd *InstancePtr);

Referenced by XCanFd_PollQueue_Buffer(), and XCanFd_SelfTest().

#define XCANFD_ISR_OFFSET 0x01C

Interrupt Status Register.

Referenced by XCanFd_Recv_Mailbox().

#define XCanFd_IsTxDone | ( |  | InstancePtr | ) |

Value:
((XCanFd_ReadReg(((InstancePtr)->CanFdConfig.BaseAddress), \
XCANFD_ISR_OFFSET) & XCANFD_IXR_TXOK_MASK) ? TRUE : FALSE)
XCANFD_IXR_TXOK_MASK
#define XCANFD_IXR_TXOK_MASK
TX Successful Interrupt Mask.
Definition: xcanfd_hw.h:483
XCanFd_ReadReg
#define XCanFd_ReadReg(BaseAddress, RegOffset)
This macro reads the given register.
Definition: xcanfd_hw.h:1135
XCANFD_ISR_OFFSET
#define XCANFD_ISR_OFFSET
Interrupt Status Register.
Definition: xcanfd_hw.h:87

This macro checks if the transmission is complete.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  - TRUE if the transmission is done (completed).
  - FALSE if the transmission is not completed.

Note
  C-Style signature: int XCanFd_IsTxDone(XCanFd *InstancePtr);

#define XCANFD_IXR_ARBLST_MASK 0x00000001

Arbitration Lost Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_BSOFF_MASK 0x00000200

Bus Off Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_BSRD_MASK 0x00000008

Bus-Off recovery done Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_ERROR_MASK 0x00000100

Error Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_PEE_MASK 0x00000004

Protocol Exception Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXBOFLW_BI_MASK 0x3F000000

Rx Buffer index for Overflow (Mailbox Mode)

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXBOFLW_MASK 0x00010000

Rx Buffer Overflow interrupt Mask (Mailbox mode)

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXFOFLW_1_MASK 0x00008000

RX FIFO 1 Overflow Intr Mask.

#define XCANFD_IXR_RXFOFLW_MASK 0x00000040

RX FIFO Overflow Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXFWMFLL_1_MASK 0x00010000

Rx Watermark Full interrupt Mask for FIFO 1.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXFWMFLL_MASK 0x00001000

Rx Watermark Full interrupt Mask (FIFO mode)

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXLRM_BI_MASK 0x00FC0000

Rx Buffer index for Last Received Message (Mailbox Mode)

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_IXR_RXMNF_MASK 0x00020000

Rx Match Not Finished Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXOK_MASK 0x00000010

New Message Received Intr.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_RXRBF_MASK 0x00008000

Rx Buffer Full Interrupt Mask (Mailbox mode)

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_SLP_MASK 0x00000400

Sleep Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TSCNT_OFLW_MASK 0x00000020

Timestamp overflow Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXCRS_MASK 0x00004000

Tx Cancellation Request Served Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXEOFLW_MASK 0x40000000

TX Event FIFO Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXEWMFLL_MASK 0x80000000

TX Event FIFO Watermark Full Intr Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXOK_MASK 0x00000002

TX Successful Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_TXRRS_MASK 0x00002000

Tx Buffer Ready Request Served Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_IXR_WKUP_MASK 0x00000800

Wake up Interrupt Mask.

Referenced by XCanFd_IntrHandler().

#define XCANFD_MAILBOX_ID_OFFSET | ( |  | BufferNr | ) | (XCANFD_RXFIFO_0_BASE_ID_OFFSET+(BufferNr*XCANFD_MAX_FRAME_SIZE))

This macro Returns the MAILBOX MODE ID Offset.

Parameters

  BufferNr | is the Buffer number to locate the FIFO

Note
  none

Referenced by XCanFd_Set_MailBox_IdMask().

#define XCANFD_MAILBOX_MASK_OFFSET | ( |  | BufferNr | ) | (XCANFD_MAILBOX_RB_MASK_BASE_OFFSET+(BufferNr*4))

This macro Returns the MAILBOX MODE RXMASK Offset.

Parameters

  BufferNr | is the Buffer number to locate the FIFO

Note
  none

Referenced by XCanFd_Set_MailBox_IdMask().

#define XCANFD_MAILBOX_RB_MASK_BASE_OFFSET 0x2F00

Mailbox RxBuffer Mask Register.

#define XCANFD_MAX_FRAME_SIZE 72

Maximum CAN frame length in bytes.

#define XCANFD_MODE_ABR 0x00000020

Auto Bus-Off Recovery.

Referenced by XCanFd_EnterMode().

#define XCANFD_MODE_BR 0x0000000B

Bus-Off Recovery Mode.

#define XCANFD_MODE_CONFIG 0x00000001

Configuration mode.

Referenced by XCanFd_EnterMode(), XCanFd_GetMode(), XCanFd_SelfTest(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetFBitTiming(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), and XCanFd_SetTxEventIntrWatermark().

#define XCANFD_MODE_DAR 0x0000000A

Disable Auto Retransmission mode.

Referenced by XCanFd_EnterMode().

#define XCANFD_MODE_LOOPBACK 0x00000004

Loop Back mode.

Referenced by XCanFd_EnterMode(), XCanFd_GetMode(), and XCanFd_SelfTest().

#define XCANFD_MODE_NORMAL 0x00000002

Normal mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MODE_PEE 0x00000080

Protocol Exception mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MODE_SBR 0x00000040

Starut Bus-Off Recovery.

Referenced by XCanFd_EnterMode().

#define XCANFD_MODE_SLEEP 0x00000008

Sleep mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MODE_SNOOP 0x00000010

Snoop mode.

Referenced by XCanFd_EnterMode(), and XCanFd_GetMode().

#define XCANFD_MSR_ABR_MASK 0x00000080

Auto Bus-Off Recovery Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_BRSD_MASK 0x00000008

Bit Rate Switch Select Mask.

Referenced by XCanFd_SetBitRateSwitch_DisableNominal(), and XCanFd_SetBitRateSwitch_EnableNominal().

#define XCANFD_MSR_CONFIG_MASK 0x000000F8

Configuration Mode Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_DAR_MASK 0x00000010

Disable Auto-Retransmission Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_DPEE_MASK 0x00000020

Protocol Exception Event Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_LBACK_MASK 0x00000002

Loop Back Mode Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_OFFSET 0x004

Mode Select Register.

Referenced by XCanFd_EnterMode(), XCanFd_SetBitRateSwitch_DisableNominal(), and XCanFd_SetBitRateSwitch_EnableNominal().

#define XCANFD_MSR_SBR_MASK 0x00000040

Start Bus-Off Recovery Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_SLEEP_MASK 0x00000001

Sleep Mode Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_MSR_SNOOP_MASK 0x00000004

Snoop Mode Select Mask.

Referenced by XCanFd_EnterMode().

#define XCANFD_NOOF_AFR 32

Number Of Acceptance FIlter Registers.

Referenced by XCanFd_AcceptFilterGet().

#define XCANFD_RCS0_OFFSET 0x0B0

Rx Buffer Control Status 0 Register.

#define XCANFD_RCS1_OFFSET 0x0B4

Rx Buffer Control Status 1 Register.

#define XCANFD_RCS2_OFFSET 0x0B8

Rx Buffer Control Status 2 Register.

#define XCANFD_RCS_HCB_MASK 0xFFFF

Rx Buffer Control Status Register Host Control Bit Mask.

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RCS_OFFSET | ( |  | NoCtrlStatus | ) | (XCANFD_RCS0_OFFSET+(NoCtrlStatus*4))

This macro Returns the RCS Register Offset.

Parameters

  NoCtrlStatus | is to locate RCS Registers

Note
  NoCtrlStatus = 0 -> RCS0 1 -> RCS1 2 -> RCS2

Referenced by XCanFd_Recv_Mailbox(), XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), and XCanFd_Set_MailBox_IdMask().

#define XCanFd_ReadReg | ( |  | BaseAddress,
|  |  | RegOffset
| ) |  | Xil_In32((BaseAddress) + (RegOffset))

This macro reads the given register.

Parameters

  BaseAddress | is the base address of the device
  RegOffset | is the register offset to be read

Returns
  The 32-bit value of the register

Note
  C-Style signature: u32 XCanFd_ReadReg(u32 BaseAddress, u32 RegOffset);

Referenced by XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), XCanFd_AcceptFilterGet(), XCanFd_AcceptFilterGetEnabled(), XCanFd_Addto_Queue(), XCanFd_Disable_Tranceiver_Delay_Compensation(), XCanFd_Enable_Tranceiver_Delay_Compensation(), XCanFd_EnterMode(), XCanFd_GetBaudRatePrescaler(), XCanFd_GetBitTiming(), XCanFd_GetBusErrorCounter(), XCanFd_GetFBaudRatePrescaler(), XCanFd_GetFBitTiming(), XCanFd_GetFreeBuffer(), XCanFd_GetNofMessages_Stored_Rx_Fifo(), XCanFd_GetNofMessages_Stored_TXE_FIFO(), XCanFd_InterruptDisable_CancelRqt(), XCanFd_InterruptDisable_ReadyRqt(), XCanFd_InterruptDisable_RxBuffFull(), XCanFd_InterruptEnable_CancelRqt(), XCanFd_InterruptEnable_ReadyRqt(), XCanFd_InterruptEnable_RxBuffFull(), XCanFd_Recv_Mailbox(), XCanFd_Recv_Sequential(), XCanFd_Recv_TXEvents_Sequential(), XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), XCanFd_Send(), XCanFd_Set_MailBox_IdMask(), XCanFd_Set_Tranceiver_Delay_Compensation(), XCanFd_SetBitRateSwitch_DisableNominal(), XCanFd_SetBitRateSwitch_EnableNominal(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), XCanFd_SetTxEventIntrWatermark(), and XCanFd_TxBuffer_Cancel_Request().

#define XCanFd_Reset | ( |  | InstancePtr | ) |

Value:
XCanFd_WriteReg(InstancePtr->CanFdConfig.BaseAddress, XCANFD_SRR_OFFSET,\
XCANFD_SRR_SRST_MASK)
XCANFD_SRR_SRST_MASK
#define XCANFD_SRR_SRST_MASK
Reset Mask.
Definition: xcanfd_hw.h:328
XCanFd_WriteReg
#define XCanFd_WriteReg(BaseAddress, RegOffset, Data)
This macro writes the given register.
Definition: xcanfd_hw.h:1153
XCANFD_SRR_OFFSET
#define XCANFD_SRR_OFFSET
Software Reset Register.
Definition: xcanfd_hw.h:79

This function resets the CAN device.

Calling this function resets the device immediately, and any pending transmission or reception is terminated at once. Both Object Layer and Transfer Layer are reset. This function does not reset the Physical Layer. All registers are reset to the default values, and no previous status will be restored. TX FIFO, RX FIFO and TX High Priority Buffer are also reset.

When a reset is required due to an internal error, the driver notifies the upper layer software of this need through the error status code or interrupts The upper layer software is responsible for calling this Reset function and then re-configuring the device.

The CAN device will be in Configuration Mode immediately after this function returns.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  None.

Note
  None.

Referenced by XCanFd_CfgInitialize(), and XCanFd_SelfTest().

#define XCANFD_RSD0_OFFSET 0x0A0

Reserved.

#define XCANFD_RSD1_OFFSET 0x0A4

Reserved.

#define XCANFD_RSD2_OFFSET 0x0A8

Reserved.

#define XCANFD_RSD3_OFFSET 0x0AC

Reserved.

#define XCANFD_RX_FIFO_0 0

Selection for RX Fifo 0.

Referenced by XCanFd_GetNofMessages_Stored_Rx_Fifo(), and XCanFd_Recv_Sequential().

#define XCANFD_RX_FIFO_1 1

Selection for RX Fifo 1.

Referenced by XCanFd_Recv_Sequential().

#define XCANFD_RXBFLL1_OFFSET 0x0C0

Rx Buffer Full Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_RxBuffFull(), and XCanFd_InterruptEnable_RxBuffFull().

#define XCANFD_RXBFLL2_OFFSET 0x0C4

Rx Buffer Full Interrupt Enable Register.

Referenced by XCanFd_InterruptDisable_RxBuffFull(), and XCanFd_InterruptEnable_RxBuffFull().

#define XCANFD_RXBUFFER0_FULL_MASK 0x00000001

RxBuffer0 Full Mask.

#define XCANFD_RXBUFFER10_FULL_MASK 0x00000400

RxBuffer10 Full Mask.

#define XCANFD_RXBUFFER11_FULL_MASK 0x00000800

RxBuffer11 Full Mask.

#define XCANFD_RXBUFFER12_FULL_MASK 0x00001000

RxBuffer12 Full Mask.

#define XCANFD_RXBUFFER13_FULL_MASK 0x00002000

RxBuffer13 Full Mask.

#define XCANFD_RXBUFFER14_FULL_MASK 0x00004000

RxBuffer14 Full Mask.

#define XCANFD_RXBUFFER15_FULL_MASK 0x00008000

RxBuffer15 Full Mask.

#define XCANFD_RXBUFFER16_FULL_MASK 0x00010000

RxBuffer16 Full Mask.

#define XCANFD_RXBUFFER17_FULL_MASK 0x00020000

RxBuffer17 Full Mask.

#define XCANFD_RXBUFFER18_FULL_MASK 0x00040000

RxBuffer18 Full Mask.

#define XCANFD_RXBUFFER19_FULL_MASK 0x00080000

RxBuffer19 Full Mask.

#define XCANFD_RXBUFFER1_FULL_MASK 0x00000002

RxBuffer1 Full Mask.

#define XCANFD_RXBUFFER20_FULL_MASK 0x00100000

RxBuffer20 Full Mask.

#define XCANFD_RXBUFFER21_FULL_MASK 0x00200000

RxBuffer21 Full Mask.

#define XCANFD_RXBUFFER22_FULL_MASK 0x00400000

RxBuffer22 Full Mask.

#define XCANFD_RXBUFFER23_FULL_MASK 0x00800000

RxBuffer23 Full Mask.

#define XCANFD_RXBUFFER24_FULL_MASK 0x01000000

RxBuffer24 Full Mask.

#define XCANFD_RXBUFFER25_FULL_MASK 0x02000000

RxBuffer25 Full Mask.

#define XCANFD_RXBUFFER26_FULL_MASK 0x04000000

RxBuffer26 Full Mask.

#define XCANFD_RXBUFFER27_FULL_MASK 0x08000000

RxBuffer27 Full Mask.

#define XCANFD_RXBUFFER28_FULL_MASK 0x10000000

RxBuffer28 Full Mask.

#define XCANFD_RXBUFFER29_FULL_MASK 0x20000000

RxBuffer29 Full Mask.

#define XCANFD_RXBUFFER2_FULL_MASK 0x00000004

RxBuffer2 Full Mask.

#define XCANFD_RXBUFFER30_FULL_MASK 0x40000000

RxBuffer30 Full Mask.

#define XCANFD_RXBUFFER31_FULL_MASK 0x80000000

RxBuffer31 Full Mask.

#define XCANFD_RXBUFFER32_FULL_MASK 0x00000001

RxBuffer32 Full Mask.

#define XCANFD_RXBUFFER33_FULL_MASK 0x00000002

RxBuffer33 Full Mask.

#define XCANFD_RXBUFFER34_FULL_MASK 0x00000004

RxBuffer34 Full Mask.

#define XCANFD_RXBUFFER35_FULL_MASK 0x00000008

RxBuffer35 Full Mask.

#define XCANFD_RXBUFFER36_FULL_MASK 0x00000010

RxBuffer36 Full Mask.

#define XCANFD_RXBUFFER37_FULL_MASK 0x00000020

RxBuffer37 Full Mask.

#define XCANFD_RXBUFFER38_FULL_MASK 0x00000040

RxBuffer38 Full Mask.

#define XCANFD_RXBUFFER39_FULL_MASK 0x00000080

RxBuffer39 Full Mask.

#define XCANFD_RXBUFFER3_FULL_MASK 0x00000008

RxBuffer3 Full Mask.

#define XCANFD_RXBUFFER40_FULL_MASK 0x00000100

RxBuffer40 Full Mask.

#define XCANFD_RXBUFFER41_FULL_MASK 0x00000200

RxBuffer41 Full Mask.

#define XCANFD_RXBUFFER42_FULL_MASK 0x00000400

RxBuffer42 Full Mask.

#define XCANFD_RXBUFFER43_FULL_MASK 0x00000800

RxBuffer43 Full Mask.

#define XCANFD_RXBUFFER44_FULL_MASK 0x00001000

RxBuffer44 Full Mask.

#define XCANFD_RXBUFFER45_FULL_MASK 0x00002000

RxBuffer45 Full Mask.

#define XCANFD_RXBUFFER46_FULL_MASK 0x00004000

RxBuffer46 Full Mask.

#define XCANFD_RXBUFFER47_FULL_MASK 0x00008000

RxBuffer47 Full Mask.

#define XCANFD_RXBUFFER4_FULL_MASK 0x00000010

RxBuffer4 Full Mask.

#define XCANFD_RXBUFFER5_FULL_MASK 0x00000020

RxBuffer5 Full Mask.

#define XCANFD_RXBUFFER6_FULL_MASK 0x00000040

RxBuffer6 Full Mask.

#define XCANFD_RXBUFFER7_FULL_MASK 0x00000080

RxBuffer7 Full Mask.

#define XCANFD_RXBUFFER8_FULL_MASK 0x00000100

RxBuffer8 Full Mask.

#define XCANFD_RXBUFFER9_FULL_MASK 0x00000200

RxBuffer9 Full Mask.

#define XCANFD_RXDLC_OFFSET | ( |  | ReadIndex | ) | (XCANFD_RXFIFO_0_BASE_DLC_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DLC Offset.

Parameters

  ReadIndex | is the Buffer number to locate the FIFO

Note
  none

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RXDW_OFFSET | ( |  | ReadIndex | ) | (XCANFD_RXFIFO_0_BASE_DW0_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER DW Offset.

Parameters

  ReadIndex | is the Buffer number to locate the FIFO

Note
  none

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RXFIFO_0_BASE_DLC_OFFSET 0x2104

Rx Message Buffer Element 0 DLC Register.

#define XCANFD_RXFIFO_0_BASE_DW0_OFFSET 0x2108

Rx Message Buffer Element 0 DW Register.

#define XCANFD_RXFIFO_0_BASE_ID_OFFSET 0x2100

Rx Message Buffer Element 0 ID Register.

#define XCANFD_RXFIFO_1_BUFFER_0_BASE_DLC_OFFSET 0x4104

Rx Message Buffer Element 0 DLC Register.

#define XCANFD_RXFIFO_1_BUFFER_0_BASE_DW0_OFFSET 0x4108

Rx Message Buffer Element 0 DW Register.

#define XCANFD_RXFIFO_1_BUFFER_0_BASE_ID_OFFSET 0x4100

Rx Message Buffer Element 0 ID Register.

#define XCANFD_RXFIFO_NEXTDLC_OFFSET 72

Rx Message Buffer Element Next DLC AT Offset.

#define XCANFD_RXFIFO_NEXTDW_OFFSET 72

Rx Message Buffer Element Next DW AT Offset.

#define XCANFD_RXFIFO_NEXTID_OFFSET 72

Rx Message Buffer Element Next ID AT Offset.

#define XCANFD_RXID_OFFSET | ( |  | ReadIndex | ) | (XCANFD_RXFIFO_0_BASE_ID_OFFSET+(ReadIndex*XCANFD_MAX_FRAME_SIZE))

This macro Returns the RXBUFFER ID Offset.

Parameters

  ReadIndex | is the Buffer number to locate the FIFO

Note
  none

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_RXLRM_BI_SHIFT 18

Rx Buffer Index Shift Value.

Referenced by XCanFd_Recv_Mailbox().

#define XCANFD_SR_BBSY_MASK 0x00000020

Bus Busy Mask.

#define XCANFD_SR_BIDLE_MASK 0x00000010

Bus Idle Mask.

#define XCANFD_SR_BSFR_CONFIG_MASK 0x00000400

Bus-Off recovery Mode Indicator Mask.

#define XCANFD_SR_CONFIG_MASK 0x00000001

Configuration Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_ERRWRN_MASK 0x00000040

Error Warning Mask.

#define XCANFD_SR_ESTAT_MASK 0x00000180

Error Status Mask.

#define XCANFD_SR_ESTAT_SHIFT 7

Error Status Shift.

#define XCANFD_SR_LBACK_MASK 0x00000002

Loop Back Mode Mask.

#define XCANFD_SR_NISO_MASK 0x00000800

Non-ISO Core Mask.

#define XCANFD_SR_NORMAL_MASK 0x00000008

Normal Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_OFFSET 0x018

Status Register.

#define XCANFD_SR_PEE_CONFIG_MASK 0x00000200

Protocol Exception Mode Indicator Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_SLEEP_MASK 0x00000004

Sleep Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_SNOOP_MASK 0x00001000

Snoop Mode Mask.

Referenced by XCanFd_GetMode().

#define XCANFD_SR_TDCV_MASK 0x007F0000

Transceiver Dealy compensation Mask.

#define XCANFD_SRR_CEN_MASK 0x00000002

Can Enable Mask.

Referenced by XCanFd_EnterMode(), XCanFd_SetBitRateSwitch_DisableNominal(), and XCanFd_SetBitRateSwitch_EnableNominal().

#define XCANFD_SRR_OFFSET 0x000

Software Reset Register.

Referenced by XCanFd_EnterMode().

#define XCANFD_SRR_SRST_MASK 0x00000001

Reset Mask.

#define XCANFD_TCR_OFFSET 0x098

Tx Buffer Cancel Request Register.

Referenced by XCanFd_TxBuffer_Cancel_Request().

#define XCANFD_TIMESTAMPR_OFFSET 0x0028

Time Stamp Register.

#define XCANFD_TRR_OFFSET 0x090

Tx Buffer Ready Request Register.

Referenced by XCanFd_Addto_Queue(), XCanFd_GetFreeBuffer(), XCanFd_Send(), XCanFd_Send_Queue(), and XCanFd_TxBuffer_Cancel_Request().

#define XCANFD_TXBUFFER0_CANCEL_RQT_MASK 0x00000001

TxBuffer0 Cancel Request Mask.

#define XCANFD_TXBUFFER0_RDY_RQT_MASK 0x00000001

TxBuffer0 Ready Request Mask.

#define XCANFD_TXBUFFER10_CANCEL_RQT_MASK 0x00000400

TxBuffer10 Cancel Request Mask.

#define XCANFD_TXBUFFER10_RDY_RQT_MASK 0x00000400

TxBuffer10 Ready Request Mask.

#define XCANFD_TXBUFFER11_CANCEL_RQT_MASK 0x00000800

TxBuffer11 Cancel Request Mask.

#define XCANFD_TXBUFFER11_RDY_RQT_MASK 0x00000800

TxBuffer11 Ready Request Mask.

#define XCANFD_TXBUFFER12_CANCEL_RQT_MASK 0x00001000

TxBuffer12 Cancel Request Mask.

#define XCANFD_TXBUFFER12_RDY_RQT_MASK 0x00001000

TxBuffer12 Ready Request Mask.

#define XCANFD_TXBUFFER13_CANCEL_RQT_MASK 0x00002000

TxBuffer13 Cancel Request Mask.

#define XCANFD_TXBUFFER13_RDY_RQT_MASK 0x00002000

TxBuffer13 Ready Request Mask.

#define XCANFD_TXBUFFER14_CANCEL_RQT_MASK 0x00004000

TxBuffer14 Cancel Request Mask.

#define XCANFD_TXBUFFER14_RDY_RQT_MASK 0x00004000

TxBuffer14 Ready Request Mask.

#define XCANFD_TXBUFFER15_CANCEL_RQT_MASK 0x00008000

TxBuffer15 Cancel Request Mask.

#define XCANFD_TXBUFFER15_RDY_RQT_MASK 0x00008000

TxBuffer15 Ready Request Mask.

#define XCANFD_TXBUFFER16_CANCEL_RQT_MASK 0x00010000

TxBuffer16 Cancel Request Mask.

#define XCANFD_TXBUFFER16_RDY_RQT_MASK 0x00010000

TxBuffer16 Ready Request Mask.

#define XCANFD_TXBUFFER17_CANCEL_RQT_MASK 0x00020000

TxBuffer17 Cancel Request Mask.

#define XCANFD_TXBUFFER17_RDY_RQT_MASK 0x00020000

TxBuffer17 Ready Request Mask.

#define XCANFD_TXBUFFER18_CANCEL_RQT_MASK 0x00040000

TxBuffer18 Cancel Request Mask.

#define XCANFD_TXBUFFER18_RDY_RQT_MASK 0x00040000

TxBuffer18 Ready Request Mask.

#define XCANFD_TXBUFFER19_CANCEL_RQT_MASK 0x00080000

TxBuffer19 Cancel Request Mask.

#define XCANFD_TXBUFFER19_RDY_RQT_MASK 0x00080000

TxBuffer19 Ready Request Mask.

#define XCANFD_TXBUFFER1_CANCEL_RQT_MASK 0x00000002

TxBuffer1 Cancel Request Mask.

#define XCANFD_TXBUFFER1_RDY_RQT_MASK 0x00000002

TxBuffer1 Ready Request Mask.

#define XCANFD_TXBUFFER20_CANCEL_RQT_MASK 0x00100000

TxBuffer20 Cancel Request Mask.

#define XCANFD_TXBUFFER20_RDY_RQT_MASK 0x00100000

TxBuffer20 Ready Request Mask.

#define XCANFD_TXBUFFER21_CANCEL_RQT_MASK 0x00200000

TxBuffer21 Cancel Request Mask.

#define XCANFD_TXBUFFER21_RDY_RQT_MASK 0x00200000

TxBuffer21 Ready Request Mask.

#define XCANFD_TXBUFFER22_CANCEL_RQT_MASK 0x00400000

TxBuffer22 Cancel Request Mask.

#define XCANFD_TXBUFFER22_RDY_RQT_MASK 0x00400000

TxBuffer22 Ready Request Mask.

#define XCANFD_TXBUFFER23_CANCEL_RQT_MASK 0x00800000

TxBuffer23 Cancel Request Mask.

#define XCANFD_TXBUFFER23_RDY_RQT_MASK 0x00800000

TxBuffer23 Ready Request Mask.

#define XCANFD_TXBUFFER24_CANCEL_RQT_MASK 0x01000000

TxBuffer24 Cancel Request Mask.

#define XCANFD_TXBUFFER24_RDY_RQT_MASK 0x01000000

TxBuffer24 Ready Request Mask.

#define XCANFD_TXBUFFER25_CANCEL_RQT_MASK 0x02000000

TxBuffer25 Cancel Request Mask.

#define XCANFD_TXBUFFER25_RDY_RQT_MASK 0x02000000

TxBuffer25 Ready Request Mask.

#define XCANFD_TXBUFFER26_CANCEL_RQT_MASK 0x04000000

TxBuffer26 Cancel Request Mask.

#define XCANFD_TXBUFFER26_RDY_RQT_MASK 0x04000000

TxBuffer26 Ready Request Mask.

#define XCANFD_TXBUFFER27_CANCEL_RQT_MASK 0x08000000

TxBuffer27 Cancel Request Mask.

#define XCANFD_TXBUFFER27_RDY_RQT_MASK 0x08000000

TxBuffer27 Ready Request Mask.

#define XCANFD_TXBUFFER28_CANCEL_RQT_MASK 0x10000000

TxBuffer28 Cancel Request Mask.

#define XCANFD_TXBUFFER28_RDY_RQT_MASK 0x10000000

TxBuffer28 Ready Request Mask.

#define XCANFD_TXBUFFER29_CANCEL_RQT_MASK 0x20000000

TxBuffer29 Cancel Request Mask.

#define XCANFD_TXBUFFER29_RDY_RQT_MASK 0x20000000

TxBuffer29 Ready Request Mask.

#define XCANFD_TXBUFFER2_CANCEL_RQT_MASK 0x00000004

TxBuffer2 Cancel Request Mask.

#define XCANFD_TXBUFFER2_RDY_RQT_MASK 0x00000004

TxBuffer2 Ready Request Mask.

#define XCANFD_TXBUFFER30_CANCEL_RQT_MASK 0x40000000

TxBuffer30 Cancel Request Mask.

#define XCANFD_TXBUFFER30_RDY_RQT_MASK 0x40000000

TxBuffer30 Ready Request Mask.

#define XCANFD_TXBUFFER31_CANCEL_RQT_MASK 0x80000000

TxBuffer31 Cancel Request Mask.

#define XCANFD_TXBUFFER31_RDY_RQT_MASK 0x80000000

TxBuffer31 Ready Request Mask.

#define XCANFD_TXBUFFER3_CANCEL_RQT_MASK 0x00000008

TxBuffer3 Cancel Request Mask.

#define XCANFD_TXBUFFER3_RDY_RQT_MASK 0x00000008

TxBuffer3 Ready Request Mask.

#define XCANFD_TXBUFFER4_CANCEL_RQT_MASK 0x00000010

TxBuffer4 Cancel Request Mask.

#define XCANFD_TXBUFFER4_RDY_RQT_MASK 0x00000010

TxBuffer4 Ready Request Mask.

#define XCANFD_TXBUFFER5_CANCEL_RQT_MASK 0x00000020

TxBuffer5 Cancel Request Mask.

#define XCANFD_TXBUFFER5_RDY_RQT_MASK 0x00000020

TxBuffer5 Ready Request Mask.

#define XCANFD_TXBUFFER6_CANCEL_RQT_MASK 0x00000040

TxBuffer6 Cancel Request Mask.

#define XCANFD_TXBUFFER6_RDY_RQT_MASK 0x00000040

TxBuffer6 Ready Request Mask.

#define XCANFD_TXBUFFER7_CANCEL_RQT_MASK 0x00000080

TxBuffer7 Cancel Request Mask.

#define XCANFD_TXBUFFER7_RDY_RQT_MASK 0x00000080

TxBuffer7 Ready Request Mask.

#define XCANFD_TXBUFFER8_CANCEL_RQT_MASK 0x00000100

TxBuffer8 Cancel Request Mask.

#define XCANFD_TXBUFFER8_RDY_RQT_MASK 0x00000100

TxBuffer8 Ready Request Mask.

#define XCANFD_TXBUFFER9_CANCEL_RQT_MASK 0x00000200

TxBuffer9 Cancel Request Mask.

#define XCANFD_TXBUFFER9_RDY_RQT_MASK 0x00000200

TxBuffer9 Ready Request Mask.

#define XCANFD_TXDLC_OFFSET | ( |  | FreeBuffer | ) | (XCANFD_TXFIFO_0_BASE_DLC_OFFSET+(FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))

This macro Returns the TXBUFFER DLC Offset.

Parameters

  FreeBuffer | is the Buffer number to locate the FIFO

Note
  none

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCANFD_TXDW_OFFSET | ( |  | FreeBuffer | ) | (XCANFD_TXFIFO_0_BASE_DW0_OFFSET+(FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))

This macro Returns the TXBUFFER DW Offset.

Parameters

  FreeBuffer | is the Buffer number to locate the FIFO

Note
  none

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCANFD_TXE_FL_MASK 0x00001F00

TX Event FIFO Fill Level Mask.

Referenced by XCanFd_GetNofMessages_Stored_TXE_FIFO(), and XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXE_FL_SHIFT 8

TX Event FIFO Fill Level Shift.

Referenced by XCanFd_GetNofMessages_Stored_TXE_FIFO().

#define XCANFD_TXE_FSR_OFFSET 0x000000A0

TX Event FIFO Status Register Offset.

Referenced by XCanFd_GetNofMessages_Stored_TXE_FIFO(), and XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXE_FWM_MASK 0x0000001F

TX Event FIFO watermark Mask.

#define XCANFD_TXE_FWM_OFFSET 0x000000A4

TX Event FIFO watermark Offset.

#define XCANFD_TXE_IRI_MASK 0x00000080

TX Event FIFO Increment Read Index Mask.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXE_IRI_SHIFT 7

TX Event FIFO Increment Read Index SHIFT.

#define XCANFD_TXE_RI_MASK 0x0000001F

TX Event FIFO Read Index Mask.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXEDLC_OFFSET | ( |  | TXEVENTIndex | ) | (XCANFD_TXEFIFO_0_BASE_DLC_OFFSET+(TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))

This macro Returns the TX Event Buffer DLC Offset.

Parameters

  TXEVENTIndex | is the Buffer number to locate the FIFO

Note
  This API is meant to be used with IP with CanFD 2.0 spec support only.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXEFIFO_0_BASE_DLC_OFFSET 0x2004

Tx Event Message Buffer Element 0 DLC Register.

#define XCANFD_TXEFIFO_0_BASE_ID_OFFSET 0x2000

Tx Event Message Buffer Element 0 ID Register.

#define XCANFD_TXEID_OFFSET | ( |  | TXEVENTIndex | ) | (XCANFD_TXEFIFO_0_BASE_ID_OFFSET+(TXEVENTIndex*XCANFD_TXE_MESSAGE_SIZE))

This macro Returns the TX Event Buffer ID Offset.

Parameters

  TXEVENTIndex | is the Buffer number to locate the TXE FIFO Index

Note
  This API is meant to be used with IP with CanFD 2.0 spec support only.

Referenced by XCanFd_Recv_TXEvents_Sequential().

#define XCANFD_TXFIFO_0_BASE_DLC_OFFSET 0x0104

Tx Message Buffer Element 0 DLC Register.

#define XCANFD_TXFIFO_0_BASE_DW0_OFFSET 0x0108

Tx Message Buffer Element 0 DW Register.

#define XCANFD_TXFIFO_0_BASE_ID_OFFSET 0x0100

Tx Message Buffer Element 0 ID Register.

#define XCANFD_TXID_OFFSET | ( |  | FreeBuffer | ) | (XCANFD_TXFIFO_0_BASE_ID_OFFSET+(FreeTxBuffer*XCANFD_MAX_FRAME_SIZE))

This macro Returns the TXBUFFER ID Offset.

Parameters

  FreeBuffer | is the Buffer number to locate the FIFO Index

Note
  none

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

#define XCANFD_WIR_MASK 0x0000003F

Rx FIFO Full watermark Mask.

Referenced by XCanFd_SetRxIntrWatermark().

#define XCANFD_WIR_OFFSET 0x0EC

Rx FIFO Water Mark Register.

Referenced by XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), and XCanFd_SetRxIntrWatermarkFifo1().

#define XCANFD_WMR_RXFP_MASK 0x001F0000

Receive filter partition Mask.

Referenced by XCanFd_SetRxFilterPartition().

#define XCANFD_WMR_RXFP_SHIFT 16

Receive filter partition Mask.

Referenced by XCanFd_SetRxFilterPartition().

#define XCANFD_WMR_RXFWM_1_MASK 0x00003F00

RX FIFO 1 Full Watermark Mask.

Referenced by XCanFd_SetRxIntrWatermarkFifo1().

#define XCANFD_WMR_RXFWM_1_MASK 0x00003F00

RX FIFO 1 Full Watermark Mask.

#define XCANFD_WMR_RXFWM_1_SHIFT 8

RX FIFO 1 Full Watermark Mask.

Referenced by XCanFd_SetRxIntrWatermarkFifo1().

#define XCANFD_WMR_RXFWM_MASK 0x0000003F

RX FIFO 0 Full Watermark Mask.

#define XCanFd_WriteReg | ( |  | BaseAddress,
|  |  | RegOffset,
|  |  | Data
| ) |  | Xil_Out32((BaseAddress) + (RegOffset), (Data))

This macro writes the given register.

Parameters

  BaseAddress | is the base address of the device
  RegOffset | is the register offset to be written
  Data | is the 32-bit value to write to the register

Returns
  None.

Note
  C-Style signature: u32 XCanFd_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data);

Referenced by XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), XCanFd_AcceptFilterSet(), XCanFd_Addto_Queue(), XCanFd_Disable_Tranceiver_Delay_Compensation(), XCanFd_Enable_Tranceiver_Delay_Compensation(), XCanFd_EnterMode(), XCanFd_InterruptClear(), XCanFd_InterruptDisable(), XCanFd_InterruptDisable_CancelRqt(), XCanFd_InterruptDisable_ReadyRqt(), XCanFd_InterruptDisable_RxBuffFull(), XCanFd_InterruptEnable(), XCanFd_InterruptEnable_CancelRqt(), XCanFd_InterruptEnable_ReadyRqt(), XCanFd_InterruptEnable_RxBuffFull(), XCanFd_Recv_Mailbox(), XCanFd_Recv_TXEvents_Sequential(), XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), XCanFd_Send(), XCanFd_Send_Queue(), XCanFd_Set_MailBox_IdMask(), XCanFd_Set_Tranceiver_Delay_Compensation(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitRateSwitch_DisableNominal(), XCanFd_SetBitRateSwitch_EnableNominal(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetFBitTiming(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), XCanFd_SetTxEventIntrWatermark(), and XCanFd_TxBuffer_Cancel_Request().

#define XST_BUFFER_ALREADY_FILLED 34L

Given Buffer is Already filled.

#define XST_INVALID_DLC 16L

Invalid Dlc code.

Referenced by XCanFd_GetLen2Dlc().

#define XST_NOBUFFER 33L

All Buffers (32) are filled.

Referenced by XCanFd_Addto_Queue(), XCanFd_GetFreeBuffer(), and XCanFd_Send().

## Typedef Documentation

typedef void(* XCanFd_ErrorHandler)(void *CallBackRef, u32 ErrorMask)

Callback type for error interrupt.

Parameters

  CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
  ErrorMask | is a bit mask indicating the cause of the error. Its value equals 'OR'ing one or more XCANFD_ESR_* values defined in xcan_l.h

typedef void(* XCanFd_EventHandler)(void *CallBackRef, u32 Mask)

Callback type for all kinds of interrupts except sending frame interrupt, receiving frame interrupt, and error interrupt.

Parameters

  CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.
  Mask | is a bit mask indicating the pending interrupts. Its value equals 'OR'ing one or more XCANFD_IXR_* defined in xcanfd_hw.h

typedef void(* XCanFd_SendRecvHandler)(void *CallBackRef)

Callback type for frame sending and reception interrupts.

Parameters

  CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked.

## Function Documentation

void XCanFd_AcceptFilterDisable | ( | XCanFd * | InstancePtr,
|  | u32 | FilterIndexMask
| ) |  |

This routine disables the acceptance filters.

32 filters can be disabled.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FilterIndexMask | specifies which filter(s) to disable. Use any XCANFD_AFR_UAF*_MASK to disable one filter, and "Or" multiple XCANFD_AFR_UAF*_MASK values if multiple filters need to be disabled. Any filter not specified in this parameter will keep its previous enable/disable setting. If all acceptance filters are disabled then all received frames are stored in the RX FIFO.

Returns
  None.

Note
  None

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_AFR_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

void XCanFd_AcceptFilterEnable | ( | XCanFd * | InstancePtr,
|  | u32 | FilterIndexMask
| ) |  |

This routine enables the acceptance filters.

Up to 32 filters can be enabled.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FilterIndexMask | specifies which filter(s) to enable. Use any XCANFD_AFR_UAF*_MASK to enable one filter, and "Or" multiple XCANFD_AFR_UAF*_MASK values if multiple filters need to be enabled. Any filter not specified in this parameter will keep its previous enable/disable setting.

Returns
  None.

Note
  In Sequential Mode, in order to receive data, we need to enable these filters. if we want to make filtration i.e Id match then we need to set the Id value in AFR Id register.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_AFR_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

void XCanFd_AcceptFilterGet | ( | XCanFd * | InstancePtr,
|  | u32 | FilterIndex,
|  | u32 * | MaskValue,
|  | u32 * | IdValue
| ) |  |

This function reads the values of the Acceptance Filter Mask and ID Register for the specified Acceptance Filter.

Use XCANFD_IDR_* defined in xcanfd_hw.h to interpret the values. Read xcanfd.h and device specification for details.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FilterIndex | defines which Acceptance Filter Mask Register to get Mask and ID from. Use any single XCANFD_FILTER_* value.
  MaskValue | will store the Mask value read from the chosen Acceptance Filter Mask Register after this function returns.
  IdValue | will store the ID value read from the chosen Acceptance Filter ID Register after this function returns.

Returns
  None.

Note
  Acceptance Filter Mask and ID Registers are optional registers in Xilinx CAN device. If they are NOT existing in the device, this function should NOT be used. Calling this function in this case will cause an assertion failure.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_AFIDR_OFFSET, XCANFD_AFMR_OFFSET, XCANFD_NOOF_AFR, and XCanFd_ReadReg.

u32 XCanFd_AcceptFilterGetEnabled | ( | XCanFd * | InstancePtr | ) |

This function returns enabled acceptance filters.

Use XCANFD_AFR_UAF*_MASK defined in xcanfd_hw.h to interpret the returned value. If no acceptance filters are enabled then all received frames are stored in the RX FIFO.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  The value stored in Acceptance Filter Register.

Note
  Acceptance Filter Register is an optional register in Xilinx CAN device If it is NOT existing in the device, this function should NOT be used.Calling this function in this case will cause an assertion failure.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_AFR_OFFSET, and XCanFd_ReadReg.

Referenced by XCanFd_AcceptFilterSet().

int XCanFd_AcceptFilterSet | ( | XCanFd * | InstancePtr,
|  | u32 | FilterIndex,
|  | u32 | MaskValue,
|  | u32 | IdValue
| ) |  |

This function sets values to the Acceptance Filter Mask Register (AFMR) and Acceptance Filter ID Register (AFIR) for the specified Acceptance Filter.

Use XCANFD_IDR_* defined in xcanfd_hw.h to create the values to set the filter. Read xcanfd.h and device specification for details.

This function should be called only after:

- The given filter is disabled by calling XCanFd_AcceptFilterDisable();
- And the CAN device is ready to accept writes to AFMR and AFIR, i.e., XCanFd_IsAcceptFilterBusy() returns FALSE.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FilterIndex | defines which Acceptance Filter Mask and ID Register to set. Use any single XCANFD_AFR_UAF*_MASK value.ranges from 1 32
  MaskValue | is the value to write to the chosen Acceptance Filter Mask Register.
  IdValue | is the value to write to the chosen Acceptance Filter ID Register.

Returns
  - XST_SUCCESS if the values were set successfully.
  - XST_FAILURE if the given filter was not disabled, or the CAN device was not ready to accept writes to AFMR and AFIR.

Note
  Acceptance Filter Mask and ID Registers are optional registers in Xilinx XCanFd device.if they are not configured then device will receive data with any ID.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_AcceptFilterGetEnabled(), XCANFD_AFIDR_OFFSET, XCANFD_AFMR_OFFSET, and XCanFd_WriteReg.

int XCanFd_Addto_Queue | ( | XCanFd * | InstancePtr,
|  | u32 * | FramePtr,
|  | u32 * | TxBufferNumber
| ) |  |

This function writes the Data into specific Buffer.we have 32 TxBuffers we can Add data to each Buffer using this routine.This routine won't transmit the data.

it only adds data to Buffers.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FramePtr | is a pointer to a 32-bit aligned buffer containing the CAN frame to be sent.
  TxBufferNumber | is Buffer Number where the data has written and is given back to user.

Returns
  - XST_SUCCESS if TX FIFO was not full and the given frame was written into the FIFO;
  - XST_FIFO_NO_ROOM if there is no room in the TX FIFO for the given frame

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::GlobalTrrMask, XCanFd::GlobalTrrValue, XCanFd::IsReady, XCanFd::MultiBuffTrr, XCanFD_Check_TrrVal_Set_Bit, XCANFD_DLCR_DLC_MASK, XCANFD_DLCR_EDL_MASK, XCANFD_DW_BYTES, XCanFd_GetDlc2len(), XCanFd_GetFreeBuffer(), XCanFd_ReadReg, XCANFD_TRR_OFFSET, XCANFD_TXDLC_OFFSET, XCANFD_TXDW_OFFSET, XCANFD_TXID_OFFSET, XCanFd_WriteReg, and XST_NOBUFFER.

int XCanFd_CfgInitialize | ( | XCanFd * | InstancePtr,
|  | XCanFd_Config * | ConfigPtr,
|  | UINTPTR | EffectiveAddr
| ) |  |

This routine initializes a specific XCanFd instance/driver.

This function should only be used when no Virtual Memory support is needed.

This initialization entails:

- Search for device configuration given the device ID.
- Initialize Base Address field of the XCanFd structure using the device
- address in the found device configuration.
- Populate all other data fields in the XCanFd structure
- Reset the device.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  ConfigPtr | is the pointer to XCanFd_Config instance
  EffectiveAddr | is the base address of CANFD

Returns
  - XST_SUCCESS if initialization was successful
  - XST_DEVICE_NOT_FOUND if device configuration information was not found for a device with the supplied device ID.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd_Config::DeviceId, XCanFd::IsReady, XCanFd_Config::NumofRxMbBuf, XCanFd_Config::NumofTxBuf, XCanFd_Config::Rx_Mode, and XCanFd_Reset.

void XCanFd_Disable_Tranceiver_Delay_Compensation | ( | XCanFd * | InstancePtr | ) |

This function Disables the Transceiver delay compensation.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BRPR_OFFSET, XCANFD_F_BRPR_TDC_ENABLE_MASK, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_Enable_Tranceiver_Delay_Compensation | ( | XCanFd * | InstancePtr | ) |

This function Enables the Transceiver delay compensation.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BRPR_OFFSET, XCANFD_F_BRPR_TDC_ENABLE_MASK, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_EnterMode | ( | XCanFd * | InstancePtr,
|  | u8 | OperationMode
| ) |  |

This function allows the CAN device to enter one of the following operation modes:

- Configuration Mode: Pass in parameter XCANFD_MODE_CONFIG
- Sleep Mode: Pass in parameter XCANFD_MODE_SLEEP
- Normal Mode: Pass in parameter XCANFD_MODE_NORMAL
- Loop Back Mode: Pass in parameter XCANFD_MODE_LOOPBACK
- Snoop Mode: Pass in Parameter XCANFD_MODE_SNOOP
- Auto Bus-Off Recovery Mode: Pass in Parameter XCANFD_MODE_ABR
- Start Bus-Off Recovery Mode: Pass in Parameter XCANFD_MODE_SBR
- Protocol Exception Event Mode: Pass in Parameter XCANFD_MODE_PEE
- Disable AutoRetransmission Mode: Pass in Parameter XCANFD_MODE_DAR

Read xcanfd.h and device specification for detailed description of each operation mode.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  OperationMode | specify which operation mode to enter.Valid value is any of XCANFD_MODE_* defined in xcanfd.h. Please note no multiple modes could be entered at the same time.

Returns
  None.

Note
  This function does NOT ensure CAN device enters the specified operation mode before returns the control to the caller. The caller is responsible for checking current operation mode using XCanFd_GetMode().

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_ABR, XCANFD_MODE_CONFIG, XCANFD_MODE_DAR, XCANFD_MODE_LOOPBACK, XCANFD_MODE_NORMAL, XCANFD_MODE_PEE, XCANFD_MODE_SBR, XCANFD_MODE_SLEEP, XCANFD_MODE_SNOOP, XCANFD_MSR_ABR_MASK, XCANFD_MSR_CONFIG_MASK, XCANFD_MSR_DAR_MASK, XCANFD_MSR_DPEE_MASK, XCANFD_MSR_LBACK_MASK, XCANFD_MSR_OFFSET, XCANFD_MSR_SBR_MASK, XCANFD_MSR_SLEEP_MASK, XCANFD_MSR_SNOOP_MASK, XCanFd_ReadReg, XCANFD_SRR_CEN_MASK, XCANFD_SRR_OFFSET, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

u8 XCanFd_GetBaudRatePrescaler | ( | XCanFd * | InstancePtr | ) |

This routine gets Baud Rate Prescaler value.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  Current used Baud Rate Prescaler value. The value's range is from 0 to 255.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_OFFSET, and XCanFd_ReadReg.

void XCanFd_GetBitTiming | ( | XCanFd * | InstancePtr,
|  | u8 * | SyncJumpWidth,
|  | u8 * | TimeSegment2,
|  | u8 * | TimeSegment1
| ) |  |

This routine gets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width values are read in this function. According to device specification, the actual value of each of these fields is one more than the value read. Read the device specification for details.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  SyncJumpWidth | will store the Synchronization Jump Width value after this function returns. Its value ranges from 0 to 3.
  TimeSegment2 | will store the Time Segment 2 value after this function returns. Its value ranges from 0 to 7.
  TimeSegment1 | will store the Time Segment 1 value after this function returns. Its value ranges from 0 to 15.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BTR_OFFSET, XCANFD_BTR_SJW_MASK, XCANFD_BTR_SJW_SHIFT, XCANFD_BTR_TS1_MASK, XCANFD_BTR_TS2_MASK, XCANFD_BTR_TS2_SHIFT, and XCanFd_ReadReg.

void XCanFd_GetBusErrorCounter | ( | XCanFd * | InstancePtr,
|  | u8 * | RxErrorCount,
|  | u8 * | TxErrorCount
| ) |  |

This function reads Receive and Transmit error counters.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  RxErrorCount | will contain Receive Error Counter value after this function returns.
  TxErrorCount | will contain Transmit Error Counter value after this function returns.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_ECR_OFFSET, XCANFD_ECR_REC_MASK, XCANFD_ECR_REC_SHIFT, XCANFD_ECR_TEC_MASK, and XCanFd_ReadReg.

XCanFd_Config * XCanFd_GetConfig | ( | unsigned int | InstanceIndex | ) |

This function looks for the device configuration based on the device index.

The table XCanFd_ConfigTable[] contains the configuration information for each device in the system.

Parameters

  InstanceIndex | is a 0-based integer indexing all CAN devices in the system.

Returns
  A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.

Note
  None.

int XCanFd_GetDlc2len | ( | u32 | Dlc,
|  | u32 | Edl
| ) |  |

This function returns Data Length Code(in Bytes),we need to pass DLC Field value in DLC Register.

Parameters

  Dlc | Field in Data Length Code Register.
  Edl/Fdf | Field in DLC register.

Returns
  Total Number of Bytes stored in each Buffer.

Note
  Refer CAN FD Spec about DLC.

References XCANFD_DLC1, XCANFD_DLC10, XCANFD_DLC11, XCANFD_DLC12, XCANFD_DLC13, XCANFD_DLC14, XCANFD_DLC15, XCANFD_DLC2, XCANFD_DLC3, XCANFD_DLC4, XCANFD_DLC5, XCANFD_DLC6, XCANFD_DLC7, XCANFD_DLC8, XCANFD_DLC9, and XCANFD_DLCR_DLC_SHIFT.

Referenced by XCanFd_Addto_Queue(), XCanFd_Recv_Mailbox(), XCanFd_SelfTest(), and XCanFd_Send().

u8 XCanFd_GetFBaudRatePrescaler | ( | XCanFd * | InstancePtr | ) |

This routine gets Baud Rate Prescaler value in Data Phase.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  Current used Baud Rate Prescaler value. The value's range is from 1 to 256.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_BRP_MASK, XCANFD_F_BRPR_OFFSET, and XCanFd_ReadReg.

void XCanFd_GetFBitTiming | ( | XCanFd * | InstancePtr,
|  | u8 * | SyncJumpWidth,
|  | u8 * | TimeSegment2,
|  | u8 * | TimeSegment1
| ) |  |

This routine gets Bit time in Data Phase.

Time segment 1, Time segment 2 and Synchronization Jump Width values are read in this function. According to device specification, the actual value of each of these fields is one more than the value read. Read the device specification for details.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  SyncJumpWidth | will store the Synchronization Jump Width value after this function returns. Its value ranges from 0 to 3.
  TimeSegment2 | will store the Time Segment 2 value after this function returns. Its value ranges from 0 to 7.
  TimeSegment1 | will store the Time Segment 1 value after this function returns. Its value ranges from 0 to 15.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BTR_OFFSET, XCANFD_F_BTR_SJW_MASK, XCANFD_F_BTR_SJW_SHIFT, XCANFD_F_BTR_TS1_MASK, XCANFD_F_BTR_TS2_MASK, XCANFD_F_BTR_TS2_SHIFT, and XCanFd_ReadReg.

u32 XCanFd_GetFreeBuffer | ( | XCanFd * | InstancePtr | ) |

This Routine returns the Free Buffer out of 32 Transmit Buffers.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  Returns Free buffer if any free buffer other wise returns XST_NOBUFFER.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_TRR_OFFSET, and XST_NOBUFFER.

Referenced by XCanFd_Addto_Queue(), and XCanFd_Send().

u8 XCanFd_GetLen2Dlc | ( | int | len | ) |

This function returns Data Length Code of 4bits,we need to pass length in bytes.

Parameters

  len | is the length in bytes.

Returns
  Total Number of Bytes stored in each Buffer.

Note
  Refer CAN FD Spec about DLC.

References XST_INVALID_DLC.

Referenced by XCanFd_SelfTest().

u8 XCanFd_GetMode | ( | XCanFd * | InstancePtr | ) |

This routine returns current operation mode the CAN device is in.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  - XCANFD_MODE_CONFIG if the device is in Configuration Mode.
  - XCANFD_MODE_SLEEP if the device is in Sleep Mode.

- XCANFD_MODE_NORMAL if the device is in Normal Mode.
- XCANFD_MODE_LOOPBACK if the device is in Loop Back Mode.
- XCANFD_MODE_SNOOP if the device is in Snoop Mode.
- XCANFD_MODE_BR if the device is in Bus-Off recovery Mode.
- XCANFD_MODE_PEE if the device is in Protocol Exception Event mode.
  Note
    None.

References XCanFd::IsReady, XCanFd_GetStatus, XCANFD_MODE_CONFIG, XCANFD_MODE_LOOPBACK, XCANFD_MODE_NORMAL, XCANFD_MODE_PEE, XCANFD_MODE_SLEEP, XCANFD_MODE_SNOOP, XCANFD_SR_CONFIG_MASK, XCANFD_SR_NORMAL_MASK, XCANFD_SR_PEE_CONFIG_MASK, XCANFD_SR_SLEEP_MASK, and XCANFD_SR_SNOOP_MASK.

Referenced by XCanFd_EnterMode(), XCanFd_SelfTest(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), XCanFd_SetFBitTiming(), XCanFd_SetRxFilterPartition(), XCanFd_SetRxIntrWatermark(), XCanFd_SetRxIntrWatermarkFifo1(), and XCanFd_SetTxEventIntrWatermark().

int XCanFd_GetNofMessages_Stored_Rx_Fifo | ( | XCanFd * | InstancePtr,
|  | u8 | fifo_no
| ) |  |

This function returns Number of messages Stored.

The FSR Register has Field called FL. this gives number of packets received.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  Value is the number of messages stored in FSR Register.

Note
  Selects either Rx Fifo 0 or Rx Fifo 1

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_FSR_FL_0_SHIFT, XCANFD_FSR_FL_1_MASK, XCANFD_FSR_FL_1_SHIFT, XCANFD_FSR_FL_MASK, XCANFD_FSR_OFFSET, XCanFd_ReadReg, and XCANFD_RX_FIFO_0.

int XCanFd_GetNofMessages_Stored_TXE_FIFO | ( | XCanFd * | InstancePtr | ) |

This function returns Number of messages Stored in TX Event FIFO The FSR Register has Field called FL.

this gives number of packets received.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  Value is the number of messages stored in FSR Register.

Note
  This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_TXE_FL_MASK, XCANFD_TXE_FL_SHIFT, and XCANFD_TXE_FSR_OFFSET.

void XCanFd_InterruptClear | ( | XCanFd * | InstancePtr,
|  | u32 | Mask
| ) |  |

This function clears interrupt(s).

Every bit set in Interrupt Status Register indicates that a specific type of interrupt is occurring, and this function clears one or more interrupts by writing a bit mask to Interrupt Clear Register.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to clear. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status. This mask is formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_hw.h.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_ICR_OFFSET, XCanFd_InterruptGetStatus, and XCanFd_WriteReg.

Referenced by XCanFd_IntrHandler().

void XCanFd_InterruptDisable | ( | XCanFd * | InstancePtr,
|  | u32 | Mask
| ) |  |

This routine disables interrupt(s).

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to create the bit-mask to disable interrupt(s).

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_hw.h.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IER_OFFSET, XCanFd_InterruptGetEnabled, and XCanFd_WriteReg.

void XCanFd_InterruptDisable_CancelRqt | ( | XCanFd * | InstancePtr,
|  | u32 | Mask
| ) |  |

This routine disables the TxBuffer Cancel Request interrupt(s).

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_IETCS_OFFSET* bits defined in xcanfd_hw.h.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptDisable_ReadyRqt | ( | XCanFd * | InstancePtr,
|  | u32 | Mask
| ) |  |

This routine disables TxBuffer Ready Request interrupt(s).

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_IETRS_OFFSET* bits defined in xcanfd_hw.h.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETRS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptDisable_RxBuffFull | ( | XCanFd * | InstancePtr,
|  | u32 | Mask,
|  | u32 | RxBuffNumber
| ) |  |

This routine disables the RxBuffer Full interrupt(s) in MailBox Mode.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_RXBFLL*_OFFSET bits defined in xcanfd_hw.h.
  RxBuffNumber | has two values if 0 -> Access RxBufferFull0 Reg. else -> Access RxBufferFull1 Reg.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_RXBFLL1_OFFSET, XCANFD_RXBFLL2_OFFSET, and XCanFd_WriteReg.

void XCanFd_InterruptEnable | ( | XCanFd * | InstancePtr,
|  | u32 | Mask
| ) |  |

This routine enables interrupt(s).

Use the XCANFD_IXR_* constants defined in xcanfd_hw.h to create the bit-mask to enable interrupts.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IXR_* bits defined in xcanfd_hw.h.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IER_OFFSET, XCanFd_InterruptGetEnabled, and XCanFd_WriteReg.

void XCanFd_InterruptEnable_CancelRqt | ( | XCanFd * | InstancePtr,
|  | u32 | Mask
| ) |  |

This routine enables TxBuffer Cancellation interrupt(s).

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IETCS_OFFSET* bits defined in xcanfd_hw.h.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptEnable_ReadyRqt | ( | XCanFd * | InstancePtr,
|  | u32 | Mask
| ) |  |

This routine enables TxBuffer Ready Request interrupt(s).

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to enable. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting. This mask is formed by OR'ing XCANFD_IETRS_OFFSET* bits defined in xcanfd_hw.h.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_IETRS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

void XCanFd_InterruptEnable_RxBuffFull | ( | XCanFd * | InstancePtr,
|  | u32 | Mask,
|  | u32 | RxBuffNumber
| ) |  |

This routine Enables the RxBuffer Full interrupt(s) in MailBox Mode.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Mask | is the mask to disable. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting. This mask is formed by AND'ing XCANFD_RXBFLL*_OFFSET bits defined in xcanfd_hw.h.
  RxBuffNumber | has two values if 0 -> Access RxBufferFull0 Reg else -> Access RxBufferFull1 Reg

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_RXBFLL1_OFFSET, XCANFD_RXBFLL2_OFFSET, and XCanFd_WriteReg.

void XCanFd_IntrHandler | ( | void * | InstancePtr | ) |

This routine is the interrupt handler for the CAN driver.

This handler reads the interrupt status from the ISR, determines the source of the interrupts, calls according callbacks, and finally clears the interrupts.

Application beyond this driver is responsible for providing callbacks to handle interrupts and installing the callbacks using XCanFd_SetHandler() during initialization phase. An example delivered with this driver demonstrates how this could be done.

Parameters

  InstancePtr | is a pointer to the XCanFd instance that just interrupted.

Returns
  None.

Note
  None.

References XCanFd::IsReady, XCanFd_ClearBusErrorStatus, XCanFd_GetBusErrorStatus, XCanFd_InterruptClear(), XCanFd_InterruptGetEnabled, XCanFd_InterruptGetStatus, XCANFD_IXR_ARBLST_MASK, XCANFD_IXR_BSOFF_MASK, XCANFD_IXR_BSRD_MASK, XCANFD_IXR_ERROR_MASK, XCANFD_IXR_PEE_MASK, XCANFD_IXR_RXBOFLW_BI_MASK, XCANFD_IXR_RXBOFLW_MASK, XCANFD_IXR_RXFOFLW_MASK, XCANFD_IXR_RXFWMFLL_1_MASK, XCANFD_IXR_RXFWMFLL_MASK, XCANFD_IXR_RXMNF_MASK, XCANFD_IXR_RXOK_MASK, XCANFD_IXR_RXRBF_MASK, XCANFD_IXR_SLP_MASK, XCANFD_IXR_TSCNT_OFLW_MASK, XCANFD_IXR_TXCRS_MASK, XCANFD_IXR_TXEOFLW_MASK, XCANFD_IXR_TXEWMFLL_MASK, XCANFD_IXR_TXOK_MASK, XCANFD_IXR_TXRRS_MASK, and XCANFD_IXR_WKUP_MASK.

XCanFd_Config * XCanFd_LookupConfig | ( | u16 | DeviceId | ) |

This function looks for the device configuration based on the unique device ID.

The table XCanFd_ConfigTable[] contains the configuration information for each device in the system.

Parameters

  DeviceId | is the unique device ID of the device being looked up.

Returns
  A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.

Note
  None.

void XCanFd_PollQueue_Buffer | ( | XCanFd * | InstancePtr | ) |

This function Polls the TxBuffer(s) whether it is transmitted or not.

This function can call when user sends multiple Buffers using Addto_Queue() and XCanFd_Send_Queue().

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  None.

Note
  None.

References XCanFd::IsReady, XCanFd::MultiBuffTrr, and XCanFd_IsBufferTransmitted.

u32 XCanFd_Recv_Mailbox | ( | XCanFd * | InstancePtr,
|  | u32 * | FramePtr
| ) |  |

This function receives a CAN Frame in MAIL BOX Mode.

Read Rx Last Buffer Index from ISR Register. This tells which buffer is having data.then read and update the data to user buffer.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FramePtr | is a pointer to a 32-bit aligned buffer where the CAN frame to be receive.

Returns
  - XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer;
  - XST_NO_DATA if there is no frame to be received from the FIFO

Note
  This CANFD has two design modes. ->Sequential Mode - Core writes data sequentially to RxBuffers. ->MailBox Mode - Core writes data to RxBuffers when a ID match happened. This routine is useful for MailBox Mode.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_CSB_SHIFT, XCANFD_DLCR_DLC_MASK, XCANFD_DLCR_EDL_MASK, XCANFD_DW_BYTES, XCanFd_GetDlc2len(), XCANFD_ISR_OFFSET, XCANFD_IXR_RXLRM_BI_MASK, XCANFD_RCS_HCB_MASK, XCANFD_RCS_OFFSET, XCanFd_ReadReg, XCANFD_RXDLC_OFFSET, XCANFD_RXDW_OFFSET, XCANFD_RXID_OFFSET, XCANFD_RXLRM_BI_SHIFT, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

u32 XCanFd_Recv_Sequential | ( | XCanFd * | InstancePtr,
|  | u32 * | FramePtr
| ) |  |

This function receives a CAN/CAN FD Frame.

This function first checks FSR Register.The FL bits tells the Number of Packets received. if FL is non Zero then Read the Packet and store it to user Buffer.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FramePtr | is a pointer to a 32-bit aligned buffer where the CAN/CAN FD frame to be written.

Returns
  - XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer;
  - XST_NO_DATA if there is no frame to be received from the FIFO

Note
  The CANFD has two design modes. ->Sequential Mode - Core writes data sequentially to RxBuffers. ->MailBox Mode - Core writes data to RxBuffers when a ID Match happened. This routine distinguishes receive checking as per the frame availability from either Fifo 0 or Fifo 1.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_FSR_FL_1_MASK, XCANFD_FSR_FL_MASK, XCANFD_FSR_IRI_1_MASK, XCANFD_FSR_OFFSET, XCANFD_FSR_RI_1_SHIFT, XCANFD_FSR_RI_MASK, XCanFd_ReadReg, XCANFD_RX_FIFO_0, and XCANFD_RX_FIFO_1.

Referenced by XCanFd_SelfTest().

u32 XCanFd_Recv_TXEvents_Sequential | ( | XCanFd * | InstancePtr,
|  | u32 * | FramePtr
| ) |  |

This function receives a CAN/CAN FD TX Events.

This function first checks FSR Register.The FL bits tells the Number of TX Event packets received. if FL is non Zero then Read the Packet and store it to user Buffer.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FramePtr | is a pointer to a 32-bit aligned buffer where the CAN/CAN FD frame Event to be written.

Returns
  - XST_SUCCESS if TXE FIFO was not empty and a frame was read from TX FIFO successfully and written into the given buffer;
  - XST_NO_DATA if there is no frame to be received from the TXE FIFO

Note
  This CANFD has two design modes. ->Sequential Mode - Core writes data sequentially to RxBuffers. ->MailBox Mode - Core writes data to RxBuffers when a ID Match happened. This routine is useful for Both the Modes.This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_TXE_FL_MASK, XCANFD_TXE_FSR_OFFSET, XCANFD_TXE_IRI_MASK, XCANFD_TXE_RI_MASK, XCANFD_TXEDLC_OFFSET, XCANFD_TXEID_OFFSET, and XCanFd_WriteReg.

u32 XCanFd_RxBuff_MailBox_Active | ( | XCanFd * | InstancePtr,
|  | u32 | RxBuffer
| ) |  |

This function sets an RxBuffer to Active State.In Mailbox Mode configuration we can set each buffer to receive with specific Id and Mask.inorder compare we need to first Activate the Buffer.Maximum number of RxBuffers depends on Design.Range 48,32,16.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  RxBuffer | Receive Buffer Number defines which Buffer to configure Value ranges from 0 - 48

Returns
  - XST_SUCCESS if the values were set successfully.

Note
  none

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_RCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

u32 XCanFd_RxBuff_MailBox_DeActive | ( | XCanFd * | InstancePtr,
|  | u32 | RxBuffer
| ) |  |

This function sets an RxBuffer to InActive State.if we change a buffer to InActive state, then Rx Packet won't store into that buffer, even the Id is matched.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  RxBuffer | Receive Buffer Number defines which Buffer to configure Value ranges from 0 - 48

Returns
  - XST_SUCCESS if the values were set successfully.
  - XST_FAILURE if the given filter was not disabled, or the CAN device was not ready to accept writes to AFMR and AFIR.

Note
  none

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_RCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

int XCanFd_SelfTest | ( | XCanFd * | InstancePtr | ) |

This function runs a self-test on the CAN driver/device.

The test resets the device, sets up the Loop Back mode, sends a standard frame, receives the frame, verifies the contents, and resets the device again.

Note that this is a destructive test in that resets of the device are performed. Refer to the device specification for the device status after the reset operation.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  - XST_SUCCESS if the self-test passed. i.e., the frame received via the internal loop back has the same contents as the sent frame.
  - XST_FAILURE Otherwise.

Note
  If the CAN device does not work properly, this function may enter an infinite loop and will never return to the caller.
  If XST_FAILURE is returned, the device is not reset so that the caller could have a chance to check reason(s) causing the failure.

References XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_Config::NumofRxMbBuf, XCanFd_AcceptFilterDisable(), XCanFd_AcceptFilterEnable(), XCanFd_Create_CanFD_Dlc_BrsValue, XCanFd_CreateIdValue, XCANFD_DLCR_DLC_MASK, XCanFd_EnterMode(), XCANFD_GET_RX_MODE, XCanFd_GetDlc2len(), XCanFd_GetLen2Dlc(), XCanFd_GetMode(), XCanFd_IsBufferTransmitted, XCANFD_MODE_CONFIG, XCANFD_MODE_LOOPBACK, XCanFd_Recv_Mailbox(), XCanFd_Recv_Sequential(), XCanFd_Reset, XCanFd_RxBuff_MailBox_Active(), XCanFd_RxBuff_MailBox_DeActive(), XCanFd_Send(), XCanFd_Set_MailBox_IdMask(), XCanFd_SetBaudRatePrescaler(), XCanFd_SetBitTiming(), XCanFd_SetFBaudRatePrescaler(), and XCanFd_SetFBitTiming().

int XCanFd_Send | ( | XCanFd * | InstancePtr,
|  | u32 * | FramePtr,
|  | u32 * | TxBufferNumber
| ) |  |

This function sends a CAN/CANFD Frame.

This function first checks whether free buffer is there or not.if free buffer is there the user data will be written into the free buffer.otherwise it returns error code immediately. This function does not wait for the given frame being sent to CAN bus.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  FramePtr | is a pointer to a 32-bit aligned buffer containing the CAN frame to be sent.
  TxBufferNumber | is the buffer where the user data has been written and it is updated by driver.

Returns
  - XST_SUCCESS if TX FIFO was not full and the given frame was written into the FIFO;
  - XST_FIFO_NO_ROOM if there is no room in the TX FIFO for the given frame

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::GlobalTrrMask, XCanFd::IsReady, XCanFD_Check_TrrVal_Set_Bit, XCANFD_DLCR_DLC_MASK, XCANFD_DLCR_EDL_MASK, XCANFD_DW_BYTES, XCanFd_GetDlc2len(), XCanFd_GetFreeBuffer(), XCanFd_ReadReg, XCANFD_TRR_OFFSET, XCANFD_TXDLC_OFFSET, XCANFD_TXDW_OFFSET, XCANFD_TXID_OFFSET, XCanFd_WriteReg, and XST_NOBUFFER.

Referenced by XCanFd_SelfTest().

int XCanFd_Send_Queue | ( | XCanFd * | InstancePtr | ) |

This routine sends queue of buffers,when added to queue using Addto_Queue() Basically this will trigger the TRR Bit(s).This routine can be used when user want to send multiple packets at a time.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  - XST_SUCCESS.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::GlobalTrrMask, XCanFd::GlobalTrrValue, XCanFd::IsReady, XCanFd::MultiBuffTrr, XCANFD_TRR_OFFSET, and XCanFd_WriteReg.

u32 XCanFd_Set_MailBox_IdMask | ( | XCanFd * | InstancePtr,
|  | u32 | RxBuffer,
|  | u32 | MaskValue,
|  | u32 | IdValue
| ) |  |

This function sets the Id and Mask for an RxBuffer to participate in Id match.if a packet is received with an id which is equal to id we configured, then it is stored in RxBuffer.

otherwise it won't.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  RxBuffer | Receive Buffer Number defines which Buffer to configure Value ranges from 0 - 48(can get from NumofRxMbBuf)
  MaskValue | is the value to write into the RxBuffer Mask Register
  IdValue | is the value to write into the RxBuffer Id register

Returns
  - XST_SUCCESS if the values were set successfully.

Note
  none

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_MAILBOX_ID_OFFSET, XCANFD_MAILBOX_MASK_OFFSET, XCANFD_RCS_OFFSET, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

void XCanFd_Set_Tranceiver_Delay_Compensation | ( | XCanFd * | InstancePtr,
|  | u32 | TdcOffset
| ) |  |

This function Sets the Transceiver delay compensation offset.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  TdcOffset | is the Delay Compensation Offset.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BRPR_OFFSET, XCANFD_F_BRPR_TDCMASK, XCanFd_ReadReg, and XCanFd_WriteReg.

int XCanFd_SetBaudRatePrescaler | ( | XCanFd * | InstancePtr,
|  | u8 | Prescaler
| ) |  |

This routine sets Baud Rate Prescaler value in Arbitration Phse.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Baud Rate Prescaler could be set only after CAN device entered Configuration Mode. So please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Prescaler | is the value to set. Valid values are from 0 to 255.

Returns
  - XST_SUCCESS if the Baud Rate Prescaler value is set successfully.
  - XST_FAILURE if CAN device is not in Configuration Mode.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_OFFSET, XCanFd_GetMode(), XCANFD_MODE_CONFIG, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

void XCanFd_SetBitRateSwitch_DisableNominal | ( | XCanFd * | InstancePtr | ) |

This routine Disables the BRSD bit, so that Bit Rate Switch can be happen with Nominal or configured rate.

Read the device specification for details.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  None.

Note
  if we set BRSD bit in Mode Select Register then CAN Controller transmits CAN FD Frames with Nominal Bit Rate. else with configured bit rate(As specified in Data phase BRPR and BTR Registers.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_MSR_BRSD_MASK, XCANFD_MSR_OFFSET, XCanFd_ReadReg, XCANFD_SRR_CEN_MASK, and XCanFd_WriteReg.

void XCanFd_SetBitRateSwitch_EnableNominal | ( | XCanFd * | InstancePtr | ) |

This routine sets the Bit Rate Switch with nominal bit rate.

if we set BRSD bit in Mode Select Register then CAN Controller transmits CAN FD Frames with Nominal Bit Rate. Read the device specification for details.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.

Returns
  None.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_MSR_BRSD_MASK, XCANFD_MSR_OFFSET, XCanFd_ReadReg, XCANFD_SRR_CEN_MASK, and XCanFd_WriteReg.

int XCanFd_SetBitTiming | ( | XCanFd * | InstancePtr,
|  | u8 | SyncJumpWidth,
|  | u8 | TimeSegment2,
|  | u16 | TimeSegment1
| ) |  |

This routine sets Bit time.

Time segment 1, Time segment 2 and Synchronization Jump Width are set in this function. Device specification requires the values passed into this function be one less than the actual values of these fields. Read the device specification for details.

Bit time could be set only after CAN device entered Configuration Mode. Please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  SyncJumpWidth | is the Synchronization Jump Width value to set. Valid values are from 0 to 3.
  TimeSegment2 | is the Time Segment 2 value to set. Valid values are from 0 to 7.
  TimeSegment1 | is the Time Segment 1 value to set. Valid values are from 0 to 15.

Returns
  - XST_SUCCESS if the Bit time is set successfully.
  - XST_FAILURE if CAN device is not in Configuration Mode.
  - XST_INVALID_PARAM if any value of SyncJumpWidth, TimeSegment2 and TimeSegment1 is invalid.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BTR_OFFSET, XCANFD_BTR_SJW_MASK, XCANFD_BTR_SJW_SHIFT, XCANFD_BTR_TS1_MASK, XCANFD_BTR_TS2_MASK, XCANFD_BTR_TS2_SHIFT, XCanFd_GetMode(), XCANFD_MODE_CONFIG, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

int XCanFd_SetFBaudRatePrescaler | ( | XCanFd * | InstancePtr,
|  | u8 | Prescaler
| ) |  |

This routine sets Baud Rate Prescaler value in Data Phase.

The system clock for the CAN controller is divided by (Prescaler + 1) to generate the quantum clock needed for sampling and synchronization. Read the device specification for details.

Baud Rate Prescaler could be set only after CAN device entered Configuration Mode. So please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  Prescaler | is the value to set. Valid values are from 1 to 256.

Returns
  - XST_SUCCESS if the Baud Rate Prescaler value is set successfully.
  - XST_FAILURE if CAN device is not in Configuration Mode.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_BRPR_BRP_MASK, XCANFD_F_BRPR_OFFSET, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

int XCanFd_SetFBitTiming | ( | XCanFd * | InstancePtr,
|  | u8 | SyncJumpWidth,
|  | u8 | TimeSegment2,
|  | u8 | TimeSegment1
| ) |  |

This routine sets Bit time in Data Phase.

Time segment 1, Time segment 2 and Synchronization Jump Width are set in this function. Device specification requires the values passed into this function be one less than the actual values of these fields. Read the device specification for details.

Bit time could be set only after CAN device entered Configuration Mode. Please call XCanFd_EnterMode() to enter Configuration Mode before using this function.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  SyncJumpWidth | is the Synchronization Jump Width value to set. Valid values are from 0 to 3.
  TimeSegment2 | is the Time Segment 2 value to set. Valid values are from 0 to 7.
  TimeSegment1 | is the Time Segment 1 value to set. Valid values are from 0 to 15.

Returns
  - XST_SUCCESS if the Bit time is set successfully.
  - XST_FAILURE if CAN device is not in Configuration Mode.
    - XST_INVALID_PARAM if any value of SyncJumpWidth, TimeSegment2 and TimeSegment1 is invalid.

Note
  None.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCANFD_F_BTR_OFFSET, XCANFD_F_BTR_SJW_MASK, XCANFD_F_BTR_SJW_SHIFT, XCANFD_F_BTR_TS1_MASK, XCANFD_F_BTR_TS2_MASK, XCANFD_F_BTR_TS2_SHIFT, XCanFd_GetMode(), XCANFD_MODE_CONFIG, and XCanFd_WriteReg.

Referenced by XCanFd_SelfTest().

int XCanFd_SetHandler | ( | XCanFd * | InstancePtr,
|  | u32 | HandlerType,
|  | void * | CallBackFunc,
|  | void * | CallBackRef
| ) |  |

This routine installs an asynchronous callback function for the given HandlerType:

    HandlerType              Callback Function Type
    -----------------------  ---------------------------
    XCANFD_HANDLER_SEND        XCanFd_SendRecvHandler
    XCANFD_HANDLER_RECV        XCanFd_SendRecvHandler
    XCANFD_HANDLER_ERROR       XCanFd_ErrorHandler
    XCANFD_HANDLER_EVENT       XCanFd_EventHandler

    HandlerType              Invoked by this driver when:
    -----------------------  --------------------------------------------------
    XCANFD_HANDLER_SEND        A frame transmitted by a call to
                             XCanFd_Send() has been sent successfully.

    XCANFD_HANDLER_RECV        A frame has been received and is sitting in
                             the RX FIFO.

    XCANFD_HANDLER_ERROR       An error interrupt is occurring.

    XCANFD_HANDLER_EVENT       Any other kind of interrupt is occurring.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  HandlerType | specifies which handler is to be attached.
  CallBackFunc | is the address of the callback function.
  CallBackRef | is a user data item that will be passed to the callback function when it is invoked.

Returns
  - XST_SUCCESS when handler is installed.
  - XST_INVALID_PARAM when HandlerType is invalid.

Note
  Invoking this function for a handler that already has been installed replaces it with the new handler.

References XCanFd::IsReady, XCANFD_HANDLER_ERROR, XCANFD_HANDLER_EVENT, XCANFD_HANDLER_RECV, and XCANFD_HANDLER_SEND.

u32 XCanFd_SetRxFilterPartition | ( | XCanFd * | InstancePtr,
|  | u8 | FilterPartition
| ) |  |

This routine sets the Receive filter partition in the Watermark Interrupt Register.

Parameters

  InstancePtr | is a pointer to the XCanFd instance.
  FilterPartition | is Filter Mask number, valid values are 0 to 31.

Returns
  - XST_FAILURE - If the CAN device is not in Configuration Mode.
  - XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note
  The RX filter partition can only be set when the CAN device is in the configuration mode, This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, XCANFD_WIR_OFFSET, XCANFD_WMR_RXFP_MASK, XCANFD_WMR_RXFP_SHIFT, and XCanFd_WriteReg.

u32 XCanFd_SetRxIntrWatermark | ( | XCanFd * | InstancePtr,
|  | s8 | Threshold
| ) |  |

This routine sets the Rx Full threshold in the Watermark Interrupt Register.

Parameters

  InstancePtr | is a pointer to the XCanFd instance.
  Threshold | is the threshold to be set. The valid values are from 1 to 63.

Returns
  - XST_FAILURE - If the CAN device is not in Configuration Mode.
  - XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note
  The threshold can only be set when the CAN device is in the configuration mode.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, XCANFD_WIR_MASK, XCANFD_WIR_OFFSET, and XCanFd_WriteReg.

u32 XCanFd_SetRxIntrWatermarkFifo1 | ( | XCanFd * | InstancePtr,
|  | s8 | Threshold
| ) |  |

This routine sets the Rx Full threshold in the Watermark Interrupt Register.

Parameters

  InstancePtr | is a pointer to the XCanFd instance.
  Threshold | is the threshold to be set. The valid values are from 1 to 63.

Returns
  - XST_FAILURE - If the CAN device is not in Configuration Mode.
  - XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note
  The threshold can only be set when the CAN device is in the configuration mode.This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, XCANFD_WIR_OFFSET, XCANFD_WMR_RXFWM_1_MASK, XCANFD_WMR_RXFWM_1_SHIFT, and XCanFd_WriteReg.

u32 XCanFd_SetTxEventIntrWatermark | ( | XCanFd * | InstancePtr,
|  | u8 | Threshold
| ) |  |

This routine sets the TX Events Full threshold in the Watermark Interrupt Register.

Parameters

  InstancePtr | is a pointer to the XCanFd instance.
  Threshold | is the threshold to be set. The valid values are from 1 to 31.

Returns
  - XST_FAILURE - If the CAN device is not in Configuration Mode.
  - XST_SUCCESS - If the Rx Full threshold is set in Watermark Interrupt Register.

Note
  The threshold can only be set when the CAN device is in the configuration mode, This API is meant to be used with IP with CanFD 2.0 spec support only.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_GetMode(), XCANFD_MODE_CONFIG, XCanFd_ReadReg, and XCanFd_WriteReg.

int XCanFd_TxBuffer_Cancel_Request | ( | XCanFd * | InstancePtr,
|  | u32 | BufferNumber
| ) |  |

This function Cancels a CAN/CAN FD Frame which was already initiated for transmission.This function first checks TRR Bit based on BufferNumber.

if TRR Bit is set, then it cancels the Buffers.

Parameters

  InstancePtr | is a pointer to the XCanFd instance to be worked on.
  BufferNumber | is which Buffer to cancel out of 32 Buffers.

Returns
  - XST_SUCCESS if RX FIFO was not empty and a frame was read from RX FIFO successfully and written into the given buffer;
  - XST_NO_DATA if there is no frame to be received from the FIFO

Note
  This function first checks whether TRR bit is set or not if Set, it then checks the corresponding TCR bit ->if Set, then wait until cancellation is performed. ->if Not set, then set the corresponding TCR bit and wait until core clears it. if Not set, Nothing to do.

References XCanFd_Config::BaseAddress, XCanFd::CanFdConfig, XCanFd::IsReady, XCanFd_ReadReg, XCANFD_TCR_OFFSET, XCANFD_TRR_OFFSET, and XCanFd_WriteReg.