aiengine: XAieGbl_RegStrmEvtPort Struct Reference

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XAieGbl_RegStrmEvtPort Struct Reference

This typedef contains the attributes for stream switch event port select registers. More...

## Data Fields
u32 | RegOff [2U]
| Register offset. More...
XAieGbl_RegFldAttr | MstrSlv [8U]
| Master / slave configuration. More...
XAieGbl_RegFldAttr | Port [8U]
| Port configuration. More...

## Detailed Description

This typedef contains the attributes for stream switch event port select registers.

## Field Documentation

XAieGbl_RegFldAttr XAieGbl_RegStrmEvtPort::MstrSlv[8U]

Master / slave configuration.

Referenced by XAieTile_StrmEventPortSelect().

XAieGbl_RegFldAttr XAieGbl_RegStrmEvtPort::Port[8U]

Port configuration.

Referenced by XAieTile_StrmEventPortSelect().

u32 XAieGbl_RegStrmEvtPort::RegOff[2U]

Register offset.

Referenced by XAieTile_StrmEventPortSelect().