iic: Iic_v3_4

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Iic_v3_4

## Data Structures
struct | XIic_Config
| This typedef contains configuration information for the device. More...
struct | XIicStats
| XIic statistics. More...
struct | XIic
| The XIic driver instance data. More...

## Macros
#define | XII_ADDR_TO_SEND_TYPE 1
| Bus address of slave device. More...
#define | XII_ADDR_TO_RESPOND_TYPE 2
| This device's bus address as slave. More...
#define | XIIC_READ_OPERATION 1
| The following constants are used to specify whether to do Read or a Write operation on IIC bus. More...
#define | XIIC_WRITE_OPERATION 0
| Write operation on the IIC bus. More...
#define | XIIC_MASTER_ROLE 1
| The following constants are used with the transmit FIFO fill function to specify the role which the IIC device is acting as, a master or a slave. More...
#define | XIIC_SLAVE_ROLE 0
| Slave on the IIC bus. More...
#define | XIIC_STOP 0x00
| The following constants are used with Transmit Function (XIic_Send) to specify whether to STOP after the current transfer of data or own the bus with a Repeated start. More...
#define | XIIC_REPEATED_START 0x01
| Donot Send a stop on the IIC bus after the current data transfer. More...
#define | XIic_ReadReg(BaseAddress, RegOffset) XIic_In32((BaseAddress) + (RegOffset))
| Read from the specified IIC device register. More...
#define | XIic_WriteReg(BaseAddress, RegOffset, RegisterValue) XIic_Out32((BaseAddress) + (RegOffset), (RegisterValue))
| Write to the specified IIC device register. More...
#define | XIic_IntrGlobalDisable(BaseAddress) XIic_WriteReg((BaseAddress), XIIC_DGIER_OFFSET, 0)
| This macro disables all interrupts for the device by writing to the Global interrupt enable register. More...
#define | XIic_IntrGlobalEnable(BaseAddress)
| This macro writes to the global interrupt enable register to enable interrupts from the device. More...
#define | XIic_IsIntrGlobalEnabled(BaseAddress)
| This function determines if interrupts are enabled at the global level by reading the global interrupt register. More...
#define | XIic_WriteIisr(BaseAddress, Status) XIic_WriteReg((BaseAddress), XIIC_IISR_OFFSET, (Status))
| This function sets the Interrupt status register to the specified value. More...
#define | XIic_ReadIisr(BaseAddress) XIic_ReadReg((BaseAddress), XIIC_IISR_OFFSET)
| This function gets the contents of the Interrupt Status Register. More...
#define | XIic_WriteIier(BaseAddress, Enable) XIic_WriteReg((BaseAddress), XIIC_IIER_OFFSET, (Enable))
| This function sets the contents of the Interrupt Enable Register. More...
#define | XIic_ReadIier(BaseAddress) XIic_ReadReg((BaseAddress), XIIC_IIER_OFFSET)
| This function gets the Interrupt Enable Register contents. More...
#define | XIic_ClearIisr(BaseAddress, InterruptMask)
| This macro clears the specified interrupt in the Interrupt status register. More...
#define | XIic_Send7BitAddress(BaseAddress, SlaveAddress, Operation)
| This macro sends the address for a 7 bit address during both read and write operations. More...
#define | XIic_DynSend7BitAddress(BaseAddress, SlaveAddress, Operation)
| This macro sends the address for a 7 bit address during both read and write operations. More...
#define | XIic_DynSendStartStopAddress(BaseAddress, SlaveAddress, Operation)
| This macro sends the address, start and stop for a 7 bit address during both write operations. More...
#define | XIic_DynSendStop(BaseAddress, ByteCount)
| This macro sends a stop condition on IIC bus for Dynamic logic. More...

## Typedefs
typedef void(* | XIic_Handler )(void *CallBackRef, int ByteCount)
| This callback function data type is defined to handle the asynchronous processing of sent and received data of the IIC driver. More...
typedef void(* | XIic_StatusHandler )(void *CallBackRef, int StatusEvent)
| This callback function data type is defined to handle the asynchronous processing of status events of the IIC driver. More...

## Functions
int | XIic_CfgInitialize (XIic *InstancePtr, XIic_Config *Config, UINTPTR EffectiveAddr)
| Initializes a specific XIic instance. More...
int | XIic_Start (XIic *InstancePtr)
| This function starts the IIC device and driver by enabling the proper interrupts such that data may be sent and received on the IIC bus. More...
int | XIic_Stop (XIic *InstancePtr)
| This function stops the IIC device and driver such that data is no longer sent or received on the IIC bus. More...
void | XIic_Reset (XIic *InstancePtr)
| Resets the IIC device. More...
int | XIic_SetAddress (XIic *InstancePtr, int AddressType, int Address)
| This function sets the bus addresses. More...
u16 | XIic_GetAddress (XIic *InstancePtr, int AddressType)
| This function gets the addresses for the IIC device driver. More...
int | XIic_SetGpOutput (XIic *InstancePtr, u8 OutputValue)
| This function sets the contents of the General Purpose Output register for the IIC device driver. More...
int | XIic_GetGpOutput (XIic *InstancePtr, u8 *OutputValuePtr)
| This function gets the contents of the General Purpose Output register for the IIC device driver. More...
u32 | XIic_IsSlave (XIic *InstancePtr)
| A function to determine if the device is currently addressed as a slave. More...
void | XIic_SetRecvHandler (XIic *InstancePtr, void *CallBackRef, XIic_Handler FuncPtr)
| Sets the receive callback function, the receive handler, which the driver calls when it finishes receiving data. More...
void | XIic_SetSendHandler (XIic *InstancePtr, void *CallBackRef, XIic_Handler FuncPtr)
| Sets the send callback function, the send handler, which the driver calls when it receives confirmation of sent data. More...
void | XIic_SetStatusHandler (XIic *InstancePtr, void *CallBackRef, XIic_StatusHandler FuncPtr)
| Sets the status callback function, the status handler, which the driver calls when it encounters conditions which are not data related. More...
int | XIic_Initialize (XIic *InstancePtr, u16 DeviceId)
| Initializes a specific XIic instance. More...
XIic_Config * | XIic_LookupConfig (u16 DeviceId)
| Looks up the device configuration based on the unique device ID. More...
void | XIic_InterruptHandler (void *InstancePtr)
| This function is the interrupt handler for the XIic driver. More...
int | XIic_MasterRecv (XIic *InstancePtr, u8 *RxMsgPtr, int ByteCount)
| This function receives data as a master from a slave device on the IIC bus. More...
int | XIic_MasterSend (XIic *InstancePtr, u8 *TxMsgPtr, int ByteCount)
| This function sends data as a master on the IIC bus. More...
int | XIic_DynMasterRecv (XIic *InstancePtr, u8 *RxMsgPtr, u8 ByteCount)
| This function receives data as a master from a slave device on the IIC bus. More...
int | XIic_DynMasterSend (XIic *InstancePtr, u8 *TxMsgPtr, u8 ByteCount)
| This function sends data as a Dynamic master on the IIC bus. More...
void | XIic_SlaveInclude ()
| This function includes slave code such that slave events will be processed. More...
int | XIic_SlaveRecv (XIic *InstancePtr, u8 *RxMsgPtr, int ByteCount)
| This function sends data as a slave on the IIC bus and should not be called until an event has occurred that indicates the device has been selected by a master attempting read from the slave (XII_MASTER_READ_EVENT). More...
int | XIic_SlaveSend (XIic *InstancePtr, u8 *TxMsgPtr, int ByteCount)
| This function sends data as a slave on the IIC bus and should not be called until an event has occurred that indicates the device has been selected by a master attempting read from the slave (XII_MASTER_READ_EVENT). More...
void | XIic_GetStats (XIic *InstancePtr, XIicStats *StatsPtr)
| Gets a copy of the statistics for an IIC device. More...
void | XIic_ClearStats (XIic *InstancePtr)
| Clears the statistics for the IIC device by zeroing all counts. More...
int | XIic_SelfTest (XIic *InstancePtr)
| Runs a limited self-test on the driver/device. More...
void | XIic_SetOptions (XIic *InstancePtr, u32 NewOptions)
| This function sets the options for the IIC device driver. More...
u32 | XIic_GetOptions (XIic *InstancePtr)
| This function gets the current options for the IIC device. More...
void | XIic_MultiMasterInclude ()
| This function includes multi-master code such that multi-master events are handled properly. More...
unsigned | XIic_Recv (UINTPTR BaseAddress, u8 Address, u8 *BufferPtr, unsigned ByteCount, u8 Option)
| Receive data as a master on the IIC bus. More...
unsigned | XIic_Send (UINTPTR BaseAddress, u8 Address, u8 *BufferPtr, unsigned ByteCount, u8 Option)
| Send data as a master on the IIC bus. More...
unsigned | XIic_DynRecv (UINTPTR BaseAddress, u8 Address, u8 *BufferPtr, u8 ByteCount)
| Receive data as a master on the IIC bus. More...
unsigned | XIic_DynSend (UINTPTR BaseAddress, u16 Address, u8 *BufferPtr, u8 ByteCount, u8 Option)
| Send data as a master on the IIC bus. More...
u32 | XIic_WaitBusFree (UINTPTR BaseAddress)
| This function will wait until the I2C bus is free or timeout. More...

## Variables
XIic_Config | XIic_ConfigTable [XPAR_XIIC_NUM_INSTANCES]
| The IIC configuration table, sized by the number of instances defined in xparameters.h. More...
XIic_Config | XIic_ConfigTable []
| The IIC configuration table, sized by the number of instances defined in xparameters.h. More...

## Configuration options
The following options may be specified or retrieved for the device and enable/disable additional features of the IIC bus. Each of the options are bit fields such that more than one may be specified.
#define | XII_GENERAL_CALL_OPTION 0x00000001
#define | XII_REPEATED_START_OPTION 0x00000002
#define | XII_SEND_10_BIT_OPTION 0x00000004

## Status events
The following status events occur during IIC bus processing and are passed to the status callback. Each event is only valid during the appropriate processing of the IIC bus. Each of these events are bit fields such that more than one may be specified.
#define | XII_BUS_NOT_BUSY_EVENT 0x00000001
| Bus transitioned to not busy. More...
#define | XII_ARB_LOST_EVENT 0x00000002
| Arbitration was lost. More...
#define | XII_SLAVE_NO_ACK_EVENT 0x00000004
| Slave did not ACK (had error) More...
#define | XII_MASTER_READ_EVENT 0x00000008
| Master reading from slave. More...
#define | XII_MASTER_WRITE_EVENT 0x00000010
| Master writing to slave. More...
#define | XII_GENERAL_CALL_EVENT 0x00000020
| General call to all slaves. More...

## Register Map
Register offsets for the XIic device.
#define | XIIC_DGIER_OFFSET 0x1C
| Global Interrupt Enable Register. More...
#define | XIIC_IISR_OFFSET 0x20
| Interrupt Status Register. More...
#define | XIIC_IIER_OFFSET 0x28
| Interrupt Enable Register. More...
#define | XIIC_RESETR_OFFSET 0x40
| Reset Register. More...
#define | XIIC_CR_REG_OFFSET 0x100
| Control Register. More...
#define | XIIC_SR_REG_OFFSET 0x104
| Status Register. More...
#define | XIIC_DTR_REG_OFFSET 0x108
| Data Tx Register. More...
#define | XIIC_DRR_REG_OFFSET 0x10C
| Data Rx Register. More...
#define | XIIC_ADR_REG_OFFSET 0x110
| Address Register. More...
#define | XIIC_TFO_REG_OFFSET 0x114
| Tx FIFO Occupancy. More...
#define | XIIC_RFO_REG_OFFSET 0x118
| Rx FIFO Occupancy. More...
#define | XIIC_TBA_REG_OFFSET 0x11C
| 10 Bit Address reg More...
#define | XIIC_RFD_REG_OFFSET 0x120
| Rx FIFO Depth reg. More...
#define | XIIC_GPO_REG_OFFSET 0x124
| Output Register. More...

## Device Global Interrupt Enable Register masks (CR) mask(s)
#define | XIIC_GINTR_ENABLE_MASK 0x80000000
| Global Interrupt Enable Mask. More...

## IIC Device Interrupt Status/Enable (INTR) Register Masks
Interrupt Status Register (IISR) This register holds the interrupt status flags for the Spi device. Interrupt Enable Register (IIER) This register is used to enable interrupt sources for the IIC device. Writing a '1' to a bit in this register enables the corresponding Interrupt. Writing a '0' to a bit in this register disables the corresponding Interrupt. IISR/IIER registers have the same bit definitions and are only defined once.
#define | XIIC_INTR_ARB_LOST_MASK 0x00000001
| 1 = Arbitration lost More...
#define | XIIC_INTR_TX_ERROR_MASK 0x00000002
| 1 = Tx error/msg complete More...
#define | XIIC_INTR_TX_EMPTY_MASK 0x00000004
| 1 = Tx FIFO/reg empty More...
#define | XIIC_INTR_RX_FULL_MASK 0x00000008
| 1 = Rx FIFO/reg=OCY level More...
#define | XIIC_INTR_BNB_MASK 0x00000010
| 1 = Bus not busy More...
#define | XIIC_INTR_AAS_MASK 0x00000020
| 1 = When addr as slave More...
#define | XIIC_INTR_NAAS_MASK 0x00000040
| 1 = Not addr as slave More...
#define | XIIC_INTR_TX_HALF_MASK 0x00000080
| 1 = Tx FIFO half empty More...
#define | XIIC_TX_INTERRUPTS
| All Tx interrupts commonly used. More...
#define | XIIC_TX_RX_INTERRUPTS (XIIC_INTR_RX_FULL_MASK | XIIC_TX_INTERRUPTS)
| All interrupts commonly used. More...

## Reset Register mask
#define | XIIC_RESET_MASK 0x0000000A
| RESET Mask. More...

## Control Register masks (CR) mask(s)
#define | XIIC_CR_ENABLE_DEVICE_MASK 0x00000001
| Device enable = 1. More...
#define | XIIC_CR_TX_FIFO_RESET_MASK 0x00000002
| Transmit FIFO reset=1. More...
#define | XIIC_CR_MSMS_MASK 0x00000004
| Master starts Txing=1. More...
#define | XIIC_CR_DIR_IS_TX_MASK 0x00000008
| Dir of Tx. More...
#define | XIIC_CR_NO_ACK_MASK 0x00000010
| Tx Ack. More...
#define | XIIC_CR_REPEATED_START_MASK 0x00000020
| Repeated start = 1. More...
#define | XIIC_CR_GENERAL_CALL_MASK 0x00000040
| Gen Call enabled = 1. More...

## Status Register masks (SR) mask(s)
#define | XIIC_SR_GEN_CALL_MASK 0x00000001
| 1 = A Master issued a GC More...
#define | XIIC_SR_ADDR_AS_SLAVE_MASK 0x00000002
| 1 = When addressed as slave More...
#define | XIIC_SR_BUS_BUSY_MASK 0x00000004
| 1 = Bus is busy More...
#define | XIIC_SR_MSTR_RDING_SLAVE_MASK 0x00000008
| 1 = Dir: Master <– slave More...
#define | XIIC_SR_TX_FIFO_FULL_MASK 0x00000010
| 1 = Tx FIFO full More...
#define | XIIC_SR_RX_FIFO_FULL_MASK 0x00000020
| 1 = Rx FIFO full More...
#define | XIIC_SR_RX_FIFO_EMPTY_MASK 0x00000040
| 1 = Rx FIFO empty More...
#define | XIIC_SR_TX_FIFO_EMPTY_MASK 0x00000080
| 1 = Tx FIFO empty More...

## Data Tx Register (DTR) mask(s)
#define | XIIC_TX_DYN_START_MASK 0x00000100
| 1 = Set dynamic start More...
#define | XIIC_TX_DYN_STOP_MASK 0x00000200
| 1 = Set dynamic stop More...
#define | IIC_TX_FIFO_DEPTH 16
| Tx fifo capacity. More...

## Data Rx Register (DRR) mask(s)
#define | IIC_RX_FIFO_DEPTH 16
| Rx fifo capacity. More...

## Macro Definition Documentation

#define IIC_RX_FIFO_DEPTH 16

Rx fifo capacity.

Referenced by XIic_DynMasterRecv(), XIic_MasterRecv(), and XIic_SlaveRecv().

#define IIC_TX_FIFO_DEPTH 16

Tx fifo capacity.

#define XII_ADDR_TO_RESPOND_TYPE 2

This device's bus address as slave.

Referenced by IicSlaveExample(), IicTenBitAddrExample(), XIic_GetAddress(), and XIic_SetAddress().

#define XII_ADDR_TO_SEND_TYPE 1

Bus address of slave device.

Referenced by IicDynEepromExample(), IicEepromExample(), IicMultiMasterExample(), IicRepeatedStartExample(), TempSensorExample(), and XIic_SetAddress().

#define XII_ARB_LOST_EVENT 0x00000002

Arbitration was lost.

#define XII_BUS_NOT_BUSY_EVENT 0x00000001

Bus transitioned to not busy.

#define XII_GENERAL_CALL_EVENT 0x00000020

General call to all slaves.

#define XII_GENERAL_CALL_OPTION 0x00000001

    XII_GENERAL_CALL_OPTION The general call option allows an IIC slave to
                            recognized the general call address. The status
                            handler is called as usual indicating the device
                            has been addressed as a slave with a general
                            call. It is the application's responsibility to
                            perform any special processing for the general
                            call.

    XII_REPEATED_START_OPTION       The repeated start option allows multiple
                            messages to be sent/received on the IIC bus
                            without rearbitrating for the bus.  The messages
                            are sent as a series of messages such that the
                            option must be enabled before the 1st message of
                            the series, to prevent an stop condition from
                            being generated on the bus, and disabled before
                            the last message of the series, to allow the
                            stop condition to be generated.

    XII_SEND_10_BIT_OPTION  The send 10 bit option allows 10 bit addresses
                            to be sent on the bus when the device is a
                            master. The device can be configured to respond
                            as to 7 bit addresses even though it may be
                            communicating with other devices that support 10
                            bit addresses.  When this option is not enabled,
                            only 7 bit addresses are sent on the bus.

Referenced by XIic_SetOptions().

#define XII_MASTER_READ_EVENT 0x00000008

Master reading from slave.

#define XII_MASTER_WRITE_EVENT 0x00000010

Master writing to slave.

#define XII_SLAVE_NO_ACK_EVENT 0x00000004

Slave did not ACK (had error)

#define XIIC_ADR_REG_OFFSET 0x110

Address Register.

Referenced by XIic_GetAddress(), and XIic_SetAddress().

#define XIic_ClearIisr | ( |  | BaseAddress,
|  |  | InterruptMask
| ) |  |

Value:
XIic_WriteIisr((BaseAddress), \
XIic_ReadIisr(BaseAddress) & (InterruptMask))
XIic_ReadIisr
#define XIic_ReadIisr(BaseAddress)
This function gets the contents of the Interrupt Status Register.
Definition: xiic_l.h:404
XIic_WriteIisr
#define XIic_WriteIisr(BaseAddress, Status)
This function sets the Interrupt status register to the specified value.
Definition: xiic_l.h:385

This macro clears the specified interrupt in the Interrupt status register.

It is non-destructive in that the register is read and only the interrupt specified is cleared. Clearing an interrupt acknowledges it.

Parameters

  BaseAddress | is the base address of the IIC device.
  InterruptMask | is the bit mask of the interrupts to be cleared.

Returns
  None.

Note
  C-Style signature: void XIic_ClearIisr(u32 BaseAddress, u32 InterruptMask);

Referenced by XIic_DynRecv(), XIic_DynSend(), XIic_Recv(), and XIic_Send().

#define XIIC_CR_DIR_IS_TX_MASK 0x00000008

Dir of Tx.

Txing=1

Referenced by XIic_DynMasterSend(), XIic_MasterSend(), XIic_Recv(), and XIic_Send().

#define XIIC_CR_ENABLE_DEVICE_MASK 0x00000001

Device enable = 1.

Referenced by EepromReadByte(), EepromWriteByte(), XIic_Recv(), XIic_Send(), and XIic_Start().

#define XIIC_CR_GENERAL_CALL_MASK 0x00000040

Gen Call enabled = 1.

Referenced by XIic_SetOptions().

#define XIIC_CR_MSMS_MASK 0x00000004

Master starts Txing=1.

Referenced by XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_MasterRecv(), XIic_MasterSend(), XIic_Recv(), XIic_Send(), and XIic_Stop().

#define XIIC_CR_NO_ACK_MASK 0x00000010

Tx Ack.

NO ack = 1

Referenced by XIic_DynMasterSend(), XIic_MasterSend(), and XIic_Recv().

#define XIIC_CR_REG_OFFSET 0x100

Control Register.

Referenced by EepromReadByte(), EepromWriteByte(), XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_MasterRecv(), XIic_MasterSend(), XIic_Recv(), XIic_Send(), XIic_SetOptions(), XIic_Start(), and XIic_Stop().

#define XIIC_CR_REPEATED_START_MASK 0x00000020

Repeated start = 1.

Referenced by XIic_DynMasterRecv(), XIic_MasterRecv(), XIic_MasterSend(), XIic_Recv(), and XIic_Send().

#define XIIC_CR_TX_FIFO_RESET_MASK 0x00000002

Transmit FIFO reset=1.

Referenced by EepromReadByte(), and EepromWriteByte().

#define XIIC_DGIER_OFFSET 0x1C

Global Interrupt Enable Register.

#define XIIC_DRR_REG_OFFSET 0x10C

Data Rx Register.

#define XIIC_DTR_REG_OFFSET 0x108

Data Tx Register.

#define XIic_DynSend7BitAddress | ( |  | BaseAddress,
|  |  | SlaveAddress,
|  |  | Operation
| ) |  |

Value:
{ \
u8 LocalAddr = (u8)(SlaveAddress << 1); \
LocalAddr = (LocalAddr & 0xFE) | (Operation); \
XIic_WriteReg(BaseAddress, XIIC_DTR_REG_OFFSET, \
XIIC_TX_DYN_START_MASK | LocalAddr); \
}
XIIC_TX_DYN_START_MASK
#define XIIC_TX_DYN_START_MASK
1 = Set dynamic start
Definition: xiic_l.h:211
XIIC_DTR_REG_OFFSET
#define XIIC_DTR_REG_OFFSET
Data Tx Register.
Definition: xiic_l.h:110
XIic_WriteReg
#define XIic_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified IIC device register.
Definition: xiic_l.h:301

This macro sends the address for a 7 bit address during both read and write operations.

It takes care of the details to format the address correctly. This macro is designed to be called internally to the drivers for Dynamic controller functionality.

Parameters

  BaseAddress | is the base address of the IIC Device.
  SlaveAddress | is the address of the slave to send to.
  Operation | indicates XIIC_READ_OPERATION or XIIC_WRITE_OPERATION.

Returns
  None.

Note
  C-Style signature: void XIic_DynSend7BitAddress(u32 BaseAddress, u8 SlaveAddress, u8 Operation);

Referenced by XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_DynRecv(), and XIic_DynSend().

#define XIic_DynSendStartStopAddress | ( |  | BaseAddress,
|  |  | SlaveAddress,
|  |  | Operation
| ) |  |

Value:
{ \
u8 LocalAddr = (u8)(SlaveAddress << 1); \
LocalAddr = (LocalAddr & 0xFE) | (Operation); \
XIic_WriteReg(BaseAddress, XIIC_DTR_REG_OFFSET, \
XIIC_TX_DYN_START_MASK | XIIC_TX_DYN_STOP_MASK | \
LocalAddr); \
}
XIIC_TX_DYN_START_MASK
#define XIIC_TX_DYN_START_MASK
1 = Set dynamic start
Definition: xiic_l.h:211
XIIC_DTR_REG_OFFSET
#define XIIC_DTR_REG_OFFSET
Data Tx Register.
Definition: xiic_l.h:110
XIIC_TX_DYN_STOP_MASK
#define XIIC_TX_DYN_STOP_MASK
1 = Set dynamic stop
Definition: xiic_l.h:212
XIic_WriteReg
#define XIic_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified IIC device register.
Definition: xiic_l.h:301

This macro sends the address, start and stop for a 7 bit address during both write operations.

It takes care of the details to format the address correctly. This macro is designed to be called internally to the drivers.

Parameters

  BaseAddress | is the base address of the IIC Device.
  SlaveAddress | is the address of the slave to send to.
  Operation | indicates XIIC_WRITE_OPERATION.

Returns
  None.

Note
  C-Style signature: void XIic_DynSendStartStopAddress(u32 BaseAddress, u8 SlaveAddress, u8 Operation);

Referenced by XIic_DynSend().

#define XIic_DynSendStop | ( |  | BaseAddress,
|  |  | ByteCount
| ) |  |

Value:
{ \
XIic_WriteReg(BaseAddress, XIIC_DTR_REG_OFFSET, \
XIIC_TX_DYN_STOP_MASK | ByteCount); \
}
XIIC_DTR_REG_OFFSET
#define XIIC_DTR_REG_OFFSET
Data Tx Register.
Definition: xiic_l.h:110
XIIC_TX_DYN_STOP_MASK
#define XIIC_TX_DYN_STOP_MASK
1 = Set dynamic stop
Definition: xiic_l.h:212
XIic_WriteReg
#define XIic_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified IIC device register.
Definition: xiic_l.h:301

This macro sends a stop condition on IIC bus for Dynamic logic.

Parameters

  BaseAddress | is the base address of the IIC Device.
  ByteCount | is the number of Rx bytes received before the master. doesn't respond with ACK.

Returns
  None.

Note
  C-Style signature: void XIic_DynSendStop(u32 BaseAddress, u32 ByteCount);

Referenced by XIic_DynMasterRecv(), and XIic_DynRecv().

#define XIIC_GINTR_ENABLE_MASK 0x80000000

Global Interrupt Enable Mask.

#define XIIC_GPO_REG_OFFSET 0x124

Output Register.

Referenced by XIic_GetGpOutput(), and XIic_SetGpOutput().

#define XIIC_IIER_OFFSET 0x28

Interrupt Enable Register.

#define XIIC_IISR_OFFSET 0x20

Interrupt Status Register.

#define XIIC_INTR_AAS_MASK 0x00000020

1 = When addr as slave

Referenced by XIic_InterruptHandler(), and XIic_Start().

#define XIIC_INTR_ARB_LOST_MASK 0x00000001

1 = Arbitration lost

Referenced by XIic_DynRecv(), XIic_DynSend(), XIic_InterruptHandler(), XIic_Recv(), XIic_Send(), and XIic_Start().

#define XIIC_INTR_BNB_MASK 0x00000010

1 = Bus not busy

Referenced by XIic_DynRecv(), XIic_DynSend(), XIic_InterruptHandler(), XIic_Recv(), and XIic_Send().

#define XIIC_INTR_NAAS_MASK 0x00000040

1 = Not addr as slave

Referenced by XIic_InterruptHandler().

#define XIIC_INTR_RX_FULL_MASK 0x00000008

1 = Rx FIFO/reg=OCY level

Referenced by XIic_DynMasterRecv(), XIic_InterruptHandler(), XIic_MasterRecv(), XIic_Recv(), and XIic_SlaveRecv().

#define XIIC_INTR_TX_EMPTY_MASK 0x00000004

1 = Tx FIFO/reg empty

Referenced by XIic_DynMasterSend(), XIic_DynRecv(), XIic_DynSend(), XIic_InterruptHandler(), XIic_MasterRecv(), XIic_MasterSend(), XIic_Send(), and XIic_SlaveSend().

#define XIIC_INTR_TX_ERROR_MASK 0x00000002

1 = Tx error/msg complete

Referenced by XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_DynRecv(), XIic_DynSend(), XIic_InterruptHandler(), XIic_MasterRecv(), XIic_MasterSend(), XIic_Recv(), XIic_Send(), and XIic_SlaveSend().

#define XIIC_INTR_TX_HALF_MASK 0x00000080

1 = Tx FIFO half empty

Referenced by XIic_DynMasterSend(), XIic_InterruptHandler(), XIic_MasterSend(), and XIic_SlaveSend().

#define XIic_IntrGlobalDisable | ( |  | BaseAddress | ) | XIic_WriteReg((BaseAddress), XIIC_DGIER_OFFSET, 0)

This macro disables all interrupts for the device by writing to the Global interrupt enable register.

Parameters

  BaseAddress | is the base address of the IIC device.

Returns
  None.

Note
  C-Style signature: void XIic_IntrGlobalDisable(u32 BaseAddress);

Referenced by SlaveReadData(), SlaveWriteData(), TenBitAddrReadData(), TenBitAddrWriteData(), XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_MasterRecv(), XIic_MasterSend(), XIic_SetOptions(), XIic_SlaveRecv(), XIic_SlaveSend(), and XIic_Stop().

#define XIic_IntrGlobalEnable | ( |  | BaseAddress | ) |

Value:
XIic_WriteReg((BaseAddress), XIIC_DGIER_OFFSET, \
XIIC_GINTR_ENABLE_MASK)
XIIC_GINTR_ENABLE_MASK
#define XIIC_GINTR_ENABLE_MASK
Global Interrupt Enable Mask.
Definition: xiic_l.h:125
XIIC_DGIER_OFFSET
#define XIIC_DGIER_OFFSET
Global Interrupt Enable Register.
Definition: xiic_l.h:104
XIic_WriteReg
#define XIic_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified IIC device register.
Definition: xiic_l.h:301

This macro writes to the global interrupt enable register to enable interrupts from the device.

This function does not enable individual interrupts as the Interrupt Enable Register must be set appropriately.

Parameters

  BaseAddress | is the base address of the IIC device.

Returns
  None.

Note
  C-Style signature: void XIic_IntrGlobalEnable(u32 BaseAddress);

Referenced by SlaveReadData(), SlaveWriteData(), TenBitAddrReadData(), TenBitAddrWriteData(), XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_MasterRecv(), XIic_MasterSend(), XIic_SelfTest(), XIic_SetOptions(), XIic_SlaveRecv(), XIic_SlaveSend(), XIic_Start(), and XIic_Stop().

#define XIic_IsIntrGlobalEnabled | ( |  | BaseAddress | ) |

Value:
(XIic_ReadReg((BaseAddress), XIIC_DGIER_OFFSET) == \
XIIC_GINTR_ENABLE_MASK)
XIIC_GINTR_ENABLE_MASK
#define XIIC_GINTR_ENABLE_MASK
Global Interrupt Enable Mask.
Definition: xiic_l.h:125
XIIC_DGIER_OFFSET
#define XIIC_DGIER_OFFSET
Global Interrupt Enable Register.
Definition: xiic_l.h:104
XIic_ReadReg
#define XIic_ReadReg(BaseAddress, RegOffset)
Read from the specified IIC device register.
Definition: xiic_l.h:278

This function determines if interrupts are enabled at the global level by reading the global interrupt register.

Parameters

  BaseAddress | is the base address of the IIC device.

Returns
  - TRUE if the global interrupt is enabled.
  - FALSE if global interrupt is disabled.

Note
  C-Style signature: int XIic_IsIntrGlobalEnabled(u32 BaseAddress);

Referenced by XIic_InterruptHandler(), and XIic_SelfTest().

#define XIIC_MASTER_ROLE 1

The following constants are used with the transmit FIFO fill function to specify the role which the IIC device is acting as, a master or a slave.

Master on the IIC bus

Referenced by XIic_DynMasterSend(), and XIic_MasterSend().

#define XIIC_READ_OPERATION 1

The following constants are used to specify whether to do Read or a Write operation on IIC bus.

Read operation on the IIC bus

Referenced by XIic_DynMasterRecv(), XIic_DynRecv(), XIic_MasterRecv(), and XIic_Recv().

#define XIic_ReadIier | ( |  | BaseAddress | ) | XIic_ReadReg((BaseAddress), XIIC_IIER_OFFSET)

This function gets the Interrupt Enable Register contents.

Parameters

  BaseAddress | is the base address of the IIC device.

Returns
  The contents read from the Interrupt Enable Register. Bit positions of 1 indicate that the corresponding interrupt is enabled. Bit positions of 0 indicate that the corresponding interrupt is disabled.

Note
  C-Style signature: u32 XIic_ReadIier(u32 BaseAddress)

Referenced by XIic_InterruptHandler(), and XIic_SelfTest().

#define XIic_ReadIisr | ( |  | BaseAddress | ) | XIic_ReadReg((BaseAddress), XIIC_IISR_OFFSET)

This function gets the contents of the Interrupt Status Register.

This register indicates the status of interrupt sources for the device. The status is independent of whether interrupts are enabled such that the status register may also be polled when interrupts are not enabled.

Parameters

  BaseAddress | is the base address of the IIC device.

Returns
  The value read from the Interrupt Status Register.

Note
  C-Style signature: u32 XIic_ReadIisr(u32 BaseAddress);

Referenced by XIic_InterruptHandler().

#define XIic_ReadReg | ( |  | BaseAddress,
|  |  | RegOffset
| ) |  | XIic_In32((BaseAddress) + (RegOffset))

Read from the specified IIC device register.

Parameters

  BaseAddress | is the base address of the device.
  RegOffset | is the offset from the 1st register of the device to select the specific register.

Returns
  The value read from the register.

Note
  C-Style signature: u32 XIic_ReadReg(u32 BaseAddress, u32 RegOffset);

          This macro does not do any checking to ensure that the

  register exists if the register may be excluded due to parameterization, such as the GPO Register.

Referenced by EepromReadByte(), EepromWriteByte(), XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_DynRecv(), XIic_DynSend(), XIic_GetAddress(), XIic_GetGpOutput(), XIic_InterruptHandler(), XIic_IsSlave(), XIic_MasterRecv(), XIic_MasterSend(), XIic_Recv(), XIic_Send(), XIic_SetOptions(), XIic_SlaveRecv(), XIic_SlaveSend(), and XIic_Stop().

#define XIIC_REPEATED_START 0x01

Donot Send a stop on the IIC bus after the current data transfer.

#define XIIC_RESET_MASK 0x0000000A

RESET Mask.

Referenced by XIic_Reset().

#define XIIC_RESETR_OFFSET 0x40

Reset Register.

Referenced by XIic_Reset().

#define XIIC_RFD_REG_OFFSET 0x120

Rx FIFO Depth reg.

Referenced by XIic_DynMasterRecv(), XIic_MasterRecv(), XIic_Recv(), XIic_SlaveRecv(), and XIic_Start().

#define XIIC_RFO_REG_OFFSET 0x118

Rx FIFO Occupancy.

#define XIic_Send7BitAddress | ( |  | BaseAddress,
|  |  | SlaveAddress,
|  |  | Operation
| ) |  |

Value:
{ \
u8 LocalAddr = (u8)(SlaveAddress << 1); \
LocalAddr = (LocalAddr & 0xFE) | (Operation); \
XIic_WriteReg(BaseAddress, XIIC_DTR_REG_OFFSET, LocalAddr); \
}
XIIC_DTR_REG_OFFSET
#define XIIC_DTR_REG_OFFSET
Data Tx Register.
Definition: xiic_l.h:110
XIic_WriteReg
#define XIic_WriteReg(BaseAddress, RegOffset, RegisterValue)
Write to the specified IIC device register.
Definition: xiic_l.h:301

This macro sends the address for a 7 bit address during both read and write operations.

It takes care of the details to format the address correctly. This macro is designed to be called internally to the drivers.

Parameters

  BaseAddress | is the base address of the IIC Device.
  SlaveAddress | is the address of the slave to send to.
  Operation | indicates XIIC_READ_OPERATION or XIIC_WRITE_OPERATION

Returns
  None.

Note
  C-Style signature: void XIic_Send7BitAddress(u32 BaseAddress, u8 SlaveAddress, u8 Operation);

Referenced by XIic_Recv(), and XIic_Send().

#define XIIC_SLAVE_ROLE 0

Slave on the IIC bus.

Referenced by XIic_SlaveSend().

#define XIIC_SR_ADDR_AS_SLAVE_MASK 0x00000002

1 = When addressed as slave

Referenced by XIic_InterruptHandler(), XIic_IsSlave(), XIic_Send(), XIic_SlaveRecv(), XIic_SlaveSend(), and XIic_Stop().

#define XIIC_SR_BUS_BUSY_MASK 0x00000004

1 = Bus is busy

Referenced by EepromReadByte(), XIic_DynRecv(), XIic_DynSend(), XIic_Recv(), and XIic_Send().

#define XIIC_SR_GEN_CALL_MASK 0x00000001

1 = A Master issued a GC

#define XIIC_SR_MSTR_RDING_SLAVE_MASK 0x00000008

1 = Dir: Master <– slave

#define XIIC_SR_REG_OFFSET 0x104

Status Register.

Referenced by EepromReadByte(), XIic_DynRecv(), XIic_DynSend(), XIic_InterruptHandler(), XIic_IsSlave(), XIic_Recv(), XIic_Send(), XIic_SlaveRecv(), XIic_SlaveSend(), and XIic_Stop().

#define XIIC_SR_RX_FIFO_EMPTY_MASK 0x00000040

1 = Rx FIFO empty

#define XIIC_SR_RX_FIFO_FULL_MASK 0x00000020

1 = Rx FIFO full

#define XIIC_SR_TX_FIFO_EMPTY_MASK 0x00000080

1 = Tx FIFO empty

#define XIIC_SR_TX_FIFO_FULL_MASK 0x00000010

1 = Tx FIFO full

#define XIIC_STOP 0x00

The following constants are used with Transmit Function (XIic_Send) to specify whether to STOP after the current transfer of data or own the bus with a Repeated start.

Send a stop on the IIC bus after the current data transfer

Referenced by EepromReadByte(), EepromWriteByte(), and LowLevelTempSensorExample().

#define XIIC_TBA_REG_OFFSET 0x11C

10 Bit Address reg

Referenced by XIic_GetAddress(), and XIic_SetAddress().

#define XIIC_TFO_REG_OFFSET 0x114

Tx FIFO Occupancy.

#define XIIC_TX_DYN_START_MASK 0x00000100

1 = Set dynamic start

#define XIIC_TX_DYN_STOP_MASK 0x00000200

1 = Set dynamic stop

Referenced by XIic_DynSend().

#define XIIC_TX_INTERRUPTS

Value:
(XIIC_INTR_TX_ERROR_MASK | \
XIIC_INTR_TX_EMPTY_MASK | \
XIIC_INTR_TX_HALF_MASK)
XIIC_INTR_TX_EMPTY_MASK
#define XIIC_INTR_TX_EMPTY_MASK
1 = Tx FIFO/reg empty
Definition: xiic_l.h:145
XIIC_INTR_TX_HALF_MASK
#define XIIC_INTR_TX_HALF_MASK
1 = Tx FIFO half empty
Definition: xiic_l.h:150
XIIC_INTR_TX_ERROR_MASK
#define XIIC_INTR_TX_ERROR_MASK
1 = Tx error/msg complete
Definition: xiic_l.h:144

All Tx interrupts commonly used.

#define XIIC_TX_RX_INTERRUPTS (XIIC_INTR_RX_FULL_MASK | XIIC_TX_INTERRUPTS)

All interrupts commonly used.

Referenced by XIic_SelfTest().

#define XIIC_WRITE_OPERATION 0

Write operation on the IIC bus.

Referenced by XIic_DynMasterSend(), XIic_DynSend(), XIic_MasterRecv(), XIic_MasterSend(), and XIic_Send().

#define XIic_WriteIier | ( |  | BaseAddress,
|  |  | Enable
| ) |  | XIic_WriteReg((BaseAddress), XIIC_IIER_OFFSET, (Enable))

This function sets the contents of the Interrupt Enable Register.

This function writes only the specified value to the register such that some interrupt sources may be enabled and others disabled. It is the caller's responsibility to get the value of the interrupt enable register prior to setting the value to prevent a destructive behavior.

Parameters

  BaseAddress | is the base address of the IIC device.
  Enable | is the value to be written to the Interrupt Enable Register. Bit positions of 1 will be enabled. Bit positions of 0 will be disabled.

Returns
  None

Note
  C-Style signature: void XIic_WriteIier(u32 BaseAddress, u32 Enable);

Referenced by XIic_SelfTest(), and XIic_Start().

#define XIic_WriteIisr | ( |  | BaseAddress,
|  |  | Status
| ) |  | XIic_WriteReg((BaseAddress), XIIC_IISR_OFFSET, (Status))

This function sets the Interrupt status register to the specified value.

This register implements a toggle on write functionality. The interrupt is cleared by writing to this register with the bits to be cleared set to a one and all others to zero. Setting a bit which is zero within this register causes an interrupt to be generated.

This function writes only the specified value to the register such that some status bits may be set and others cleared. It is the caller's responsibility to get the value of the register prior to setting the value to prevent an destructive behavior.

Parameters

  BaseAddress | is the base address of the IIC device.
  Status | is the value to be written to the Interrupt status register.

Returns
  None.

Note
  C-Style signature: void XIic_WriteIisr(u32 BaseAddress, u32 Status);

Referenced by XIic_InterruptHandler().

#define XIic_WriteReg | ( |  | BaseAddress,
|  |  | RegOffset,
|  |  | RegisterValue
| ) |  | XIic_Out32((BaseAddress) + (RegOffset), (RegisterValue))

Write to the specified IIC device register.

Parameters

  BaseAddress | is the base address of the device.
  RegOffset | is the offset from the 1st register of the device to select the specific register.
  RegisterValue | is the value to be written to the register.

Returns
  None.

Note
  C-Style signature: void XIic_WriteReg(u32 BaseAddress, u32 RegOffset, u32 RegisterValue); This macro does not do any checking to ensure that the register exists if the register may be excluded due to parameterization, such as the GPO Register.

Referenced by EepromReadByte(), EepromWriteByte(), XIic_DynMasterRecv(), XIic_DynMasterSend(), XIic_MasterRecv(), XIic_MasterSend(), XIic_Recv(), XIic_Reset(), XIic_Send(), XIic_SetAddress(), XIic_SetGpOutput(), XIic_SetOptions(), XIic_SlaveRecv(), and XIic_Start().

## Typedef Documentation

typedef void(* XIic_Handler)(void *CallBackRef, int ByteCount)

This callback function data type is defined to handle the asynchronous processing of sent and received data of the IIC driver.

The application using this driver is expected to define a handler of this type to support interrupt driven mode. The handlers are called in an interrupt context such that minimal processing should be performed. The handler data type is utilized for both send and receive handlers.

Parameters

  CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is unimportant to the driver component, so it is a void pointer.
  ByteCount | indicates the number of bytes remaining to be sent or received. A value of zero indicates that the requested number of bytes were sent or received.

typedef void(* XIic_StatusHandler)(void *CallBackRef, int StatusEvent)

This callback function data type is defined to handle the asynchronous processing of status events of the IIC driver.

The application using this driver is expected to define a handler of this type to support interrupt driven mode. The handler is called in an interrupt context such that minimal processing should be performed.

Parameters

  CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is invoked. Its type is unimportant to the driver component, so it is a void pointer.
  StatusEvent | indicates one or more status events that occurred. See the definition of the status events above.

## Function Documentation

int XIic_CfgInitialize | ( | XIic * | InstancePtr,
|  | XIic_Config * | Config,
|  | UINTPTR | EffectiveAddr
| ) |  |

Initializes a specific XIic instance.

The initialization entails:

- Initialize the driver to allow access to the device registers and initialize other subcomponents necessary for the operation of the device.
- Default options to:
  - 7-bit slave addressing
  - Send messages as a slave device
  - Repeated start off
  - General call recognition disabled
- Clear messageing and error statistics

The XIic_Start() function must be called after this function before the device is ready to send and receive data on the IIC bus.

Before XIic_Start() is called, the interrupt control must connect the ISR routine to the interrupt handler. This is done by the user, and not XIic_Start() to allow the user to use an interrupt controller of their choice.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  Config | is a reference to a structure containing information about a specific IIC device. This function can initialize multiple instance objects with the use of multiple calls giving different Config information on each call.
  EffectiveAddr | is the device base address in the virtual memory address space. The caller is responsible for keeping the address mapping from EffectiveAddr to the device physical base address unchanged once this function is invoked. Unexpected errors may occur if the address mapping changes after this function is called. If address translation is not used, use Config->BaseAddress for this parameters, passing the physical address instead.

Returns
  - XST_SUCCESS when successful
  - XST_DEVICE_IS_STARTED indicates the device is started (i.e. interrupts enabled and messaging is possible). Must stop before re-initialization is allowed.

Note
  None.

References XIic::BaseAddress, XIic::BNBOnly, XIic_Config::GpOutWidth, XIic::GpOutWidth, XIic_Config::Has10BitAddr, XIic::Has10BitAddr, XIic::IsDynamic, XIic::IsReady, XIic::IsSlaveSetAckOff, XIic::IsStarted, XIic::Options, XIic::RecvBufferPtr, XIic::RecvHandler, XIic::SendBufferPtr, XIic::SendHandler, XIic::StatusHandler, XIic_ClearStats(), and XIic_Reset().

Referenced by IicDynEepromExample(), IicEepromExample(), IicMultiMasterExample(), IicRepeatedStartExample(), IicSelfTestExample(), IicSlaveExample(), IicTenBitAddrExample(), TempSensorExample(), and XIic_Initialize().

void XIic_ClearStats | ( | XIic * | InstancePtr | ) |

Clears the statistics for the IIC device by zeroing all counts.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  None.

Note
  None.

References XIic::IsReady, and XIic::Stats.

Referenced by XIic_CfgInitialize().

int XIic_DynMasterRecv | ( | XIic * | InstancePtr,
|  | u8 * | RxMsgPtr,
|  | u8 | ByteCount
| ) |  |

This function receives data as a master from a slave device on the IIC bus.

If the bus is busy, it will indicate so and then enable an interrupt such that the status handler will be called when the bus is no longer busy. The slave address which has been set with the XIic_SetAddress() function is the address from which data is received. Receiving data on the bus performs a read operation.

Parameters

  InstancePtr | is a pointer to the Iic instance to be worked on.
  RxMsgPtr | is a pointer to the data to be transmitted.
  ByteCount | is the number of message bytes to be sent.

Returns
  - XST_SUCCESS indicates the message reception processes has been initiated.
  - XST_IIC_BUS_BUSY indicates the bus was in use and that the BusNotBusy interrupt is enabled which will update the EventStatus when the bus is no longer busy.
  - XST_IIC_GENERAL_CALL_ADDRESS indicates the slave address is set to the general call address. This is not allowed for Master receive mode.

Note
  The receive FIFO threshold is a zero based count such that 1 must be subtracted from the desired count to get the correct value. When receiving data it is also necessary to not receive the last byte with the prior bytes because the acknowledge must be setup before the last byte is received.

References XIic::AddrOfSlave, XIic::BaseAddress, IIC_RX_FIFO_DEPTH, XIic::IsDynamic, XIic::RecvBufferPtr, XIic::RecvByteCount, XIicStats::RepeatedStarts, XIic::Stats, XIic::TxAddrMode, XIIC_CR_MSMS_MASK, XIIC_CR_REG_OFFSET, XIIC_CR_REPEATED_START_MASK, XIic_DynSend7BitAddress, XIic_DynSendStop, XIIC_INTR_RX_FULL_MASK, XIIC_INTR_TX_ERROR_MASK, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIIC_READ_OPERATION, XIic_ReadReg, XIIC_RFD_REG_OFFSET, and XIic_WriteReg.

Referenced by DynEepromReadData().

int XIic_DynMasterSend | ( | XIic * | InstancePtr,
|  | u8 * | TxMsgPtr,
|  | u8 | ByteCount
| ) |  |

This function sends data as a Dynamic master on the IIC bus.

If the bus is busy, it will indicate so and then enable an interrupt such that the status handler will be called when the bus is no longer busy. The slave address is sent by using XIic_DynSend7BitAddress().

Parameters

  InstancePtr | points to the Iic instance to be worked on.
  TxMsgPtr | points to the data to be transmitted.
  ByteCount | is the number of message bytes to be sent.

Returns
  XST_SUCCESS if successful else XST_FAILURE.

Note
  None.

References XIic::AddrOfSlave, XIic::BaseAddress, XIic::IsDynamic, XIicStats::RepeatedStarts, XIic::SendBufferPtr, XIic::SendByteCount, XIic::Stats, XIic::TxAddrMode, XIIC_CR_DIR_IS_TX_MASK, XIIC_CR_MSMS_MASK, XIIC_CR_NO_ACK_MASK, XIIC_CR_REG_OFFSET, XIic_DynSend7BitAddress, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIIC_INTR_TX_HALF_MASK, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIIC_MASTER_ROLE, XIic_ReadReg, XIIC_WRITE_OPERATION, and XIic_WriteReg.

Referenced by DynEepromWriteData().

unsigned XIic_DynRecv | ( | UINTPTR | BaseAddress,
|  | u8 | Address,
|  | u8 * | BufferPtr,
|  | u8 | ByteCount
| ) |  |

Receive data as a master on the IIC bus.

This function receives the data using polled I/O and blocks until the data has been received. It only supports 7 bit addressing. This function returns zero if bus is busy.

Parameters

  BaseAddress | contains the base address of the IIC Device.
  Address | contains the 7 bit IIC Device address of the device to send the specified data to.
  BufferPtr | points to the data to be sent.
  ByteCount | is the number of bytes to be sent. This value can't be greater than 255 and needs to be greater than 0.

Returns
  The number of bytes received.

Note
  Upon entry to this function, the IIC interface needs to be already enabled in the CR register.

References XIic_ClearIisr, XIic_DynSend7BitAddress, XIic_DynSendStop, XIIC_INTR_ARB_LOST_MASK, XIIC_INTR_BNB_MASK, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIIC_READ_OPERATION, XIic_ReadReg, XIIC_SR_BUS_BUSY_MASK, XIIC_SR_REG_OFFSET, and XIic_WaitBusFree().

unsigned XIic_DynSend | ( | UINTPTR | BaseAddress,
|  | u16 | Address,
|  | u8 * | BufferPtr,
|  | u8 | ByteCount,
|  | u8 | Option
| ) |  |

Send data as a master on the IIC bus.

This function sends the data using polled I/O and blocks until the data has been sent. It only supports 7 bit addressing. This function returns zero if bus is busy.

Parameters

  BaseAddress | contains the base address of the IIC Device.
  Address | contains the 7 bit IIC address of the device to send the specified data to.
  BufferPtr | points to the data to be sent.
  ByteCount | is the number of bytes to be sent.
  Option,: | XIIC_STOP = end with STOP condition, XIIC_REPEATED_START = don't end with STOP condition.

Returns
  The number of bytes sent.

Note
  None.

References XIic_ClearIisr, XIic_DynSend7BitAddress, XIic_DynSendStartStopAddress, XIIC_INTR_ARB_LOST_MASK, XIIC_INTR_BNB_MASK, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIic_ReadReg, XIIC_SR_BUS_BUSY_MASK, XIIC_SR_REG_OFFSET, XIIC_TX_DYN_STOP_MASK, XIic_WaitBusFree(), and XIIC_WRITE_OPERATION.

Referenced by EepromWriteByte().

u16 XIic_GetAddress | ( | XIic * | InstancePtr,
|  | int | AddressType
| ) |  |

This function gets the addresses for the IIC device driver.

The addresses include the device address that the device responds to as a slave, or the slave address to communicate with on the bus. The address returned has the same format whether 7 or 10 bits.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  AddressType | indicates which address, the address which this responds to on the IIC bus as a slave, or the slave address to communicate with when this device is a master. One of the following values must be contained in this argument.
        XII_ADDR_TO_SEND_TYPE Slave being addressed as a master
        XII_ADDR_TO_RESPOND_TYPE      Slave address to respond to as a slave
  If neither of the two valid arguments are used, the function returns the address of the slave device

Returns
  The address retrieved.

Note
  None.

References XIic::AddrOfSlave, XIic::BaseAddress, XIic::Has10BitAddr, XII_ADDR_TO_RESPOND_TYPE, XIIC_ADR_REG_OFFSET, XIic_ReadReg, and XIIC_TBA_REG_OFFSET.

int XIic_GetGpOutput | ( | XIic * | InstancePtr,
|  | u8 * | OutputValuePtr
| ) |  |

This function gets the contents of the General Purpose Output register for the IIC device driver.

Note that the number of bits in this register is parameterizable in the hardware such that it may not exist. This function checks to ensure that it does exist to prevent bus errors.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  OutputValuePtr | contains the value which was read from the register.

Returns
  - XST_SUCCESS if the given data is read from the GPO register.
    - XST_NO_FEATURE if the hardware is configured such that this register does not contain any bits to read or write.

The OutputValuePtr is also an output as it contains the value read.

Note
  None.

References XIic::BaseAddress, XIic::GpOutWidth, XIIC_GPO_REG_OFFSET, and XIic_ReadReg.

u32 XIic_GetOptions | ( | XIic * | InstancePtr | ) |

This function gets the current options for the IIC device.

Options control the how the device behaves on the IIC bus. See SetOptions for more information on options.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  The options of the IIC device. See xiic.h for a list of available options.

Note

Options enabled will have a 1 in its appropriate bit position.

References XIic::Options.

void XIic_GetStats | ( | XIic * | InstancePtr,
|  | XIicStats * | StatsPtr
| ) |  |

Gets a copy of the statistics for an IIC device.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  StatsPtr | is a pointer to a XIicStats structure which will get a copy of current statistics.

Returns
  None.

Note
  None.

References XIic::IsReady, and XIic::Stats.

int XIic_Initialize | ( | XIic * | InstancePtr,
|  | u16 | DeviceId
| ) |  |

Initializes a specific XIic instance.

The initialization entails:

- Check the device has an entry in the configuration table.
- Initialize the driver to allow access to the device registers and initialize other subcomponents necessary for the operation of the device.
- Default options to:
  - 7-bit slave addressing
  - Send messages as a slave device
  - Repeated start off
  - General call recognition disabled
- Clear messageing and error statistics

The XIic_Start() function must be called after this function before the device is ready to send and receive data on the IIC bus.

Before XIic_Start() is called, the interrupt control must connect the ISR routine to the interrupt handler. This is done by the user, and not XIic_Start() to allow the user to use an interrupt controller of their choice.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  DeviceId | is the unique id of the device controlled by this XIic instance. Passing in a device id associates the generic XIic instance to a specific device, as chosen by the caller or application developer.

Returns
  - XST_SUCCESS when successful
  - XST_DEVICE_NOT_FOUND indicates the given device id isn't found
  - XST_DEVICE_IS_STARTED indicates the device is started (i.e. interrupts enabled and messaging is possible). Must stop before re-initialization is allowed.

Note
  None.

References XIic_Config::BaseAddress, XIic_CfgInitialize(), and XIic_LookupConfig().

void XIic_InterruptHandler | ( | void * | InstancePtr | ) |

This function is the interrupt handler for the XIic driver.

This function should be connected to the interrupt system.

Only one interrupt source is handled for each interrupt allowing higher priority system interrupts quicker response time.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  None.

References XIicStats::ArbitrationLost, XIic::BaseAddress, XIic::BNBOnly, XIicStats::IicInterrupts, XIicStats::RecvInterrupts, XIic::SendCallBackRef, XIic::SendHandler, XIicStats::SendInterrupts, XIic::Stats, XIicStats::TxErrors, XIIC_INTR_AAS_MASK, XIIC_INTR_ARB_LOST_MASK, XIIC_INTR_BNB_MASK, XIIC_INTR_NAAS_MASK, XIIC_INTR_RX_FULL_MASK, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIIC_INTR_TX_HALF_MASK, XIic_IsIntrGlobalEnabled, XIic_ReadIier, XIic_ReadIisr, XIic_ReadReg, XIIC_SR_ADDR_AS_SLAVE_MASK, XIIC_SR_REG_OFFSET, and XIic_WriteIisr.

u32 XIic_IsSlave | ( | XIic * | InstancePtr | ) |

A function to determine if the device is currently addressed as a slave.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  - TRUE if the device is addressed as slave.

- FALSE if the device is NOT addressed as slave.

Note
  None.

References XIic::BaseAddress, XIic_ReadReg, XIIC_SR_ADDR_AS_SLAVE_MASK, and XIIC_SR_REG_OFFSET.

XIic_Config * XIic_LookupConfig | ( | u16 | DeviceId | ) |

Looks up the device configuration based on the unique device ID.

The table IicConfigTable contains the configuration info for each device in the system.

Parameters

  DeviceId | is the unique device ID to look for

Returns
  A pointer to the configuration data of the device, or NULL if no match is found.

Note
  None.

References XIic_ConfigTable.

Referenced by IicDynEepromExample(), IicEepromExample(), IicMultiMasterExample(), IicRepeatedStartExample(), IicSelfTestExample(), IicSlaveExample(), IicTenBitAddrExample(), TempSensorExample(), and XIic_Initialize().

int XIic_MasterRecv | ( | XIic * | InstancePtr,
|  | u8 * | RxMsgPtr,
|  | int | ByteCount
| ) |  |

This function receives data as a master from a slave device on the IIC bus.

If the bus is busy, it will indicate so and then enable an interrupt such that the status handler will be called when the bus is no longer busy. The slave address which has been set with the XIic_SetAddress() function is the address from which data is received. Receiving data on the bus performs a read operation.

Parameters

  InstancePtr | is a pointer to the Iic instance to be worked on.
  RxMsgPtr | is a pointer to the data to be transmitted
  ByteCount | is the number of message bytes to be sent

Returns
  - XST_SUCCESS indicates the message reception processes has been initiated.
  - XST_IIC_BUS_BUSY indicates the bus was in use and that the BusNotBusy interrupt is enabled which will update the EventStatus when the bus is no longer busy.
  - XST_IIC_GENERAL_CALL_ADDRESS indicates the slave address is set to the the general call address. This is not allowed for Master receive mode.

References XIic::AddrOfSlave, XIic::BaseAddress, IIC_RX_FIFO_DEPTH, XIic::IsDynamic, XIic::Options, XIic::RecvBufferPtr, XIic::RecvByteCount, XIicStats::RepeatedStarts, XIic::SendBufferPtr, XIic::Stats, XIic::TxAddrMode, XIIC_CR_MSMS_MASK, XIIC_CR_REG_OFFSET, XIIC_CR_REPEATED_START_MASK, XIIC_INTR_RX_FULL_MASK, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIIC_READ_OPERATION, XIic_ReadReg, XIIC_RFD_REG_OFFSET, XIIC_WRITE_OPERATION, and XIic_WriteReg.

Referenced by EepromReadData(), and TempSensorExample().

int XIic_MasterSend | ( | XIic * | InstancePtr,
|  | u8 * | TxMsgPtr,
|  | int | ByteCount
| ) |  |

This function sends data as a master on the IIC bus.

If the bus is busy, it will indicate so and then enable an interrupt such that the status handler will be called when the bus is no longer busy. The slave address which has been set with the XIic_SetAddress() function is the address to which the specific data is sent. Sending data on the bus performs a write operation.

Parameters

  InstancePtr | points to the Iic instance to be worked on.
  TxMsgPtr | points to the data to be transmitted.
  ByteCount | is the number of message bytes to be sent.

Returns
  - XST_SUCCESS indicates the message transmission has been initiated.
  - XST_IIC_BUS_BUSY indicates the bus was in use and that the BusNotBusy interrupt is enabled which will update the EventStatus when the bus is no longer busy.

Note
  None.

References XIic::AddrOfSlave, XIic::BaseAddress, XIic::IsDynamic, XIic::Options, XIic::RecvBufferPtr, XIicStats::RepeatedStarts, XIic::SendBufferPtr, XIic::SendByteCount, XIic::Stats, XIic::TxAddrMode, XIIC_CR_DIR_IS_TX_MASK, XIIC_CR_MSMS_MASK, XIIC_CR_NO_ACK_MASK, XIIC_CR_REG_OFFSET, XIIC_CR_REPEATED_START_MASK, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIIC_INTR_TX_HALF_MASK, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIIC_MASTER_ROLE, XIic_ReadReg, XIIC_WRITE_OPERATION, and XIic_WriteReg.

Referenced by DynEepromWriteData(), EepromWriteData(), and IicMultiMasterExample().

void XIic_MultiMasterInclude | ( |  | ) |

This function includes multi-master code such that multi-master events are handled properly.

Multi-master events include a loss of arbitration and the bus transitioning from busy to not busy. This function allows the multi-master processing to be optional. This function must be called prior to allowing any multi-master events to occur, such as after the driver is initialized.

Parameters

  None. |

Returns
  None.

Note
  None.

Referenced by IicMultiMasterExample().

unsigned XIic_Recv | ( | UINTPTR | BaseAddress,
|  | u8 | Address,
|  | u8 * | BufferPtr,
|  | unsigned | ByteCount,
|  | u8 | Option
| ) |  |

Receive data as a master on the IIC bus.

This function receives the data using polled I/O and blocks until the data has been received. It only supports 7 bit addressing mode of operation. This function returns zero if bus is busy.

Parameters

  BaseAddress | contains the base address of the IIC device.
  Address | contains the 7 bit IIC address of the device to send the specified data to.
  BufferPtr | points to the data to be sent.
  ByteCount | is the number of bytes to be sent.
  Option | indicates whether to hold or free the bus after reception of data, XIIC_STOP = end with STOP condition, XIIC_REPEATED_START = don't end with STOP condition.

Returns
  The number of bytes received.

Note
  None.

References XIic_ClearIisr, XIIC_CR_DIR_IS_TX_MASK, XIIC_CR_ENABLE_DEVICE_MASK, XIIC_CR_MSMS_MASK, XIIC_CR_NO_ACK_MASK, XIIC_CR_REG_OFFSET, XIIC_CR_REPEATED_START_MASK, XIIC_INTR_ARB_LOST_MASK, XIIC_INTR_BNB_MASK, XIIC_INTR_RX_FULL_MASK, XIIC_INTR_TX_ERROR_MASK, XIIC_READ_OPERATION, XIic_ReadReg, XIIC_RFD_REG_OFFSET, XIic_Send7BitAddress, XIIC_SR_BUS_BUSY_MASK, XIIC_SR_REG_OFFSET, XIic_WaitBusFree(), and XIic_WriteReg.

Referenced by EepromReadByte(), and LowLevelTempSensorExample().

void XIic_Reset | ( | XIic * | InstancePtr | ) |

Resets the IIC device.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  None.

Note
  The complete IIC core is Reset on giving a software reset to the IIC core. Some previous versions of the core only reset the Interrupt Logic/Registers, please refer to the HW specification for further details about this.

References XIic::BaseAddress, XIic::IsReady, XIIC_RESET_MASK, XIIC_RESETR_OFFSET, and XIic_WriteReg.

Referenced by XIic_CfgInitialize(), and XIic_SelfTest().

int XIic_SelfTest | ( | XIic * | InstancePtr | ) |

Runs a limited self-test on the driver/device.

This test does a read/write test of the Interrupt Registers There is no loopback capabilities for the device such that this test does not send or receive data.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  - XST_SUCCESS if no errors are found
  - XST_FAILURE if errors are found

Note
  None.

References XIic::BaseAddress, XIic::IsReady, XIic_IntrGlobalEnable, XIic_IsIntrGlobalEnabled, XIic_ReadIier, XIic_Reset(), XIIC_TX_RX_INTERRUPTS, and XIic_WriteIier.

Referenced by IicSelfTestExample().

unsigned XIic_Send | ( | UINTPTR | BaseAddress,
|  | u8 | Address,
|  | u8 * | BufferPtr,
|  | unsigned | ByteCount,
|  | u8 | Option
| ) |  |

Send data as a master on the IIC bus.

This function sends the data using polled I/O and blocks until the data has been sent. It only supports 7 bit addressing mode of operation. This function returns zero if bus is busy.

Parameters

  BaseAddress | contains the base address of the IIC device.
  Address | contains the 7 bit IIC address of the device to send the specified data to.
  BufferPtr | points to the data to be sent.
  ByteCount | is the number of bytes to be sent.
  Option | indicates whether to hold or free the bus after transmitting the data.

Returns
  The number of bytes sent.

Note
  None.

References XIic_ClearIisr, XIIC_CR_DIR_IS_TX_MASK, XIIC_CR_ENABLE_DEVICE_MASK, XIIC_CR_MSMS_MASK, XIIC_CR_REG_OFFSET, XIIC_CR_REPEATED_START_MASK, XIIC_INTR_ARB_LOST_MASK, XIIC_INTR_BNB_MASK, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIic_ReadReg, XIic_Send7BitAddress, XIIC_SR_ADDR_AS_SLAVE_MASK, XIIC_SR_BUS_BUSY_MASK, XIIC_SR_REG_OFFSET, XIic_WaitBusFree(), XIIC_WRITE_OPERATION, and XIic_WriteReg.

Referenced by EepromReadByte(), and EepromWriteByte().

int XIic_SetAddress | ( | XIic * | InstancePtr,
|  | int | AddressType,
|  | int | Address
| ) |  |

This function sets the bus addresses.

The addresses include the device address that the device responds to as a slave, or the slave address to communicate with on the bus. The IIC device hardware is built to allow either 7 or 10 bit slave addressing only at build time rather than at run time. When this device is a master, slave addressing can be selected at run time to match addressing modes for other bus devices.

Addresses are represented as hex values with no adjustment for the data direction bit as the software manages address bit placement. Example: For a 7 address written to the device of 1010 011X where X is the transfer direction (send/recv), the address parameter for this function needs to be 01010011 or 0x53 where the correct bit alllignment will be handled for 7 as well as 10 bit devices. This is especially important as the bit placement is not handled the same depending on which options are used such as repeated start.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  AddressType | indicates which address is being modified, the address which this device responds to on the IIC bus as a slave, or the slave address to communicate with when this device is a master. One of the following values must be contained in this argument.
        XII_ADDR_TO_SEND_TYPE Slave being addressed by a this master
        XII_ADDR_TO_RESPOND_TYPE      Address to respond to as a slave device
  Address | contains the address to be set, 7 bit or 10 bit address. A ten bit address must be within the range: 0 - 1023 and a 7 bit address must be within the range 0 - 127.

Returns
  - XST_SUCCESS is returned if the address was successfully set.
  - XST_IIC_NO_10_BIT_ADDRESSING indicates only 7 bit addressing supported.
  - XST_INVALID_PARAM indicates an invalid parameter was specified.

Note

Upper bits of 10-bit address is written only when current device is built as a ten bit device.

References XIic::AddrOfSlave, XIic::BaseAddress, XIic::Has10BitAddr, XII_ADDR_TO_RESPOND_TYPE, XII_ADDR_TO_SEND_TYPE, XIIC_ADR_REG_OFFSET, XIIC_TBA_REG_OFFSET, and XIic_WriteReg.

Referenced by IicDynEepromExample(), IicEepromExample(), IicMultiMasterExample(), IicRepeatedStartExample(), IicSlaveExample(), IicTenBitAddrExample(), and TempSensorExample().

int XIic_SetGpOutput | ( | XIic * | InstancePtr,
|  | u8 | OutputValue
| ) |  |

This function sets the contents of the General Purpose Output register for the IIC device driver.

Note that the number of bits in this register is parameterizable in the hardware such that it may not exist. This function checks to ensure that it does exist to prevent bus errors, but does not ensure that the number of bits in the register are sufficient for the value being written (won't cause a bus error).

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  OutputValue | contains the value to be written to the register.

Returns
  - XST_SUCCESS if the given data is written to the GPO register.
    - XST_NO_FEATURE if the hardware is configured such that this register does not contain any bits to read or write.

Note
  None.

References XIic::BaseAddress, XIic::GpOutWidth, XIIC_GPO_REG_OFFSET, and XIic_WriteReg.

void XIic_SetOptions | ( | XIic * | InstancePtr,
|  | u32 | NewOptions
| ) |  |

This function sets the options for the IIC device driver.

The options control how the device behaves relative to the IIC bus. If an option applies to how messages are sent or received on the IIC bus, it must be set prior to calling functions which send or receive data.

To set multiple options, the values must be ORed together. To not change existing options, read/modify/write with the current options using XIic_GetOptions().

USAGE EXAMPLE:

Read/modify/write to enable repeated start:

      u8 Options;
      Options = XIic_GetOptions(&Iic);
      XIic_SetOptions(&Iic, Options | XII_REPEATED_START_OPTION);

Disabling General Call:

      Options = XIic_GetOptions(&Iic);
      XIic_SetOptions(&Iic, Options &= ~XII_GENERAL_CALL_OPTION);

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  NewOptions | are the options to be set. See xiic.h for a list of the available options.

Returns
  None.

Note

Sending or receiving messages with repeated start enabled, and then disabling repeated start, will not take effect until another master transaction is completed. i.e. After using repeated start, the bus will continue to be throttled after repeated start is disabled until a master transaction occurs allowing the IIC to release the bus.
Options enabled will have a 1 in its appropriate bit position.

References XIic::BaseAddress, XIic::Options, XII_GENERAL_CALL_OPTION, XIIC_CR_GENERAL_CALL_MASK, XIIC_CR_REG_OFFSET, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIic_ReadReg, and XIic_WriteReg.

Referenced by IicTenBitAddrExample().

void XIic_SetRecvHandler | ( | XIic * | InstancePtr,
|  | void * | CallBackRef,
|  | XIic_Handler | FuncPtr
| ) |  |

Sets the receive callback function, the receive handler, which the driver calls when it finishes receiving data.

The number of bytes used to signal when the receive is complete is the number of bytes set in the XIic_Recv function.

The handler executes in an interrupt context such that it must minimize the amount of processing performed such as transferring data to a thread context.

The number of bytes received is passed to the handler as an argument.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  CallBackRef | is the upper layer callback reference passed back when the callback function is invoked.
  FuncPtr | is the pointer to the callback function.

Returns
  None.

Note
  The handler is called within interrupt context .

References XIic::IsReady, XIic::RecvCallBackRef, and XIic::RecvHandler.

Referenced by IicDynEepromExample(), IicEepromExample(), IicRepeatedStartExample(), IicSlaveExample(), IicTenBitAddrExample(), and TempSensorExample().

void XIic_SetSendHandler | ( | XIic * | InstancePtr,
|  | void * | CallBackRef,
|  | XIic_Handler | FuncPtr
| ) |  |

Sets the send callback function, the send handler, which the driver calls when it receives confirmation of sent data.

The handler executes in an interrupt context such that it must minimize the amount of processing performed such as transferring data to a thread context.

Parameters

  InstancePtr | the pointer to the XIic instance to be worked on.
  CallBackRef | the upper layer callback reference passed back when the callback function is invoked.
  FuncPtr | the pointer to the callback function.

Returns
  None.

Note
  The handler is called within interrupt context .

References XIic::IsReady, XIic::SendCallBackRef, and XIic::SendHandler.

Referenced by IicDynEepromExample(), IicEepromExample(), IicMultiMasterExample(), IicRepeatedStartExample(), IicSlaveExample(), and IicTenBitAddrExample().

void XIic_SetStatusHandler | ( | XIic * | InstancePtr,
|  | void * | CallBackRef,
|  | XIic_StatusHandler | FuncPtr
| ) |  |

Sets the status callback function, the status handler, which the driver calls when it encounters conditions which are not data related.

The handler executes in an interrupt context such that it must minimize the amount of processing performed such as transferring data to a thread context. The status events that can be returned are described in xiic.h.

Parameters

  InstancePtr | points to the XIic instance to be worked on.
  CallBackRef | is the upper layer callback reference passed back when the callback function is invoked.
  FuncPtr | is the pointer to the callback function.

Returns
  None.

Note
  The handler is called within interrupt context .

References XIic::IsReady, XIic::StatusCallBackRef, and XIic::StatusHandler.

Referenced by IicDynEepromExample(), IicEepromExample(), IicMultiMasterExample(), IicRepeatedStartExample(), IicSlaveExample(), IicTenBitAddrExample(), and TempSensorExample().

void XIic_SlaveInclude | ( |  | ) |

This function includes slave code such that slave events will be processed.

It is necessary to allow slave code to be optional to reduce the size of the driver. This function may be called at any time but must be prior to being selected as a slave on the IIC bus. This function may be called prior to the Cfg_Initialize() function and must be called before any functions in this file are called.

Parameters

  None. |

Returns
  None.

Note
  None.

Referenced by IicSlaveExample(), and IicTenBitAddrExample().

int XIic_SlaveRecv | ( | XIic * | InstancePtr,
|  | u8 * | RxMsgPtr,
|  | int | ByteCount
| ) |  |

This function sends data as a slave on the IIC bus and should not be called until an event has occurred that indicates the device has been selected by a master attempting read from the slave (XII_MASTER_READ_EVENT).

If more data is received than specified a No Acknowledge will be sent to signal the Master to stop sending data. Any received data is read to prevent the slave device from throttling the bus.

Parameters

  InstancePtr | is a pointer to the Iic instance to be worked on.
  RxMsgPtr | is a pointer to the data to be transmitted.
  ByteCount | is the number of message bytes to be sent.

Returns
  - XST_SUCCESS indicates the message transmission has been initiated.
  - XST_IIC_NOT_SLAVE indicates the device has not been selected to be a slave on the IIC bus such that data cannot be received.

References XIic::BaseAddress, IIC_RX_FIFO_DEPTH, XIic::RecvBufferPtr, XIic::RecvByteCount, XIic::SendBufferPtr, XIIC_INTR_RX_FULL_MASK, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIic_ReadReg, XIIC_RFD_REG_OFFSET, XIIC_SR_ADDR_AS_SLAVE_MASK, XIIC_SR_REG_OFFSET, and XIic_WriteReg.

Referenced by SlaveReadData(), and TenBitAddrReadData().

int XIic_SlaveSend | ( | XIic * | InstancePtr,
|  | u8 * | TxMsgPtr,
|  | int | ByteCount
| ) |  |

This function sends data as a slave on the IIC bus and should not be called until an event has occurred that indicates the device has been selected by a master attempting read from the slave (XII_MASTER_READ_EVENT).

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.
  TxMsgPtr | is a pointer to the data to be transmitted.
  ByteCount | is the number of message bytes to be sent.

Returns
  - XST_SUCCESS indicates the message transmission has been initiated.
  - XST_IIC_NOT_SLAVE indicates the device has not been selected to be a slave on the IIC bus such that data cannot be sent.

Note
  None.

References XIic::BaseAddress, XIic::RecvBufferPtr, XIic::SendBufferPtr, XIic::SendByteCount, XIIC_INTR_TX_EMPTY_MASK, XIIC_INTR_TX_ERROR_MASK, XIIC_INTR_TX_HALF_MASK, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIic_ReadReg, XIIC_SLAVE_ROLE, XIIC_SR_ADDR_AS_SLAVE_MASK, and XIIC_SR_REG_OFFSET.

Referenced by SlaveWriteData(), and TenBitAddrWriteData().

int XIic_Start | ( | XIic * | InstancePtr | ) |

This function starts the IIC device and driver by enabling the proper interrupts such that data may be sent and received on the IIC bus.

This function must be called before the functions to send and receive data.

Before XIic_Start() is called, the interrupt control must connect the ISR routine to the interrupt handler. This is done by the user, and not XIic_Start() to allow the user to use an interrupt controller of their choice.

Start enables:

- IIC device
- Interrupts:
  - Addressed as slave to allow messages from another master
  - Arbitration Lost to detect Tx arbitration errors
  - Global IIC interrupt

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  XST_SUCCESS always.

Note

The device interrupt is connected to the interrupt controller, but no "messaging" interrupts are enabled. Addressed as Slave is enabled to reception of messages when this devices address is written to the bus. The correct messaging interrupts are enabled when sending or receiving via the IicSend() and IicRecv() functions. No action is required by the user to control any IIC interrupts as the driver completely manages all 8 interrupts. Start and Stop control the ability to use the device. Stopping the device completely stops all device interrupts from the processor.

References XIic::BaseAddress, XIic::IsDynamic, XIic::IsReady, XIic::IsStarted, XIIC_CR_ENABLE_DEVICE_MASK, XIIC_CR_REG_OFFSET, XIIC_INTR_AAS_MASK, XIIC_INTR_ARB_LOST_MASK, XIic_IntrGlobalEnable, XIIC_RFD_REG_OFFSET, XIic_WriteIier, and XIic_WriteReg.

Referenced by DynEepromReadData(), DynEepromWriteData(), EepromReadData(), EepromWriteData(), IicMultiMasterExample(), SlaveReadData(), SlaveWriteData(), TempSensorExample(), TenBitAddrReadData(), and TenBitAddrWriteData().

int XIic_Stop | ( | XIic * | InstancePtr | ) |

This function stops the IIC device and driver such that data is no longer sent or received on the IIC bus.

This function stops the device by disabling interrupts. This function only disables interrupts within the device such that the caller is responsible for disconnecting the interrupt handler of the device from the interrupt source and disabling interrupts at other levels.

Due to bus throttling that could hold the bus between messages when using repeated start option, stop will not occur when the device is actively sending or receiving data from the IIC bus or the bus is being throttled by this device, but instead return XST_IIC_BUS_BUSY.

Parameters

  InstancePtr | is a pointer to the XIic instance to be worked on.

Returns
  - XST_SUCCESS indicates all IIC interrupts are disabled. No messages can be received or transmitted until XIic_Start() is called.
  - XST_IIC_BUS_BUSY indicates this device is currently engaged in message traffic and cannot be stopped.

Note
  None.

References XIic::BaseAddress, XIic::IsStarted, XIIC_CR_MSMS_MASK, XIIC_CR_REG_OFFSET, XIic_IntrGlobalDisable, XIic_IntrGlobalEnable, XIic_ReadReg, XIIC_SR_ADDR_AS_SLAVE_MASK, and XIIC_SR_REG_OFFSET.

Referenced by DynEepromReadData(), DynEepromWriteData(), EepromReadData(), EepromWriteData(), IicMultiMasterExample(), SlaveReadData(), SlaveWriteData(), TenBitAddrReadData(), and TenBitAddrWriteData().

u32 XIic_WaitBusFree | ( | UINTPTR | BaseAddress | ) |

This function will wait until the I2C bus is free or timeout.

Parameters

  BaseAddress | contains the base address of the I2C device.

Returns
  - XST_SUCCESS if the I2C bus was freed before the timeout.
  - XST_FAILURE otherwise.

Note
  None.

Referenced by XIic_DynRecv(), XIic_DynSend(), XIic_Recv(), and XIic_Send().

## Variable Documentation

XIic_Config XIic_ConfigTable[XPAR_XIIC_NUM_INSTANCES]

Initial value:
= {
{
XPAR_IIC_0_DEVICE_ID,
XPAR_IIC_0_BASEADDR,
XPAR_IIC_0_TEN_BIT_ADR,
XPAR_IIC_0_GPO_WIDTH
}
,
{
XPAR_IIC_1_DEVICE_ID,
XPAR_IIC_1_BASEADDR,
XPAR_IIC_1_TEN_BIT_ADR,
XPAR_IIC_1_GPO_WIDTH
}
}

The IIC configuration table, sized by the number of instances defined in xparameters.h.

Referenced by XIic_LookupConfig().

XIic_Config XIic_ConfigTable[]

The IIC configuration table, sized by the number of instances defined in xparameters.h.

Referenced by XIic_LookupConfig().