v_hdmiphy1: Main Page

| v_hdmiphy1 Xilinx SDK Drivers API Documentation

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v_hdmiphy1 Documentation

This is main header file of the Xilinx HDMI PHY Controller driverVideo PHY Controller Overview

The PHY is intended to simplify the use of serial transceivers and adds domain-specific configurability. The Video PHY Controller IP is not intended to be used as a stand alone IP and must be used with Xilinx Video MACs such as HDMI 2.1 Transmitter/Receiver Subsystems. The core enables simpler connectivity between MAC layers for TX and RX paths. However, it is still important to understand the behavior, usage, and any limitations of the transceivers. See the device specific transceiver user guide for details.

Video PHY Controller Driver Features

Video PHY Controller driver supports following features

- Xilinx HDMI 2.1 MAC IP
- GTHE3, GTHE4 and GTYE4 GT types
- HDMI:
- 4 pixel-wide video interface
- 8/10/12 bits per component
- RGB & YCbCr color space
- Up to 10k resolution at both Input and Output interface

    MODIFICATION HISTORY:

    Ver   Who  Date     Changes

               dd/mm/yy

    1.0   gm   10/12/18 Initial release.