gpiops: Gpiops_v3_6

| gpiops Xilinx SDK Drivers API Documentation

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Data Structures | Macros | Typedefs | Functions | Variables
Gpiops_v3_6

## Data Structures
struct | XGpioPs_Config
| This typedef contains configuration information for a device. More...
struct | XGpioPs
| The XGpioPs driver instance data. More...

## Macros
#define | XGPIOPS_BANK_MAX_PINS (u32)32
| Max pins in a GPIO bank. More...
#define | XGPIOPS_BANK0 0x00U
| GPIO Bank 0. More...
#define | XGPIOPS_BANK1 0x01U
| GPIO Bank 1. More...
#define | XGPIOPS_BANK2 0x02U
| GPIO Bank 2. More...
#define | XGPIOPS_BANK3 0x03U
| GPIO Bank 3. More...
#define | XGPIOPS_MAX_BANKS_ZYNQMP 0x06U
| Max banks in a Zynq Ultrascale+ MP GPIO device. More...
#define | XGPIOPS_MAX_BANKS 0x04U
| Max banks in a Zynq GPIO device. More...
#define | XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP (u32)174
| Max pins in the Zynq Ultrascale+ MP GPIO device 0 - 25, Bank 0 26 - 51, Bank 1 52 - 77, Bank 2 78 - 109, Bank 3 110 - 141, Bank 4 142 - 173, Bank 5. More...
#define | XGPIOPS_DEVICE_MAX_PIN_NUM (u32)118
| Max pins in the Zynq GPIO device 0 - 31, Bank 0 32 - 53, Bank 1 54 - 85, Bank 2 86 - 117, Bank 3. More...
#define | XGpioPs_ReadReg(BaseAddr, RegOffset) Xil_In32((BaseAddr) + (u32)(RegOffset))
| This macro reads the given register. More...
#define | XGpioPs_WriteReg(BaseAddr, RegOffset, Data) Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))
| This macro writes to the given register. More...

## Typedefs
typedef void(* | XGpioPs_Handler )(void *CallBackRef, u32 Bank, u32 Status)
| This handler data type allows the user to define a callback function to handle the interrupts for the GPIO device. More...

## Functions
u32 | XGpioPs_Read (const XGpioPs *InstancePtr, u8 Bank)
| Read the Data register of the specified GPIO bank. More...
u32 | XGpioPs_ReadPin (const XGpioPs *InstancePtr, u32 Pin)
| Read Data from the specified pin. More...
void | XGpioPs_Write (const XGpioPs *InstancePtr, u8 Bank, u32 Data)
| Write to the Data register of the specified GPIO bank. More...
void | XGpioPs_WritePin (const XGpioPs *InstancePtr, u32 Pin, u32 Data)
| Write data to the specified pin. More...
void | XGpioPs_SetDirection (const XGpioPs *InstancePtr, u8 Bank, u32 Direction)
| Set the Direction of the pins of the specified GPIO Bank. More...
void | XGpioPs_SetDirectionPin (const XGpioPs *InstancePtr, u32 Pin, u32 Direction)
| Set the Direction of the specified pin. More...
u32 | XGpioPs_GetDirection (const XGpioPs *InstancePtr, u8 Bank)
| Get the Direction of the pins of the specified GPIO Bank. More...
u32 | XGpioPs_GetDirectionPin (const XGpioPs *InstancePtr, u32 Pin)
| Get the Direction of the specified pin. More...
void | XGpioPs_SetOutputEnable (const XGpioPs *InstancePtr, u8 Bank, u32 OpEnable)
| Set the Output Enable of the pins of the specified GPIO Bank. More...
void | XGpioPs_SetOutputEnablePin (const XGpioPs *InstancePtr, u32 Pin, u32 OpEnable)
| Set the Output Enable of the specified pin. More...
u32 | XGpioPs_GetOutputEnable (const XGpioPs *InstancePtr, u8 Bank)
| Get the Output Enable status of the pins of the specified GPIO Bank. More...
u32 | XGpioPs_GetOutputEnablePin (const XGpioPs *InstancePtr, u32 Pin)
| Get the Output Enable status of the specified pin. More...
s32 | XGpioPs_SelfTest (const XGpioPs *InstancePtr)
| This function runs a self-test on the GPIO driver/device. More...
void | XGpioPs_IntrEnable (const XGpioPs *InstancePtr, u8 Bank, u32 Mask)
| This function enables the interrupts for the specified pins in the specified bank. More...
void | XGpioPs_IntrDisable (const XGpioPs *InstancePtr, u8 Bank, u32 Mask)
| This function disables the interrupts for the specified pins in the specified bank. More...
u32 | XGpioPs_IntrGetEnabled (const XGpioPs *InstancePtr, u8 Bank)
| This function returns the interrupt enable status for a bank. More...
u32 | XGpioPs_IntrGetStatus (const XGpioPs *InstancePtr, u8 Bank)
| This function returns interrupt status read from Interrupt Status Register. More...
void | XGpioPs_IntrClear (const XGpioPs *InstancePtr, u8 Bank, u32 Mask)
| This function clears pending interrupt(s) with the provided mask. More...
void | XGpioPs_SetIntrType (const XGpioPs *InstancePtr, u8 Bank, u32 IntrType, u32 IntrPolarity, u32 IntrOnAny)
| This function is used for setting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins. More...
void | XGpioPs_GetIntrType (const XGpioPs *InstancePtr, u8 Bank, u32 *IntrType, u32 *IntrPolarity, u32 *IntrOnAny)
| This function is used for getting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins. More...
void | XGpioPs_SetCallbackHandler (XGpioPs *InstancePtr, void *CallBackRef, XGpioPs_Handler FuncPointer)
| This function sets the status callback function. More...
void | XGpioPs_IntrHandler (const XGpioPs *InstancePtr)
| This function is the interrupt handler for GPIO interrupts.It checks the interrupt status registers of all the banks to determine the actual bank in which an interrupt has been triggered. More...
void | XGpioPs_SetIntrTypePin (const XGpioPs *InstancePtr, u32 Pin, u8 IrqType)
| This function is used for setting the IRQ Type of a single GPIO pin. More...
u8 | XGpioPs_GetIntrTypePin (const XGpioPs *InstancePtr, u32 Pin)
| This function returns the IRQ Type of a given GPIO pin. More...
void | XGpioPs_IntrEnablePin (const XGpioPs *InstancePtr, u32 Pin)
| This function enables the interrupt for the specified pin. More...
void | XGpioPs_IntrDisablePin (const XGpioPs *InstancePtr, u32 Pin)
| This function disables the interrupts for the specified pin. More...
u32 | XGpioPs_IntrGetEnabledPin (const XGpioPs *InstancePtr, u32 Pin)
| This function returns whether interrupts are enabled for the specified pin. More...
u32 | XGpioPs_IntrGetStatusPin (const XGpioPs *InstancePtr, u32 Pin)
| This function returns interrupt enable status of the specified pin. More...
void | XGpioPs_IntrClearPin (const XGpioPs *InstancePtr, u32 Pin)
| This function clears the specified pending interrupt. More...
XGpioPs_Config * | XGpioPs_LookupConfig (u16 DeviceId)
| This function looks for the device configuration based on the unique device ID. More...
void | StubHandler (const void *CallBackRef, u32 Bank, u32 Status)
| This is a stub for the status callback. More...

## Variables
XGpioPs_Config | XGpioPs_ConfigTable [XPAR_XGPIOPS_NUM_INSTANCES]
| This table contains configuration information for each GPIO device in the system. More...
XGpioPs_Config | XGpioPs_ConfigTable [XPAR_XGPIOPS_NUM_INSTANCES]
| This table contains configuration information for each GPIO device in the system. More...

## Interrupt types
The following constants define the interrupt types that can be set for each GPIO pin.
#define | XGPIOPS_IRQ_TYPE_EDGE_RISING 0x00U
| Interrupt on Rising edge. More...
#define | XGPIOPS_IRQ_TYPE_EDGE_FALLING 0x01U
| Interrupt Falling edge. More...
#define | XGPIOPS_IRQ_TYPE_EDGE_BOTH 0x02U
| Interrupt on both edges. More...
#define | XGPIOPS_IRQ_TYPE_LEVEL_HIGH 0x03U
| Interrupt on high level. More...
#define | XGPIOPS_IRQ_TYPE_LEVEL_LOW 0x04U
| Interrupt on low level. More...

## Register offsets for the GPIO. Each register is 32 bits.
#define | XGPIOPS_DATA_LSW_OFFSET 0x00000000U /* Mask and Data Register LSW, WO */
#define | XGPIOPS_DATA_MSW_OFFSET 0x00000004U /* Mask and Data Register MSW, WO */
#define | XGPIOPS_DATA_OFFSET 0x00000040U /* Data Register, RW */
#define | XGPIOPS_DATA_RO_OFFSET 0x00000060U /* Data Register - Input, RO */
#define | XGPIOPS_DIRM_OFFSET 0x00000204U /* Direction Mode Register, RW */
#define | XGPIOPS_OUTEN_OFFSET 0x00000208U /* Output Enable Register, RW */
#define | XGPIOPS_INTMASK_OFFSET 0x0000020CU /* Interrupt Mask Register, RO */
#define | XGPIOPS_INTEN_OFFSET 0x00000210U /* Interrupt Enable Register, WO */
#define | XGPIOPS_INTDIS_OFFSET 0x00000214U /* Interrupt Disable Register, WO*/
#define | XGPIOPS_INTSTS_OFFSET 0x00000218U /* Interrupt Status Register, RO */
#define | XGPIOPS_INTTYPE_OFFSET 0x0000021CU /* Interrupt Type Register, RW */
#define | XGPIOPS_INTPOL_OFFSET 0x00000220U /* Interrupt Polarity Register, RW */
#define | XGPIOPS_INTANY_OFFSET 0x00000224U /* Interrupt On Any Register, RW */

## Register offsets for each Bank.
#define | XGPIOPS_DATA_MASK_OFFSET 0x00000008U /* Data/Mask Registers offset */
#define | XGPIOPS_DATA_BANK_OFFSET 0x00000004U /* Data Registers offset */
#define | XGPIOPS_REG_MASK_OFFSET 0x00000040U /* Registers offset */

## Interrupt type reset values for each bank
#define | XGPIOPS_INTTYPE_BANK0_RESET 0xFFFFFFFFU /* Resets specific to Zynq */
#define | XGPIOPS_INTTYPE_BANK1_RESET 0x003FFFFFU
#define | XGPIOPS_INTTYPE_BANK2_RESET 0xFFFFFFFFU
#define | XGPIOPS_INTTYPE_BANK3_RESET 0xFFFFFFFFU /* Reset common to both platforms */
#define | XGPIOPS_INTTYPE_BANK4_RESET 0xFFFFFFFFU /* Resets specific to Zynq Ultrascale+ MP */
#define | XGPIOPS_INTTYPE_BANK5_RESET 0xFFFFFFFFU

## Macro Definition Documentation

#define XGPIOPS_BANK0 0x00U

GPIO Bank 0.

Referenced by XGpioPs_SelfTest().

#define XGPIOPS_BANK1 0x01U

GPIO Bank 1.

#define XGPIOPS_BANK2 0x02U

GPIO Bank 2.

#define XGPIOPS_BANK3 0x03U

GPIO Bank 3.

#define XGPIOPS_BANK_MAX_PINS (u32)32

Max pins in a GPIO bank.

#define XGPIOPS_DEVICE_MAX_PIN_NUM (u32)118

Max pins in the Zynq GPIO device 0 - 31, Bank 0 32 - 53, Bank 1 54 - 85, Bank 2 86 - 117, Bank 3.

#define XGPIOPS_DEVICE_MAX_PIN_NUM_ZYNQMP (u32)174

Max pins in the Zynq Ultrascale+ MP GPIO device 0 - 25, Bank 0 26 - 51, Bank 1 52 - 77, Bank 2 78 - 109, Bank 3 110 - 141, Bank 4 142 - 173, Bank 5.

#define XGPIOPS_IRQ_TYPE_EDGE_BOTH 0x02U

Interrupt on both edges.

Referenced by XGpioPs_GetIntrTypePin(), and XGpioPs_SetIntrTypePin().

#define XGPIOPS_IRQ_TYPE_EDGE_FALLING 0x01U

Interrupt Falling edge.

Referenced by XGpioPs_GetIntrTypePin(), and XGpioPs_SetIntrTypePin().

#define XGPIOPS_IRQ_TYPE_EDGE_RISING 0x00U

Interrupt on Rising edge.

Referenced by XGpioPs_GetIntrTypePin(), and XGpioPs_SetIntrTypePin().

#define XGPIOPS_IRQ_TYPE_LEVEL_HIGH 0x03U

Interrupt on high level.

Referenced by XGpioPs_GetIntrTypePin(), and XGpioPs_SetIntrTypePin().

#define XGPIOPS_IRQ_TYPE_LEVEL_LOW 0x04U

Interrupt on low level.

Referenced by XGpioPs_GetIntrTypePin(), and XGpioPs_SetIntrTypePin().

#define XGPIOPS_MAX_BANKS 0x04U

Max banks in a Zynq GPIO device.

#define XGPIOPS_MAX_BANKS_ZYNQMP 0x06U

Max banks in a Zynq Ultrascale+ MP GPIO device.

#define XGpioPs_ReadReg | ( |  | BaseAddr,
|  |  | RegOffset
| ) |  | Xil_In32((BaseAddr) + (u32)(RegOffset))

This macro reads the given register.

Parameters

  BaseAddr | is the base address of the device.
  RegOffset | is the register offset to be read.

Returns
  The 32-bit value of the register

Note
  None.

Referenced by XGpioPs_GetDirection(), XGpioPs_GetDirectionPin(), XGpioPs_GetIntrType(), XGpioPs_GetIntrTypePin(), XGpioPs_GetOutputEnable(), XGpioPs_GetOutputEnablePin(), XGpioPs_IntrClearPin(), XGpioPs_IntrGetEnabled(), XGpioPs_IntrGetEnabledPin(), XGpioPs_IntrGetStatus(), XGpioPs_IntrGetStatusPin(), XGpioPs_Read(), XGpioPs_ReadPin(), XGpioPs_SetDirectionPin(), XGpioPs_SetIntrTypePin(), and XGpioPs_SetOutputEnablePin().

#define XGpioPs_WriteReg | ( |  | BaseAddr,
|  |  | RegOffset,
|  |  | Data
| ) |  | Xil_Out32((BaseAddr) + (u32)(RegOffset), (u32)(Data))

This macro writes to the given register.

Parameters

  BaseAddr | is the base address of the device.
  RegOffset | is the offset of the register to be written.
  Data | is the 32-bit value to write to the register.

Returns
  None.

Note
  None.

Referenced by XGpioPs_IntrClear(), XGpioPs_IntrClearPin(), XGpioPs_IntrDisable(), XGpioPs_IntrDisablePin(), XGpioPs_IntrEnable(), XGpioPs_IntrEnablePin(), XGpioPs_SetDirection(), XGpioPs_SetDirectionPin(), XGpioPs_SetIntrType(), XGpioPs_SetIntrTypePin(), XGpioPs_SetOutputEnable(), XGpioPs_SetOutputEnablePin(), XGpioPs_Write(), and XGpioPs_WritePin().

## Typedef Documentation

typedef void(* XGpioPs_Handler)(void *CallBackRef, u32 Bank, u32 Status)

This handler data type allows the user to define a callback function to handle the interrupts for the GPIO device.

The application using this driver is expected to define a handler of this type, to support interrupt driven mode. The handler executes in an interrupt context such that minimal processing should be performed.

Parameters

  CallBackRef | is a callback reference passed in by the upper layer when setting the callback functions for a GPIO bank. It is passed back to the upper layer when the callback is invoked. Its type is not important to the driver component, so it is a void pointer.
  Bank | is the bank for which the interrupt status has changed.
  Status | is the Interrupt status of the GPIO bank.

## Function Documentation

void StubHandler | ( | const void * | CallBackRef,
|  | u32 | Bank,
|  | u32 | Status
| ) |  |

This is a stub for the status callback.

The stub is here in case the upper layers do not set the handler.

Parameters

  CallBackRef | is a pointer to the upper layer callback reference
  Bank | is the GPIO Bank in which an interrupt occurred.
  Status | is the Interrupt status of the GPIO bank.

Returns
  None.

Note
  None.

u32 XGpioPs_GetDirection | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank
| ) |  |

Get the Direction of the pins of the specified GPIO Bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.

Returns
  Returns a 32 bit mask of the Direction register. Bits with 0 are in Input mode, bits with 1 are in Output Mode.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_ReadReg.

u32 XGpioPs_GetDirectionPin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

Get the Direction of the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the Direction is to be retrieved. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Returns
  Direction of the specified pin.
  - 0 for Input Direction
  - 1 for Output Direction

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.

void XGpioPs_GetIntrType | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 * | IntrType,
|  | u32 * | IntrPolarity,
|  | u32 * | IntrOnAny
| ) |  |

This function is used for getting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.

Parameters

  InstancePtr | is a pointer to an XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  IntrType | returns the 32 bit mask of the interrupt type. 0 means Level Sensitive and 1 means Edge Sensitive.
  IntrPolarity | returns the 32 bit mask of the interrupt polarity. 0 means Active Low or Falling Edge and 1 means Active High or Rising Edge.
  IntrOnAny | returns the 32 bit mask of the interrupt trigger for edge triggered interrupts. 0 means trigger on single edge using the configured interrupt polarity and 1 means trigger on both edges.

Returns
  None.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_ReadReg.

Referenced by XGpioPs_SelfTest().

u8 XGpioPs_GetIntrTypePin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

This function returns the IRQ Type of a given GPIO pin.

Parameters

  InstancePtr | is a pointer to an XGpioPs instance.
  Pin | is the pin number whose IRQ type is to be obtained. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Returns
  None.

Note
  Use XGPIOPS_IRQ_TYPE_* defined in xgpiops.h for the IRQ type returned by this function.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGPIOPS_IRQ_TYPE_EDGE_BOTH, XGPIOPS_IRQ_TYPE_EDGE_FALLING, XGPIOPS_IRQ_TYPE_EDGE_RISING, XGPIOPS_IRQ_TYPE_LEVEL_HIGH, XGPIOPS_IRQ_TYPE_LEVEL_LOW, and XGpioPs_ReadReg.

u32 XGpioPs_GetOutputEnable | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank
| ) |  |

Get the Output Enable status of the pins of the specified GPIO Bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.

Returns
  Returns a a 32 bit mask of the Output Enable register. Bits with 0 are in Disabled state, bits with 1 are in Enabled State.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_ReadReg.

u32 XGpioPs_GetOutputEnablePin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

Get the Output Enable status of the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the Output Enable status is to be retrieved. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Returns
  Output Enable of the specified pin.
  - 0 if Output Enable is disabled for this pin
  - 1 if Output Enable is enabled for this pin

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.

void XGpioPs_IntrClear | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 | Mask
| ) |  |

This function clears pending interrupt(s) with the provided mask.

This function should be called after the software has serviced the interrupts that are pending.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  Mask | is the mask of the interrupts to be cleared. Bit positions of 1 will be cleared. Bit positions of 0 will not change the previous interrupt status.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_WriteReg.

Referenced by XGpioPs_IntrHandler().

void XGpioPs_IntrClearPin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

This function clears the specified pending interrupt.

This function should be called after the software has serviced the interrupts that are pending.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the interrupt status is to be cleared. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs_ReadReg, and XGpioPs_WriteReg.

void XGpioPs_IntrDisable | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 | Mask
| ) |  |

This function disables the interrupts for the specified pins in the specified bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  Mask | is the bit mask of the pins for which interrupts are to be disabled. Bit positions of 1 will be disabled. Bit positions of 0 will keep the previous setting.

Returns
  None.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_WriteReg.

Referenced by XGpioPs_SelfTest().

void XGpioPs_IntrDisablePin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

This function disables the interrupts for the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the interrupt is to be disabled. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Returns
  None.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.

void XGpioPs_IntrEnable | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 | Mask
| ) |  |

This function enables the interrupts for the specified pins in the specified bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  Mask | is the bit mask of the pins for which interrupts are to be enabled. Bit positions of 1 will be enabled. Bit positions of 0 will keep the previous setting.

Returns
  None.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_WriteReg.

Referenced by XGpioPs_SelfTest().

void XGpioPs_IntrEnablePin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

This function enables the interrupt for the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the interrupt is to be enabled. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Returns
  None.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.

u32 XGpioPs_IntrGetEnabled | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank
| ) |  |

This function returns the interrupt enable status for a bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.

Returns
  Enabled interrupt(s) in a 32-bit format. Bit positions with 1 indicate that the interrupt for that pin is enabled, bit positions with 0 indicate that the interrupt for that pin is disabled.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_ReadReg.

Referenced by XGpioPs_IntrHandler(), and XGpioPs_SelfTest().

u32 XGpioPs_IntrGetEnabledPin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

This function returns whether interrupts are enabled for the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the interrupt enable status is to be known. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Returns
  - TRUE if the interrupt is enabled.
  - FALSE if the interrupt is disabled.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.

u32 XGpioPs_IntrGetStatus | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank
| ) |  |

This function returns interrupt status read from Interrupt Status Register.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.

Returns
  The value read from Interrupt Status Register.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_ReadReg.

Referenced by XGpioPs_IntrHandler().

u32 XGpioPs_IntrGetStatusPin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

This function returns interrupt enable status of the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the interrupt enable status is to be known. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.

Returns
  - TRUE if the interrupt has occurred.
  - FALSE if the interrupt has not occurred.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.

void XGpioPs_IntrHandler | ( | const XGpioPs * | InstancePtr | ) |

This function is the interrupt handler for GPIO interrupts.It checks the interrupt status registers of all the banks to determine the actual bank in which an interrupt has been triggered.

It then calls the upper layer callback handler set by the function XGpioPs_SetBankHandler(). The callback is called when an interrupt

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.

Returns
  None.

Note
  This function does not save and restore the processor context such that the user must provide this processing.

References XGpioPs::Handler, XGpioPs::IsReady, XGpioPs::MaxBanks, XGpioPs::PmcGpio, XGpioPs_IntrClear(), XGpioPs_IntrGetEnabled(), and XGpioPs_IntrGetStatus().

XGpioPs_Config * XGpioPs_LookupConfig | ( | u16 | DeviceId | ) |

This function looks for the device configuration based on the unique device ID.

The table XGpioPs_ConfigTable[] contains the configuration information for each device in the system.

Parameters

  DeviceId | is the unique device ID of the device being looked up.

Returns
  A pointer to the configuration table entry corresponding to the given device ID, or NULL if no match is found.

Note
  None.

Referenced by GpioPolledExample().

u32 XGpioPs_Read | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank
| ) |  |

Read the Data register of the specified GPIO bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.

Returns
  Current value of the Data register.

Note
  This function is used for reading the state of all the GPIO pins of specified bank.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_ReadReg.

u32 XGpioPs_ReadPin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin
| ) |  |

Read Data from the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number for which the data has to be read. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP. See xgpiops.h for the mapping of the pin numbers in the banks.

Returns
  Current value of the Pin (0 or 1).

Note
  This function is used for reading the state of the specified GPIO pin.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_ReadReg.

s32 XGpioPs_SelfTest | ( | const XGpioPs * | InstancePtr | ) |

This function runs a self-test on the GPIO driver/device.

This function does a register read/write test on some of the Interrupt Registers.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.

Returns
  - XST_SUCCESS if the self-test passed.
    - XST_FAILURE otherwise.

References XGpioPs::IsReady, XGPIOPS_BANK0, XGpioPs_GetIntrType(), XGpioPs_IntrDisable(), XGpioPs_IntrEnable(), XGpioPs_IntrGetEnabled(), and XGpioPs_SetIntrType().

void XGpioPs_SetCallbackHandler | ( | XGpioPs * | InstancePtr,
|  | void * | CallBackRef,
|  | XGpioPs_Handler | FuncPointer
| ) |  |

This function sets the status callback function.

The callback function is called by the XGpioPs_IntrHandler when an interrupt occurs.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  CallBackRef | is the upper layer callback reference passed back when the callback function is invoked.
  FuncPointer | is the pointer to the callback function.

Returns
  None.

Note
  The handler is called within interrupt context, so it should do its work quickly and queue potentially time-consuming work to a task-level thread.

References XGpioPs::CallBackRef, XGpioPs::Handler, and XGpioPs::IsReady.

void XGpioPs_SetDirection | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 | Direction
| ) |  |

Set the Direction of the pins of the specified GPIO Bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  Direction | is the 32 bit mask of the Pin direction to be set for all the pins in the Bank. Bits with 0 are set to Input mode, bits with 1 are set to Output Mode.

Returns
  None.

Note
  This function is used for setting the direction of all the pins in the specified bank. The previous state of the pins is not maintained.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_WriteReg.

void XGpioPs_SetDirectionPin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin,
|  | u32 | Direction
| ) |  |

Set the Direction of the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number to which the Data is to be written. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
  Direction | is the direction to be set for the specified pin. Valid values are 0 for Input Direction, 1 for Output Direction.

Returns
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs_ReadReg, and XGpioPs_WriteReg.

void XGpioPs_SetIntrType | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 | IntrType,
|  | u32 | IntrPolarity,
|  | u32 | IntrOnAny
| ) |  |

This function is used for setting the Interrupt Type, Interrupt Polarity and Interrupt On Any for the specified GPIO Bank pins.

Parameters

  InstancePtr | is a pointer to an XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  IntrType | is the 32 bit mask of the interrupt type. 0 means Level Sensitive and 1 means Edge Sensitive.
  IntrPolarity | is the 32 bit mask of the interrupt polarity. 0 means Active Low or Falling Edge and 1 means Active High or Rising Edge.
  IntrOnAny | is the 32 bit mask of the interrupt trigger for edge triggered interrupts. 0 means trigger on single edge using the configured interrupt polarity and 1 means trigger on both edges.

Returns
  None.

Note
  This function is used for setting the interrupt related properties of all the pins in the specified bank. The previous state of the pins is not maintained. To change the Interrupt properties of a single GPIO pin, use the function XGpioPs_SetPinIntrType().

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_WriteReg.

Referenced by XGpioPs_SelfTest().

void XGpioPs_SetIntrTypePin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin,
|  | u8 | IrqType
| ) |  |

This function is used for setting the IRQ Type of a single GPIO pin.

Parameters

  InstancePtr | is a pointer to an XGpioPs instance.
  Pin | is the pin number whose IRQ type is to be set. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
  IrqType | is the IRQ type for GPIO Pin. Use XGPIOPS_IRQ_TYPE_* defined in xgpiops.h to specify the IRQ type.

Returns
  None.

Note
  None.

< Default statement is added for MISRA C compliance.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGPIOPS_IRQ_TYPE_EDGE_BOTH, XGPIOPS_IRQ_TYPE_EDGE_FALLING, XGPIOPS_IRQ_TYPE_EDGE_RISING, XGPIOPS_IRQ_TYPE_LEVEL_HIGH, XGPIOPS_IRQ_TYPE_LEVEL_LOW, XGpioPs_ReadReg, and XGpioPs_WriteReg.

void XGpioPs_SetOutputEnable | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 | OpEnable
| ) |  |

Set the Output Enable of the pins of the specified GPIO Bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  OpEnable | is the 32 bit mask of the Output Enables to be set for all the pins in the Bank. The Output Enable of bits with 0 are disabled, the Output Enable of bits with 1 are enabled.

Returns
  None.

Note
  This function is used for setting the Output Enables of all the pins in the specified bank. The previous state of the Output Enables is not maintained.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_WriteReg.

void XGpioPs_SetOutputEnablePin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin,
|  | u32 | OpEnable
| ) |  |

Set the Output Enable of the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number to which the Data is to be written. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
  OpEnable | specifies whether the Output Enable for the specified pin should be enabled. Valid values are 0 for Disabling Output Enable, 1 for Enabling Output Enable.

Returns
  None.

Note
  None.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs_ReadReg, and XGpioPs_WriteReg.

void XGpioPs_Write | ( | const XGpioPs * | InstancePtr,
|  | u8 | Bank,
|  | u32 | Data
| ) |  |

Write to the Data register of the specified GPIO bank.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Bank | is the bank number of the GPIO to operate on. Valid values are 0-3 in Zynq and 0-5 in Zynq Ultrascale+ MP.
  Data | is the value to be written to the Data register.

Returns
  None.

Note
  This function is used for writing to all the GPIO pins of the bank. The previous state of the pins is not maintained.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, XGpioPs::PmcGpio, and XGpioPs_WriteReg.

void XGpioPs_WritePin | ( | const XGpioPs * | InstancePtr,
|  | u32 | Pin,
|  | u32 | Data
| ) |  |

Write data to the specified pin.

Parameters

  InstancePtr | is a pointer to the XGpioPs instance.
  Pin | is the pin number to which the Data is to be written. Valid values are 0-117 in Zynq and 0-173 in Zynq Ultrascale+ MP.
  Data | is the data to be written to the specified pin (0 or 1).

Returns
  None.

Note
  This function does a masked write to the specified pin of the specified GPIO bank. The previous state of other pins is maintained.

References XGpioPs_Config::BaseAddr, XGpioPs::GpioConfig, XGpioPs::IsReady, and XGpioPs_WriteReg.

## Variable Documentation

XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES]

This table contains configuration information for each GPIO device in the system.

XGpioPs_Config XGpioPs_ConfigTable[XPAR_XGPIOPS_NUM_INSTANCES]

Initial value:
= {
{
(u16)XPAR_XGPIOPS_0_DEVICE_ID,
(u32)XPAR_XGPIOPS_0_BASEADDR
}
}

This table contains configuration information for each GPIO device in the system.