prc: xprc_hw.h File Reference

| prc Xilinx SDK Drivers API Documentation

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Macros
xprc_hw.h File Reference

## Macros
#define | XPrc_WriteReg(Address, Data) XPrc_Out32((Address), (u32)(Data))
| This macro writes a value to a PRC register. More...
#define | XPrc_ReadReg(Address) XPrc_In32((Address))
| This macro reads a value from a PRC register. More...
Register Bank Numbers
#define | XPRC_VSM_GENERAL_REG_BANK (0)
| General registers. More...
#define | XPRC_VSM_TRIGGER_REG_BANK (1)
| Trigger to Rm register. More...
#define | XPRC_VSM_RM_REG_BANK (2)
| Rm Information register. More...
#define | XPRC_VSM_BS_REG_BANK (3)
| Bs Information register. More...
Bank Identifier
#define | XPRC_DEFAULT_BANKID (0)
| Default Bank Identifier. More...
The Table Identifiers within a bank for each Register type
#define | XPRC_STATUS_REG_TABLE_ID (0)
| Status register Table ID. More...
#define | XPRC_CONTROL_REG_TABLE_ID (0)
| Control register Table ID. More...
#define | XPRC_SW_TRIGGER_REG_TABLE_ID (1)
| Sw Trigger register Table ID. More...
#define | XPRC_TRIGGER_REG_TABLE_ID (0)
| Trigger register Table ID. More...
#define | XPRC_RM_BS_INDEX_REG_TABLE_ID (0)
| RmBs Index register Table ID. More...
#define | XPRC_RM_CONTROL_REG_TABLE_ID (1)
| Rm Control register Table ID. More...
#define | XPRC_BS_ID_REG_TABLE_ID (0)
| Bs Identifier register Table ID. More...
#define | XPRC_BS_ADDRESS_REG_TABLE_ID (1)
| Bs Address register Table ID. More...
#define | XPRC_BS_SIZE_REG_TABLE_ID (2)
| Bs Size register Table ID. More...
#define | XPRC_DEFAULT_TABLEID (0)
| Default Table Identifier within the Bank. More...
These are not addresses. They identify the type of register to be
accessed.
#define | XPRC_STATUS_REG (0)
| Status register. More...
#define | XPRC_CONTROL_REG (1)
| Control register. More...
#define | XPRC_SW_TRIGGER_REG (2)
| Sw Trigger register. More...
#define | XPRC_TRIGGER_REG (3)
| Trigger register. More...
#define | XPRC_RM_BS_INDEX_REG (4)
| RmBs Index register. More...
#define | XPRC_RM_CONTROL_REG (5)
| Rm Control register. More...
#define | XPRC_BS_ID_REG (6)
| Bs Identifier register. More...
#define | XPRC_BS_ADDRESS_REG (7)
| Bs Address register. More...
#define | XPRC_BS_SIZE_REG (8)
| Bs Size register. More...
Control Register commands
#define | XPRC_CR_SHUTDOWN_CMD (0)
| Shutdown Command. More...
#define | XPRC_CR_RESTART_NO_STATUS_CMD (1)
| Restart With No Status Command. More...
#define | XPRC_CR_RESTART_WITH_STATUS_CMD (2)
| Restart With Status Command. More...
#define | XPRC_CR_OK_TO_PROCEED_CMD (3)
| Proceed Command. More...
#define | XPRC_CR_USER_CTRL_CMD (4)
| User Control Command. More...
The Command field
#define | XPRC_CR_CMD_FIELD_LSB (0)
| Command Field LSB. More...
#define | XPRC_CR_CMD_FIELD_WIDTH (8)
| Command Field Width. More...
#define | XPRC_CR_CMD_FIELD_MSB (XPRC_CR_CMD_FIELD_LSB + XPRC_CR_CMD_FIELD_WIDTH-1)
| Command Field MSB. More...
The Byte field
#define | XPRC_CR_BYTE_FIELD_LSB (XPRC_CR_CMD_FIELD_MSB+1)
| Byte Field LSB. More...
#define | XPRC_CR_BYTE_FIELD_WIDTH (8)
| Byte Field Width. More...
#define | XPRC_CR_BYTE_FIELD_MSB (XPRC_CR_BYTE_FIELD_LSB + XPRC_CR_BYTE_FIELD_WIDTH-1)
| Byte Field MSB. More...
The Halfword field
#define | XPRC_CR_HALFWORD_FIELD_LSB (XPRC_CR_BYTE_FIELD_MSB+1)
| Halfword Field LSB. More...
#define | XPRC_CR_HALFWORD_FIELD_WIDTH (16)
| Halfword Field Width. More...
#define | XPRC_CR_HALFWORD_FIELD_MSB (XPRC_CR_HALFWORD_FIELD_LSB + XPRC_CR_HALFWORD_FIELD_WIDTH-1)
| Halfword Field MSB. More...
Bit positions for User Control command options within the byte field
#define | XPRC_CR_USER_CONTROL_RM_SHUTDOWN_REQ_BIT (0)
| Rm Shutdown Required. More...
#define | XPRC_CR_USER_CONTROL_RM_DECOUPLE_BIT (1)
| Rm Decouple. More...
#define | XPRC_CR_USER_CONTROL_SW_SHUTDOWN_REQ_BIT (2)
| Sw_Shutdown Required. More...
#define | XPRC_CR_USER_CONTROL_SW_STARTUP_REQ_BIT (3)
| Sw Startup Required. More...
#define | XPRC_CR_USER_CONTROL_RM_RESET_BIT (4)
| Rm Reset. More...
Status Register Value
#define | XPRC_SR_SHUTDOWN_MASK (0x80)
| Shutdown State Mask. More...
State is stored in bits 2:0, Mask = 111 = 0x7
#define | XPRC_SR_STATE_MASK (0x7)
| Vsm State Mask. More...
#define | XPRC_SR_STATE_EMPTY (0)
| Empty State Of VSM. More...
#define | XPRC_SR_STATE_HW_SHUTDOWN (1)
| Hardware Shutdown State of VSM. More...
#define | XPRC_SR_STATE_SW_SHUTDOWN (2)
| Software Shutdown State of VSM. More...
#define | XPRC_SR_STATE_RM_UNLOAD (3)
| Reconfigurable Module Unload State Of VSM. More...
#define | XPRC_SR_STATE_RM_LOAD (4)
| Reconfigurable Module Load State Of VSM. More...
#define | XPRC_SR_STATE_SW_STARTUP (5)
| Software Startup State of VSM. More...
#define | XPRC_SR_STATE_RM_RESET (6)
| Reset State of VSM. More...
#define | XPRC_SR_STATE_FULL (7)
| Full State Of VSM. More...
#define | XPRC_SR_ERROR_SHIFT (3)
| Error Shift. More...
Errors are stored in bits 6:3, Mask = 1111000 = 0x78
#define | XPRC_SR_ERROR_MASK (0x78)
| Error Codes Mask. More...
#define | XPRC_SR_UNKNOWN_ERROR (15)
| Unknown Error. More...
#define | XPRC_SR_BS_COMPATIBLE_ERROR (14)
| Bitstream Compatible Error. More...
#define | XPRC_SR_DECOMPRESS_BAD_FORMAT_ERROR (8)
| Bad compression format error. More...
#define | XPRC_SR_DECOMPRESS_BAD_SIZE_ERROR (7)
| Bad compression size error. More...
#define | XPRC_SR_FETCH_AND_CP_LOST_ERROR (6)
| Fetch and Lost Error. More...
#define | XPRC_SR_FETCH_AND_BS_ERROR (5)
| Fetch and Bitstream Error. More...
#define | XPRC_SR_FETCH_ERROR (4)
| Fetch Error. More...
#define | XPRC_SR_CP_LOST_ERROR (3)
| CP Lost Error. More...
#define | XPRC_SR_BS_ERROR (2)
| Bitstream Error. More...
#define | XPRC_SR_BAD_CONFIG_ERROR (1)
| Bad Configuration Error. More...
#define | XPRC_SR_NO_ERROR (0)
| No Error. More...
#define | XPRC_SR_RMID_SHIFT (8)
| Rm Identifier Shift. More...
RM_ID is stored in bits 23:8,
Mask = 111111111111111100000000 = 0xFFFF00
#define | XPRC_SR_RMID_MASK (0xFFFF00)
| Rm Identifier Mask. More...
#define | XPRC_SR_BSID_SHIFT (24)
| Bs Identifier Shift. More...
BS_ID is stored in bits 31:24,
Mask = 11111111000000000000000000000000
#define | XPRC_SR_BSID_MASK (0xFF000000)
| Bs Identifier Mask. More...
Software Trigger Register Values
This is the largest ID possible. The bits used are will be sized in hardware to match the number of triggers actually allocated.
#define | XPRC_SW_TRIGGER_ID_MASK (0x7FFFFFFF)
| Sw Trigger Id Mask. More...
#define | XPRC_SW_TRIGGER_PENDING_MASK (0x80000000)
| Sw Trigger Pending Mask. More...
#define | XPRC_RM_BS_INDEX_SHIFT (0)
| Rm Bs Index Shift. More...
#define | XPRC_RM_BS_INDEX_MASK (0x0000FFFF)
| Rm Bs Index Mask. More...
#define | XPRC_RM_CLEARING_BS_INDEX_SHIFT (16)
| Clearing Bs Index Shift. More...
#define | XPRC_RM_CLEARING_BS_INDEX_MASK (0xFFFF0000)
| Clearing Bs Index Mask. More...
RM Control Register constants
#define | XPRC_RM_CR_SHUTDOWN_REQUIRED_SHIFT (0)
| Shutdown Required Shift. More...
#define | XPRC_RM_CR_STARTUP_REQUIRED_SHIFT (2)
| Startup Required Shift. More...
#define | XPRC_RM_CR_RESET_REQUIRED_SHIFT (3)
| Reset Required Shift. More...
#define | XPRC_RM_CR_RESET_DURATION_SHIFT (5)
| Reset Duration Shift. More...
Shutdown required stored in bits 0:1, 0000000000011 = 0x3
#define | XPRC_RM_CR_SHUTDOWN_REQUIRED_MASK (0x3)
| Shutdown Required Mask. More...
Startup required stored in bit 2, 0000000000100 = 0x4
#define | XPRC_RM_CR_STARTUP_REQUIRED_MASK (0x4)
| Startup Required Mask. More...
Reset required stored in bits 3:4, 0000000011000 = 0x18
#define | XPRC_RM_CR_RESET_REQUIRED_MASK (0x18)
| Reset Required Mask. More...
Reset Duration stored in bits 5:12, 1111111100000 = 0x1FE0
#define | XPRC_RM_CR_RESET_DURATION_MASK (0x1FE0)
| Reset Duration Mask. More...
#define | XPRC_RM_CR_NO_SHUTDOWN_REQUIRED (0)
| No Shutdown Required. More...
#define | XPRC_RM_CR_HW_SHUTDOWN_REQUIRED (1)
| Hardware Only Shutdown Required. More...
#define | XPRC_RM_CR_HW_SW_SHUTDOWN_REQUIRED (2)
| Hardware Shutdown and then Software Shutdown Required. More...
#define | XPRC_RM_CR_SW_HW_SHUTDOWN_REQUIRED (3)
| Software Shutdown and then Hardware Shutdown Required. More...
#define | XPRC_RM_CR_STARTUP_NOT_REQUIRED (0)
| Startup Not Required. More...
#define | XPRC_RM_CR_SW_STARTUP_REQUIRED (1)
| Software Only Startup Required. More...
#define | XPRC_RM_CR_NO_RESET_REQUIRED (0)
| No Reset Required. More...
#define | XPRC_RM_CR_LOW_RESET_REQUIRED (2)
| Low Reset Required. More...
#define | XPRC_RM_CR_HIGH_RESET_REQUIRED (3)
| High Reset Required. More...