qspipsu: xqspipsu_hw.h File Reference

| qspipsu Xilinx SDK Drivers API Documentation

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Macros
xqspipsu_hw.h File Reference

## Macros
#define | XQSPIPS_BASEADDR 0XFF0F0000U
| QSPI Base Address. More...
#define | XQSPIPSU_BASEADDR 0xFF0F0100U
| GQSPI Base Address. More...
#define | XQSPIPS_EN_REG ( ( XQSPIPS_BASEADDR ) + 0X00000014U )
| Register: XQSPIPS_EN_REG. More...
#define | XQSPIPSU_CFG_OFFSET 0X00000000U
| Register: XQSPIPSU_CFG. More...
#define | XQSPIPSU_LQSPI_CR_OFFSET 0X000000A0U
| Register: XQSPIPSU_CFG. More...
#define | XQSPIPSU_LQSPI_CR_LINEAR_MASK 0x80000000U
| LQSPI mode enable. More...
#define | XQSPIPSU_LQSPI_CR_TWO_MEM_MASK 0x40000000U
| Both memories or one. More...
#define | XQSPIPSU_LQSPI_CR_SEP_BUS_MASK 0x20000000U
| Separate memory bus. More...
#define | XQSPIPSU_LQSPI_CR_U_PAGE_MASK 0x10000000U
| Upper memory page. More...
#define | XQSPIPSU_LQSPI_CR_ADDR_32BIT_MASK 0x01000000U
| Upper memory page. More...
#define | XQSPIPSU_LQSPI_CR_MODE_EN_MASK 0x02000000U
| Enable mode bits. More...
#define | XQSPIPSU_LQSPI_CR_MODE_ON_MASK 0x01000000U
| Mode on. More...
#define | XQSPIPSU_LQSPI_CR_MODE_BITS_MASK 0x00FF0000U
| Mode value for dual I/O or quad I/O. More...
#define | XQSPIPS_LQSPI_CR_INST_MASK 0x000000FFU
| Read instr code. More...
#define | XQSPIPS_LQSPI_CR_RST_STATE 0x80000003U
| Default LQSPI CR value. More...
#define | XQSPIPS_LQSPI_CR_4_BYTE_STATE 0x88000013U
| Default 4 Byte LQSPI CR value. More...
#define | XQSPIPS_LQSPI_CFG_RST_STATE 0x800238C1U
| Default LQSPI CFG value. More...
#define | XQSPIPSU_ISR_OFFSET 0X00000004U
| Register: XQSPIPSU_ISR. More...
#define | XQSPIPSU_IER_OFFSET 0X00000008U
| Register: XQSPIPSU_IER. More...
#define | XQSPIPSU_IDR_OFFSET 0X0000000CU
| Register: XQSPIPSU_IDR. More...
#define | XQSPIPSU_IMR_OFFSET 0X00000010U
| Register: XQSPIPSU_IMR. More...
#define | XQSPIPSU_EN_OFFSET 0X00000014U
| Register: XQSPIPSU_EN_REG. More...
#define | XQSPIPSU_TXD_OFFSET 0X0000001CU
| Register: XQSPIPSU_TXD. More...
#define | XQSPIPSU_RXD_OFFSET 0X00000020U
| Register: XQSPIPSU_RXD. More...
#define | XQSPIPSU_TX_THRESHOLD_OFFSET 0X00000028U
| Register: XQSPIPSU_TX_THRESHOLD. More...
#define | XQSPIPSU_RX_THRESHOLD_OFFSET 0X0000002CU
| Register: XQSPIPSU_RX_THRESHOLD. More...
#define | XQSPIPSU_GPIO_OFFSET 0X00000030U
| Register: XQSPIPSU_GPIO. More...
#define | XQSPIPSU_LPBK_DLY_ADJ_OFFSET 0X00000038U
| Register: XQSPIPSU_LPBK_DLY_ADJ. More...
#define | XQSPIPSU_GEN_FIFO_OFFSET 0X00000040U
| Register: XQSPIPSU_GEN_FIFO. More...
#define | XQSPIPSU_SEL_OFFSET 0X00000044U
| Register: XQSPIPSU_SEL. More...
#define | XQSPIPSU_FIFO_CTRL_OFFSET 0X0000004CU
| Register: XQSPIPSU_FIFO_CTRL. More...
#define | XQSPIPSU_GF_THRESHOLD_OFFSET 0X00000050U
| Register: XQSPIPSU_GF_THRESHOLD. More...
#define | XQSPIPSU_POLL_CFG_OFFSET 0X00000054U
| Register: XQSPIPSU_POLL_CFG. More...
#define | XQSPIPSU_P_TO_OFFSET 0X00000058U
| Register: XQSPIPSU_P_TIMEOUT. More...
#define | XQSPIPSU_XFER_STS_OFFSET 0X0000005CU
| Register: XQSPIPSU_XFER_STS. More...
#define | XQSPIPSU_GF_SNAPSHOT_OFFSET 0X00000060U
| Register: XQSPIPSU_GF_SNAPSHOT. More...
#define | XQSPIPSU_RX_COPY_OFFSET 0X00000064U
| Register: XQSPIPSU_RX_COPY. More...
#define | XQSPIPSU_MOD_ID_OFFSET 0X000000FCU
| Register: XQSPIPSU_MOD_ID. More...
#define | XQSPIPSU_QSPIDMA_DST_ADDR_OFFSET 0X00000700U
| Register: XQSPIPSU_QSPIDMA_DST_ADDR. More...
#define | XQSPIPSU_QSPIDMA_DST_SIZE_OFFSET 0X00000704U
| Register: XQSPIPSU_QSPIDMA_DST_SIZE. More...
#define | XQSPIPSU_QSPIDMA_DST_STS_OFFSET 0X00000708U
| Register: XQSPIPSU_QSPIDMA_DST_STS. More...
#define | XQSPIPSU_QSPIDMA_DST_CTRL_OFFSET 0X0000070CU
| Register: XQSPIPSU_QSPIDMA_DST_CTRL. More...
#define | XQSPIPSU_QSPIDMA_DST_I_STS_OFFSET 0X00000714U
| Register: XQSPIPSU_QSPIDMA_DST_I_STS. More...
#define | XQSPIPSU_QSPIDMA_DST_I_EN_OFFSET 0X00000718U
| Register: XQSPIPSU_QSPIDMA_DST_I_EN. More...
#define | XQSPIPSU_QSPIDMA_DST_I_DIS_OFFSET 0X0000071CU
| Register: XQSPIPSU_QSPIDMA_DST_I_DIS. More...
#define | XQSPIPSU_QSPIDMA_DST_IMR_OFFSET 0X00000720U
| Register: XQSPIPSU_QSPIDMA_DST_IMR. More...
#define | XQSPIPSU_QSPIDMA_DST_CTRL2_OFFSET 0X00000724U
| Register: XQSPIPSU_QSPIDMA_DST_CTRL2. More...
#define | XQSPIPSU_QSPIDMA_DST_ADDR_MSB_OFFSET 0X00000728U
| Register: XQSPIPSU_QSPIDMA_DST_ADDR_MSB. More...
#define | XQSPIPSU_QSPIDMA_FUTURE_ECO_OFFSET 0X00000EFCU
| Register: XQSPIPSU_QSPIDMA_FUTURE_ECO. More...
#define | XQspiPsu_ReadReg(BaseAddress, RegOffset) XQspiPsu_In32((BaseAddress) + (RegOffset))
| Read a register. More...
#define | XQspiPsu_WriteReg(BaseAddress, RegOffset, RegisterValue) XQspiPsu_Out32((BaseAddress) + (RegOffset), (RegisterValue))
| Write to a register. More...